Conductive substrate

Abstract

A conductive substrate (1) is provided with a substrate (2) having a flat surface (2a), a first electrode (6), and an intermediate conductive layer (8). The first electrode (6) is configured from a plurality of conductive wires (7), and each of the plurality of conductive wires (7) is formed from a conductive metal embedded on the side of the substrate (2) on which the flat surface (2a) is located. The intermediate conductive layer (8) is formed in the form of a thin film having a uniform thickness, and has a resistance value higher than the resistance value of each of the conductive wires (7). The surface of each conductive line (7) is configured so as to be substantially flush with the flat surface (2a) of the substrate (2).

Description

Technical Field

[0001] The present disclosure relates to a conductive substrate. Background Art

[0002] Hitherto, conductive substrates applied to solar cells, OLEDs, dimming devices, etc. have been known. For example, as a conductive substrate applied to a solar cell, the conductive substrate shown in Patent Document 1 is known.

[0003] Patent Document 1 discloses an organic thin-film solar cell using a transparent resin film. For example, the Figure 7 organic thin-film solar cell shown in Patent Document 1 includes: a transparent substrate formed of a transparent resin film, a grid electrode formed on the transparent substrate, a transparent electrode formed on the transparent substrate, a hole extraction layer formed on the transparent electrode, a photoelectric conversion layer formed on the hole extraction layer, an electron extraction layer formed on the photoelectric conversion layer, and a counter electrode formed on the electron extraction layer.

[0004] Patent Document 1: Japanese Unexamined Patent Publication No. 2010-157681 Summary of the Invention

[0005] -Technical Problem to be Solved by the Invention-

[0006] In the above-mentioned organic thin-film solar cell, the grid electrode protrudes from the upper surface of the transparent substrate toward the side where the counter electrode is located. In a cross-sectional view, the transparent electrode covers each grid electrode, and the portion corresponding to the position of each grid electrode has a convex shape. And, near the corner of the convex shape of each grid electrode, the thickness of the transparent electrode becomes extremely thin.

[0007] In the case where the transparent electrode is formed so thin like this, it is difficult for the transparent electrode to cover the vicinity of the corner of each grid electrode. In particular, the vicinity of the above-mentioned corner of each grid electrode is likely to be exposed. As a result, the transparent electrode may sometimes be disconnected in the longitudinal direction of the convex shape near the above-mentioned corner of each grid electrode. In this case, the function of the transparent electrode is impaired.

[0008] In addition, when the transparent electrode, hole extraction layer, photoelectric conversion layer, and electron extraction layer are each formed to be relatively thin, the layers may sometimes be disconnected in the longitudinal direction of the protruding shape with the corners of the respective grid electrodes as boundaries. In this case, the functions of the respective layers are impaired. Further, if the layers are disconnected, all the layers from the transparent electrode located around the respective grid electrodes to the counter electrode may slide down toward the transparent substrate side, and sometimes the distance between the counter electrode formed on the electron extraction layer and the corners of the respective grid electrodes may be reduced. In this case, there is a possibility that the counter electrode may come into contact with the corners of the respective grid electrodes, resulting in an electrical short circuit.

[0009] As described above, in the structure shown in Patent Document 1, the original functions of the device using the conductive substrate may sometimes be impaired.

[0010] The present disclosure has been made to solve the above-described technical problems, and an object thereof is to: not impair the original functions of a device using a conductive substrate.

[0011] -Technical Solution for Solving Technical Problems-

[0012] To achieve the above object, an embodiment of the present disclosure relates to a conductive substrate for mounting a functional layer and a second electrode. The conductive substrate includes a substrate, a first electrode, and an intermediate conductive layer. The substrate has a flat surface. The first electrode is formed on the substrate. The intermediate conductive layer is laminated on the substrate. The intermediate conductive layer has conductivity and forms a carrier path for electrons or a carrier path for holes. The first electrode is composed of a plurality of conductive wires, and each of the plurality of conductive wires is formed of a conductive metal buried on the side where the flat surface of the substrate is located. The intermediate conductive layer is formed into a thin film having a uniform thickness and has a resistance value higher than the resistance value of each of the plurality of conductive wires. The surface of the intermediate conductive layer on the side opposite to the surface in contact with the flat surface of the substrate is configured to be able to dispose the functional layer and the second electrode. And the surface of each of the plurality of conductive wires is configured to be substantially flush with the flat surface.

[0013] -Effects of the Invention-

[0014] According to the present disclosure, the original functions of a device using a conductive substrate can be achieved without being impaired. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 is a partially enlarged top view schematically showing a part of a conductor pattern in a conductive component including the conductive substrate according to the embodiment of the present disclosure;

[0016] Figure 2 is a cross-sectional view taken along line II-II of Figure 1 ;

[0017] Figure 3 is a partial enlarged cross-sectional view showing an enlarged view of part III of Figure 2 and is a diagram briefly showing the carrier path when a conductive member including a conductive substrate is applied to a solar cell;

[0018] Figure 4 is a simplified diagram showing an enlarged view of a state where the flat surface of the substrate is flush with the surface of the conductive wire;

[0019] Figure 5 is a diagram briefly showing the carrier path when a conductive member including a conductive substrate is applied to an OLED as a modification example 1 of the embodiment, corresponding to Figure 3 ;

[0020] Figure 6 is a diagram briefly showing the carrier path when a conductive member including a conductive substrate is applied to a dimming device as a modification example 2 of the embodiment, corresponding to Figure 3 ;

[0021] Figure 7 is a simplified diagram showing an enlarged view of a state where the surface of the conductive wire is recessed downward from the flat surface of the substrate as a modification example 3 of the embodiment;

[0022] Figure 8 is a diagram for magnifying and briefly showing a part of a conductor pattern different from the conductor pattern shown in Figure 1 as a modification example 4 of the embodiment, corresponding to Figure 1 ;

[0023] Figure 9 is a diagram briefly showing the cross-sectional structure of a conductive member including a conductive substrate provided with a first electrode and a conductive substrate provided with a second electrode as a modification example 5 of the embodiment, corresponding to Figure 3 . DETAILED DESCRIPTION OF THE EMBODIMENTS

[0024] Hereinafter, embodiments of the present disclosure will be described in detail based on the drawings. The following description of the embodiments is merely illustrative in nature and is not intended to limit the present disclosure, its application, or its use.

[0025] An embodiment of the present disclosure is a conductive substrate 1 for mounting a functional layer 10a and a second electrode 14 (refer to Figure 2 ). As Figure 2 shown, the conductive substrate 1 includes a substrate 2, a first electrode 6, and an intermediate conductive layer 8. The conductive substrate 1 is disposed on the lower side of the functional layer 10a (the lower surface side of the hole transport layer 11a described later).

[0026] Figure 1 Briefly shown is a part of the conductive member 100. As Figure 2 shown, the conductive member 100 includes a conductive substrate 1, a functional layer 10a, and a second electrode 14. The conductive member 100 can be applied to solar cells, OLEDs (organic light-emitting diodes), dimming devices, and the like. In this embodiment, a way of applying the conductive member 100 to a solar cell is exemplified.

[0027] Here, in Figure 1 the direction from the left side to the right side of the paper surface in Figure 1 is defined as the "X direction", and the direction from the lower side to the upper side of the paper surface in Figure 1 is defined as the "Y direction".

[0028] In addition, in the following description, in the thickness direction of the conductive member 100 shown in Figure 2 the side where the second electrode 14 to be described later is located is taken as the "upper side" of the conductive member 100, and the opposite side (the side where the film base material 3 to be described later is located) is taken as the "lower side" of the conductive member 100, thereby defining the positional relationship of each element constituting the conductive member 100. It should be noted that such a positional relationship has nothing to do with the actual direction in which the conductive member 100 is assembled into the device.

[0029] (Substrate)

[0030] As Figure 2 shown, the substrate 2 has transparency and light transmittance. The substrate 2 has a flat surface 2a. In this embodiment, the flat surface 2a corresponds to the upper surface of the resin layer 4 to be described later.

[0031] The substrate 2 includes a film base material 3. The film base material 3 is formed of a resin material having flexibility, transparency, and light transmittance. The thickness of the film base material 3 is, for example, 20 μm to 200 μm.

[0032] Examples of the resin material include resin materials such as PET (polyethylene terephthalate), polycarbonate, COP (cycloolefin polymer), and COC (cycloolefin copolymer).

[0033] The substrate 2 includes a resin layer 4. The resin layer 4 is formed of a resin material having insulation and light transmittance. The thickness of the resin layer 4 is, for example, 1 μm to 10 μm.

[0034] The resin layer 4 is laminated on the upper side of the film base material 3. The portion of the upper surface of the resin layer 4 (i.e., the flat surface 2a) except for the recess 5 to be described later is formed to be substantially flat.

[0035] As Figure 3 and Figure 4As shown, a plurality of recesses 5 are provided in the resin layer 4. The recesses 5 are recessed downward from the upper surface of the resin layer 4 and have a bottomed shape. The plurality of recesses 5 extend linearly in such a manner as to form a predetermined pattern on the upper surface (flat surface 2a) of the resin layer 4. It should be noted that the plurality of recesses 5 are formed on the upper surface of the resin layer 4 by methods such as hot embossing, lithography-based etching, and laser processing.

[0036] (First electrode)

[0037] As Figure 1 and Figure 2 shown, the first electrode 6 is formed by a conductor pattern formed on the flat surface 2a side (upper surface side of the resin layer 4) of the substrate 2. The conductor pattern is composed of a plurality of conductive wires 7. The plurality of conductive wires 7 are arranged on the flat surface 2a side of the substrate 2.

[0038] The above-mentioned conductor pattern is arranged in such a manner as to form a predetermined pattern on the flat surface 2a of the substrate 2. In Figure 1 , as an example of the above-mentioned predetermined pattern, a grid pattern formed by arranging a plurality of conductive wires 7 in a grid shape is shown.

[0039] The above-mentioned grid pattern is formed by the intersection of a plurality of conductive wires 7 extending in the X direction and a plurality of conductive wires 7 extending in the Y direction. The plurality of conductive wires 7 extending in the X direction are arranged at equal intervals. The plurality of conductive wires 7 extending in the Y direction are arranged at equal intervals. In this embodiment, a unit formed by two adjacent conductive wires 7, 7 extending in the X direction and two adjacent conductive wires 7, 7 extending in the Y direction is formed into a square.

[0040] Each conductive wire 7 is a very thin wire. The wire width of each conductive wire 7 is configured to be, for example, 10 μm or less.

[0041] As Figures 2 to 4 shown, each conductive wire 7 is formed of a conductive metal embedded in each recess 5 of the substrate 2. As the conductive metal, for example, copper (Cu), silver (Ag), gold (Au), aluminum (Al), nickel (Ni), or an alloy containing at least one of these metals is suitable.

[0042] As a characteristic structure according to an embodiment of the present disclosure, the surface of each conductive wire 7 is configured to be substantially flush with the flat surface 2a of the substrate 2 in a state of being exposed from the flat surface 2a of the substrate 2. As Figure 4 shown, in this embodiment, a state where the flat surface 2a of the substrate 2 is completely flush with the surface of each conductive wire 7 is exemplified. It should be noted that in Figure 4 , the illustration of the intermediate conductive layer 8 is omitted for the sake of easy illustration.

[0043] (Intermediate conductive layer)

[0044] As Figure 2 and Figure 3 shown, the intermediate conductive layer 8 is stacked on the flat surface 2a of the substrate 2. Specifically, the intermediate conductive layer 8 is disposed between the resin layer 4 and the hole transport layer 11a described later. As Figure 3 shown, a carrier path for holes is formed in the intermediate conductive layer 8 of this embodiment. It should be noted that, in Figure 2 and Figure 3 , in order to show the intermediate conductive layer 8 separately from other structures, the intermediate conductive layer 8 is shown by dot shading.

[0045] The intermediate conductive layer 8 is formed in a thin film shape with a uniform thickness. The intermediate conductive layer 8 is formed to have a thickness of 3.0 μm or less. The thickness of the intermediate conductive layer 8 is preferably 1 μm or less. It should be noted that, when the intermediate conductive layer 8 is formed in a film shape using indium tin oxide (ITO) described later, the thickness of the intermediate conductive layer 8 is, for example, about 0.02 μm (20 nm). In addition, when the intermediate conductive layer 8 is formed in a film shape using PEDOT / PSS described later, the thickness of the intermediate conductive layer 8 is, for example, about 0.1 μm (100 nm).

[0046] The intermediate conductive layer 8 has conductivity and transparency. As materials for the intermediate conductive layer 8, for example, the following can be cited: metal oxides, transparent conductive polymers, transparent conductive inks, ultrathin film conductive metals, coatings containing π-conjugated conductive polymers, and structures containing metal nanowires. The intermediate conductive layer 8 has a resistance value higher than that of each conductive wire 7.

[0047] As the above-mentioned metal oxides constituting the intermediate conductive layer 8, for example, the following can be cited: indium tin oxide (ITO: Indium Tin Oxide), indium zinc oxide (IZO: Indium Zinc Oxide).

[0048] As the above-mentioned metal oxides, it can also be: zinc oxide, indium oxide, tin oxide doped with antimony, tin oxide doped with fluorine, zinc oxide doped with aluminum, zinc oxide doped with potassium, zinc oxide doped with silicon, and it can also be metal oxides such as zinc oxide - tin oxide systems, indium oxide - tin oxide systems, zinc oxide - indium oxide - magnesium oxide systems, and furthermore, it can also be a material formed by compounding two or more of these metal oxides.

[0049] As the above-mentioned transparent conductive polymer, for example, PEDOT / PSS (poly-3,4-ethylenedioxythiophene / polysulfonic acid) can be cited. As the above-mentioned transparent conductive ink, for example, a transparent conductive ink containing carbon nanotubes or silver nanofibers in a binder can be cited.

[0050] As the above-mentioned ultra-thin film conductive metal, it is preferably copper (Cu), silver (Ag), gold (Au), aluminum (Al), nickel (Ni), or an alloy containing at least one of these metals. It should be noted that when using the ultra-thin film conductive metal as the material of the intermediate conductive layer 8, it is preferable to form the metal into a thin film state to the extent that transparency is not impaired.

[0051] As Figure 2 and Figure 3 shown, the intermediate conductive layer 8 is disposed above the plurality of conductive wires 7 on the flat surface 2a side of the substrate 2. By this arrangement, the intermediate conductive layer 8 functions as a barrier layer for protecting the plurality of conductive wires 7. The plurality of conductive wires 7 are protected by the intermediate conductive layer 8, thereby improving the environmental resistance and reliability of the conductive substrate 1.

[0052] In order for the intermediate conductive layer 8 to function as a barrier layer, it is preferable to set the thickness of the intermediate conductive layer 8 as described below according to the material used for the intermediate conductive layer 8.

[0053] For example, when the intermediate conductive layer 8 is formed of "amorphous" indium tin oxide (ITO), it is preferable to set the thickness of the intermediate conductive layer 8 to be 20 nm or more and 100 nm or less. Here, when the thickness of the intermediate conductive layer 8 formed of "amorphous" ITO is 20 nm, the surface resistivity of the intermediate conductive layer 8 calculated from this thickness value is about 500 Ω / sq. On the other hand, when the thickness of the intermediate conductive layer 8 is 100 nm, the surface resistivity of the intermediate conductive layer 8 calculated from this thickness value is about 100 Ω / sq. That is, when the intermediate conductive layer 8 is formed of "amorphous" ITO, if the thickness of the intermediate conductive layer 8 is set to be 20 nm or more and 100 nm or less, the surface resistivity of the intermediate conductive layer 8 is 100 Ω / sq or more and 500 Ω / sq or less. It should be noted that in the present disclosure, the above-mentioned "amorphous" refers to a crystalline state with a relatively low crystallinity (specifically, a crystalline state with a crystallinity of 5% or less).

[0054] In addition, for example, when the intermediate conductive layer 8 is formed of "crystalline" indium tin oxide (ITO), it is preferable to set the thickness of the intermediate conductive layer 8 to be 20 nm or more and 60 nm or less. Here, when the thickness of the intermediate conductive layer 8 formed of "crystalline" ITO is 20 nm, the surface resistivity of the intermediate conductive layer 8 calculated based on this thickness value is approximately 150 Ω / sq. On the other hand, when the thickness of the intermediate conductive layer 8 is 60 nm, the surface resistivity of the intermediate conductive layer 8 calculated based on this thickness value is approximately 50 Ω / sq. That is to say, when the intermediate conductive layer 8 is formed of "crystalline" ITO, if the thickness of the intermediate conductive layer 8 is set to be 20 nm or more and 60 nm or less, the surface resistivity of the intermediate conductive layer 8 is 50 Ω / sq or more and 150 Ω / sq or less. It should be noted that in the present disclosure, the above-mentioned "crystalline" refers to a crystalline state with a relatively high crystallinity (specifically, a crystalline state with a crystallinity of 70% or more).

[0055] In addition, for example, when the intermediate conductive layer 8 is formed of PEDOT / PSS, it is preferable to set the thickness of the intermediate conductive layer 8 to be 100 nm or more and 300 nm or less.

[0056] As described above, by appropriately setting the thickness of the intermediate conductive layer 8 according to the material used for the intermediate conductive layer 8, the intermediate conductive layer 8 can function as a barrier layer. With this intermediate conductive layer 8, the influence of impurities on each conductive wire 7 is suppressed, making it difficult for each conductive wire 7 to be corroded. As a result, the environmental resistance and reliability of the conductive substrate 1 are improved.

[0057] It should be noted that when the intermediate conductive layer 8 is formed of indium tin oxide (ITO), compared with using the above-mentioned "amorphous" ITO, the film structure of the intermediate conductive layer 8 is more likely to become dense when using the above-mentioned "crystalline" ITO. Therefore, if the above-mentioned "crystalline" ITO is used as the material of the intermediate conductive layer 8, the environmental resistance and reliability of the conductive substrate 1 will be further improved.

[0058] (Functional layer)

[0059] As Figure 2 and Figure 3 shown, the functional layer 10a is composed of three layers. Specifically, the functional layer 10a is composed of a hole transport layer 11a, a charge generation layer 12a, and an electron transport layer 13a. These three layers are arranged in such a way that the hole transport layer 11a, the charge generation layer 12a, and the electron transport layer 13a are sequentially stacked on the upper side of the intermediate conductive layer 8. The functional layer 10a is configured to have a thickness of 3.0 μm or less. The thickness of the functional layer 10a is preferably 1.0 μm or less.

[0060] The charge generation layer 12a has electron-donating properties, that is, it has the function of providing electrons. Specifically, the charge generation layer 12a is configured to generate charge separation by using a pn junction formed within the charge generation layer 12a.

[0061] The charge generation layer 12a contains an electron-donating material. As the electron-donating material, there is no particular limitation as long as it is a material having the function of an electron donor. The electron-donating material is preferably a material that can be formed into a film by a wet coating method. In particular, as the electron-donating material, a conductive polymer material having electron-donating properties is suitable.

[0062] Examples of the conductive polymer material having electron-donating properties include: polyphenylene, poly(phenylene vinylene), polysilane, polythiophene, polycarbazole, poly(vinyl carbazole), porphyrin, polyacetylene, polypyrrole, polyaniline, polyfluorene, poly(vinyl pyrene), poly(vinyl anthracene), and their derivatives, and their copolymers, or a phthalocyanine-containing polymer, a carbazole-containing polymer, an organometallic polymer, etc.

[0063] The conductive polymer material having electron-donating properties is more preferably: a thiophene-fluorene copolymer, a polyalkylthiophene, a phenyleneethynylene-phenylene vinylene copolymer, a phenyleneethynylene-thiophene copolymer, a phenyleneethynylene-fluorene copolymer, a fluorene-phenylene vinylene copolymer, a thiophene-phenylene vinylene copolymer, etc.

[0064] The hole transport layer 11a has the function of transporting holes generated by the charge generation layer 12a to each conductive wire 7. By using the hole transport layer 11a, the transport efficiency of holes generated by the charge generation layer 12a can be improved. As a result, the photoelectric conversion efficiency of the conductive component 100 used as a solar cell is improved.

[0065] As the material of the hole transport layer 11a, for example, a conductive organic compound such as doped polyaniline, poly(phenylene vinylene), polythiophene, polypyrrole, poly(p-phenylene), polyacetylene, triphenyl diamine (TPD), etc., or an organic material forming a charge transfer complex formed by an electron-donating compound such as tetrathiafulvalene and tetramethylbenzene diamine and an electron-accepting compound such as tetracyanoquinodimethane and tetracyanoethylene is suitable.

[0066] In addition, as the hole transport layer 11a, a thin film formed of a metal material such as Au, In, Ag, Pd, etc. can also be used. This thin film can be formed solely of a metal material such as Au, In, Ag, Pd, etc., or can also be formed by appropriately combining these metal materials with the above organic materials.

[0067] The electron transport layer 13a has a function of transporting electrons generated by the charge generation layer 12a to the second electrode 14 described below. By using the electron transport layer 13a, the transport efficiency of electrons generated by the charge generation layer 12a can be improved. As a result, the photoelectric conversion efficiency of the conductive member 100 used as a solar cell is improved.

[0068] Examples of the material for the electron transport layer 13a include conductive organic compounds such as doped polyaniline, polyphenylene vinylene, polythiophene, polypyrrole, poly(phenylene), polyacetylene, triphenyl diamine (TPD), or organic materials that form charge transfer complexes composed of electron-donating compounds such as tetrathiafulvalene and N,N,N',N'-tetramethyl-p-phenylenediamine and electron-accepting compounds such as tetracyanoquinodimethane and tetracyanoethylene.

[0069] In addition, as the material for the electron transport layer 13a, a metal-doped layer doped with an alkali metal or an alkaline earth metal can also be used. Examples of the metal-doped layer include metal-doped layers formed by doping bathocuproine (BCP) or bathophenanthroline (Bphen) with Li, Cs, Ba, Sr, etc.

[0070] (Second Electrode)

[0071] As Figure 2 and Figure 3 shown, the second electrode 14 is laminated on the upper surface of the functional layer 10a (the upper surface of the electron transport layer 13a). That is, the second electrode 14 faces the first electrode 6 and the intermediate conductive layer 8 in a state where the functional layer 10a is interposed in the thickness direction of the substrate 2.

[0072] In this embodiment, the second electrode 14 is formed of a conductive metal material. As this metal material, Li, In, Al, Ca, Mg, Sm, Tb, Yb, Zr, LiF, Au, Ag, etc. may also be included. In addition, the second electrode 14 may also be composed of a metal oxide such as indium tin oxide (ITO) or indium zinc oxide (IZO), or a transparent conductive polymer such as PEDOT / PSS.

[0073] In this embodiment, as the second electrode 14, a metal layer composed of a single layer is exemplified (see Figure 2 and Figure 3 ). The second electrode 14 is formed, for example, by a vacuum evaporation method or a pattern evaporation method using a metal mask. It should be noted that the second electrode 14 may also be an electrode formed by laminating a plurality of layers each formed of a different metal material. In addition, the second electrode 14 may be a solid electrode formed on the entire upper surface of the charge generation layer 12a, or may have a structure in which metal fine wires are formed into a predetermined pattern.

[0074] (Carrier Path)

[0075] Next, refer to Figure 3 , a brief description will be given of how the carrier path is optimized when the conductive component 100 is applied to a solar cell.

[0076] The charge generation layer 12a generates carriers (electrons and holes) using light energy. The electrons ( Figure 3 The holes (e1 to e4) generated by the charge generation layer 12a are transported to the second electrode 14 via the electron transport layer 13a. Figure 3 Symbols h1 to h4 (exemplified in FIG. 1 ) are transported to the first electrode 6 via the hole transport layer 11 a and the intermediate conductive layer 8 .

[0077] As described above, the intermediate conductive layer 8 is formed into a film with uniform thickness. Therefore, holes are not locally concentrated in the plane direction of the intermediate conductive layer 8, and are uniformly transferred from the charge generation layer 12a to the intermediate conductive layer 8 via the hole transport layer 11a. In addition, the intermediate conductive layer 8 has conductivity and has a resistance value higher than the resistance value of each conductive line 7. In particular, the intermediate conductive layer 8 is configured so that its conductivity is higher than that of the hole transport layer 11a. Therefore, the holes generated by the charge generation layer 12a easily move from the charge generation layer 12a to the first electrode 6 (plural conductive lines 7) via the hole transport layer 11a and the intermediate conductive layer 8.

[0078] Here, assuming that a structure of a conductive member without an intermediate conductive layer 8 is adopted (an imaginary structure (not shown) different from the conductive member 100 including the conductive substrate 1 according to the embodiment of the present disclosure), the charge generating layer (equivalent to Figure 3 The holes generated in the layer (the layer with the symbol 12a shown in FIG. 1 ) will pass through the hole transport layer (equivalent to the layer with the relatively low conductivity) Figure 3 The layer of symbol 11a shown in FIG. 1 is moved to a plurality of conductive lines (equivalent to the layer of symbol 11a) arranged at intervals on the upper surface of the substrate. Figure 3 Therefore, if we focus on the holes generated by the charge generation layer at the middle position between adjacent conductive lines (equivalent to Figure 3 In the example of symbols h2 and h3), when the hole is transmitted to each conductive line, the carrier path of the hole (that is, the path for the hole to be transmitted from the charge generation layer to each conductive line via the hole transport layer) becomes relatively long. As a result, when the hole moves in the hole transport layer, the hole may be thermally deactivated. In other words, in the above-mentioned hypothetical structure, it is sometimes impossible to efficiently extract the holes generated by the charge generation layer, thereby failing to fully improve the power generation efficiency of the solar cell.

[0079] In contrast, in the conductive component 100 according to an embodiment of the present disclosure, an intermediate conductive layer 8 is provided between the substrate 2 and the hole transport layer 11a. As described above, holes can easily move in the intermediate conductive layer 8 having relatively high conductivity. Therefore, holes ( Figure 3 denoted by symbols h2 and h3 exemplified therein) generated by the charge generation layer 12a at an intermediate position between adjacent conductive wires 7, 7 move directly from the hole transport layer 11a to the intermediate conductive layer 8, and move within the intermediate conductive layer 8 and reach each conductive wire 7. Thus, in the conductive component 100, different from the above-described imaginary structure, the transport of holes from the charge generation layer 12a to each conductive wire 7 of the first electrode 6 becomes smooth. That is, in the conductive component 100, the carrier path of holes (in this embodiment, the path through which holes are transported from the charge generation layer 12a via the hole transport layer 11a and the intermediate conductive layer 8 to each conductive wire 7) is optimized. As a result, in a solar cell using the conductive component 100 including the conductive substrate 1, the power generation efficiency can be sufficiently improved.

[0080] [Functions and Effects of the Embodiment]

[0081] In the conductive substrate 1 according to an embodiment of the present disclosure, the surfaces of the respective conductive wires 7 are configured to be substantially flush with the flat surface 2a. That is, each conductive wire 7 is configured not to protrude from the flat surface 2a of the substrate 2. According to such a structure, the intermediate conductive layer 8 can be formed into a thin film having a uniform thickness. In addition, in the conductive substrate 1 (conductive component 100), different from the structure of the prior art (for example, the structure disclosed in the above-mentioned Patent Document 1), since each conductive wire 7 is not formed in a convex shape, the intermediate conductive layer 8 is not formed in a convex shape either, and there is no risk of partial disconnection of the intermediate conductive layer 8. Therefore, even when the intermediate conductive layer 8 is formed relatively thin, the thickness of the intermediate conductive layer 8 can be kept uniform.

[0082] In addition, even when the intermediate conductive layer 8 and the functional layer 10a are formed relatively thin, since each conductive wire 7 is not in a convex shape, different from the structure of the prior art, the respective layers in the intermediate conductive layer 8 and the functional layer 10a do not break along the thickness direction of the substrate 2. Further, since there is no risk of disconnection of each layer, each conductive wire 7 does not come into contact with the second electrode 14, and thus no electrical short circuit occurs.

[0083] Therefore, the original function of the device (in this embodiment, a solar cell) using the conductive component 100 can be maintained without being impaired.

[0084] In addition, in the conductive substrate 1 according to the embodiment of the present disclosure, by providing the intermediate conductive layer 8, it becomes difficult for the surface of the conductive metal (such as copper) constituting each conductive wire 7 in the first electrode 6 to be corroded. That is to say, the intermediate conductive layer 8 also has the function of suppressing the corrosion of the conductive metal forming each conductive wire 7.

[0085] [Modification Example 1 of the Embodiment]

[0086] In the above embodiment, a method of applying the conductive component 100 to a solar cell is shown, but it is not limited to this method. For example, as Figure 5 shown in Modification Example 1, the conductive component 100 can also be applied to an OLED (organic light-emitting diode).

[0087] In the conductive component 100 according to Modification Example 1, the functional layer 10a is replaced with the functional layer 10b. As Figure 5 shown, the functional layer 10b is composed of a hole transport layer 11b, a light-emitting layer 12b, and an electron transport layer 13b. These three layers are arranged in such a way that the hole transport layer 11b, the light-emitting layer 12b, and the electron transport layer 13b are sequentially stacked on the upper side of the intermediate conductive layer 8. The second electrode 14 is stacked on the upper side of the electron transport layer 13b. It should be noted that the functional layer 10b is configured to have a thickness of 3.0 μm or less. The thickness of the functional layer 10b is preferably 1.0 μm or less.

[0088] In Modification Example 1, the electron transport layer 13b has the function of transporting electrons ( Figure 5 symbols e1 to e4 exemplified therein) supplied from the second electrode 14 to the light-emitting layer 12b. The hole transport layer 11b has the function of transporting holes ( Figure 5 symbols h1 to h4 exemplified therein) supplied from the first electrode 6 to the light-emitting layer 12b. In the light-emitting layer 12b, the electrons supplied from the electron transport layer 13b recombine with the holes supplied from the hole transport layer 11b. The light-emitting layer 12b has the function of exciting the molecules constituting the light-emitting layer 12b with the energy generated by the recombination of electrons and holes to emit light.

[0089] In the conductive component 100 according to Modification Example 1, similar to the above embodiment, an intermediate conductive layer 8 is provided between the substrate 2 and the hole transport layer 11b. As a result, the carrier path of holes is optimized, and the transport of holes from the multiple conductive wires 7 constituting the first electrode 6 through the intermediate conductive layer 8 and the hole transport layer 11b to the light-emitting layer 12b becomes smooth. As a result, in the OLED to which the conductive component 100 is applied, the luminous efficiency can be sufficiently improved.

[0090] [Modification Example 2 of the Embodiment]

[0091] In addition, asFigure 6 As in Modification Example 2 shown, the conductive component 100 can also be applied to a dimming device. In the conductive component 100 according to Modification Example 2, the functional layer 10a is replaced by the functional layer 10c. As Figure 6 shown, in Modification Example 2, the functional layer 10c is composed of an electrochromic layer 21, an electrolyte layer 22, and a counter electrode material layer 23. These three layers are arranged in such a manner that the electrochromic layer 21, the electrolyte layer 22, and the counter electrode material layer 23 are laminated in this order on the upper side of the intermediate conductive layer 8. It should be noted that the functional layer 10c is configured to have a thickness of 3.0 μm or less. The thickness of the functional layer 10c is preferably 1.0 μm or less.

[0092] In Modification Example 2, the second electrode 14 is laminated on the upper side of the counter electrode material layer 23. The second electrode 14 of Modification Example 2 is formed of a material having transparency. As the material having transparency, for example, the same material as that of the intermediate conductive layer 8 described in the above embodiment can be cited.

[0093] The electrochromic layer 21 has a function of being colored by an oxidation reaction induced by holes ( Figure 6 symbols h1 to h4 exemplified therein) supplied from the first electrode 6 and electrons ( Figure 6 symbols e1 to e4 exemplified therein) supplied from the second electrode 14. In order to make the device stable, the counter electrode material layer 23 has a function of performing a reduction reaction for the oxidation reaction of the electrochromic layer 21. The electrolyte layer 22 has a function of blocking the electrons supplied from the second electrode 14 from escaping to the second electrode 14 side (i.e., the counter electrode side of the first electrode 6).

[0094] In the conductive component 100 according to Modification Example 2, an intermediate conductive layer 8 is provided between the substrate 2 and the electrochromic layer 21. As a result, the carrier path of the holes is optimized, and the transfer of holes from the first electrode 6 (each conductive wire 7) to the electrochromic layer 21 via the intermediate conductive layer 8 becomes smooth. As a result, in the dimming device to which the conductive component 100 is applied, the chemical change speed, that is, the color conversion speed, can be sufficiently increased.

[0095] [Modification Example 3 of the Embodiment]

[0096] In the above embodiment, a manner in which the surface of each conductive wire 7 is completely flush with the flat surface 2a (the upper surface of the resin layer 4) of the substrate 2 is exemplified (refer to Figure 4 ), but it is not limited to this manner. That is, as Figure 7 shown in Modification Example 3, it is not necessary to form the flat surface 2a of the substrate 2 to be completely flush with the surface of each conductive wire 7. It should be noted that, in Figure 7 , the illustration of the intermediate conductive layer 8 is omitted for the sake of easy illustration.

[0097] As Figure 7 shown, the conductive wire 7 can also be formed such that its surface is recessed downward (toward the bottom side of the concave portion 5) from the flat surface 2a of the substrate 2. Specifically, in the conductive component 100 according to the third modification, the distance between the flat surface 2a of the substrate 2 and the deepest part of the surface of each conductive wire 7 (corresponding to the dimension d shown in Figure 7 ) is preferably set to be not less than -1.0 μm and not more than 1.0 μm. The dimension d is more preferably not less than -0.1 μm and not more than 0.0 μm.

[0098] If the dimension d is set in this way, similarly to the above-described embodiment, it can be regarded that the flat surface 2a of the substrate 2 and the surfaces of the respective conductive wires 7 are substantially flush. That is, similarly to the above-described embodiment, in the conductive component 100 according to the third modification, the respective conductive wires 7 do not protrude from the flat surface 2a. And the intermediate conductive layer 8 can be formed into a thin film having a uniform thickness. Therefore, the original function of the device to which the conductive component 100 according to the third modification is applied can be not impaired.

[0099] [Fourth Modification of the Embodiment]

[0100] In the above-described embodiment, a manner is shown in which a unit formed by two conductive wires 7 extending in the X direction and adjacent to each other and two conductive wires 7 extending in the Y direction and adjacent to each other in the first electrode 6 is formed in a square shape, but it is not limited to this manner. For example, as in the fourth modification shown in Figure 8 , a plurality of conductive wires 7 may extend in a direction inclined with respect to both the X direction and the Y direction, and a unit formed by four conductive wires 7 may be formed in a rhombus shape.

[0101] [Fifth Modification of the Embodiment]

[0102] In the above-described embodiment, a manner is exemplified in which the second electrode 14 is formed of a single-layer metal layer, but it is not limited to this manner. For example, as in the fifth modification shown in Figure 9 , a conductive substrate 31 including a second electrode 36 may be provided instead of the second electrode 14 shown in the above-described embodiment (see Figure 2 and Figure 3 ). That is, the conductive component 100 shown in the fifth modification includes a conductive substrate 1 provided with the first electrode 6 and a conductive substrate 31 provided with the second electrode 36.

[0103] As Figure 9 shown, the conductive substrate 31 includes a substrate 32, a second electrode 36, and an intermediate conductive layer 38. The substrate 32 includes a film base material 33 and a resin layer 34. The substrate 32 has a flat surface 32a. The flat surface 32a corresponds to the lower surface of the resin layer 34. A plurality of concave portions 35 are provided in the resin layer 34.

[0104] It should be noted that the film substrate 33, the resin layer 34, and the plurality of recesses 35 each have the same structure as the film substrate 3, the resin layer 4, and the recess 5 described in the above embodiment. Therefore, the detailed description of each of the film substrate 33, the resin layer 34, and the recess 35 is omitted.

[0105] The second electrode 36 is formed of a conductor pattern composed of a plurality of conductive wires 37. The plurality of conductive wires 37 are arranged on the side where the flat surface 32a of the substrate 32 is located. Each conductive wire 37 is composed of a conductive metal embedded in each recess 35 of the resin layer 34. The conductive metal constituting the conductive wire 37 is formed of the same material as the conductive metal constituting the conductive wire 7 described in the above embodiment. Moreover, the surface of each conductive wire 37 is configured to be substantially flush with the flat surface 32a in a state of being exposed from the flat surface 32a of the substrate 32.

[0106] It should be noted that the conductive wire 37 may also be formed such that its surface is recessed upward (the bottom side of the recess 35) from the flat surface 32a, not shown. In this case, the distance between the flat surface 32a and the deepest part of the surface of each conductive wire 37 is -1.0 μm or more and 1.0 μm or less. This distance is more preferably -0.1 μm or more and 0.0 μm or less.

[0107] The intermediate conductive layer 38 is disposed between the electron transport layer 13a of the functional layer 10a and the second electrode 36. The intermediate conductive layer 38 has the same structure as the intermediate conductive layer 8 described in the above embodiment. A carrier path for electrons is formed in the intermediate conductive layer 38.

[0108] As described above, in the fifth modification, the conductive substrate 31 having the same structure as the conductive substrate 1 of the above embodiment is provided on the upper side of the functional layer 10a. Therefore, the same functions and effects as those of the conductive substrate 1 of the above embodiment can be achieved. That is, even when the intermediate conductive layer 38 is formed to be relatively thin, the thickness of the intermediate conductive layer 38 can be kept uniform. In addition, each layer in the intermediate conductive layer 38 and the functional layer 10a is not disconnected along the thickness direction of the substrate 32. Therefore, the original function of the device to which the fifth modification is applied can be achieved without impairment.

[0109] It should be noted that as a further modification of the fifth modification, the conductive substrate 1 may be disposed on the upper side of the functional layer 10a (the upper surface side of the electron transport layer 13a), and the conductive substrate 31 may be disposed on the lower side of the functional layer 10a (the lower surface side of the hole transport layer 11a), not shown. In this case, a carrier path for electrons is formed in the intermediate conductive layer 8, and a carrier path for holes is formed in the intermediate conductive layer 38.

[0110] [Other Embodiments]

[0111] In the above-described embodiments and the above-described modification examples 1 and 2, a manner is shown in which the conductive substrate 1 including the first electrode 6 is disposed on the lower side of the functional layer 10a and the second electrode 14 is disposed on the upper side of the functional layer 10a, but it is not limited to this manner. That is to say, it may also be that the conductive substrate 1 including the first electrode 6 is disposed on the upper side of the functional layer 10a (on the upper side of the electron transport layer 13a in the above-described embodiment) and the second electrode 14 is disposed on the lower side of the functional layer 10a (on the upper side of the hole transport layer 11a in the above-described embodiment), which is not shown. In such a manner, a carrier path of electrons is formed in the intermediate conductive layer 8.

[0112] -Industrial Applicability-

[0113] The present disclosure can be applied in the industry as a conductive substrate applicable to devices such as solar cells, OLEDs, and dimming devices.

[0114] -Symbolic Explanation-

[0115] 1, 31 Conductive substrate

[0116] 2, 32 Substrate

[0117] 2a, 32a Flat surface

[0118] 3, 33 Film substrate

[0119] 4, 34 Resin layer

[0120] 5, 35 Recess

[0121] 6 First electrode

[0122] 7, 37 Conductive wire

[0123] 8, 38 Intermediate conductive layer

[0124] 10a, 10b, 10c Functional layer

[0125] 11a, 11b Hole transport layer

[0126] 12a Charge generation layer

[0127] 12b Light-emitting layer

[0128] 13a, 13b Electron transport layer

[0129] 14, 36 Second electrode

[0130] 21 Electrochromic layer

[0131] 22 Electrolyte layer

[0132] 23 pairs of electrode material layers

[0133] 100 conductive components

Claims

1. A conductive substrate for mounting a functional layer and a second electrode, characterized in that: The conductive substrate includes a substrate, a first electrode, and an intermediate conductive layer. The substrate has a flat surface. The first electrode is formed on the substrate. The intermediate conductive layer is stacked on the substrate. The intermediate conductive layer has conductivity and is formed with a carrier path for electrons or a carrier path for holes. The first electrode is composed of a plurality of conductive wires. Each of the plurality of conductive wires is formed of a conductive metal embedded on the side where the flat surface of the substrate is located. The intermediate conductive layer is formed into a thin film with a uniform thickness and has a resistance value higher than that of each of the plurality of conductive wires. The surface of the intermediate conductive layer on the side opposite to the surface in contact with the flat surface of the substrate is configured to be able to arrange the functional layer and the second electrode. The surface of each of the plurality of conductive wires is configured to be substantially flush with the flat surface.

2. The conductive substrate according to claim 1, characterized in that: The distance between the flat surface of the substrate and the deepest part of the surface of each of the plurality of conductive wires is -1.0 μm or more and 0.0 μm or less.

3. A conductive substrate for mounting a functional layer and a first electrode, characterized in that: The conductive substrate includes a substrate, a second electrode, and an intermediate conductive layer. The substrate has a flat surface. The second electrode is formed on the substrate. The intermediate conductive layer is stacked on the substrate. The intermediate conductive layer has conductivity and is formed with a carrier path for electrons or a carrier path for holes. The second electrode is composed of a plurality of conductive wires. Each of the plurality of conductive wires is embedded on the side where the flat surface of the substrate is located. The intermediate conductive layer is formed into a thin film with a uniform thickness and has a resistance value higher than that of each of the plurality of conductive wires. The surface of the intermediate conductive layer on the side opposite to the surface in contact with the flat surface of the substrate is configured to be able to arrange the functional layer and the first electrode. The surface of each of the plurality of conductive wires is configured to be substantially flush with the flat surface.

4. The conductive substrate according to claim 3, characterized in that: The distance between the flat surface of the substrate and the deepest part of the surface of each of the plurality of conductive wires is -1.0 μm or more and 0.0 μm or less.

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