Layout and layout file cutting method and device, equipment and storage medium

Abstract

The invention relates to a territory and territory file cutting method and device, equipment and a storage medium. The method comprises the following steps: acquiring a layout, and determining a cutting object and a target cutting area of the layout; taking a top layer structure in the cutting object as an inlet structure; taking the entrance structure as a root node, based on the reference relationship, obtaining structures one by one for processing, obtaining to-be-clipped graphic tasks of the structures, and sequentially adding the to-be-clipped graphic tasks into a graphic queue; when it is monitored that the graphic task and the distributable idle thread exist in the graphic queue, distributing the thread to process the graphic task, including: retaining, deleting or clipping the pixels of the pixel set based on a clipping area; and after all the graphic tasks in the graphic queue are processed, obtaining a target structure serving as a cutting result. By optimizing the cutting strategy and algorithm design, the layout cutting efficiency is remarkably improved, and the memory used in the cutting process is reduced.

Description

Technical Field

[0001] The present invention belongs to the field of integrated circuit design and manufacturing, and in particular relates to a method, device, equipment and storage medium for cutting a layout and a layout file. Background Art

[0002] In the semiconductor industry, chip layout design runs through the entire integrated circuit design and manufacturing process and is a key link to ensure device functionality, performance, and reliability. At different stages of layout design, such as design rule checking (DRC), optical proximity correction (OPC), and simulation analysis of other manufacturing processes, it is often necessary to cut a large area of ​​the layout into multiple smaller parts according to specific rules to facilitate subsequent parallel processing and accelerated computing.

[0003] However, as chip process nodes continue to shrink, the complexity and scale of the layout are rapidly increasing, making the efficiency of layout cutting gradually become a bottleneck in the design process. Inefficient cutting methods may lead to waste of computing resources, data processing delays, and even affect the design cycle. To meet this challenge, the industry is paying more and more attention to the optimization and efficiency improvement of cutting algorithms, aiming to achieve faster and more accurate layout segmentation.

[0004] In the prior art, when cutting the chip layout, most of the methods used are to flatten it first and then cut it. That is, the hierarchical layout containing a multi-level structure is first flattened into a planar layout, and then it is cut using methods such as Boolean And. Although this method can ensure the integrity of the cutting results, it has obvious shortcomings in performance and resource usage, and the overall time consumption of flattening first and then cutting is relatively long. Since the flattening process requires all levels to be unfolded and a huge amount of data to be processed, the flattening process itself is slow. In addition, the amount of layout data after flattening surges, requiring the cutting algorithm to process massive amounts of data, which greatly prolongs the cutting time. In addition, these two processes are difficult to parallelize and cannot meet the needs of efficient parallel processing.

[0005] The scale of the layout data obtained by flattening is huge, which puts a huge burden on the system memory resources and easily causes problems such as insufficient memory or data exchange bottlenecks, especially when dealing with large-scale layouts.

[0006] At more sophisticated process nodes, the scale and complexity of the layout continue to increase, and the flattening operation further increases the burden on the system, making traditional methods face severe challenges in practical applications.

[0007] Therefore, the existing method of flattening and then cropping can no longer meet the needs of the semiconductor industry for quickly and efficiently processing layout graphs. A new cropping method is required to improve the overall performance, reduce memory overhead, and adapt to more complex design rules and advanced processes. Summary of the Invention

[0008] To solve all or part of the above-mentioned problems in the prior art, the present invention provides a cropping method, device, computer device, and computer-readable storage medium for layout graphs and layout graph files, which can significantly improve the layout graph cropping efficiency and reduce the memory used during the process by optimizing the cropping process.

[0009] In a first aspect, a layout graph cropping method is provided in this embodiment, including: Obtain a layout graph, and determine the cropping object and the target cropping area of the layout graph; Use the top-level structure in the cropping object as the entry structure; Using the entry structure as the root node, based on the reference relationship, obtain and process each structure one by one to obtain the graph tasks to be cropped for the structure and add them to the graph queue in sequence; wherein, the graph task includes the graph element set of the structure and the cropping area, and the cropping area is obtained based on the positional relationship between the structure and the entry structure and the target cropping area; When it is monitored that there is a graph task in the graph queue and there are available idle threads, allocate threads to process the graph task, including: retaining, deleting, or cropping the graph elements of the graph element set based on the cropping area; After completing the processing of all graph tasks in the graph queue, obtain the target structure as the cropping result.

[0010] In some of these embodiments, using the entry structure as the root node, based on the reference relationship, obtain and process each structure one by one to obtain the graph tasks to be cropped for the structure and add them to the graph queue in sequence; including: Create a structure task based on the entry structure and add it to the structure queue to be cropped; The creation of the structure task includes: adding the copy of the structure and the placement matrix as the structure task to be cropped to the structure queue; wherein, the placement matrix is used to represent the positional relationship of the structure relative to the entry structure; Obtain and process the structure task in the structure queue, including: the structure task includes the copy of the current structure and the placement matrix, obtain the cropping area based on the placement matrix and the target cropping area; create the graph task to be cropped using the graph element set of the current structure and the cropping area and add it to the graph queue; and based on the cropping area, process the sub-structures of the current structure, including: retaining, deleting, or creating a new structure task and adding it to the structure queue.

[0011] In some of these embodiments, after processing all the graphic tasks in the graphic queue, a target structure as the clipping result is obtained, including: After processing all the structure tasks in the structure queue and all the graphic tasks in the graphic queue, a hierarchical structure with a copy of the entry structure as the root node is obtained as the target structure of the clipping result.

[0012] In some of these embodiments, the layout clipping method supports multi-threaded parallel processing, and the threads include: A monitoring thread for monitoring whether there are graphic tasks in the graphic queue and allocating graphic tasks to idle threads; A graphic thread for obtaining and processing the graphic tasks in the graphic queue; A structure thread for obtaining and processing the structure tasks in the structure queue.

[0013] In some of these embodiments, a copy of the structure placed in the structure queue is obtained by performing a shallow copy on the structure.

[0014] In some of these embodiments, the target clipping region is a rectangular region.

[0015] In some of these embodiments, obtaining the clipping region based on the placement matrix and the target clipping region includes: Inverse-transforming the target clipping region with the placement matrix to obtain the clipping region.

[0016] In some of these embodiments, the obtaining and processing of the structure tasks in the structure queue specifically includes: The structure task includes a copy of the current structure and a placement matrix; Based on the placement matrix and the target clipping region, obtain the clipping region; Obtain all the graphic elements of the current structure as a graphic element set, and add the graphic element set of the current structure and the clipping region as the graphic tasks to be clipped to the graphic queue; Obtain all the reference relationships of the current structure, respectively based on the reference relationships, obtain the sub-structures of the current structure, calculate the bounding boxes of the sub-structures, and judge the relationship between the bounding boxes and the clipping region: If the bounding box is completely contained by the clipping region, no processing is performed, that is, the reference relationship is retained in the current structure; If the bounding box does not intersect with the clipping region, delete the reference relationship in the current structure; If the bounding box partially intersects with the clipping region, add a copy of the sub-structure and the placement matrix as a new structure task to the structure queue; delete the reference relationship in the current structure and generate a new reference relationship pointing to the copy of the sub-structure.

[0017] In some of these embodiments, adding the copy of the sub-structure and the placement matrix to the structure queue as a new structure task includes: The placement matrix of the sub-structure is calculated through the placement matrix of the current structure and the transformation matrix corresponding to the reference relationship.

[0018] In some of these embodiments, allocating a thread to process the graphic task includes: The graphic task includes a set of graphic elements and a clipping region; Calculate the bounding boxes of the graphic elements in the set of graphic elements respectively, and judge the relationship between the bounding boxes and the clipping region: If the bounding box is included in the clipping region, retain the graphic element in the set of graphic elements; If the bounding box does not intersect with the clipping region, delete the graphic element in the set of graphic elements; If the bounding box partially intersects with the clipping region, calculate the intersection graphic of the graphic element and the clipping region, delete the graphic element in the set of graphic elements, and add the intersection graphic to the set of graphic elements.

[0019] In a second aspect, a layout clipping device is provided in this embodiment. The device includes: An acquisition module, configured to acquire a layout, determine a clipping object and a target clipping region of the layout; use the top-level structure in the clipping object as the entry structure; A structure processing module, configured to use the entry structure as the root node, and based on the reference relationship, acquire structures one by one for processing, obtain the graphic tasks to be clipped of the structures and add them to the graphic queue in sequence; wherein, the graphic task includes the set of graphic elements of the structure and the clipping region, and the clipping region is obtained based on the positional relationship of the structure relative to the entry structure and the target clipping region; A graphic task processing module, configured to, when it is monitored that there is a graphic task in the graphic queue and there are available idle threads, allocate a thread to process the graphic task, including: retaining, deleting, or clipping the graphic elements in the set of graphic elements based on the clipping region; An output module, configured to obtain a target structure as the clipping result and output it after completing the processing of all graphic tasks in the graphic queue.

[0020] In a third aspect, a layout file clipping method is provided in this embodiment, including: Read the original layout file into the memory; Use the layout clipping method described in the first aspect above to clip the layout in the memory to obtain a target structure; Write the target structure into a target layout file as the trimming result.

[0021] In some embodiments, the reading of the original layout file into memory includes: Record the start position and end position of the structure in the original layout file within the original layout file.

[0022] In some embodiments, writing the target structure into a target layout file as the trimming result includes: For the original structure in the target structure, use the start position and end position of the original structure in the original layout file to copy the original structure from the original layout file to the target layout file; Wherein, the original structure refers to the structure that exists completely in both the target structure and the original layout file.

[0023] In a fourth aspect, a computer device is provided in this embodiment, including a memory and a processor. The memory stores a computer program, and when the processor executes the computer program, the steps of the layout trimming method described in the first aspect above are implemented.

[0024] In a fifth aspect, a computer-readable storage medium is provided in this embodiment, on which a computer program is stored. When the computer program is executed by a processor, the steps of the layout trimming method described in the first aspect above are implemented.

[0025] The above layout trimming method, by optimizing the trimming strategy and algorithm design, significantly improves the layout trimming efficiency and reduces the memory used during the trimming process, overcomes the deficiencies in the traditional technology, provides an efficient solution for application links such as Design Rule Check (DRC) and Optical Proximity Correction (OPC), and provides important technical support for chip design and manufacturing. And further provides a layout trimming device, a layout file trimming method, a computer device, and a computer-readable storage medium, all of which have the performance and beneficial effects of the foregoing layout trimming method. Description of the Drawings

[0026] To more clearly illustrate the technical solutions in the embodiments of the present application or in the traditional technology, the following will briefly introduce the drawings required for use in the description of the embodiments or the traditional technology. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0027] Figure 1Schematic diagram of the layout clipping method in an embodiment; Figure 2 Schematic diagram of the layout structure to be clipped in a specific embodiment; Figure 3 For Figure 2 Schematic diagram of the target structure obtained after clipping; Figure 4 Internal structure diagram of a computer device in an embodiment. Detailed implementation manners

[0028] To facilitate the understanding of the present application, the present application will be described more comprehensively below with reference to the relevant drawings. Embodiments of the present application are shown in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided to make the disclosure of the present application more thorough and comprehensive.

[0029] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the technical field to which this application belongs. The terms used in the description of this application herein are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0030] It should also be understood that terms such as "include / comprise" or "have" etc. specify the existence of the stated features, wholes, steps, operations, components, parts or combinations thereof, but do not exclude the possibility of the existence or addition of one or more other features, wholes, steps, operations, components, parts or combinations thereof. At the same time, in this specification, the term "and / or" includes any and all combinations of the related listed items.

[0031] To improve the efficiency and memory occupancy of layout clipping, this embodiment provides a layout clipping method as Figure 1 shown, including: Obtain a layout, and determine the clipping object and the target clipping area of the layout; Take the top-level structure in the clipping object as the entry structure; Using the entry structure as the root node, based on the reference relationship, obtain structures (Cells) one by one for processing, obtain the shape tasks (shape tasks) to be clipped of the structures and add them to the shape queue (shape queue) in sequence; wherein, the shape task includes the set of graphic elements of the structure and the clipping area, and the clipping area is obtained based on the positional relationship of the structure relative to the entry structure and the target clipping area; When it is monitored that there is a shape task in the shape queue and there are available idle threads, allocate threads to process the shape task, including: retaining, deleting or clipping the graphic elements of the set of graphic elements based on the clipping area; After processing all the graphic tasks in the graphic queue, a target structure as the clipping result is obtained.

[0032] Specifically, the top-level structure in the clipping object is used as the entry structure; for example, if the clipping object is the entire layout, the topcell is specified as the entry structure (entry Cell). By providing customization of the clipping object, this method can conveniently modify the clipping object from the entire layout to a certain Cell, and then different Cells can be determined as the entry Cell.

[0033] The above layout clipping method, by optimizing the clipping strategy and algorithm design, is characterized by not requiring flattening, being convenient for parallel processing, effectively reducing the computational amount, increasing the clipping speed, and reducing the memory used during the clipping process, and is particularly suitable for clipping large layout areas with a hierarchical structure.

[0034] In this embodiment, with the entry structure as the root node, based on the reference relationship, structures are obtained one by one for processing, and the graphic tasks to be clipped of the structures are obtained and added to the graphic queue in sequence; including: Based on the entry structure, a structure task (Cell task) is created and added to the structure queue to be clipped (Cell queue); The creation of the structure task includes: adding the copy of the structure and the placement matrix as the structure task to be clipped (Cell task) to the structure queue (Cell queue); wherein, the placement matrix is used to represent the positional relationship of the structure relative to the entry structure; Obtaining the structure task in the structure queue for processing includes: the structure task includes the copy of the current structure and the placement matrix, and a clipping area is obtained based on the placement matrix and the target clipping area; a graphic task to be clipped is created using the graphic element set of the current structure and the clipping area and added to the graphic queue; and based on the clipping area, the sub-structures of the current structure are processed, including: retaining, deleting, or creating new structure tasks and adding them to the structure queue.

[0035] Specifically, when obtaining a structure to create a structure task, a temporary copy of the current structure is created, and subsequent processing is performed on this temporary copy, which can reduce the copy overhead without affecting the original layout. The placement matrix is the positional relationship of the current structure relative to the entry structure. In a two-dimensional graphic, the placement matrix can include positional relationships such as scaling, rotation, translation, and shearing, and is usually represented by a 3*3 two-dimensional matrix; when creating a structure task using the entry structure, its placement matrix is the unit placement matrix, that is, it represents the "initial value" and "no transformation" state, and applying the unit placement matrix will not perform any transformation on the graphic.

[0036] When processing the structural tasks in the structure queue, the head structural task of the structure queue is obtained for processing. A graphic task to be cropped is created by using the graphic element set and the cropping area of the current structure and added to the graphic queue. Here, the graphic element set refers to the graphic elements of the current structure, including rectangles, polygons, texts, etc., excluding reference relationships (ref, reference). These graphic elements are packaged together with the cropping area of the previous structure as a graphic task to be cropped and placed in the graphic queue.

[0037] In this embodiment, after processing all the graphic tasks in the graphic queue, a target structure as the cropping result is obtained, including: After processing all the structural tasks in the structure queue and all the graphic tasks in the graphic queue, a hierarchical structure (cell hierarchy structure) with a copy of the entry structure as the root node is obtained as the target structure of the cropping result.

[0038] Specifically, when all the structural tasks in the structure queue have been completed, if there are still unfinished graphic tasks, wait until completion. After processing all the structural tasks in the structure queue and all the graphic tasks in the graphic queue, a new hierarchical structure with a copy of the entry structure as the root node is obtained, and this structure is the cropping result obtained by cropping the original entry structure through the target cropping area.

[0039] In this embodiment, the above layout cropping method supports multi-threaded parallel processing. The threads include: A monitoring thread for monitoring whether there are graphic tasks in the graphic queue and allocating graphic tasks to idle threads; A graphic thread for obtaining and processing the graphic tasks in the graphic queue; A structural thread for obtaining and processing the structural tasks in the structure queue.

[0040] Specifically, while the structural thread is processing, there is a monitoring thread monitoring the graphic queue. If there are graphic tasks in the graphic queue, an idle graphic thread is allocated to execute the task. Through such multi-threaded parallel processing, the resources of the idle multi-core architecture processor are fully utilized. When facing the rapid cropping of a large layout with a hierarchical structure, the layout cropping speed can be greatly improved and the memory used in the process can be reduced.

[0041] In this embodiment, the copy of the structure placed in the structure queue is obtained by performing a shallow copy of the structure.

[0042] Shallow copy is a method of copying an object. It creates a new object but does not copy the sub-objects nested within the original object. Shallow copy only copies the references in the original object, meaning the new object shares the memory addresses of the sub-objects with the original object. Using shallow copy can quickly create a copy of the structure without the need for a deep copy of the sub-structures referenced by the structure. Subsequent processing can be performed on this copy of the structure, which can reduce the copy overhead without affecting the original layout.

[0043] In this embodiment, the target cropping region is a rectangular region. Rectangular region cropping is a common practice in current layout cropping. However, in actual applications, the target cropping region of other shapes can be extended based on specific requirements. This application does not make specific limitations.

[0044] In this embodiment, obtaining the cropping region based on the placement matrix and the target cropping region includes: inversely transforming the target cropping region with the placement matrix to obtain the cropping region. During the layout cropping process, inversely transforming the target cropping region with the placement matrix to obtain the cropping region can effectively save resources. However, in other application scenarios, if the requirement of saving resources is not considered, the structure can also be directly transformed with the placement matrix. This application does not make specific limitations.

[0045] In this embodiment, obtaining and processing the structure tasks in the structure queue specifically includes: The structure task includes a copy of the current structure and the placement matrix; Based on the placement matrix and the target cropping region, obtain the cropping region; Obtain all the graphic elements of the current structure as a graphic element set, and add the graphic element set of the current structure and the cropping region as the graphic task (shape task) to be cropped to the graphic queue (shape queue); Obtain all the reference relationships (ref, reference) of the current structure. Based on the reference relationships respectively, obtain the sub-structures of the current structure, calculate the bounding boxes of the sub-structures, and determine the relationship between the bounding boxes and the cropping region: If the bounding box is completely contained by the cropping region, no processing is performed, that is, the reference relationship is retained in the current structure; If the bounding box does not intersect with the cropping region, delete the reference relationship in the current structure; If the bounding box partially intersects with the cropping region, add a copy of the sub-structure and the placement matrix as a new structure task to the structure queue; delete the reference relationship in the current structure and generate a new reference relationship pointing to the copy of the sub-structure.

[0046] Specifically, by utilizing the hierarchical structure of the layout, the layout is processed in a non-flattened manner starting from the entry structure. The pixel set and clipping region of the structure are used to create the graphic tasks to be clipped and added to the graphic queue, and the reference relationships of the structure based on the clipping region are processed, including deleting reference relationships, retaining reference relationships, and creating new structure tasks and modifying their reference relationships. This effectively saves memory occupancy and provides a basis for subsequent multi-threaded parallel processing of graphic tasks.

[0047] In this embodiment, calculating the bounding box of the sub-structure includes: caching the calculated bounding box in the sub-structure; thereby avoiding repeated calculation when subsequent other structures (Cells) reference this sub-structure (ref cell).

[0048] In this embodiment, adding the copy of the sub-structure and the placement matrix as a new structure task to the structure queue includes: the placement matrix of the sub-structure is calculated through the placement matrix of the current structure and the transformation matrix corresponding to the reference relationship, so as to save the calculation overhead.

[0049] In this embodiment, allocating threads to process the graphic tasks includes: The graphic tasks include a pixel set and a clipping region; Calculate the bounding boxes of the pixels in the pixel set respectively, and judge the relationship between the bounding box and the clipping region: If the bounding box is contained by the clipping region, retain the pixel in the pixel set; If the bounding box does not intersect with the clipping region, delete the pixel in the pixel set; If the bounding box partially intersects with the clipping region, calculate the intersection graphic of the pixel and the clipping region, delete the pixel in the pixel set, and add the intersection graphic to the pixel set.

[0050] In the processing of graphic tasks, by calculating the bounding boxes of this series of pixels and judging the relationship between the bounding box and the clipping region, the pixels are processed in three cases: the bounding box is contained by the clipping region, the bounding box does not intersect with the clipping region, and the bounding box partially intersects with the clipping region. In the processing of the case where the bounding box partially intersects with the clipping region, the pixel and the clipping region are subjected to the AND operation in Boolean logic, the original pixel is deleted, and the new graphic obtained after the Boolean AND is inserted.

[0051] The following uses a specific application embodiment to illustrate the above layout clipping method. As Figure 2As shown, the purple box is the top cell, which is also the entry cell in this embodiment; the green rectangle is the graphic element under the top cell; the blue rectangle is the sub-cell directly referenced by the top cell, and the four blue cells are different placement ways of one type of cell; the yellow cell is the sub-cell of the blue cell; the red box is the clipping area.

[0052] At the beginning, the entry cell and the unit placement matrix are added to the cell queue to be clipped, and the processing flow starts.

[0053] Take the head cell of the cell queue and its placement matrix from the cell queue. Here, it is the top cell and the unit placement matrix. Obtain the graphics (i.e., graphic elements) under the top cell, which are 5 green rectangles. Pack them into the shape task to be clipped and put them into the shape queue. Obtain the refs under the top cell, that is, obtain 3 blue ref cells, and judge their positional relationship with the clipping area. One is contained, one partially intersects, and one does not intersect; delete the non-intersecting ref cell from the top cell, and create a cell task for the partially intersecting ref cell and add it to the cell queue. Delete the top cell from the head of the queue.

[0054] Take the head cell of the cell queue and its placement matrix from the cell queue. Here, it is the upper left blue cell and the unit placement matrix. Obtain the graphics under the blue cell. There are no graphics, so no shape task to be clipped is generated. Obtain the refs under the blue cell, that is, 3 yellow ref cells, and judge their positional relationship with the clipping area. None of them intersect, and delete them from the blue cell.

[0055] At this time, the cell queue to be clipped is empty, stop clipping the cells, wait for the shape task to be completed, and after completion, the layout structure as shown in Figure 3 is obtained.

[0056] Based on the same inventive concept, the embodiment of the present application also provides a layout clipping device for implementing the above-mentioned layout clipping method. The implementation solution provided by this device to solve the problem is similar to the implementation solution recorded in the above method. Therefore, the specific limitations in one or more layout clipping device embodiments provided below can refer to the limitations on the layout clipping method in the above text, and will not be repeated here.

[0057] In one embodiment, a layout clipping device is provided, including: an acquisition module, a structure processing module, a graphic task processing module, and an output module, where: An acquisition module, configured to acquire a layout, determine a cropping object and a target cropping area of the layout; and use the top-level structure in the cropping object as an entry structure. A structure processing module, configured to use the entry structure as a root node, and based on the reference relationship, acquire and process structures one by one to obtain the graphic tasks to be cropped of the structures and add them to a graphic queue (shape queue) in sequence; wherein, the graphic tasks include a graphic element set of the structure and a cropping area, and the cropping area is obtained based on the positional relationship of the structure relative to the entry structure and the target cropping area. A graphic task processing module, configured to, when it is monitored that there is a graphic task in the graphic queue and there are available idle threads, allocate a thread to process the graphic task, including: retaining, deleting or cropping the graphic elements of the graphic element set based on the cropping area. An output module, configured to obtain a target structure as a cropping result and output it after completing the processing of all graphic tasks in the graphic queue.

[0058] Each functional module of the layout cropping device implements the steps in the above-mentioned layout cropping method embodiments.

[0059] Each module in the above-mentioned layout cropping device can be implemented in whole or in part by software, hardware and their combination. The above-mentioned modules can be embedded in or independent of a processor in a computer device in the form of hardware, or stored in a memory in the computer device in the form of software, so that the processor can call and execute the operations corresponding to the above-mentioned modules.

[0060] In one embodiment, a layout file cropping method is provided, including: Reading an original layout file into memory. Using the layout cropping method in the above-mentioned layout cropping method embodiments to crop the layout in memory to obtain a target structure. Writing out the target structure into a target layout file as a cropping result.

[0061] In the processes of process simulation, lithography optimization and failure analysis in the semiconductor manufacturing field, etc., it is often necessary to cut a large layout file into multiple smaller layout files; read the layout file into memory, use the layout cropping method in the above-mentioned layout cropping method embodiments to crop in memory, and write out the new layout data structure into a file after cropping to reduce the data scale and improve the cropping efficiency.

[0062] In this embodiment, the reading the original layout file into memory includes: Recording the starting position and the ending position of the structure in the original layout file.

[0063] In this embodiment, writing the target structure into a target layout file as a trimming result includes: For the original structure in the target structure, use the starting position and ending position of the original structure in the original layout file to copy the original structure from the original layout file to the target layout file; Wherein, the original structure refers to the structure that simultaneously and completely exists in the target structure and the original layout file.

[0064] After trimming, the cells in the original layout will be differentiated into three types of cells: 1) Cells that do not exist in the target layout; 2) Cells that completely exist in the target layout; 3) New cells that are different from the original cells after trimming (example: if cell A is intercepted by half, a cell A1 with half of the data of cell A will be generated).

[0065] For the cells that still completely exist in the target layout, we can use the positions of the cells recorded during the reading process in the file to copy the cells from the source file to the new file, which can omit the step of converting the data of the cells from the memory data structure to the file.

[0066] In one embodiment, a computer device is provided. The computer device can be a terminal, and its internal structure diagram can be as Figure 4As shown in the figure. The computer device includes a processor, a memory, an input / output interface, a communication interface, a display unit, and an input device. Among them, the processor, the memory, and the input / output interface are connected through a system bus, and the communication interface, the display unit, and the input device are connected to the system bus through the input / output interface. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage medium. The input / output interface of the computer device is used to exchange information between the processor and external devices. The communication interface of the computer device is used to communicate with external terminals in a wired or wireless manner, and the wireless manner can be implemented through WIFI, a mobile cellular network, NFC (Near Field Communication), or other technologies. When the computer program is executed by the processor, it implements a method for parallel reading of layout files. The display unit of the computer device is used to form a visually visible image, which can be a display screen, a projection device, or a virtual reality imaging device. The display screen can be a liquid crystal display screen or an electronic ink display screen. The input device of the computer device can be a touch layer covering the display screen, or a button, a trackball, or a touchpad provided on the computer device housing, or an external keyboard, touchpad, or mouse, etc.

[0067] Those skilled in the art can understand that Figure 4 the structure shown in the figure is only a block diagram of some structures related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine some components, or have different component arrangements.

[0068] In one embodiment, a computer device is further provided, including a memory and a processor. A computer program is stored in the memory, and when the processor executes the computer program, the steps in the above-mentioned embodiments of each layout clipping method are implemented.

[0069] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored, and when the computer program is executed by the processor, the steps in the above-mentioned embodiments of each layout clipping method are implemented.

[0070] Those of ordinary skill in the art can understand that all or part of the processes in the methods of the above embodiments can be completed by instructing relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above methods. Among them, any reference to a memory, database, or other medium used in the embodiments provided in this application can include at least one of non-volatile and volatile memories. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM), etc. The databases involved in the embodiments provided in this application can include at least one of relational databases and non-relational databases. Non-relational databases can include distributed databases based on blockchain, etc., without limitation. The processors involved in the embodiments provided in this application can be general-purpose processors, central processors, graphics processors, digital signal processors, programmable logic devices, data processing logics based on quantum computing, etc., without limitation.

[0071] It should be understood that although the steps in the flowcharts involved in the above embodiments are shown in sequence according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless there is a clear indication in this article, the execution of these steps has no strict order limit, and these steps can be executed in other orders. Moreover, at least some of the steps in the flowcharts involved in the above embodiments can include multiple steps or multiple stages. These steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be executed alternately or in turn with at least some of the steps or stages in other steps or other steps.

[0072] In the description of this specification, the descriptions referring to terms such as "some embodiments", "other embodiments", "ideal embodiments", etc. mean that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0073] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the various technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as falling within the scope described in this specification.

[0074] The above-described embodiments merely represent several implementation manners of the present application. Their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the patent of the present application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the appended claims.

Claims

1. A layout cutting method, characterized in that, Including: Obtain a layout, and determine the cropping object and the target cropping area of the layout; Use the top-level structure in the cropping object as the entry structure; Taking the entry structure as the root node, based on the reference relationship, obtain and process each structure one by one to obtain the graphic tasks to be cropped for the structure and add them to the graphic queue in sequence; wherein, the graphic task includes the graphic element set of the structure and the cropping area, and the cropping area is obtained based on the positional relationship of the structure relative to the entry structure and the target cropping area; When it is monitored that there is a graphic task in the graphic queue and there are available idle threads, allocate threads to process the graphic task, including: retaining, deleting or cropping the graphic elements of the graphic element set based on the cropping area; After completing the processing of all graphic tasks in the graphic queue, obtain the target structure as the cropping result.

2. The layout clipping method according to claim 1, wherein Taking the entry structure as the root node, based on the reference relationship, obtain and process each structure one by one to obtain the graphic tasks to be cropped for the structure and add them to the graphic queue in sequence; including: Create a structure task based on the entry structure and add it to the structure queue to be cropped; The creation of the structure task includes: adding the copy of the structure and the placement matrix as the structure task to be cropped to the structure queue; wherein, the placement matrix is used to represent the positional relationship of the structure relative to the entry structure; Obtain and process the structure tasks in the structure queue, including: the structure task includes the copy of the current structure and the placement matrix, obtain the cropping area based on the placement matrix and the target cropping area; create the graphic tasks to be cropped using the graphic element set of the current structure and the cropping area and add them to the graphic queue; and based on the cropping area, process the sub-structures of the current structure, including: retaining, deleting or creating new structure tasks and adding them to the structure queue.

3. The layout cutting method according to claim 2, wherein After completing the processing of all graphic tasks in the graphic queue, obtain the target structure as the cropping result; including: After completing the processing of all structure tasks in the structure queue and all graphic tasks in the graphic queue, obtain a hierarchical structure with the copy of the entry structure as the root node as the target structure of the cropping result.

4. The layout clipping method according to claim 3, characterized in that Support multi-thread parallel processing, and the threads include: A monitoring thread, used to monitor whether there is a graphic task in the graphic queue and allocate graphic tasks to idle threads; A graphic thread, used to obtain and process the graphic tasks in the graphic queue; A structure thread, used to obtain and process the structure tasks in the structure queue.

5. The layout clipping method according to claim 2, wherein The copy of the structure placed in the structure queue is obtained by performing a shallow copy on the structure.

6. The layout clipping method according to claim 1, wherein The target cropping area is a rectangular area.

7. The layout clipping method according to claim 2, wherein Obtaining the cropping area based on the placement matrix and the target cropping area includes: Inverse-transform the target cropping area with the placement matrix to obtain the cropping area.

8. The layout clipping method according to claim 2, wherein The specific process of obtaining and processing the structure tasks in the structure queue includes: The structure task includes the copy of the current structure and the placement matrix; Based on the placement matrix and the target cropping area, obtain the cropping area; Obtain all graphic elements of the current structure as the graphic element set, and add the graphic element set of the current structure and the cropping area as the graphic tasks to be cropped to the graphic queue. Obtain all reference relationships of the current structure. Based on the reference relationships respectively, obtain the sub-structures of the current structure, calculate the bounding boxes of the sub-structures, and determine the relationship between the bounding boxes and the clipping region: If the bounding box is completely contained by the clipping region, no processing is performed, that is, the reference relationship is retained in the current structure; If the bounding box does not intersect the clipping region, delete the reference relationship in the current structure; If the bounding box partially intersects the clipping region, add a copy of the sub-structure and the placement matrix as a new structure task to the structure queue; delete the reference relationship in the current structure, and generate a new reference relationship pointing to the copy of the sub-structure.

9. The layout clipping method according to claim 8, wherein The adding a copy of the sub-structure and the placement matrix as a new structure task to the structure queue includes: The placement matrix of the sub-structure is calculated by the placement matrix of the current structure and the transformation matrix corresponding to the reference relationship.

10. The layout clipping method according to claim 1, wherein Allocating threads to process the graphic tasks includes: The graphic tasks include a graphic element set and a clipping region; Calculate the bounding boxes of the graphic elements in the graphic element set respectively, and determine the relationship between the bounding boxes and the clipping region: If the bounding box is contained by the clipping region, retain the graphic element in the graphic element set; If the bounding box does not intersect the clipping region, delete the graphic element in the graphic element set; If the bounding box partially intersects the clipping region, calculate the intersection graphic of the graphic element and the clipping region, delete the graphic element in the graphic element set, and add the intersection graphic to the graphic element set.

11. A layout cutting device, characterized in that, The device includes: An acquisition module, configured to acquire a layout, determine the clipping object and the target clipping region of the layout; use the top-level structure in the clipping object as the entry structure; A structure processing module, configured to use the entry structure as the root node, and based on the reference relationship, acquire and process the structures one by one to obtain the graphic tasks to be clipped of the structures and add them to the graphic queue in sequence; wherein, the graphic tasks include the graphic element set and the clipping region of the structure, and the clipping region is obtained based on the positional relationship of the structure relative to the entry structure and the target clipping region; A graphic task processing module, configured to, when it is monitored that there is a graphic task in the graphic queue and there are available idle threads, allocate threads to process the graphic task, including: retaining, deleting, or clipping the graphic elements of the graphic element set based on the clipping region; An output module, configured to obtain the target structure as the clipping result and output it after completing the processing of all graphic tasks in the graphic queue.

12. A layout file clipping method, characterized in that, Includes: Read the original layout file into memory; Use the layout clipping method according to any one of claims 1 to 10 to clip the layout in memory to obtain the target structure; Write the target structure into a target layout file as the clipping result.

13. The layout file clipping method according to claim 12, wherein The reading the original layout file into memory includes: Record the start position and end position of the structure in the original layout file.

14. The layout file cropping method according to claim 13, wherein The writing the target structure into a target layout file as the clipping result includes: For the original structure in the target structure, use the original structure at the starting position and the ending position of the original layout file to copy the original structure from the original layout file to the target layout file; Wherein, the original structure refers to the structure that exists completely in both the target structure and the original layout file.

15. A computer device, comprising a memory and a processor, the memory storing a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the layout clipping method described in any one of claims 1 to 10.

16. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the layout clipping method described in any one of claims 1 to 10.

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