Harmonic compensation device and method

Abstract

A harmonic compensation device comprises a harmonic compensation circuit, a conversion circuit, an analog output circuit and a compensation control circuit. The harmonic compensation circuit performs a harmonic generation program and a compensation adjustment program on the digital input signal according to the compensation parameter control signal so as to generate a harmonic elimination digital signal. The conversion circuit performs harmonic elimination and signal conversion on the digital input signal according to the harmonic elimination digital signal to generate an analog input signal, wherein the harmonic elimination is used for eliminating a harmonic component of the digital input signal. The analog output circuit is configured to generate an analog output signal to an external circuit according to an analog input signal, and detect a mounting state of the external circuit to generate a mounting state detection signal. The compensation control circuit is configured to generate a compensation parameter control signal according to the mounting state detection signal.

Description

Technical Field

[0001] The present invention relates to harmonic compensation technology, and particularly to a harmonic compensation device and method. Background Art

[0002] Operational amplifiers (OPs) are widely used in analog circuits. However, if the signal input to the operational amplifier is too small or too large, resulting in an excessive potential difference at the input terminal of the operational amplifier, the operational amplifier will operate in the saturation region (or non-linear region), which will cause the output of the operational amplifier to include harmonics, resulting in harmonic distortion problems. Summary of the Invention

[0003] In view of the problems of the prior art, an object of the present invention is to provide a harmonic compensation device and method to improve the prior art.

[0004] The present invention includes a harmonic compensation device, comprising: a harmonic compensation circuit, a conversion circuit, an analog output circuit, and a compensation control circuit. The harmonic compensation circuit performs a harmonic generation program and a compensation adjustment program on a digital input signal according to a compensation parameter control signal, and then generates a harmonic cancellation digital signal. The conversion circuit performs harmonic cancellation and signal conversion on the digital input signal according to the harmonic cancellation digital signal to generate an analog input signal, where the harmonic cancellation is used to eliminate the harmonic components of the digital input signal. The analog output circuit is configured to generate an analog output signal to an external circuit according to the analog input signal, and detect the mounting state of the external circuit to generate a mounting state detection signal. The compensation control circuit is configured to generate a compensation parameter control signal according to the mounting state detection signal.

[0005] The present invention also includes a harmonic compensation method, comprising: performing a harmonic generation program and a compensation adjustment program on a digital input signal by the harmonic compensation circuit according to a compensation parameter control signal, and then generating a harmonic cancellation digital signal; performing harmonic cancellation and signal conversion on the digital input signal by the conversion circuit according to the harmonic cancellation digital signal to generate an analog input signal, where the harmonic cancellation is used to eliminate the harmonic components of the digital input signal; generating an analog output signal to an external circuit by the analog output circuit according to the analog input signal, and detecting the mounting state of the external circuit to generate a mounting state detection signal; and generating a compensation parameter control signal by the compensation control circuit according to the mounting state detection signal.

[0006] Regarding the features, embodiments, and technical effects of the present invention, the preferred embodiments will be described in detail below with reference to the accompanying drawings. Brief Description of the Drawings

[0007] Figure 1Shows a block diagram of a harmonic compensation device and an external circuit electrically coupled to the harmonic compensation device in an embodiment of the present invention;

[0008] Figure 2 Shows a more detailed block diagram of the harmonic compensation circuit in an embodiment of the present invention;

[0009] Figure 3 Shows a block diagram of a harmonic compensation device and an external circuit electrically coupled to the harmonic compensation device in another embodiment of the present invention;

[0010] Figure 4 Shows a block diagram of a harmonic compensation device and an external circuit electrically coupled to the harmonic compensation device in yet another embodiment of the present invention; and

[0011] Figure 5 Shows a flowchart of a harmonic compensation method in an embodiment of the present invention.

[0012] Description of reference numerals:

[0013] 100: Harmonic compensation device 110: Harmonic compensation circuit 120: Conversion circuit

[0014] 130: Analog output circuit 140: Compensation control circuit 150: Mixer

[0015] 160: Digital-to-analog converter 190: External circuit 210: Harmonic generation circuit

[0016] 220: Gain adjustment circuit 230: Phase adjustment circuit 300: Harmonic compensation device

[0017] 310: Delay circuit 400: Harmonic compensation device 410: Digital-to-analog converter

[0018] 420: Mixer 500: Harmonic compensation method S510 - S540: Steps

[0019] AAP: Gain adjustment parameter A IN : Analog input signal A IN1 : First analog input signal

[0020] A IN2 : Second analog input signal A OUT : Analog output signal CGP: Harmonic generation parameter

[0021] CPC: Compensation parameter control signal CPT: Compensation parameter look-up table DAP: Delay adjustment parameter

[0022] D IN : Digital input signal D IN': Delayed digital input signal D HM : Harmonic cancellation digital signal

[0023] D OUT : Digital output signal LSD: Impedance detection signal PAP: Phase adjustment parameter

[0024] S GA : Gain-adjusted harmonic S HM : Harmonic S PH : Phase-adjusted harmonic Detailed implementation manners

[0025] An object of the present invention is to provide a harmonic compensation device and method. A compensation control circuit generates a compensation parameter control signal according to a mounting state detection signal related to the mounting state with an external circuit, so that a harmonic compensation circuit performs a harmonic generation program and a compensation adjustment program on a digital input signal to generate a harmonic cancellation digital signal, so as to cancel or reduce the harmonics in the analog output signal generated by an analog output circuit according to the digital input signal.

[0026] Please refer to Figure 1 . Figure 1 Fig. shows a block diagram of a harmonic compensation device 100 and an external circuit 190 electrically coupled to the harmonic compensation device 100 in an embodiment of the present invention.

[0027] The harmonic compensation device 100 is configured to receive a digital input signal D IN process it and generate an analog output signal A OUT , and then transmit the analog output signal A OUT to the external circuit 190.

[0028] In one embodiment, the digital input signal D IN can be a single-frequency signal derived from, for example, but not limited to, an audio device, and the external circuit 190 can be an audio amplifier. The harmonic compensation device 100 can perform harmonic cancellation on the digital input signal D IN to generate an analog output signal A OUT , reducing the distortion in the analog output signal A OUT .

[0029] The structure and operation mode of the harmonic compensation device 100 will be described below.

[0030] The harmonic compensation device 100 includes: a harmonic compensation circuit 110, a conversion circuit 120, an analog output circuit 130, and a compensation control circuit 140.

[0031] The harmonic compensation circuit 110 controls the digital input signal D according to the compensation parameter control signal CPC IN to perform a harmonic generation program and a compensation adjustment program, and then generates a harmonic cancellation digital signal D HM .

[0032] Please refer to Figure 2 . Figure 2 The figure shows a more detailed module diagram of the harmonic compensation circuit 110 in an embodiment of the present invention. The harmonic compensation circuit 110 includes a harmonic generation circuit 210, a gain adjustment circuit 220, and a phase adjustment circuit 230.

[0033] The harmonic generation circuit 210 is configured to adjust the harmonic generation parameter CGP according to the compensation parameter control signal CPC to perform a harmonic generation program on the digital input signal D IN wherein the harmonic generation program generates K harmonics S according to the harmonic generation parameter CGP HM , and the frequency of each of the K harmonics S HM is N times the frequency of the digital input signal D IN . K is a positive integer (for example, an integer not less than 2). N is an integer greater than 1, and the value of N is related to the harmonic types (such as integer multiples of harmonics, non-integer multiples of harmonics, sub-harmonics, etc.) included in the K harmonics S HM .

[0034] For example, when the frequency of the digital input signal D IN is 1 kilohertz (kHz) and the type of the K harmonics S HM only includes integer multiples of harmonics, N is an integer greater than 1. The K harmonics S HM are respectively signals of 2 kHz, 3 kHz, 4 kHz..., and so on. The value of K can be determined according to the implementation requirements.

[0035] In an embodiment, the harmonic generation circuit 210 performs operations such as squaring, cubing, and quadrupling on the digital input signal D according to the harmonic generation parameter CGP to generate K harmonics S IN . Since the technology of generating harmonics according to a given digital signal can be implemented by known or self-developed technologies, the details are omitted here. HM .

[0036] The gain adjustment circuit 220 is configured to adjust the gain adjustment parameter AAP according to the compensation parameter control signal CPC to perform a gain adjustment program in the compensation adjustment program, wherein the gain adjustment program adjusts the gain of the K harmonics S HM and then generates K gain-adjusted harmonics S GAThe phase adjustment circuit 230 is configured to control the phase adjustment parameter PAP according to the compensation parameter control signal GPC to perform the phase adjustment program in the compensation adjustment program, where the phase adjustment program adjusts the phase of K gain adjustment harmonics S by adjusting the phase adjustment parameter PAP, thereby generating K phase adjustment harmonics S G as the harmonic cancellation digital signal D PH HM .

[0037] The conversion circuit 120 performs harmonic cancellation and signal conversion on the digital input signal D HM to generate an analog input signal A IN , where the harmonic cancellation is used to eliminate the harmonic components of the digital input signal D IN . In one embodiment, the conversion circuit 120 includes a mixer 150 and a digital-to-analog converter 160 IN .

[0038] The mixer 150 is configured to perform harmonic cancellation (e.g., superposition) on the digital input signal D IN and the harmonic cancellation digital signal D HM to generate a digital output signal D OUT . In an exemplary embodiment, the harmonic compensation circuit 110 may perform an inverting process on the harmonic cancellation digital signal D HM , and the mixer 150 adds the digital input signal D IN to the (inverted) harmonic cancellation digital signal D HM to generate a digital output signal D OUT .

[0039] In another exemplary embodiment, the harmonic compensation circuit 110 does not perform an inverting process on the harmonic cancellation digital signal D HM , so the mixer 150 subtracts the harmonic cancellation digital signal D IN from the digital input signal D HM to generate a digital output signal D OUT . Since the above inverting process and the design of the mixer 150 can be implemented by known or self-developed technologies, the details are omitted here

[0040] The digital-to-analog converter 160 is configured to perform signal conversion on the digital output signal D OUT to generate an analog input signal A IN .

[0041] The analog output circuit 130 is configured to generate an analog output signal A IN based on the analog input signal A OUT ​to an external circuit 190, and detect the mounting state of the external circuit 190 to generate a mounting state detection signal LSD. The compensation control circuit 140 is configured to generate a compensation parameter control signal CPC according to the mounting state detection signal LSD, so that the harmonic compensation circuit 110 performs the foregoing processing procedure according to the compensation parameter control signal CPC to generate a harmonic cancellation digital signal D HM 。

[0042] In one embodiment, the analog output circuit 130 is configured to detect the current detection value and the voltage detection value of the analog output signal A out so that the generated mounting state detection signal LSD includes the current detection value and the current detection value. Furthermore, the compensation control circuit 140 calculates the output wattage (for example, the multiplication result of the current detection value and the voltage detection value) or the impedance value (for example, the division result of the current detection value and the voltage detection value) of the external circuit 190 according to the current detection value and the voltage detection value, and then generates a compensation parameter control signal CPC according to the output wattage or the impedance value.

[0043] In another embodiment, the analog output circuit 130 is configured to detect the current detection value and the voltage detection value of the analog output signal A out and calculate the output wattage or the impedance value of the external circuit 190 according to the current detection value and the voltage detection value, so that the generated mounting state detection signal LSD includes the output wattage or the impedance value. Furthermore, the compensation control circuit 140 generates a compensation parameter control signal CPC according to the output wattage or the impedance value.

[0044] In one embodiment, the compensation control circuit 140 is configured to store a compensation parameter look-up table CPT, and after obtaining the output wattage or the impedance value as described above according to the mounting state detection signal LSD, look up the table to generate a compensation parameter control signal CPC.

[0045] In one embodiment, at least one of the digital-to-analog converter 160 and the analog output circuit 130 includes an analog electronic component (for example: an operational amplifier), and this electronic component operates in a non-linear region or causes a non-linear effect, so that when the digital input signal D IN is too large or too small, the analog input signal A generated by the digital-to-analog converter 160 IN and the analog output signal A generated by the analog output circuit 140 OUT may include harmonics, resulting in harmonic distortion.

[0046] Since different output wattages and resistances will result in different loadings during the operation of the audio amplifier, causing different operating ranges of the audio amplifier, and further resulting in different harmonics generated. Therefore, the compensation control circuit 140 can generate different compensation parameter control signals CPC according to different mounting state detection signals LSD related to the mounting state with the external circuit 190, enabling the harmonic generation circuit 210 to generate different harmonic cancellation digital signals D HM . Through the compensation effect of the harmonic cancellation digital signal D HM , the harmonics of the analog input signal A IN and the analog output signal A OUT under different mounting conditions can all be canceled or reduced.

[0047] Please refer to Figure 3 . Figure 3 Fig. shows a block diagram of a harmonic compensation device 300 and an external circuit 190 electrically coupled to the harmonic compensation device 300 in another embodiment of the present invention.

[0048] Similar to Figure 1 the harmonic compensation device 100 shown, the harmonic compensation device 300 includes a harmonic compensation circuit 110, a conversion circuit 120, an analog output circuit 130, and a compensation control circuit 140. However, the harmonic compensation device 300 in this embodiment further includes a delay circuit 310.

[0049] The delay circuit 310 is configured to perform a delay operation on the digital input signal D IN and then transmit the (delayed) digital input signal D IN to the conversion circuit 120. More specifically, the delay circuit 310 is used to cancel or reduce the transmission delay caused by the harmonic compensation circuit 110, so that the digital input signal D IN at a certain time point and the generated harmonic cancellation digital signal D HM can reach the mixer 120 synchronously. In Figure 3 , the delay circuit 310 is used to delay the digital input signal D IN to output the delayed digital input signal D IN ' to the conversion circuit 120.

[0050] The delay amount of the delayed operation is determined by the signal processing time of the harmonic compensation circuit 110. For example, if the signal processing time of the harmonic compensation circuit 110 is equivalent to the time of X reference clocks, the delay amount of the delayed operation is set according to the time of the X reference clocks (for example: the delay amount is equal to the time of the X reference clocks), where the reference clock is the operation clock of the harmonic compensation circuit 110 or other clock that can quantify the transmission delay, X is a positive integer, and the transmission delay (i.e., the time of the X clocks) is obtained through known or self-developed simulation and analysis tools, external instrument measurement, or clock counter.

[0051] In one embodiment, Figure 3 the delay circuit 310 of Figure 2 can also be used to replace IN the phase adjustment circuit 230 in HM . More specifically, both the delay circuit 310 and the phase adjustment circuit 230 are used to adjust the phase relationship between the digital input signal D GA and the harmonic cancellation digital signal D HM . Therefore, the phase adjustment amount contributed by the phase adjustment circuit 230 can be selectively implemented by the delay circuit 310. In such a situation, the phase adjustment circuit 230 can be omitted, and K gain adjustment harmonics S GA serve as the harmonic cancellation digital signal D HM . At this time, the delay amount of the delayed operation can be determined by the signal processing time of the harmonic compensation circuit 110 and the analog output signal A OUT .

[0052] Corresponding to the above embodiment, the compensation parameter control signal CPC generated by the compensation control circuit 140 may selectively include a delay adjustment parameter DAP to adjust the delay amount of the delayed operation.

[0053] On the other hand, the delay amount of the delayed operation can also be implemented only by the phase adjustment circuit 230. At this time, the delay circuit 310 can be omitted, and the harmonic compensation device becomes the structure as shown in Figure 1 . The present invention is not limited thereto.

[0054] Please refer to Figure 4 . Figure 4 Fig. shows a block diagram of a harmonic compensation device 400 and an external circuit 190 electrically coupled to the harmonic compensation device 400 in another embodiment of the present invention.

[0055] Similar to Figure 1 the harmonic compensation device 100 shown, the harmonic compensation device 400 includes a harmonic compensation circuit 110, a conversion circuit 120, an analog output circuit 130, and a compensation control circuit 140. However, the conversion circuit 120 in this embodiment includes a digital-to-analog converter 410 and a mixer 420.

[0056] The digital-to-analog converter 410 is configured to perform signal conversion on the digital input signal D IN to generate a first analog input signal A IN1 and perform signal conversion on the harmonic cancellation digital signal D HM to generate a second analog input signal A IN2 .

[0057] The mixer 420 is configured to perform harmonic cancellation (such as superposition) on the first analog input signal A IN1 and the second analog input signal A IN2 to generate an analog input signal A IN . Similarly, the harmonic compensation circuit 110 can perform an inverting process on the harmonic cancellation digital signal D HM and, after the digital-to-analog converter 410 converts the digital input signal D IN and the (inverted) harmonic cancellation digital signal D HM , the mixer 420 adds the received first analog input signal A IN1 to the second analog input signal A IN2 to generate an analog input signal A IN .

[0058] In another exemplary embodiment, the harmonic compensation circuit 110 does not perform an inverting process on the harmonic cancellation digital signal D HM so that, after the digital-to-analog converter 410 performs signal conversion on the digital input signal D IN and the harmonic cancellation digital signal D HM , the mixer 420 subtracts the second analog input signal A IN1 from the first analog input signal A IN2 to generate an analog input signal A IN .

[0059] Therefore, the harmonic compensation device of the present invention can generate a compensation parameter control signal by the compensation control circuit according to the mounting state detection signal related to the mounting state with the external circuit, so that the harmonic compensation circuit can perform a harmonic generation program and a compensation adjustment program on the digital input signal to generate a harmonic cancellation digital signal to cancel or reduce the harmonics in the analog output signal generated by the analog output circuit according to the digital input signal.

[0060] Please refer to Figure 5 . Figure 5 FIG. shows a flowchart of a harmonic compensation method 500 in an embodiment of the present invention.

[0061] In addition to the aforementioned device, the present invention further discloses a harmonic compensation method 500, which is applied in, for example, but not limited to Figure 1In the harmonic compensation device 100. An embodiment of the harmonic compensation method 500 is as follows Figure 5 shown, and includes the following steps.

[0062] In step S510, the harmonic compensation circuit 110 performs a harmonic generation program and a compensation adjustment program on the digital input signal D according to the compensation parameter control signal CPC, and then generates a harmonic cancellation digital signal D IN . HM

[0063] In step S520, the conversion circuit 120 performs harmonic cancellation and signal conversion on the digital input signal D according to the harmonic cancellation digital signal D HM to generate an analog input signal A IN , where the harmonic cancellation is used to eliminate the harmonic components of the digital input signal D IN . IN

[0064] In step S530, the analog output circuit 130 generates an analog output signal A IN to the external circuit 190, and detects the mounting state of the external circuit 190 to generate a mounting state detection signal LSD. OUT

[0065] In step S540, the compensation control circuit 140 generates a compensation parameter control signal CPC according to the mounting state detection signal LSD.

[0066] It should be noted that the above embodiments are only examples. In other embodiments, those skilled in the art with ordinary knowledge can make changes without departing from the spirit of the present invention. Another thing worth noting is that in addition to operational amplifiers, the non-linear operation of other components (such as: frequency multipliers) may also cause harmonics. Since the present invention determines the parameter setting of the harmonic compensator according to the harmonics of the analog output signal, whether the harmonics are caused by operational amplifiers or other components, the present invention can compensate for them.

[0067] In summary, in the harmonic compensation device and method of the present invention, the compensation control circuit can generate a compensation parameter control signal according to the mounting state detection signal related to the mounting state of the external circuit, so that the harmonic compensation circuit can perform a harmonic generation program and a compensation adjustment program on the digital input signal to generate a harmonic cancellation digital signal to cancel or reduce the harmonics in the analog output signal generated by the analog output circuit according to the digital input signal.

[0068] ​​​Although the embodiments of the present invention are as described above, these embodiments are not intended to limit the present invention. Those skilled in the art with ordinary knowledge in this technical field can change the technical features of the present invention based on the explicit or implicit content of the present invention, and these changes all fall within the scope of patent protection sought by the present invention. In other words, the scope of patent protection of the present invention shall be defined according to the claims of the present invention.

Claims

1. A harmonic compensation device, comprising: A harmonic compensation circuit configured to perform a harmonic generation process and a compensation adjustment process on a digital input signal according to a compensation parameter control signal, and thereby generate a harmonic cancellation digital signal; A conversion circuit configured to perform harmonic cancellation and signal conversion on the digital input signal according to the harmonic cancellation digital signal to generate an analog input signal, wherein the harmonic cancellation is used to cancel a harmonic component of the digital input signal; An analog output circuit configured to generate an analog output signal to an external circuit according to the analog input signal, and detect a mounting state of the external circuit to generate a mounting state detection signal; and A compensation control circuit configured to generate the compensation parameter control signal according to the mounting state detection signal.

2. The harmonic compensation device according to claim 1, characterized in that, The analog output circuit is configured to detect a current detection value and a voltage detection value of the analog output signal, so that the generated mounting state detection signal includes the current detection value and the voltage detection value, and thereby the compensation control circuit calculates an output wattage or an impedance value of the external circuit according to the current detection value and the voltage detection value, and then generates the compensation parameter control signal according to the output wattage or the impedance value.

3. The harmonic compensation device according to claim 1, characterized in that The analog output circuit is configured to detect a current detection value and a voltage detection value of the analog output signal, and calculate an output wattage or an impedance value of the external circuit according to the current detection value and the voltage detection value, so that the generated mounting state detection signal includes the output wattage or the impedance value, and thereby the compensation control circuit generates the compensation parameter control signal according to the output wattage or the impedance value.

4. The harmonic compensation device according to claim 1, wherein The compensation control circuit is configured to store a compensation parameter look-up table to generate the compensation parameter control signal by looking up the table according to the mounting state detection signal.

5. The harmonic compensation device according to claim 1, wherein The conversion circuit includes: A mixer configured to perform the harmonic cancellation on the digital input signal and the harmonic cancellation digital signal to generate a digital output signal; and A digital-to-analog converter configured to perform the signal conversion on the digital output signal to generate the analog input signal.

6. The harmonic compensation device according to claim 1, characterized in that The conversion circuit includes: A digital-to-analog converter configured to perform the signal conversion on the digital input signal to generate a first analog input signal, and perform the signal conversion on the harmonic cancellation digital signal to generate a second analog input signal; and A mixer configured to perform the harmonic cancellation on the first analog input signal and the second analog input signal to generate the analog input signal.

7. The harmonic compensation device according to claim 1, characterized in that, The harmonic compensation circuit includes: A harmonic generation circuit configured to adjust a harmonic generation parameter according to the compensation parameter control signal to perform the harmonic generation process on the digital input signal, wherein the harmonic generation process generates K harmonics according to the harmonic generation parameter, and a frequency of each of the K harmonics is N times a frequency of the digital input signal, K is a positive integer, and N is an integer greater than 1; and A gain adjustment circuit configured to adjust a gain adjustment parameter according to the compensation parameter control signal to perform a gain adjustment procedure in the compensation adjustment procedure, wherein the gain adjustment procedure adjusts the gains of the K harmonics according to the gain adjustment parameter to generate K gain-adjusted harmonics; Wherein the harmonic cancellation digital signal is the K gain-adjusted harmonics or K phase-adjusted harmonics generated according to the K gain-adjusted harmonics.

8. The harmonic compensation device according to claim 7, wherein The harmonic compensation circuit includes: A phase adjustment circuit configured to adjust a phase adjustment parameter according to the compensation parameter control signal to perform a phase adjustment procedure in the compensation adjustment procedure, wherein the phase adjustment procedure adjusts the phases of the K gain-adjusted harmonics according to the phase adjustment parameter to generate the K phase-adjusted harmonics as the harmonic cancellation digital signal.

9. The harmonic compensation device according to claim 7, characterized in that, Further included is: A delay circuit configured to perform a delay operation on the digital input signal and then transmit the digital input signal to the conversion circuit, wherein a delay amount of the delay operation is determined by a signal processing time of the harmonic compensation circuit.

10. A harmonic compensation method, comprising: Performing a harmonic generation procedure and a compensation adjustment procedure on a digital input signal by a harmonic compensation circuit according to a compensation parameter control signal to generate a harmonic cancellation digital signal; Performing harmonic cancellation and signal conversion on the digital input signal by a conversion circuit according to the harmonic cancellation digital signal to generate an analog input signal, wherein the harmonic cancellation is used to cancel a harmonic component of the digital input signal; Generating an analog output signal to an external circuit by an analog output circuit according to the analog input signal and detecting a mounting state of the external circuit to generate a mounting state detection signal; and Generating the compensation parameter control signal by a compensation control circuit according to the mounting state detection signal.

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