Light detection device and preparation method thereof, image sensor and electronic equipment

Abstract

The invention provides a light detection device and a preparation method thereof, an image sensor and electronic equipment, relates to the technical field of semiconductors, and aims to solve the problem of how to prepare a light detection device capable of efficiently detecting a relatively wide infrared range at low cost. The optical detection device comprises a substrate, a photodiode and a first grid electrode, and the substrate is provided with a first surface; the photodiode is formed in the substrate, at least part of the photodiode extends from the first surface to the interior of the substrate, and the material of the photodiode comprises silicon germanium or indium gallium arsenide; the first gate is disposed on the first surface, and the first gate is disposed adjacent to the photodiode. The light detection device is used for detecting a light intensity signal.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and particularly to an optical detection device and a preparation method thereof, an image sensor, and an electronic device. Background Art

[0002] In order to adapt to different application scenarios, the types of image sensors have become more and more diverse. The key component in an image sensor is a photodiode that converts an optical signal into an electrical signal. Since photodiodes prepared from different semiconductor materials can absorb light in different wavelength ranges, various application scenarios can be adapted by selecting the semiconductor material for preparing the photodiode.

[0003] Since imaging with light wavelengths in the infrared range has many application scenarios. For example, images taken by detecting the infrared light reflected by fruits and vegetables can more easily determine the freshness or damage of fruits and vegetables. Therefore, how to prepare a photodiode that can absorb light with a wide infrared wavelength range at low cost and has a high quantum efficiency is an urgent problem to be solved. Summary of the Invention

[0004] Embodiments of the present application provide an optical detection device and a preparation method thereof, an image sensor, and an electronic device, to solve the problem of how to prepare an optical detection device that can efficiently detect light with a wide infrared wavelength range at low cost.

[0005] To achieve the above object, the embodiments of the present application adopt the following technical solutions:

[0006] In a first aspect, an embodiment of the present application provides an optical detection device, including a substrate, a photodiode, and a first gate. The substrate has a first surface; the photodiode is formed in the substrate, and at least part of the photodiode extends from the first surface into the substrate. The material of the photodiode includes silicon germanium or indium gallium arsenide; the first gate is disposed on the first surface, and the first gate is adjacent to the photodiode.

[0007] The first gate of the optical detection device is adjacent to the photodiode. By forming the photodiode in the substrate and at least part of the photodiode extending from the first surface of the substrate into the substrate, and the first gate is disposed on the first surface of the substrate, at least part of the photodiode and the first gate can be located on both sides of the first surface of the substrate, thereby reducing or avoiding the possibility of short circuit between the photodiode and the first gate, and also avoiding the formation of capacitance between the photodiode and the first gate, improving the rate of the first gate transferring electrons and / or holes generated after the photodiode absorbs photons, and slowing down or avoiding RC delay.

[0008] In addition, a photodiode of the optical detection device is formed in a substrate. The material of the photodiode includes silicon germanium or indium gallium arsenide. The material for forming the source / drain of some transistors in the optical detection device can also be silicon germanium or indium gallium arsenide. Thus, the source / drain of the transistor and the region in the photodiode with the same doping type as the source / drain (such as a P-type doped region) can be formed simultaneously, saving process steps.

[0009] In a possible implementation manner of the first aspect, at least a part of the side of the photodiode close to the first gate protrudes toward the first gate. In this way, the length of the channel formed under the first gate can be reduced, thereby increasing the rate of electron and / or hole transfer, increasing the mobility of electrons and / or holes, and improving the detection performance of the optical detection device.

[0010] In a possible implementation manner of the first aspect, a part of the photodiode is located under the first gate. In this way, the length of the channel formed under the first gate can be further reduced, increasing the mobility of electrons and / or holes, and improving the performance of the optical detection device.

[0011] In a possible implementation manner of the first aspect, along the direction perpendicular to the first surface of the substrate and away from the substrate, the size of the photodiode in the direction parallel to the first surface becomes smaller, then larger, and then smaller. Thus, along the direction perpendicular to the first surface of the substrate, the part between the two ends of the photodiode protrudes toward the first gate.

[0012] In a possible implementation manner of the first aspect, the optical detection device further includes a first transistor. The first transistor includes a second gate, a floating diffusion region, and a conductor region. The second gate is disposed on the first surface of the substrate. The floating diffusion region and the conductor region are disposed on both sides of the second gate, and the floating diffusion region is disposed between the second gate and the first gate. In this way, the signal driving ability of the optical detection device can be enhanced through the first transistor, and the detection performance of the optical detection device can be improved.

[0013] In a possible implementation manner of the first aspect, the floating diffusion region and the conductor region are formed by the substrate. In this way, the first transistor can be formed on the same substrate as the photodiode. When forming the photodiode and the first transistor, some same CMOS process steps can be carried out simultaneously, thereby reducing process steps and lowering the manufacturing cost.

[0014] In a possible implementation manner of the first aspect, a part of the photodiode has the same doping type as the floating diffusion region and the conductor region of the first transistor. In this way, the floating diffusion region and the conductor region of the first transistor can be formed through the doping process while forming a part of the photodiode through the doping process, reducing process steps.

[0015] In a possible implementation of the first aspect, the photodetector further includes a second transistor. The source region and the drain region of the second transistor extend from the first surface of the substrate into the substrate. The materials of the source region and the drain region include silicon germanium or indium gallium arsenide. In this way, the process steps of forming the source region / drain region of the second transistor and the region (such as the P-type doped region) in the photodiode with the same doping type as the source region / drain region can be carried out simultaneously, simplifying the process steps.

[0016] In addition, the second transistor can be used to form a CMOS circuit. That is to say, the photodiode and the CMOS circuit can be fabricated on the same substrate. In this way, it is possible to avoid forming the photodiode and the CMOS circuit on different substrates respectively, and there is no need to combine the two through packaging. Therefore, not only can the manufacturing process steps be reduced, but also the volume of the photodetector can be decreased.

[0017] In a possible implementation of the first aspect, a part of the photodiode has the same doping type as the source region and the drain region of the second transistor. In this way, while forming a part of the photodiode through the doping process, the floating diffusion region and the conductor region of the first transistor can be formed through the same doping process, reducing the process steps.

[0018] In a possible implementation of the first aspect, the photodiode is an avalanche photodiode or a PIN photodiode.

[0019] In the second aspect, the present application provides a method for manufacturing a photodetector, including: forming a first gate on the first surface of the substrate; forming a first cavity on the substrate, the first cavity extending from the first surface of the substrate into the substrate, wherein the first cavity is adjacent to the first gate; forming silicon germanium or indium gallium arsenide in the first cavity; forming a photodiode based on the silicon germanium or indium gallium arsenide. In this way, at least part of the photodiode and the first gate can be formed on both sides of the first surface of the substrate, reducing or avoiding the possibility of short circuit between the photodiode and the first gate, and also avoiding the formation of capacitance between the photodiode and the first gate, improving the rate at which the first gate transfers electrons and / or holes generated after the photodiode absorbs photons, and slowing down or avoiding RC delay. And at least part of the steps of this method can be combined with the process of fabricating transistors in forming a CMOS circuit, reducing the complexity of the manufacturing process.

[0020] In a possible implementation of the second aspect, forming a first cavity on the substrate includes etching the substrate from the first surface of the substrate to form an initial first cavity; continuing to etch the substrate through the initial first cavity to form a first cavity, and the side surface of the first cavity at least close to the first gate protrudes towards the first gate.

[0021] In a possible implementation of the second aspect, while forming the first cavity on the substrate, a second cavity is also formed on the substrate; silicon germanium or indium gallium arsenide is formed in the second cavity to form the source region and the drain region of the second transistor. In this way, the first cavity and the second cavity can be formed by the same process step; in addition, since silicon germanium or indium gallium arsenide is formed in both the first cavity and the second cavity, silicon germanium or indium gallium arsenide can also be formed in the first cavity and the second cavity simultaneously by the same process step. Therefore, the process steps can be reduced and the manufacturing cost can be lowered.

[0022] In a possible implementation of the second aspect, a photodiode is formed based on silicon germanium or indium gallium arsenide, including ion implanting the silicon germanium or indium gallium arsenide in the first cavity. In this way, doping can be carried out through the ion implantation process to form the photodiode. At the same time, the ion implantation process is also convenient to be incorporated into the CMOS process. Therefore, the formation process of the photodiode can be integrated into the CMOS process, reducing the process steps.

[0023] In a third aspect, the present application provides an image sensor. The image sensor includes a filter and a light detection device as described in any one of the first aspect. The filter is disposed on a side of the photodiode away from the substrate. Since the image sensor adopts the light detection device as described in any one of the first aspect, a part of the preparation steps of the image sensor can also be combined in the process of manufacturing the CMOS circuit, having the advantages of reducing the process steps and lowering the manufacturing cost.

[0024] In a fourth aspect, the present application provides an electronic device. The electronic device includes a printed circuit board and an image sensor as described in the third aspect. The image sensor is connected to the printed circuit board. Since the image sensor adopts the image sensor in the third aspect, the electronic device also has the advantage of low cost. Description of the Drawings

[0025] Figure 1 It is a schematic diagram of an electronic device provided by an embodiment of the present application;

[0026] Figure 2 It is a diagram of the wavelength range of light that can be detected by photodiodes prepared from different semiconductor materials;

[0027] Figure 3 It is a diagram of the quantum efficiency of photodiodes prepared from different materials detecting light of different wavelengths;

[0028] Figure 4 It is a partial structural schematic diagram of a light detection device provided by an embodiment of the present application;

[0029] Figure 5 It is a preparation flow chart of a method for manufacturing a light detection device provided by an embodiment of the present application;

[0030] Figure 6 Schematic diagram of a structure for forming a gate on the surface of a substrate provided by an embodiment of the present application;

[0031] Figure 7 Schematic diagram of a structure for forming a mask layer on the surface of a substrate provided by an embodiment of the present application;

[0032] Figure 8 Schematic diagram of a structure in which a portion of the substrate is exposed by the mask layer on the substrate provided by an embodiment of the present application;

[0033] Figure 9 Schematic diagram of a structure for forming an initial first cavity on a substrate provided by an embodiment of the present application;

[0034] Figure 10 Schematic diagram of a structure for forming a first cavity on a substrate provided by an embodiment of the present application;

[0035] Figure 11 Schematic diagram of a structure for forming silicon germanium or indium gallium arsenide in the first cavity provided by an embodiment of the present application;

[0036] Figure 12 Schematic diagram of a structure for forming another mask layer on the surface of the substrate provided by an embodiment of the present application;

[0037] Figure 13 Schematic diagram of a structure in which another mask layer on the substrate exposes a portion of the substrate provided by an embodiment of the present application;

[0038] Figure 14 Schematic diagram of a structure after a first ion implantation on region P in Figure 13 provided by an embodiment of the present application;

[0039] Figure 15 Schematic diagram of a structure after a second ion implantation on region P in Figure 13 provided by an embodiment of the present application;

[0040] Figure 16 Schematic diagram of a structure for forming a photodiode and a transistor on a substrate provided by an embodiment of the present application. Detailed implementation manners

[0041] Unless otherwise defined, the technical terms or scientific terms used in this application shall have the ordinary meanings as understood by those skilled in the art. The terms "first", "second", "third" and similar terms used in the description of the specification and claims of this application do not denote any order, quantity or importance, but are only used to distinguish different components. Thus, features defined with "first", "second", "third" may explicitly or implicitly include one or more of such features. In the description of the embodiments of this application, unless otherwise stated, the meaning of "a plurality" is two or more.

[0042] The orientation terms such as "left", "right", "up" and "down" are defined relative to the orientation in which the device in the drawing is schematically placed. It should be understood that these directional terms are relative concepts, which are used for relative description and clarification, and they can change accordingly with the change of the orientation in which the chip or semiconductor package structure is placed.

[0043] As Figure 1 , an electronic device 10 provided by an embodiment of this application is shown. The electronic device 10 includes an image sensor 20 and a printed circuit board (PCB) 30. The image sensor 20 is disposed on the printed circuit board 30 and connected to the printed circuit board 30. The electronic device 10 may be a mobile phone, a tablet personal computer, a laptop computer, a personal digital assistant (PDA), a notebook computer, a vehicle-mounted device, a wearable device, etc. Among them, the wearable device includes but is not limited to a smart bracelet, a smart watch, a smart head-mounted display, smart glasses, etc. The electronic device 10 may also be a medical device, etc.

[0044] The image sensor 20 may be a CMOS (Complementary Metal Oxide Semiconductor) image sensor. The image sensor 20 may include a light detection device 100 and a filter 21. The light detection device 100 may include a substrate. At least a part of the light detection device 100 may be formed by the substrate. The filter 21 is disposed on a side of the light detection device 100 away from the substrate. Exemplarily, the light detection device 100 may include a photodiode formed on the substrate, and the filter 21 is disposed on a side of the photodiode away from the substrate. The filter 21 may allow light of a specific wavelength to enter the photodiode, that is, the filter 21 may select the light entering the photodiode, so that the light detection device 100 only detects light of a specific wavelength.

[0045] The optical detection device 100 can be used to detect optical signals and convert them into electrical signals that can be further processed by other circuits. The optical detection device 100 includes a photodiode, which can be made of semiconductor material, and its core part is a PN junction. The photodiode operates under reverse voltage. When there is light illumination, photons carrying energy enter the PN junction. After that, the bound electrons in some covalent bonds between the atoms of the semiconductor material absorb the energy of the photons and break free from the covalent bonds, thus generating electron-hole pairs. Under the action of the reverse voltage, the electrons and holes move by drift, making the reverse current in the photodiode increase significantly. The greater the intensity of the incident light, the greater the reverse current. Thus, an electrical signal related to the light intensity can be obtained. Whether the electrons can break free from the covalent bonds after absorbing the energy of the photons is related to the band gap of the semiconductor material. When the band gap of the semiconductor material is larger, the energy required for its electrons to break free from the covalent bonds is greater, and the corresponding wavelength of the light is shorter; on the contrary, when the band gap of the semiconductor material is smaller, the energy required for its electrons to break free from the covalent bonds is smaller, and the corresponding wavelength of the light is longer. Therefore, photodiodes prepared from different semiconductor materials can detect different wavelengths of light.

[0046] Please refer to Figure 2 , Figure 2 is the wavelength range that photodiodes prepared from different semiconductor materials can detect. The figure shows lights of different wavelengths, including ultraviolet light (UV) with a shorter wavelength, medium wavelength infrared light (MWIR) with a longer wavelength, and visible light (VIS), near infrared light (NIR), and short-wave (length) infrared light (SWIR) with wavelengths between the two. Among them, the wavelength range that the photodiode prepared from silicon (Si) can detect includes visible light (VIS) and near infrared light (NIR), while the wavelength range that the photodiode prepared from silicon germanium (SiGe) can detect not only includes the wavelength range that the photodiode prepared from silicon can detect, but also includes short-wave infrared light (SWIR) with a wavelength longer than near infrared light (NIR). The wavelength range that the photodiode prepared from indium gallium arsenide (InGaAs) can detect includes part of the medium wavelength infrared light (MWIR) with a wavelength longer than that of short-wave infrared light (SWIR).

[0047] Since optical detection devices that can detect longer wavelengths of light have many application scenarios, it is necessary to improve the performance of such optical detection devices or reduce the manufacturing cost of such optical detection devices.

[0048] Please refer to Figure 3 , Figure 3Shows the quantum efficiency (QE) and sensitivity of PIN photodiodes prepared from different materials for detecting light of different wavelengths. In the figure, the horizontal axis represents the wavelength of light, and the vertical axis represents the sensitivity of the photodiode. The three dotted lines inclined through the origin of coordinates represent quantum efficiencies (QE) of 100%, 75%, and 50% respectively. Among them, the PIN photodiode prepared from silicon (Si) has a quantum efficiency exceeding 75% in the wavelength range of approximately 600 nm to 1000 nm, and the quantum efficiency is almost 0 after the wavelength exceeds 1100 nm. The PIN photodiode prepared from germanium (Ge) has a quantum efficiency exceeding 50% in the wavelength range of approximately 900 nm to 1600 nm. The PIN photodiode prepared from indium gallium arsenide (InGaAs) has a quantum efficiency exceeding 75% in the wavelength range of approximately 900 nm to 1500 nm. Thus, although the photodiode prepared from silicon has a relatively mature process and high performance, it is not an efficient sensor material for short-wave infrared light (900 nm to 1700 nm) or light of longer wavelengths. Germanium or indium gallium arsenide, on the other hand, has a high quantum efficiency in most of the wavelength ranges corresponding to short-wave infrared light. In addition, from Figure 2 It can be seen that the photodiode prepared from silicon germanium (SiGe) can detect light of a relatively large wavelength, covering near-infrared light and visible light. In this wavelength range, the PIN photodiode prepared from silicon or germanium also has a high quantum efficiency. Therefore, it can be considered that in this range, the PIN photodiode of silicon germanium also has a high quantum efficiency. Thus, silicon germanium (SiGe) and indium gallium arsenide (InGaAs) can be used as sensor materials for light of longer wavelengths.

[0049] Please refer to Figure 4 , which is a partial structural schematic diagram of a light detection device 100 provided by the present application. The light detection device 100 includes a substrate 110, a photodiode 120, and a first gate 130.

[0050] The substrate 110 can be made of silicon or other semiconductor materials, and it can include doped and / or undoped semiconductor materials. The substrate 110 can include other elemental semiconductor materials such as germanium (Ge). In some embodiments, the substrate 110 can be made of compound semiconductors such as silicon carbide (SiC), gallium arsenide (GaAs), indium arsenide (InAs), or indium phosphide (InP). In some embodiments, the substrate 110 can be made of alloy semiconductors such as silicon germanium carbide (SiGeC), gallium arsenide phosphide (GaAsP), or gallium indium phosphide (GaInP). In some embodiments, the substrate 110 includes an epitaxial layer. For example, the substrate 110 has an epitaxial layer on the semiconductor body. In some embodiments, the substrate 110 can also be a silicon-on-insulator (SOI) or germanium-on-insulator (GOI) substrate.

[0051] Please continue to refer to Figure 4 , the substrate 110 has a first surface 111, and the photodiode 120 is formed in the substrate 110. The photodiode 120 at least partially extends from the first surface 111 into the interior of the substrate 110. The material of the photodiode 120 may include silicon germanium (SiGe) or indium gallium arsenide (InGaAs).

[0052] In some embodiments, the photodiode 120 can be formed by doping silicon germanium or indium gallium arsenide. There are also various methods for forming the photodiode 120 by doping. For example, first, a gas of the first doping type is added in a CVD process to form silicon germanium or indium gallium arsenide of the first doping type, and then a gas of the second doping type is added in the CVD process to form silicon germanium or indium gallium arsenide of the second doping type, thereby forming a PN junction, which can be used to form the photodiode 120. Another example is that after forming silicon germanium or indium gallium arsenide of the first doping type, the second type of doping is performed on the silicon germanium or indium gallium arsenide of the first doping type by means of ion implantation. By controlling the energy of the ion implantation, the doping type of a part of the silicon germanium or indium gallium arsenide can be changed to the second doping type, thereby forming a PN junction. By controlling the doping of silicon germanium or indium gallium arsenide, various types of photodiodes 120 can be formed, such as avalanche photodiodes or PIN photodiodes, etc.

[0053] Please continue to refer to Figure 4 , the first gate 130 can be disposed on the first surface 111, and the first gate 130 is disposed adjacent to the photodiode 120. The first gate 130 can receive a control signal, and the control signal is used to control the transfer of electrons and / or holes generated after the photodiode 120 absorbs photons from the region where the photodiode 120 is located to the other side of the first gate 130 relative to the photodiode 120. The material of the first gate 130 may include doped polysilicon, or may also include a metal material, such as tungsten, tantalum, titanium, and their nitrides, etc.

[0054] Since the photodiode 120 is formed in the substrate 110, that is, at least part of the photodiode 120 is located under the first surface 111, and the first gate 130 is disposed on the first surface 111, thus at least part of the photodiode and the first gate can be formed on both sides of the first surface of the substrate, so as to reduce or avoid the possibility of short - circuit between the photodiode 120 and the first gate 130, and also reduce or avoid the formation of capacitance between the photodiode 120 and the first gate 130, improve the rate of transferring electrons and / or holes generated after the photodiode 120 absorbs photons, and slow down the RC delay.

[0055] In addition, the optical detection device 100 may further include a CMOS circuit, which is disposed on the substrate 110. When preparing the CMOS circuit, in order to improve the efficiency of the circuit, the materials of the source and drain of the PMOS (Positive Channel Metal Oxide Semiconductor) transistor and the NMOS transistor (Negative Channel Metal Oxide Semiconductor) can be selected to balance the electron transfer efficiency of the PMOS and the NMOS. For example, when the materials of the source and drain of the NMOS transistor are silicon, the materials of the PMOS source and drain can be silicon germanium or indium gallium arsenide. The source and drain of the PMOS transistor formed by silicon germanium or indium gallium arsenide can extend from the first surface 111 into the substrate 110. Therefore, in some process steps of preparing the CMOS circuit, the photodiode 120 can be prepared simultaneously, that is to say, the preparation process of the photodiode 120 can be incorporated into the CMOS process.

[0056] The optical detection device 100 further includes a gate dielectric layer 133, which is disposed between the first gate 130 and the first surface 111. The material of the gate dielectric layer 133 may include silicon dioxide (SiO2), silicon oxynitride (SiO x N y ) or silicon nitride (Si3N4) dielectric layer. The material of the gate dielectric layer 133 may also include a high-K (high dielectric constant) dielectric. Exemplarily, the high-K dielectric may be a metal oxide dielectric. For example, the metal oxide dielectric is tantalum pentoxide (Ta2O5) and titanium dioxide (TiO2). The material of the gate dielectric layer 133 may also include other types of high-K dielectrics, such as PZT (Piezoelectric Ceramic Transducer).

[0057] Please continue to refer to Figure 4 , the photodiode 120 is disposed adjacent to the first gate 130. Since the photodiode 120 at least partially extends from the first surface 111 into the substrate 110 and the first gate 130 is disposed on the first surface 111, the size of the portion of the photodiode 120 extending from the first surface 111 into the substrate 110 in the plane parallel to the first surface 111 is not limited by the first gate 130. That is to say, the shape of the portion of the photodiode 120 extending from the first surface 111 into the substrate 110 has a large design space, which is beneficial to improving the performance of the optical detection device 100.

[0058] In some embodiments, at least a part of the side of the photodiode 120 close to the first gate 130 may protrude towards the first gate 130. For example, Figure 4In [the figure], the shape in which the photodiode 120 protrudes toward the first gate 130 may be an angle, an arc, or other shapes. Since the first gate 130 can control the transfer of electrons and / or holes generated after the photodiode 120 absorbs photons from the region where the photodiode 120 is located to the other side of the first gate 130 relative to the photodiode 120, when at least a part of the side of the photodiode 120 close to the first gate 130 protrudes toward the first gate 130, the path length of the transferred electrons and / or holes can be reduced, or in other words, the length of the channel formed under the first gate 130 can be reduced, thereby increasing the rate of electron and / or hole transfer, enhancing the mobility of electrons and / or holes, and improving the detection speed of the optical detection device 100.

[0059] Although the contour of the side of the photodiode 120 close to the first gate 130 is defined in the above embodiments, it is easily understood that the shape of the side of the photodiode 120 far from the first gate 130 is not limited here. For example, the part of the photodiode 120 far from the first gate 130 does not protrude toward the side far from the first gate 130. The overall outer contour of the photodiode 120 is not limited here either. For example, any cross-section of the photodiode 120 parallel to the first surface 111 may be circular.

[0060] In some embodiments, a part of the photodiode 120 may be located under the first gate 130, that is, in the direction perpendicular to the first surface 111 of the substrate 110, a part of the photodiode 120 and a part of the first gate 130 may overlap. Exemplarily, the part of the side of the photodiode 120 close to the first gate 130 may protrude toward the first gate 130 to such an extent that this part is located under the first gate 130. Thereby, the length of the channel formed under the first gate 130 is further reduced, and the rate of electron and / or hole transfer is further increased.

[0061] In some embodiments, in the direction perpendicular to the first surface 111 of the substrate 110 and away from the substrate 110, the size D of the photodiode 120 in the direction parallel to the first surface 111 changes from small to large and then to small. Exemplarily, in the direction perpendicular to the first surface 111, both ends of the photodiode 120 are small and the middle is large. For example, the photodiode 120 is olive-shaped.

[0062] In some embodiments, when the optical detection device 100 has multiple photodiodes 120, the multiple photodiodes 120 may be arranged in an array.

[0063] In some embodiments, the optical detection device 100 may include a first transistor 140, and the first transistor 140 includes a second gate 141, a floating diffusion region 142, and a conductor region 143.

[0064] The second gate 141 may also be disposed on the first surface 111 of the substrate 110. The material of the second gate 141 may include doped polysilicon, or may include a metal material, such as tungsten, tantalum, titanium, and their nitrides. The material of the second gate 141 may be the same as the material of the first gate 130. For example, the materials of the first gate 130 and the second gate 141 are both tantalum. Thus, when manufacturing the photodetector device 100, the first gate 130 and the second gate 141 may be formed simultaneously.

[0065] The floating diffusion region 142 and the conductor region 143 may be formed from the substrate 110, that is to say, the floating diffusion region 142 and the conductor region 143 may be part of the substrate 110. For example, the floating diffusion region 142 and the conductor region 143 may be formed by ion implanting into a partial region of the substrate 110. The floating diffusion region 142 and the conductor region 143 are respectively located on both sides of the second gate 141. Thus, the first transistor 140 and the photodiode 120 may be formed on the same substrate 110. Therefore, both the photodiode 120 and the first transistor 140 may be formed by CMOS processes.

[0066] The first transistor 140 may be disposed close to the first gate 130, and the floating diffusion region 142 may be disposed between the second gate 141 and the first gate 130. In this way, when control signals are respectively applied to the second gate 141 and the first gate 130, the state of the electrons stored in the floating diffusion region 142 can be changed. For example, as described above, when a control signal is applied to the first gate 130, the electrons generated after the photodiode 120 absorbs photons can be transferred from the region where the photodiode 120 is located to the floating diffusion region 142; when a control signal is applied to the second gate 141, the electrons stored in the floating diffusion region 142 can be read out, that is, the electrons are transferred out of the floating diffusion region 142 to obtain the optical signal detected by the photodiode 120.

[0067] In some embodiments, the first transistor 140 may be used to form a signal amplification circuit, that is to say, the first transistor 140 may be used to enhance the driving ability of the electrons and / or holes generated after the photodiode 120 absorbs photons.

[0068] In some embodiments, the floating diffusion region 142 and the conductor region 143 of the first transistor 140 may be N-type doped, and a PN junction including an N-type doped region is formed in the photodiode 120, that is to say, a part of the photodiode 120 has the same doping type as the floating diffusion region 142 and the conductor region 143 of the first transistor 140. Therefore, in the manufacturing process, the photodiode and the floating diffusion region 142 and the conductor region 143 of the first transistor 140 can be doped simultaneously to reduce the manufacturing process steps.

[0069] In some embodiments, a lightly doped drain region 112 (LLD) is also formed in the floating diffusion region 142 and the conductor region 143 near the edge regions of the first gate 130 and / or the second gate 141. The lightly doped drain region 112 is beneficial to reducing the peak electric field intensity near the floating diffusion region 142 and the conductor region 143 and weakening the hot carrier effect.

[0070] In some embodiments, when the optical detection device 100 has a plurality of photodiodes 120, each photodiode 120 can be adjacent to a corresponding first transistor 140.

[0071] It is easy to understand that in order to improve the performance of obtaining the light intensity signal detected by the photodiode 120, other transistors (not shown in the figure) can also be provided near the first gate 130. These transistors can be disposed on the same substrate 110 as the photodiode 120, which will not be elaborated in this application.

[0072] In some embodiments, the optical detection device 100 may include a second transistor 150. The second transistor 150 may include a source region 152 and a drain region 153. The source region 152 and the drain region 153 can be formed in the substrate 110, that is, the source region 152 and the drain region 153 extend from the first surface 111 of the substrate 110 into the interior of the substrate 110. That is to say, the source region 152 and the drain region 153 of the photodiode 120 and the second transistor 150 both extend from the first surface 111 of the substrate 110 into the interior of the substrate 110. It is easy to understand that it is not required that the first surface 111 around the photodiode 120 and the first surface 111 around the source region 152 and the drain region 153 of the second transistor 150 are planar, and the two can also have different morphologies.

[0073] The source region 152 and the drain region 153 of the second transistor 150 may also include silicon germanium or indium gallium arsenide. Thus, the materials forming the source region 152 and the drain region 153 of the second transistor 150 can be formed simultaneously with the materials forming the photodiode 120.

[0074] The source region 152 and the drain region 153 of the second transistor 150 can be P-type doped, and a PN junction including P-type doping is formed in the photodiode 120. Thus, a part of the photodiode 120 has the same doping type as the source region 152 and the drain region 153 of the second transistor 150. Therefore, in the manufacturing process, the photodiode 120 and the source region 152 and the drain region 153 of the second transistor 150 can be doped simultaneously, reducing the manufacturing process steps.

[0075] In some embodiments, the second transistor 150 can be used to form a CMOS circuit, which can be used to form a control circuit or a signal processing circuit, etc. For example, when the light detection device 100 has a plurality of photodiodes 120 and the plurality of photodiodes 120 can be arranged in an array, the control circuit including the second transistor 150 can be used to read out the light intensity signals obtained by each of the photodiodes 120 in the photodiode 120 array.

[0076] The structure of the light detection device 100 will be introduced below with specific examples. The light detection device 100 may include a photodiode 120, a first gate 130, a first transistor 140, a second transistor 150, and a shallow trench isolation structure 181.

[0077] Along the direction extending from the first surface 111 of the substrate 110 into the substrate 110, the photodiode 120 sequentially includes a first region 121, a second region 122, and a third region 123. Among them, the doping type of the first region 121 can be P-type, for example, it can be P-type heavily doped; the doping type of the second region 122 can be N-type or intrinsic type. For example, it is N-type lightly doped; the doping type of the third region 123 can be N-type. For example, it can be an N-type heavily doped region.

[0078] Along the direction parallel to the first surface 111 of the substrate 110, the first gate 130 is disposed between the first transistor 140 and the photodiode 120. The first transistor 140 includes a second gate 141, a floating diffusion region 142, and a conductor region 143. The doping types of the floating diffusion region 142 and the conductor region 143 can both be N-type. Exemplarily, both the floating diffusion region 142 and the conductor region 143 include an N-type doped region and a lightly doped drain region 112. Among them, the lightly doped drain region 112 is disposed close to the first surface 111 of the substrate 110. The lightly doped drain regions 112 are disposed on both sides of the N-type doped region of the floating diffusion region 142, and the lightly doped drain region 112 is disposed on one side of the N-type doped region of the conductor region 143 close to the second gate 141.

[0079] The second transistor 150 can be disposed on the side of the first transistor 140 away from the photodiode 120. The second transistor 150 can be a PMOS transistor. The second transistor includes a third gate 151, a source region 152, and a drain region 153. The materials of the source region 152 and the drain region 153 can be silicon germanium or indium gallium arsenide. Exemplarily, the materials of the source region 152 and the drain region 153 can be the same as the material of the photodiode 120. The doping types of the source region 152 and the drain region 153 are P-type. For example, they can be P-type heavily doped. Exemplarily, the doping types of the source region 152 and the drain region 153 can be the same as the doping type of the first region 121 of the photodiode 120.

[0080] A shallow trench isolation structure 181 can be disposed between the first transistor 140 and the second transistor 150 to avoid mutual influence between adjacent transistors. The material of the shallow trench isolation structure 181 can be an insulating material, such as silicon dioxide. Exemplarily, the photodiode 120 and the first transistor 140 are disposed in an area on the substrate 110, the second transistor 150 is disposed in another area of the substrate 110, and the shallow trench isolation structure 181 is disposed between the two areas.

[0081] In addition, some embodiments of the present application further provide a method for manufacturing a photodetector device, as Figure 5 shown, Figure 5 is the manufacturing process of this manufacturing method, and this manufacturing method includes the following steps:

[0082] S100, as Figure 6 shown, form a first gate 130 on the first surface 111 of the substrate 110.

[0083] Provide a substrate 110, and the material of the substrate 110 can be as described above. For the convenience of description, in the embodiments of the present application, the material of the substrate 110 is silicon as an example. Form a first gate 130 on the first surface 111 of the substrate 110. The formed first gate 130 can be used to control the transfer of electrons and / or holes generated after the photodiode located on one side thereof absorbs photons to the other side of the first gate 130.

[0084] Forming the first gate 130 on the first surface 111 of the substrate 110 can be performed using a CMOS process.

[0085] Before forming the first gate 130 on the first surface 111 of the substrate 110, a gate dielectric layer 133 needs to be formed on the substrate 110. Exemplarily, a dielectric layer can be first formed on the substrate, and this dielectric layer is used to form the gate dielectric layer 133. The material of the dielectric layer can be as described above. According to the material of the formed dielectric layer, an appropriate process can be selected. For example, when the material of the dielectric layer is SiO2, it can be formed by thermal oxidation of the surface of the substrate 110, or can be formed by a CVD (Chemical Vapor Deposition) process. After forming the dielectric layer, the dielectric layer on the part other than the pre-formed first gate 130 on the first surface 111 of the substrate 110 can be removed through photolithography and etching processes, thereby forming the gate dielectric layer 133.

[0086] Similarly, after forming the gate dielectric layer 133, the gate layer can be formed by deposition, and the material of the gate layer can be as described above. The formation of the gate layer can also select a suitable process according to the material of the gate. For example, if the material of the formed gate is tungsten, it can be formed by a sputtering process. Then, a photolithography and etching process can be used to form the first gate 130 through the gate layer. It is easy to understand that for some metal materials that are not suitable for dry etching, the damascene process can be used to form the first gate 130.

[0087] In addition, the formation of the first gate 130 on the first surface 111 of the substrate 110 can be carried out simultaneously with the formation of the gates of other transistors. For example, the gates of other transistors can be the second gate 141 of the first transistor and the third gate 151 of the second transistor. The positional relationship between the gates of other transistors and the first gate 130 can be determined according to the functions of these transistors. For example, the first transistor can be used to enhance the driving ability of the optical intensity signal detected by the photodiode. Therefore, the second gate 141 of the first transistor can be arranged close to the first gate 130. Another example is that the second transistor can be used to form a control circuit or a logic circuit, etc. Therefore, the third gate 151 of the second transistor can be arranged at a relatively far distance from the first gate 130, and the gate 151 of the second transistor can be specifically formed in the area of the substrate 110 for forming a circuit.

[0088] It is easy to understand that before and / or after the formation of the first gate 130 and / or other gates, a shallow trench isolation structure 181 can also be formed in the substrate 110. The shallow trench isolation structure 181 can be formed by a conventional semiconductor process.

[0089] S200, as Figures 7 - 10 shown, a first cavity 162 is formed on the substrate 110. The first cavity 162 extends from the first surface 111 of the substrate 110 into the substrate 110, wherein the first cavity 162 is adjacent to the first gate 130.

[0090] After forming the first gate 130 on the first surface 111 of the substrate 110, the position for forming the photodiode can be determined. The photodiode can be located on one side of the first gate 130, that is, the first cavity is adjacent to the first gate.

[0091] It is easy to understand that in order to make at least a part of the formed photodiode extend from the first surface 111 of the substrate 110 into the substrate 110, a first cavity can be formed at the position for pre-forming the photodiode on the substrate 110, and this first cavity is used to accommodate the pre-formed photodiode.

[0092] In some embodiments, in order to protect the regions where the first cavity is not formed during the subsequent process of forming the first cavity, for example, the first gate 130, the second gate 141, and the region between the first gate 130 and the second gate 141, etc., as Figure 7 shown, it is necessary to form a first mask layer 161 on the surface of the substrate 110 on which the first gate 130 is formed. The material of the first mask layer 161 can be silicon nitride or the like.

[0093] In order to make the formed first cavity be adjacent to the first gate 130, a pattern can be formed on the formed first mask layer 161 through a photolithography process and an etching process, as Figure 8 shown, to expose the surface of the substrate 110 where the first cavity is pre-formed. The exposed surface is adjacent to the first gate 130, so that the first cavity can be formed on the exposed surface through subsequent processes. It is easy to understand that when the process of forming the first cavity will not affect the gate material, the pattern of the first mask layer 161 here can also expose the first gate 130 and the second gate 141.

[0094] Please refer to Figure 10 , the first cavity 162 can be formed by etching the exposed surface of the substrate 110. The first cavity 162 is formed in the substrate 110 body. In some embodiments, as Figure 9 shown, to form the first cavity 162, the substrate 110 can be etched first from the first surface 111 of the substrate 110 to form an initial first cavity 163. For example, the initial first cavity 163 can be formed by wet etching, and the wet etching can be performed using tetramethylammonium hydroxide (TMAH). Since wet etching is anisotropic, the initially formed first cavity 163 is irregular, which is not conducive to forming photodiodes with consistent performance subsequently. Therefore, as Figure 10 shown, after the initial first cavity 163 is formed, the substrate 110 can be continuously etched through the initial first cavity 163 to change the profile of the initial first cavity 163 to form the first cavity 162. The first cavity 162 can be formed by a dry etching process. The dry etching process is anisotropic and can modify the profile of the initial first cavity 163. For example, when the substrate 110 is etched through the initial first cavity 163 by a dry etching process, the side surface of the first cavity 162 at least close to the first gate 130 protrudes towards the first gate 130.

[0095] In addition, since CMOS circuits and the like can be formed through CMOS processes, in CMOS processes, in order to improve the performance of circuits, the materials of the source and drain of the PMOS transistors formed may be different from the material of the substrate 110. At this time, before forming the source and drain of the PMOS, a second cavity 164 needs to be formed on both sides of the gate of the PMOS transistor in the CMOS circuit, and the shape of the second cavity 164 may be the same as that of the first cavity 162. For example, the PMOS transistor may include the aforementioned second transistor, and the second cavity 164 may be formed on both sides of the third gate 151 of the second transistor. That is to say, the second cavity 164 can be formed simultaneously with the formation of the first cavity 162 on the substrate, and the second cavity 164 can be used to form the second transistor.

[0096] Understandably, there is no sequence between step S100 and step S200. That is, the first gate 130 can be formed on the substrate 100 first, and then the first cavity 163 is formed; or the first cavity 163 can be formed on the substrate 100 first, and then the first gate 130 is formed.

[0097] S300, as Figure 11 shown, form silicon germanium or indium gallium arsenide in the first cavity 162.

[0098] After the first cavity 162 is formed, silicon germanium or indium gallium arsenide can be formed in the first cavity 162, and the CVD process can be used to form silicon germanium or indium gallium arsenide. The silicon germanium or indium gallium arsenide formed in the first cavity 162 can be used to form a photodiode.

[0099] Understandably, while silicon germanium or indium gallium arsenide is formed in the first cavity 162, silicon germanium or indium gallium arsenide can also be formed in the second cavity 164. The silicon germanium or indium gallium arsenide formed in the second cavity 164 can be used to form the source and drain of the PMOS transistor of the CMOS circuit. For example, the source region 152 and the drain region 153 of the second transistor are formed by forming silicon germanium or indium gallium arsenide in the second cavity 164.

[0100] In some embodiments, the silicon germanium or indium gallium arsenide formed in the first cavity 162 and the second cavity 164 is P-type doped. The P-type doped silicon germanium or indium gallium arsenide can be formed by adding a doping material during the deposition process of forming silicon germanium or indium gallium arsenide, or can be doped by ion implantation after the formation of silicon germanium or indium gallium arsenide. The silicon germanium or indium gallium arsenide formed in the first cavity 162 can be P-type heavily doped.

[0101] In some embodiments, when the doping concentration of the P-type region in the photodiode is different from the doping concentrations of the source and drain regions of the PMOS transistors in the CMOS circuit, silicon germanium or indium gallium arsenide can be formed in the first cavity 162 and the second cavity 164 according to the P-type doping concentration in the photodiode, and then the source and drain regions of the PMOS transistors can be doped separately to change the doping concentration.

[0102] S400, such as Figures 12 - 16 As shown, the photodiode 120 is formed based on silicon germanium or indium gallium arsenide.

[0103] After silicon germanium or indium gallium arsenide is formed in the first cavity 162, the photodiode 120 can be formed through the silicon germanium or indium gallium arsenide in the first cavity 162. The core part of the photodiode 120 is the PN junction, and the silicon germanium or indium gallium arsenide in the first cavity 162 can be made to form a PN junction by doping.

[0104] Such as Figure 12 As shown, before doping the silicon germanium or indium gallium arsenide in the first cavity 162, a second mask layer 171 needs to be formed on the upper surface of the substrate 110 (the first mask layer 161 on the upper surface of the substrate 110 can be removed before this), and patterns are formed on the second mask layer 171 through photolithography and etching processes to protect the areas that do not need to be doped in the subsequent process of forming the photodiode. For example, as Figure 13 As shown, the upper surface of the silicon germanium or indium gallium arsenide filled in the first cavity 162 is exposed. The material of the second mask layer 171 can be the same as or different from the material of the first mask layer 161.

[0105] In some embodiments, a first type of doping can be performed on the silicon germanium or indium gallium arsenide in the first cavity 162 when it is formed. Since silicon germanium or indium gallium arsenide can also be formed in the second cavity 164 while the silicon germanium or indium gallium arsenide in the first cavity 162 is being formed, and the silicon germanium or indium gallium arsenide in the second cavity 164 can be used to form the source and drain of the PMOS transistor, the doping types of the silicon germanium or indium gallium arsenide formed in the first cavity 162 and the second cavity 164 are the same. For example, they can both be P-type doping, that is, the first type of doping can be P-type doping.

[0106] To form a PN junction, N-type ion implantation can be performed on the substrate 110 through the unmasked part formed by the mask layer 171. For example, N-type ion implantation is performed on the silicon germanium or indium gallium arsenide in the first cavity 162.

[0107] By controlling the process parameters of the N-type ion implantation on the silicon germanium or indium gallium arsenide in the first cavity 162, different types of photodiodes 120 can be formed. For example, Figure 14 For Figure 13An enlarged view of the P region after ion implantation, as Figure 14 shown, N-type ion implantation is performed on silicon germanium or indium gallium arsenide at a first ion implantation concentration and a first ion implantation energy to form an N-type heavily doped region 123 in a part of the silicon germanium or indium gallium arsenide in the first cavity 162 away from the substrate surface; then, as Figure 15 shown, N-type ion implantation is performed on silicon germanium or indium gallium arsenide at a second ion implantation concentration and a second ion implantation energy to form an N-type lightly doped region 122 or an intrinsic region 122 in a region of the N-type heavily doped region 123 close to the surface of the substrate 110, thereby forming a PIN-type photodiode.

[0108] To form the N-type heavily doped region 123 and the N-type lightly doped region 122, the first ion implantation concentration is less than the second ion implantation concentration, and the first ion implantation energy is less than the second ion implantation energy.

[0109] It is easily understandable that an annealing process is also required after ion implantation. The implanted N-type ions may diffuse to a part of the substrate 110 around the first cavity 162 and form an N-type doped surrounding region 124.

[0110] In some embodiments, as Figure 13 shown, the pattern formed on the second mask layer 171 may also expose the regions on both sides of the second gate 141, so that while performing N-type ion implantation on the silicon germanium or indium gallium arsenide in the first cavity 162, ion implantation can also be performed on the regions on both sides of the second gate 141. Thus, as Figure 16 shown, not only can a photodiode 120 be formed by the ion implantation process, but also a floating diffusion region 142 can be formed on the side of the second gate 141 close to the first gate 130 by the ion implantation process, that is, a floating diffusion region 142 is formed between the second gate 141 and the first gate 130, and a conductor region 143 is formed on the side of the second gate 141 away from the first gate 130, that is, the floating diffusion region 142 and the conductor region 143 are arranged on both sides of the second gate 141.

[0111] From the process of forming the photodiode 120 by ion implantation, it can be seen that the region of the photodiode 120 close to the surface of the substrate 110 is not N-type doped. Therefore, after the same ion implantation process, the regions of the floating diffusion region 142 and the conductor region 143 close to the surface of the substrate 110 are also not doped. In some embodiments, in order to also form a part of the floating diffusion region 142 and the conductor region 143 in the regions of the substrate 110 close to the surface of the substrate 110 on both sides of the second gate 141, N-type doping can be performed on the portions of the floating diffusion region 142 and the conductor region 143 close to the surface of the substrate 110 before or after N-type ion implantation of silicon germanium or indium gallium arsenide in the first cavity 162. The present application does not limit the process sequence of this N-type doping. In addition, for the same reason, N-type doping can also be simultaneously performed on the source region and the drain region of the NMOS transistor in the CMOS circuit. In addition, light doping can also be performed on some regions close to the surface of the substrate 110 around these regions, so as to form a lightly doped drain region 112 (Lightly Doped Drain, LLD) in at least part of the regions corresponding to the gates of the floating diffusion region 142, the conductor region 143 formed on both sides of the source region, the drain region and / or the second gate 141 of the NMOS transistor and / or around the second gate 141. The present application will not elaborate further.

[0112] In some embodiments, as described in step S300, the P-type doping concentration in the photodiode may be different from the doping concentrations of the source region 152 and the drain region 153 of the PMOS transistor in the CMOS circuit. Therefore, the source region 152 and the drain region 153 of the PMOS transistor can also be doped by an ion implantation process. The type of ion implantation can be N-type ions or P-type ions to change the doping concentrations of the source region 152 and the drain region 153 of the PMOS transistor. After doping, an annealing process can also be performed. After annealing, part of the substrate 110 in the regions around the source region 152 and the drain region 153 of the PMOS transistor can also become P-type doped.

[0113] The above are only the specific embodiments of the present application, but the protection scope of the application is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed in the present application, and all should be covered by the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A light detection device, characterized in that, Comprising: a substrate having a first surface; a photodiode formed in the substrate, the photodiode extending at least partially from the first surface into the substrate, and the material of the photodiode comprising silicon germanium or indium gallium arsenide; a first gate disposed on the first surface, the first gate being disposed adjacent to the photodiode.

2. The optical detection device according to claim 1, wherein, At least a part of the side of the photodiode close to the first gate protrudes towards the first gate.

3. The optical detection device according to claim 1 or 2, characterized in that, A part of the photodiode is located below the first gate.

4. The optical detection device according to any one of claims 1 to 3, characterized in that In a direction perpendicular to the first surface of the substrate and away from the substrate, the size of the photodiode in a plane parallel to the first surface becomes smaller, then larger, and then smaller.

5. The optical detection device according to any one of claims 1 to 4, characterized in that It further includes a first transistor, the first transistor comprising a second gate, a floating diffusion region, and a conductor region, the second gate being disposed on the first surface of the substrate, the floating diffusion region and the conductor region being disposed on both sides of the second gate, and the floating diffusion region being disposed between the second gate and the first gate.

6. The optical detection device according to claim 5, wherein The floating diffusion region and the conductor region are formed by the substrate.

7. The optical detection device according to claim 5 or 6, characterized in that, A part of the photodiode has the same doping type as the floating diffusion region and the conductor region of the first transistor.

8. The optical detection device according to any one of claims 1 to 7, characterized in that, It further includes a second transistor, the source region and the drain region of the second transistor extending from the first surface of the substrate into the substrate, and the material of the source region and the drain region comprising silicon germanium or indium gallium arsenide.

9. The optical detection device according to claim 8, wherein, A part of the photodiode has the same doping type as the source region and the drain region of the second transistor.

10. The optical detection device according to any one of claims 1 to 9, characterized in that, The photodiode is an avalanche photodiode or a PIN photodiode.

11. A method for preparing a photodetector, characterized in that, Comprising: forming a first gate on the first surface of the substrate; forming a first cavity in the substrate, the first cavity extending from the first surface of the substrate into the substrate, wherein the first cavity is disposed adjacent to the first gate; forming silicon germanium or indium gallium arsenide in the first cavity; forming a photodiode based on the silicon germanium or the indium gallium arsenide.

12. The method for preparing the optical detection device according to claim 11, wherein, The forming the first cavity in the substrate includes: etching the substrate from the first surface of the substrate to form an initial first cavity; continuing to etch the substrate via the initial first cavity to form a first cavity, and at least the side of the first cavity close to the first gate protrudes towards the first gate.

13. The manufacturing method of the optical detection device according to claim 11 or 12, characterized in that, It further includes: while forming the first cavity in the substrate, forming a second cavity in the substrate; filling silicon germanium or indium gallium arsenide in the second cavity to form the source region and the drain region of the second transistor.

14. The method for preparing an optical detection device according to any one of claims 11 to 13, characterized in that, The forming the photodiode based on the silicon germanium or the indium gallium arsenide includes: performing ion implantation on the silicon germanium or the indium gallium arsenide in the first cavity.

15. An image sensor, characterized in that, Comprising a filter, and a light detection device according to any one of claims 1 to 10, the filter being disposed on a side of the photodiode away from the substrate.

16. An electronic device, characterized in that, Comprising a printed circuit board, and an image sensor according to claim 15, the image sensor being connected to the printed circuit board.

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