Etching method of hard mask layer of metal grating

Abstract

The invention discloses a method for etching a hard mask layer of a metal grating, and the method comprises the steps: forming the hard mask layer on a metal layer, the hard mask layer sequentially comprises a first insulating layer, a second insulating layer, a titanium nitride layer and a third insulating layer from bottom to top, the metal layer is formed on the back surface of a wafer, the wafer is used for forming a CIS, and the metal layer is used for forming a metal grating of the CIS; forming a BARC layer on the hard mask layer; etching for the first time through a photoetching process, forming a first groove in the third insulating layer and the titanium nitride layer, and exposing the second insulating layer at the bottom of the first groove; and etching for the second time, removing the second insulating layer and the first insulating layer below the first grooves, forming second grooves in the hard mask layer, exposing the metal layer at the bottoms of the second grooves, and enabling the ratio of the depth to the width of the residual hard mask layer between the second grooves to be greater than 10. According to the method and the device, the phenomenon that glue pouring is easy to generate on the SOC layer at the edge of the wafer in the photoetching process of the metal grating in the related technology is solved.

Description

Technical Field

[0001] The present application relates to the technical field of semiconductor devices and integrated circuits, and particularly to an etching method for a hard mask layer of a metal grid. Background Art

[0002] An image sensor is an electronic device that converts optical signals into electrical signals and is widely used in fields such as photography, security systems, smart mobile phones, and medical electronics. In an image sensor, a complementary metal oxide semiconductor image sensor (CIS) is fabricated using a conventional CMOS circuit process, and the image sensor and its required peripheral circuits can be integrated, so that the CIS has broad application prospects.

[0003] According to the different positions of receiving light, CIS can be divided into two structures: front-side illumination (FSI) and back-side illumination (BSI). Compared with FSI CIS, BSI CIS changes the internal structure of the component, reverses the incident light path of the photosensitive layer component, and enables light to directly enter from the back of the component, avoiding the influence of the structure and thickness between the microlens and the photodiode (PD) on the light in FSI CIS and improving the light reception efficiency. In the manufacturing process of BSI CIS, a metal grid can be set to block light for pixel units to improve the quantum efficiency of the product.

[0004] In related technologies, the method for forming a metal grid includes: after forming a metal layer on the back of a wafer, forming a hard mask layer on the metal layer, etching the hard mask layer through a lithography process to remove the hard mask layer in the target area, and then etching the metal layer using the hard mask layer as a mask to form a metal grid. Among them, the hard mask layer of the metal grid can be an oxide-SOC-oxide (OSO) structure. However, during the etching of the OSO-structured hard mask layer through a lithography process, due to the large aspect ratio of the pattern formed by etching, there is a phenomenon of negative photoresist (photoresist collapse or deformation) in the spin-on-carbon (SOC) layer at the edge of the wafer, thereby reducing the yield of the device product. Summary of the Invention

[0005] The present application provides an etching method for a hard mask layer of a metal grating, which can solve the problem of easy glue collapse in lithography of the hard mask layer of the metal grating provided in the related art. The method includes:

[0006] Form a hard mask layer on the metal layer. The hard mask layer sequentially includes a first insulating layer, a second insulating layer, a titanium nitride layer, and a third insulating layer from bottom to top. The metal layer is formed on the back surface of the wafer, and the wafer is used to form a CIS, and the metal layer is used to form the metal grating of the CIS;

[0007] Form a BARC layer on the hard mask layer;

[0008] Perform a first etching through a lithography process to form a first groove in the third insulating layer and the titanium nitride layer, and expose the second insulating layer at the bottom of the first groove;

[0009] Perform a second etching to remove the second insulating layer and the first insulating layer below the first groove, form a second groove in the hard mask layer, expose the metal layer at the bottom of the second groove, and the ratio of the depth to the width of the remaining hard mask layer between the second grooves is greater than 10.

[0010] In some embodiments, the first insulating layer includes a silicon oxynitride layer.

[0011] In some embodiments, the thickness of the first insulating layer is 300 Å to 1000 Å.

[0012] In some embodiments, the second insulating layer and the third insulating layer include a silicon dioxide layer.

[0013] In some embodiments, the thickness of the second insulating layer is 3000 Å to 8000 Å.

[0014] In some embodiments, the thickness of the titanium nitride layer is 500 Å to 2000 Å.

[0015] In some embodiments, forming the hard mask layer on the metal layer includes:

[0016] Form a first insulating layer and a second insulating layer on the metal layer in sequence;

[0017] Form a titanium nitride layer on the second insulating layer through two depositions;

[0018] Form a third insulating layer on the titanium nitride layer.

[0019] The technical solution of the present application has at least the following advantages:

[0020] In the manufacturing process of the CIS, a hard mask layer including a first insulating layer, a second insulating layer, a titanium nitride layer, and a third insulating layer is formed on the metal layer. The first etching is performed to the titanium nitride layer in the hard mask layer to form a first groove, and the second etching is performed to the lower part of the first groove to expose the metal layer to form a second groove. Since the titanium nitride layer with a stronger material is used to replace the SOC layer used in the hard mask layer in the related technology, the phenomenon of glue overflow easily occurring in the SOC layer at the wafer edge during the lithography process is solved, and the yield of the device is improved. Description of the Drawings

[0021] In order to more clearly illustrate the specific embodiments of the present application or the technical solutions in the prior art, the following will briefly introduce the drawings required for the description of the specific embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0022] Figure 1 It is a flowchart of an etching method for a hard mask layer of a metal grating provided by an exemplary embodiment of the present application;

[0023] Figures 2 to 4 It is a schematic diagram of the etching process of a hard mask layer of a metal grating provided by an exemplary embodiment of the present application. Detailed Embodiments

[0024] The following will clearly and completely describe the technical solutions in the present application in conjunction with the drawings. Obviously, the described embodiments are some embodiments of the present application, rather than all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the protection scope of the present application.

[0025] In the description of the present application, it should be noted that the orientation or positional relationship indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation of the present application. In addition, the terms "first", "second", and "third" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance.

[0026] In the description of the present application, it should be noted that unless otherwise clearly specified and defined, the terms "installed", "connected", and "coupled" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can also be the communication inside two components. It can be a wireless connection or a wired connection. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific circumstances.

[0027] In addition, the technical features involved in different embodiments of the present application described below can be combined with each other as long as they do not conflict with each other.

[0028] Reference Figure 1 , which shows a flowchart of an etching method for a hard mask layer of a metal grating provided by an exemplary embodiment of the present application. As Figure 1 shown, the method includes:

[0029] Step S1, forming a hard mask layer on the metal layer. The hard mask layer sequentially includes a first insulating layer, a second insulating layer, a titanium nitride layer, and a third insulating layer from bottom to top. The metal layer is formed on the back of the wafer, and the wafer is used to form a CIS. The metal layer is used to form the metal grating of the CIS.

[0030] Among them, the first insulating layer includes a silicon oxynitride (SiON) layer, and its thickness can be 300 angstroms ( ) to 1000 angstroms; the second insulating layer and the third insulating layer include a silicon dioxide (SiO2) layer. The thickness of the second insulating layer is 3000 angstroms to 8000 angstroms; the thickness of the titanium nitride layer is 500 angstroms to 2000 angstroms; the metal layer includes a tungsten (W) metal layer. Exemplarily, step S1 includes but is not limited to: sequentially forming the first insulating layer and the second insulating layer on the metal layer; forming a titanium nitride (TiN) layer on the second insulating layer through two depositions; forming the third insulating layer on the titanium nitride layer.

[0031] Step S2, forming a BARC layer on the hard mask layer.

[0032] Exemplarily, a bottom anti-reflection coating (BARC) layer can be coated on the hard mask layer by spin coating.

[0033] Step S3, performing a first etching through a lithography process to form a first groove in the third insulating layer and the titanium nitride layer, and exposing the second insulating layer at the bottom of the first groove.

[0034] Reference Figure 2, which shows a schematic cross-sectional view after exposing and developing the photoresist on the BARC layer; reference Figure 3 , which shows a schematic cross-sectional view after the first etching. Exemplarily, as Figure 2 shown, the hard mask layer formed on the metal layer 210 includes, from bottom to top, a first insulating layer 220, a second insulating layer 231, a titanium nitride layer 240, and a third insulating layer 232. The metal layer 210 is formed on the back surface of a wafer (not shown in the figure), and the wafer is used to form a CIS. The metal layer 210 is used to form the metal grid of the CIS. The BARC layer 250 can be covered on the hard mask layer by spin coating. After covering the photoresist 300 on the BARC layer 250, exposure and development are performed in sequence to remove the photoresist 300 in the target area.

[0035] Exemplarily, as Figure 3 shown, after the first etching, a first groove 301 is formed in the third insulating layer 232 and the titanium nitride layer 240, and the second insulating layer 231 at the bottom of the first groove 301 is exposed. After the first etching, the remaining BARC layer and photoresist are removed.

[0036] Step S4: Perform the second etching to remove the second insulating layer and the first insulating layer below the first groove, form a second groove in the hard mask layer, expose the metal layer at the bottom of the second groove, and the ratio of the depth to the width of the remaining hard mask layer between the second grooves is greater than 10.

[0037] Reference Figure 4 , which shows a schematic cross-sectional view after the second etching. Exemplarily, as Figure 4 shown, the second insulating layer 231 and the first insulating layer 220 below the first groove 301 are removed, a second groove 302 is formed in the hard mask layer, the metal layer 310 at the bottom of the second groove 302 is exposed, and the ratio of the depth H to the width W of the remaining hard mask layer between the second grooves 302 is greater than 10.

[0038] In summary, in the embodiment of the present application, in the manufacturing process of the CIS, a hard mask layer including a first insulating layer, a second insulating layer, a titanium nitride layer, and a third insulating layer is formed on the metal layer. The first etching is performed to the titanium nitride layer in the hard mask layer to form a first groove, and the second etching is performed to below the first groove to expose the metal layer to form a second groove. Since the titanium nitride layer with a stronger material is used to replace the SOC layer used in the hard mask layer in the related art, the phenomenon of back glue easily occurring in the SOC layer at the edge of the wafer during the lithography process is solved, and the yield of the device is improved.

[0039] Obviously, the above embodiments are merely examples for clear illustration and not limitations on the implementation manners. For those of ordinary skill in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to enumerate all implementation manners here. And the obvious changes or modifications derived therefrom still fall within the protection scope of the present invention.

Claims

1. An etching method for a hard mask layer of a metal grating, characterized in that Comprising: Forming a hard mask layer on a metal layer, the hard mask layer sequentially including a first insulating layer, a second insulating layer, a titanium nitride layer, and a third insulating layer from bottom to top, the metal layer being formed on the back surface of a wafer, the wafer being used to form a CIS, and the metal layer being used to form a metal grid of the CIS; Forming a BARC layer on the hard mask layer; Performing a first etching through a lithography process to form a first groove in the third insulating layer and the titanium nitride layer, with the second insulating layer at the bottom of the first groove being exposed; Performing a second etching to remove the second insulating layer and the first insulating layer below the first groove, forming a second groove in the hard mask layer, with the metal layer at the bottom of the second groove being exposed, and the ratio of the depth to the width of the remaining hard mask layer between the second grooves being greater than 10.

2. The method according to claim 1, wherein The first insulating layer includes a silicon oxynitride layer.

3. The method according to claim 2, characterized in that, The thickness of the first insulating layer is 300 Å to 1000 Å.

4. The method according to claim 2, characterized in that, The second insulating layer and the third insulating layer include a silicon dioxide layer.

5. The method according to claim 4, wherein The thickness of the second insulating layer is 3000 Å to 8000 Å.

6. The method according to claim 4, wherein The thickness of the titanium nitride layer is 500 Å to 2000 Å.

7. The method according to claim 6, wherein The forming of the hard mask layer on the metal layer includes: Sequentially forming a first insulating layer and a second insulating layer on the metal layer; Forming a titanium nitride layer on the second insulating layer through two depositions; Forming a third insulating layer on the titanium nitride layer.

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