Etching method applied to metal grid manufacturing process

By first forming a nitride protective layer and then forming an oxide adhesive layer during the metal grid production process, the problem of the metal layer being easily oxidized is solved, and the reliability and yield of the device are improved.

CN120302740APending Publication Date: 2025-07-11HUA HONG SEMICON WUXI LTD +1
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Patent Information

Application Number
CN202510296280.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-03-12
Publication Date
2025-07-11

AI Technical Summary

Technical Problem

During the metal grid production process, only the linear oxide layer is formed, which cannot effectively protect the exposed metal layer, resulting in the metal layer being easily oxidized, affecting the device reliability and yield.

Method used

After the metal layer etching is completed, a nitride protective layer is first formed, and an oxide adhesive layer is then formed to enhance the protection of the metal layer.

Benefits of technology

Improves the reliability and yield of the device product and prevents the metal layer from being oxidized.

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Abstract

The invention discloses an etching method applied to a metal grid manufacturing process, and the method comprises the steps: providing a substrate, enabling a region, used for forming a semiconductor device, on the substrate to comprise a first region and a second region, forming a first groove in the first region of the back surface of the substrate, and forming a second groove in the second region of the back surface of the substrate, a first metal layer, a first insulating layer, a second metal layer, a third metal layer and a second insulating layer are sequentially formed on the surface of the back surface of the substrate from bottom to top; the second insulating layer is covered with a light resistor, exposure and development are carried out in sequence, then the light resistor in a target area is removed, and the target area is located in the first area; etching is carried out, the second insulating layer in the target area is removed, and a third groove is formed in the second insulating layer in the first area; etching is carried out, the second metal layer and the third metal layer at the bottom of the third groove are removed, and a fourth groove is formed; forming a nitride protection layer on the surfaces of the second insulating layer and the fourth groove; and forming an oxide adhesion layer on the surface of the nitride protection layer.
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Description

Technical Field

[0001] This application relates to the technical field of semiconductor devices and integrated circuits, and particularly to an etching method applied to the metal grid manufacturing process. Background Art

[0002] An image sensor is an electronic device that converts optical signals into electrical signals and is widely used in fields such as photography, security systems, smart mobile phones, and medical electronics. In an image sensor, a complementary metal oxide semiconductor image sensor (CIS) is fabricated using traditional CMOS circuit technology, which can integrate the image sensor and its required peripheral circuits, thus enabling CIS to have broad application prospects.

[0003] According to the position of light reception, CIS can be divided into two structures: front-side illumination (FSI) and back-side illumination (BSI). Compared with FSI CIS, BSI CIS changes the internal structure of the component, reverses the incident light path of the photosensitive layer component, and allows light to directly enter from the back of the component, avoiding the influence of the structure and thickness between the microlens and the photodiode (PD) on the light in FSI CIS and improving the light reception efficiency.

[0004] In the manufacturing process of BSI CIS, a metal grid is usually used to block light for pixel units. Generally, during the manufacturing process of the metal grid, after the metal layer etching is completed, a layer of liner oxide is generated on its sidewalls to protect the exposed metal layer. However, simply generating the liner oxide layer is not sufficient to fully protect the metal layer, and it is still easy to cause the exposed metal layer to be oxidized, thereby reducing the reliability of the device product and even having a certain probability of causing its failure. Summary of the Invention

[0005] This application provides an etching method applied to the metal grid manufacturing process, which can solve the problem that the manufacturing method of the metal grid provided in the related art is prone to oxidizing the exposed metal layer. The method includes:

[0006] A substrate is provided. The area on the substrate for forming semiconductor devices includes a first area and a second area. The first area is for forming pixel units, and the second area is for forming logic devices. A first groove is formed in the first area on the back surface of the substrate, and a second groove is formed in the second area on the back surface of the substrate. A first metal layer, a first insulating layer, a second metal layer, a third metal layer, and a second insulating layer are sequentially formed on the surface of the back of the substrate from bottom to top;

[0007] A photoresist is covered on the second insulating layer. After exposure and development are sequentially performed, the photoresist in the target area is removed. The target area is located in the first area;

[0008] Etching is performed to remove the second insulating layer in the target area, and a third groove is formed in the second insulating layer in the first area;

[0009] Etching is performed to remove the second metal layer and the third metal layer at the bottom of the third groove, and a fourth groove is formed;

[0010] A nitride protection layer is formed on the surface of the second insulating layer and the fourth groove;

[0011] An oxide adhesion layer is formed on the surface of the nitride protection layer.

[0012] In some embodiments, the third metal layer includes a tungsten metal layer.

[0013] In some embodiments, the first insulating layer and the second insulating layer include silicon dioxide layers.

[0014] In some embodiments, forming the nitride protection layer on the surface of the second insulating layer and the fourth groove includes:

[0015] Ammonia is introduced to form a silicon nitride layer on the surface of the second insulating layer and a tungsten nitride layer on the exposed surface of the third metal layer. The silicon nitride layer and the tungsten nitride layer constitute the nitride protection layer.

[0016] In some embodiments, the first metal layer and the second metal layer include high-k materials, and the high-k materials are materials with a dielectric constant greater than 10.

[0017] In some embodiments, the first insulating layer includes a silicon dioxide layer.

[0018] The technical solution of this application has at least the following advantages:

[0019] During the manufacturing process of the metal grid, after the etching of the metal layer is completed, a nitride protection layer is first formed, and then an oxide adhesion layer is formed, thereby solving the problem that only forming a linear oxide layer provides relatively weak protection for the exposed metal layer, which is likely to cause the oxidation of the metal layer, and improving the reliability and yield of the device product. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the specific embodiments of the present application or the technical solutions in the prior art, the following will briefly introduce the drawings required for the description of the specific embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0021] Figure 1 It is a flowchart of an etching method applied to the metal grid manufacturing process provided by an exemplary embodiment of the present application;

[0022] Figures 2 to 5 It is a schematic diagram of the etching process in the metal grid manufacturing process provided by an exemplary embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0023] The following will clearly and completely describe the technical solutions in the present application in conjunction with the drawings. Obviously, the described embodiments are some embodiments of the present application, rather than all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present application.

[0024] In the description of the present application, it should be noted that the orientation or positional relationship indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the present application. In addition, the terms "first", "second", and "third" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance.

[0025] In the description of the present application, it should be noted that unless otherwise clearly specified and defined, the terms "install", "connect", and "couple" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can also be the communication inside two components. It can be a wireless connection or a wired connection. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific situations.

[0026] In addition, the technical features involved in different embodiments of the present application described below can be combined with each other as long as they do not conflict with each other.

[0027] Reference Figure 1 , which shows a flowchart of an etching method applied to a metal grid manufacturing process provided by an exemplary embodiment of the present application. This method can be applied to the manufacturing process of BSI CIS, such as Figure 1 shown, this method includes:

[0028] Step S1: Provide a substrate. The area on the substrate for forming semiconductor devices includes a first area and a second area. The first area is used to form pixel units, and the second area is used to form logic devices. A first groove is formed in the first area on the back surface of the substrate, and a second groove is formed in the second area on the back surface of the substrate. A first metal layer, a first insulating layer, a second metal layer, a third metal layer, and a second insulating layer are sequentially formed on the surface of the back of the substrate from bottom to top.

[0029] Step S2: Cover a photoresist on the second insulating layer. After exposure and development in sequence, remove the photoresist in the target area, and the target area is located in the first area.

[0030] Step S3: Perform etching to remove the second insulating layer in the target area and form a third groove in the second insulating layer in the first area.

[0031] Reference Figure 2 , which shows a cross-sectional schematic diagram after etching to remove the second insulating layer in the target area. Exemplarily, as Figure 2As shown, the area on the substrate 210 for forming semiconductor devices includes a first area 201 and a second area 202. The first area 201 is used to form pixel units, and the second area 202 is used to form logic devices. A first groove 301 is formed in the first area 201 on the back surface of the substrate 210, and a second groove 302 is formed in the second area 202 on the back surface of the substrate 210. On the back surface of the substrate 210, a first metal layer 221, a first insulating layer 231, a second metal layer 222, a third metal layer 230, and a second insulating layer 232 are formed in sequence from bottom to top. Among them, the first metal layer 221 and the second metal layer 222 include high-k materials (materials with a dielectric constant greater than 10), the third metal layer 30 includes a tungsten (W) metal layer, the first insulating layer 231 and the second insulating layer 232 include silicon dioxide (SiO2) layers, and a fourth metal layer 240 (which may include an aluminum (Al) metal layer) is also formed on the second insulating layer 232 of the second groove 302.

[0032] Exemplarily, a photoresist 300 can be covered on the second insulating layer 232. After exposure and development in sequence, the photoresist in the target area is removed. Etching can be performed through a dry etching process to remove the second insulating layer 232 in the target area, and a third groove 303 is formed in the second insulating layer 232 of the first area 201.

[0033] Step S4: Perform etching to remove the second metal layer and the third metal layer at the bottom of the third groove, and form a fourth groove.

[0034] Reference Figure 3 , which shows a cross-sectional schematic diagram after etching to remove the second metal layer and the third metal layer at the bottom of the third groove. Exemplarily, as Figure 3 shown, etching can be performed through a dry etching process to remove the second metal layer 222 and the third metal layer 230 at the bottom of the third groove 303, form a fourth groove 304, and at the same time remove the remaining photoresist 300.

[0035] Step S5: Form a nitride protection layer on the surface of the second insulating layer and the fourth groove.

[0036] Reference Figure 4 , which shows a cross-sectional schematic diagram after forming a nitride protection layer on the surface of the second insulating layer and the fourth groove. Exemplarily, as Figure 4 shown, ammonia gas (NH3) can be introduced to form a silicon nitride (Si3N4) layer on the surface of the second insulating layer and a tungsten nitride (WN) layer on the exposed surface of the third metal layer 230. The silicon nitride layer and the tungsten nitride layer constitute the nitride protection layer 251.

[0037] Step S6: Form an oxide adhesion layer on the surface of the nitride protection layer.

[0038] Reference Figure 5, which shows a schematic cross-sectional view after an oxide adhesion layer is formed on the surface of the nitride protection layer. Exemplarily, as Figure 5 shown, a silicon dioxide layer can be deposited on the surface of the nitride protection layer 251 to form the oxide adhesion layer 252.

[0039] In summary, in the embodiments of the present application, during the manufacturing process of the metal grid, after the metal layer etching is completed, a nitride protection layer is first formed, and then an oxide adhesion layer is formed, thereby solving the problem that only forming a linear oxide layer provides relatively weak protection for the exposed metal layer and thus easily causes the metal layer to be oxidized, and improving the reliability and yield of the device product.

[0040] Obviously, the above embodiments are merely examples for clear illustration and are not limitations on the implementation manners. For those of ordinary skill in the art, other different forms of changes or variations can be made based on the above description. It is not necessary and impossible to enumerate all the implementation manners here. And the obvious changes or variations derived therefrom are still within the protection scope of the present invention.

Claims

1. An etching method applied to the manufacturing process of metal grids, characterized in that, Comprising: Providing a substrate, the area on the substrate for forming semiconductor devices includes a first area and a second area. The first area is for forming pixel units, and the second area is for forming logic devices. A first groove is formed in the first area on the back surface of the substrate, and a second groove is formed in the second area on the back surface of the substrate. A first metal layer, a first insulating layer, a second metal layer, a third metal layer, and a second insulating layer are sequentially formed on the surface of the back of the substrate from bottom to top; Covering a photoresist on the second insulating layer, and removing the photoresist in the target area after exposure and development in sequence. The target area is located in the first area; Performing etching to remove the second insulating layer in the target area and forming a third groove in the second insulating layer in the first area; Performing etching to remove the second metal layer and the third metal layer at the bottom of the third groove and forming a fourth groove; Forming a nitride protection layer on the surface of the second insulating layer and the fourth groove; Forming an oxide adhesion layer on the surface of the nitride protection layer.

2. The method according to claim 1, characterized in that, The third metal layer includes a tungsten metal layer.

3. The method according to claim 2, wherein The first insulating layer and the second insulating layer include silicon dioxide layers.

4. The method according to claim 3, wherein The forming a nitride protection layer on the surface of the second insulating layer and the fourth groove includes: Introducing ammonia gas to form a silicon nitride layer on the surface of the second insulating layer and a tungsten nitride layer on the exposed surface of the third metal layer. The silicon nitride layer and the tungsten nitride layer constitute the nitride protection layer.

5. The method according to any one of claims 1 to 4, characterized in that The first metal layer and the second metal layer include high-k materials, and the high-k materials are materials with a dielectric constant greater than 10.

6. The method according to claim 5, characterized in that The first insulating layer includes a silicon dioxide layer.