Semiconductor device and manufacturing method thereof

Abstract

The invention provides a semiconductor device and a manufacturing method thereof, and relates to the technical field of semiconductors. According to the semiconductor optical sensor, a cavity is easily generated in a device and the performance of the device is seriously influenced due to poor bonding performance of a high-K-value metal oxide dielectric layer and a silicon oxide dielectric layer in the semiconductor optical sensor. According to the semiconductor device and the manufacturing method thereof provided by the invention, before a dielectric layer is formed on a dielectric layer, a plasma process is executed, and the dielectric layer is bombarded by using a silicon oxide precursor, so that oxygen-containing bonds on the surface of the dielectric layer are broken and are combined with silicon-oxygen bonds of the silicon oxide precursor, and a silicate-like structure interface is formed on the surface of the dielectric layer; and forming a dielectric layer on the silicate-like structure interface. Therefore, the silicate-like structure interface provides continuous nucleation points for the silicon oxide, so that the silicon oxide is compactly deposited on the silicate-like structure interface, the dielectric layer and the dielectric layer are compactly combined through the silicate-like structure interface, and internal holes caused by hierarchical separation in the dielectric layer are avoided.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and particularly to a semiconductor device and a manufacturing method thereof. Background Art

[0002] In the field of semiconductor device manufacturing, a back-illuminated CMOS image sensor (CIS) often has isolation trenches to separate pixel units. To achieve electrical isolation of the optoelectronic performance of pixel units through the isolation trench structure, the isolation trenches are usually filled with silicon dioxide (SiO2) to achieve physical separation.

[0003] However, when filling the isolation trenches, due to the limitation of the morphology of the trenches themselves, holes are likely to be formed inside after filling. Especially when there is stratification inside the dielectric layer filling the isolation trenches, holes (also denoted as bubble defects) are more likely to be formed due to the non-compactness of filling with different dielectric materials. Therefore, how to ensure the compactness of the isolation trench filling is a technical problem that needs to be solved urgently by those skilled in the art. Summary of the Invention

[0004] In view of this, the embodiments of this application provide a semiconductor device and a manufacturing method thereof. This application optimizes the interface between different hierarchical structures to achieve tight bonding between different hierarchies, so as to ensure the compactness of the isolation trench filling.

[0005] In a first aspect, this application provides a manufacturing method of a semiconductor device. The manufacturing method includes: providing a substrate, where the substrate includes a plurality of pixel units and isolation trenches for isolating the pixel units; forming a dielectric layer on the substrate, where the deposition material of the dielectric layer includes an oxygen-containing light-transmitting compound or a combination thereof with a dielectric constant higher than that of silicon dioxide; performing a plasma process and releasing a silicon dioxide precursor to the substrate, so that the oxygen-containing bonds on the surface of the dielectric layer are broken and combined with the silicon-oxygen bonds of the silicon dioxide precursor to form a silicate-like structure interface on the surface of the dielectric layer; depositing silicon dioxide on the dielectric layer to fill the isolation trenches, and forming a dielectric layer on the silicate-like structure interface.

[0006] In a second aspect, this application provides a semiconductor device. The semiconductor device includes a substrate, a dielectric layer, and a dielectric layer. The dielectric layer is disposed on the substrate, and the dielectric layer is disposed on the dielectric layer. The substrate includes a plurality of pixel units and isolation trenches for isolating the pixel units; the deposition material of the dielectric layer includes an oxygen-containing light-transmitting compound or a combination thereof with a dielectric constant higher than that of silicon dioxide. The dielectric layer fills the isolation trenches, and the deposition material of the dielectric layer is silicon dioxide. One side of the dielectric layer close to the dielectric layer has a silicate-like structure interface, and the silicate-like structure interface is formed by the combination of the broken oxygen-containing bonds on the surface of the dielectric layer and the silicon-oxygen bonds released by the decomposition of the silicon dioxide precursor.

[0007] Embodiments of the present application provide a semiconductor device and a manufacturing method thereof, aiming at the technical problem that the bonding property between the high-K metal oxide dielectric layer and the silicon oxide dielectric layer in a semiconductor optical sensor is poor, resulting in easy generation of voids inside the device and seriously affecting the device performance. In the semiconductor device and the manufacturing method thereof provided by the present application, before forming the dielectric layer on the dielectric layer, a plasma process is performed and the dielectric layer is bombarded with a silicon oxide precursor, so that the oxygen-containing bonds on the surface of the dielectric layer are broken and combined with the silicon-oxygen bonds of the silicon oxide precursor, and a silicate-like structure interface is formed on the surface of the dielectric layer, and the dielectric layer is formed on the silicate-like structure interface. Thus, the silicate-like structure interface provides continuous nucleation points for silicon oxide, enabling silicon oxide to be densely deposited on the silicate-like structure interface, enabling the dielectric layer and the dielectric layer to be densely combined through the silicate-like structure interface, and avoiding internal holes caused by hierarchical separation in the dielectric layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as limiting the scope. For those of ordinary skill in the art, other related drawings can be obtained based on these drawings without creative efforts.

[0009] Figure 1 is a schematic structural diagram of a semiconductor device provided by some embodiments of the present application.

[0010] Figure 2 is a schematic structural diagram of another semiconductor device provided by some embodiments of the present application.

[0011] Figure 3 is an exemplary flowchart of a manufacturing method of a semiconductor device provided by some embodiments of the present application.

[0012] Figure 4 is a schematic structural diagram of a substrate provided by some embodiments of the present application.

[0013] Figure 5 is a schematic structural diagram of a dielectric layer provided by some embodiments of the present application.

[0014] Figure 6 is a schematic structural diagram of a dielectric layer including a silicate-like structure interface provided by some embodiments of the present application.

[0015] Figure 7 is a schematic structural diagram of a silicon oxide deposition process provided by some embodiments of the present application.

[0016] Figure 8 is an exemplary flowchart of a silicon oxide deposition process provided by some embodiments of the present application.

[0017] Among them, 100 is a semiconductor device; 110 is a substrate; 111 is a pixel unit; 112 is an isolation trench; 120 is a dielectric layer; 121 is a silicate-like structure interface; 130 is a dielectric layer; 131 is a hydrophobic layer; 140 is a buffer layer; 150 is a light filtering layer. Detailed implementation manners

[0018] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

[0019] Application overview: In the field of semiconductor device manufacturing, the isolation trench structure of a back-illuminated image sensor plays a key role in the optoelectronic performance and electrical isolation of pixel units. In the prior art, the isolation trench is usually filled with silicon oxide (SiO2) to achieve physical separation.

[0020] With the improvement of device performance requirements, a single silicon oxide layer is difficult to meet the requirements of high dielectric performance. For this reason, the prior art attempts to introduce high dielectric constant (high-K value) materials as dielectric layers to enhance the charge isolation effect, reduce leakage current and breakdown electric field, and improve reliability.

[0021] In addition to the aforementioned high-K value limitations, the dielectric layer material generally also needs to be easily deposited and meet the light transmission requirements. Therefore, in actual preparation, a light-transmitting oxide is generally used. However, the present application finds that the adhesion between the surface of the high-K value dielectric and the silicon oxide interface is poor, which easily causes voids inside the device and seriously affects the device performance. Due to insufficient interfacial adhesion between materials and inherent defects in the deposition process, bubble-like defects (bubble defects) are easily formed inside the film layer or at the interface, resulting in a decrease in device reliability.

[0022] For this technical problem, the semiconductor device and its manufacturing method provided by the present application, when docking the dielectric layer with the dielectric layer, use a silicon oxide precursor to bombard the dielectric layer, so that the oxygen-containing bonds on the surface of the dielectric layer are broken and combined with the silicon-oxygen bonds of the silicon oxide precursor, and a silicate-like structure interface is formed on the surface of the dielectric layer. Thus, the silicon oxide of the dielectric layer can be deposited on the silicate-like structure interface to form, and the silicate-like structure interface provides continuous nucleation points for the silicon oxide, so that the silicon oxide can be densely deposited on the silicate-like structure interface, enabling the dielectric layer and the dielectric layer to be densely combined through the silicate-like structure interface, avoiding bubble-like defects (which may also be recorded as internal holes later) caused by hierarchical separation of the dielectric layer.

[0023] Exemplary semiconductor device: To further illustrate the semiconductor device provided by the present application, a schematic structural diagram of a semiconductor device is provided in the present application ( Figure 1 ). It should be noted that considering the complexity of the semiconductor structure, in order to display different hierarchical structures, different hierarchical structures are distinguished by different image filling / gray filling.

[0024] As Figure 1 shown, the semiconductor device 100 may include a substrate 110, a dielectric layer 120, and a dielectric layer 130. The dielectric layer 120 is disposed on the substrate 110, and the dielectric layer 130 is disposed on the dielectric layer 120.

[0025] The substrate 110 serves as the base of the semiconductor device 100 (such as presented as a dotted filling structure in the figure). Among them, the substrate 110 may include a plurality of pixel units 111 and isolation trenches 112. Among them, the pixel units 111 and the isolation trenches 112 are generally arranged alternately, and the isolation trenches 112 isolate each pixel unit 111. Among them, Figure 1 two pixel units 111 and the isolation trench 112 isolating these two pixel units 111 are shown.

[0026] Considering that the semiconductor device 100 of the present application is often configured as a back-illuminated image sensor, the foregoing pixel unit 111 may receive an optical signal transmitted from an upper structure (above the hierarchical stacking direction of the semiconductor device 100 in the figure, hereinafter the same), and generate a corresponding electrical signal, so as to analyze the optical signal of the external environment.

[0027] The dielectric layer 120 may be a thin film layer with a high K value (such as a dielectric constant K greater than that of silicon oxide) provided on the substrate 110 to improve the anti-interference ability of the semiconductor device 100 (such as presented as a gray structure in the figure). To meet the device properties and facilitate deposition, the deposition material of the dielectric layer 120 generally includes an oxygen-containing light-transmitting compound or a combination thereof with a dielectric constant higher than that of silicon oxide. For example, the deposition material of the dielectric layer 120 may include tantalum oxide.

[0028] The dielectric layer 130 is a general filler on the substrate 110 (a white filling structure in the schematic diagram, and the boundary of the dielectric layer 130 is shown by a black edge line in Figure 1 ), and is generally used to fill the isolation trenches 112 to form a platform interface, so as to facilitate the further formation of related devices (such as a filter layer and a microlens layer) on the upper layer. The deposition material of the dielectric layer 130 is silicon oxide.

[0029] As described above, directly depositing the dielectric layer 130 on the dielectric layer 120 may easily cause bubble-like defects due to the poor adhesion between the dielectric layer 120 and the dielectric layer 130. In the semiconductor device 100 provided in the present application, a silicate-like structure interface 121 as shown in Figure 1 is formed on one side of the dielectric layer 120 close to the dielectric layer 130, and the dielectric layer 130 is deposited on the silicate-like structure interface 121.

[0030] The silicate-like structure interface 121 (presented as the black edge line set on the gray structure in Figure 1 ) is formed by the combination of the oxygen-containing bonds broken on the surface of the dielectric layer 120 and the silicon-oxygen bonds released by the decomposition of the silicon oxide precursor. That is, the oxygen-containing bonds in the deposited material on the surface of the dielectric layer 120 (such as the M-O bond between the metal (M) and oxygen (O)) are broken by treatment. At this time, the silicon oxide precursor (i.e., the deposition gas containing silicon-oxygen bonds) enters this environment, and the free silicon-oxygen bonds (i.e., Si-O bonds) generated by the decomposition of the silicon oxide precursor combine with the aforementioned broken oxygen-containing bonds to form a silicate-like structure (such as the M-O-Si composite bond) layer, denoted as the silicate-like structure interface 121.

[0031] In the actual preparation process, whether the aforementioned silicate-like structure interface 121 can be formed generally depends on the materials used, and specific materials generally need to be experimentally tested to determine whether the oxygen-containing bonds of the surface deposited material can be broken by process means and whether the broken oxygen-containing bonds will combine with the silicon-oxygen bonds in the high-temperature plasma silicon oxide precursor environment.

[0032] According to the experiments of the present application, when tantalum oxide is used as a high-K dielectric medium, under the bombardment of the silicon oxide precursor, its oxygen-containing bonds will be partially broken and combine with the silicon-oxygen bonds thermally decomposed from the silicon oxide precursor to form a tantalum silicate layer. That is, the surface deposited material of the dielectric layer 120 can be tantalum oxide, and the silicate-like structure interface 121 is a tantalum silicate layer.

[0033] In addition to tantalum oxide, alumina may also be used as the aforementioned dielectric material. In the related art, there are already relevant experiments showing that the oxygen-aluminum bonds in alumina can be broken under electron bombardment.

[0034] In addition, considering that it may be difficult to deposit different dielectrics within the dielectric layer 120, which further exacerbates the generation of bubble-like defects. Then the dielectric layer 120 can generally be formed of a single material. That is, the dielectric layer 120 can be formed of materials such as tantalum oxide and alumina that can form a silicate-like structure layer.

[0035] In some embodiments, considering the nature and requirements of the foregoing reaction, the performance requirements of the deposition material capable of forming the silicate-like structure layer may also be specifically characterized in that the bond energy of the oxygen-containing bonds of the deposition material on the surface of the dielectric layer 120 is less than that of the silicon-oxygen bond. When bombarded by the silicon-oxygen bond, due to its lower bond energy than that of the silicon-oxygen bond, it preferentially breaks at sufficient energy and recombines with the silicon-oxygen bond.

[0036] Thus, the silicon oxide of the dielectric layer can be deposited on the silicate-like structure interface to form, and the silicate-like structure interface 121 provides continuous nucleation points for the silicon oxide, so that the silicon oxide can be densely deposited on the silicate-like structure interface, enabling the dielectric layer and the dielectric layer to be densely combined through the silicate-like structure interface, and avoiding internal holes caused by hierarchical separation within the dielectric layer.

[0037] In addition, as Figure 1 shown, the side of the dielectric layer 130 away from the substrate 110 forms a profile corresponding to the isolation trench 112 due to its filling of the isolation trench 112. To provide a planar interface for subsequent processes, after the deposition is completed, the dielectric layer 130 can be chemically mechanically polished (CMP) to remove the profile corresponding to the isolation trench 112, and a flat interface is presented.

[0038] The present application further finds that if there is moisture in the dielectric layer 130, voids are also likely to form during use. To avoid this situation, moisture can be prevented from entering the dielectric layer 130 or its interior by providing a hydrophobic layer (such as providing a hydrophobic layer on the upper surface of the dielectric layer 130).

[0039] In some embodiments, to avoid the influence of additional structures on the semiconductor device 100, the foregoing hydrophobic layer can be directly formed by the dielectric layer 130. That is, the surface of the dielectric layer 130 can be surface-modified so that it can be reused as a hydrophobic layer. Note that this part of the surface modification should be performed after the dielectric layer 130 is polished.

[0040] To further illustrate this situation, the present application also provides a semiconductor device having a hydrophobic layer ( Figure 2 ). As Figure 2 shown, a hydrophobic layer 131 is formed on the side of the dielectric layer 130 away from the dielectric layer 120. Among them, the hydrophobic layer 131 is presented as a thickened edge line of the dielectric layer 130 in Figure 2 .

[0041] In some embodiments, to form the hydrophobic layer 131 on the dielectric layer 130, during surface modification, hydrophobic groups (such as -CH3) can be introduced on the surface of the dielectric layer 130. Based on the hydrophobicity of the hydrophobic groups, the upper surface of the surface-modified dielectric layer 130 functions as the hydrophobic layer 131.

[0042] In some embodiments, the aforementioned hydrophobic layer 131 is generally formed by surface modification of the dielectric layer based on a precursor containing a hydrophobic group. For example, ATRP (α-terpinene) can be used as the precursor of the hydrophobic group to perform surface modification on the dielectric layer.

[0043] In some embodiments, further considering the possible lattice mismatch between the substrate 110 material and the dielectric layer 120 material, in order to achieve the deposition of the dielectric layer 120, a buffer layer 140 (generally silicon oxide, presented as the white structure between the substrate 110 and the dielectric layer 120 in Figure 2 ), can be provided between the substrate 110 and the dielectric layer 120, so as to act as a buffer to achieve lattice matching between the two, so that the dielectric layer 120 can be deposited on the buffer layer 140, and the buffer layer 140 itself can be prepared by deposition and / or oxidation processes. That is, a buffer layer 140 formed based on silicon oxide is provided between the substrate 110 and the dielectric layer 120.

[0044] In addition, a light filtering layer and a microlens layer of the semiconductor device 100 can be further formed on the aforementioned hydrophobic layer 131. Among them, the light filtering layer can be used to filter the wavelength of the light beam entering the semiconductor device 100, and the microlens layer can enhance the absorption ability of the semiconductor device 100 to the external light beam.

[0045] In practical applications, in order to improve the integration degree of the semiconductor device 100, the aforementioned microlens layer and light filtering layer can be combined into one. That is, a light filtering layer 150 is formed on the aforementioned hydrophobic layer 131, and the light filtering layer 150 forms a curved surface on the surface away from the hydrophobic layer 131 (specifically presented as a grid filling structure with a spherical surface in Figure 2 ), where the grid filling reflects its light filtering ability), so as to be multiplexed as a microlens.

[0046] Exemplary semiconductor device manufacturing method: For further illustration of the formation process of the aforementioned semiconductor device, the present application also provides an exemplary flowchart of a manufacturing method of a semiconductor device ( Figure 3 ), as well as a schematic structural diagram of an intermediate in the preparation process of the semiconductor device ( Figures 4 to 7 ).

[0047] Next, the manufacturing method of the semiconductor device provided by the present application will be described in combination with Figures 3 to 7 the following.

[0048] As Figure 3 shown, the manufacturing method P300 of the semiconductor device provided by the present application may include the following steps: S310. Provide a substrate.

[0049] S320. Form a dielectric layer on the substrate.

[0050] S330. Perform a plasma process and release a silicon oxide precursor to the substrate, so that oxygen-containing bonds on the surface of the dielectric layer are broken and combined with the silicon-oxygen bonds of the silicon oxide precursor, thereby forming a silicate-like structure interface on the surface of the dielectric layer.

[0051] S340. Deposit silicon oxide on the dielectric layer containing the silicate-like structure interface to fill the isolation trench, and form a dielectric layer on the silicate-like structure interface.

[0052] The substrate provided by the foregoing S310 may refer to Figure 4 The semiconductor device 100 with the formed pixel unit 111 and isolation trench 112 as shown, so that the subsequent process continues to form the specific structure of the semiconductor based on the substrate 110. It should be noted that considering that the semiconductor device 100 of the present application is generally configured as a back-illuminated image sensor, the metal layer for transmitting signals is generally arranged below the pixel unit 111 along the stacking direction. In actual preparation, the foregoing substrate 110 may directly carry the metal layer to perform the process shown in the present application, or may not carry the metal layer and bond the metal layer below the substrate 110 in the subsequent process.

[0053] The foregoing S320 may be directed to Figure 4 The substrate 110 shown is processed, so as to form Figure 5 The dielectric layer 120 shown.

[0054] Continuing from the foregoing, the dielectric layer 120 is generally an oxygen-containing light-transmitting compound with a dielectric constant higher than that of silicon oxide, and generally a vapor deposition process is used when it is formed. For example, for tantalum oxide, tantalum ethoxide can be used as a precursor to deposit a tantalum oxide thin film at a specific temperature and time to form the dielectric layer 120.

[0055] Continuing from the foregoing, considering the lattice matching problem of directly depositing tantalum oxide, a buffer layer 140 may be provided between the dielectric layer 120 and the substrate 110.

[0056] That is, when performing the foregoing S320, silicon oxide can be first deposited on the substrate 110 to form Figure 5 The buffer layer 140 shown. The deposition material of the dielectric layer 120 is deposited on the buffer layer 140 to form Figure 5 The dielectric layer 120 shown.

[0057] In the foregoing S330, the Figure 5 Dielectric layer 120 shown can be processed to form Figure 6 The silicate-like structure interface 121 shown. In principle, to implement S330, it is necessary to first break the oxygen-containing bonds on the surface of the dielectric layer 120, and then combine the broken oxygen-containing bonds with the silicon-oxygen bonds of the silicon oxide precursor to form the silicate-like structure interface 121.

[0058] Specifically, in the foregoing S330, a plasma process can be used to break the oxygen-containing bonds on the surface of the dielectric layer 120, and the released silicon oxide precursor is used to provide free silicon-oxygen bonds. Among them, the plasma process can ionize a gas through a radio frequency power supply to form a plasma, and through the bombardment of the dielectric layer 120 by the plasma, the oxygen-containing bonds on the surface of the dielectric layer 120 are broken.

[0059] In some embodiments, the plasma process of the foregoing S330 and the release process of the silicon oxide precursor can be configured as two processes. Only as an example, the dielectric layer 120 can be bombarded first based on a plasma process (such as rare gas bombardment, electron bombardment, etc.) to break the oxygen-containing bonds on the surface of the dielectric layer 120. After the oxygen-containing bonds on the surface of the dielectric layer 120 are broken, the preparation process parameters are changed (such as changing the gas flow) to release a silicon oxide precursor containing free silicon-oxygen bonds onto the surface of the dielectric layer 120.

[0060] In some embodiments, to avoid other reagents (such as oxidants) participating in the bonding process and causing other reactions during the formation process, the foregoing silicon oxide precursor used can contain silicon-oxygen bonds by itself. For example, the foregoing silicon oxide precursor can include tetraethoxysilane (Si(OC2H5)4, abbreviated as TEOS), methyltrimethoxysilane (CH3Si(OCH3)3, abbreviated as MTMS), etc.

[0061] In some embodiments, the foregoing "plasma process" and "release of silicon oxide precursor" can also be realized through a composite process, that is, the process of releasing the silicon oxide precursor can be carried out with reference to the plasma treatment process. The silicon oxide precursor driven by the plasma process (that is, directly ionizing the silicon oxide precursor using a radio frequency power supply) is used to bombard the dielectric layer 120 (that is, release it towards the dielectric layer 120) to form a silicate-like structure interface 121. Specifically, the silicon oxide precursor can be released onto the substrate based on a high-temperature process environment and plasma technology, so that the oxygen-containing bonds on the surface of the dielectric layer 120 react (that is, bombard) with the silicon oxide precursor driven by the plasma technology in the high-temperature process environment, resulting in the breaking of valence bonds, and combine with the silicon-oxygen bonds generated by the decomposition of the silicon oxide precursor to form a silicate-like structure interface. Among them, the high-temperature process environment can refer to that when the foregoing reaction occurs, there are certain temperature requirements for the ambient temperature (manifested as high temperature), and the specific parameters can be determined according to actual tests.

[0062] In the case where the surface deposition material of the aforementioned dielectric layer 120 includes tantalum oxide, the silicon oxide precursor can be configured as tetraethoxysilane to form a tantalum silicate layer on the surface of the dielectric layer 120. The specific preparation process parameters can be: process temperature: 430 °C, TEOS gas flow rate: 600 - 800 sccm, time: 5 - 10 s, distance between the wafer and the gas nozzle: 600 - 800 mils, RF power of the RF power supply: 500 - 800 W.

[0063] It should be noted that when the aforementioned silicon oxide precursor is released, there is no need to synchronously release other reaction reagents. For example, for tetraethoxysilane, only tetraethoxysilane needs to be released during the formation of the silicate-like structure, and there is no need to release ozone.

[0064] The aforementioned S340 can perform vapor deposition on the dielectric layer 120 including the silicate-like structure interface 121 as shown above, and form Figure 6 the semiconductor device 100 as shown above. Figure 1

[0065] In some embodiments, S340 can be performed using a conventional vapor deposition process, and the silicon oxide precursor used can deposit silicon oxide on the silicate-like structure interface 121. For example, the silicon oxide precursor used in S340 can be different from that in S330. Exemplarily, S340 deposits silicon oxide in the form of silane and oxygen.

[0066] In addition, considering that the dielectric layer 130 needs to fill the isolation trench 112, the aforementioned vapor deposition process can be a high aspect ratio vapor deposition process. For details, reference can be made to the related technology, which will not be elaborated here.

[0067] In some embodiments, the silicon oxide precursors used in S330 and S340 can be the same, so that the aforementioned S330 and S340 can be implemented based on the same equipment with different process parameters. That is, in the aforementioned S340, in response to the formation of the silicate-like structure interface 121 on the dielectric layer 120, a silicon oxide precursor and an oxidant can be released onto the substrate 110, and a dielectric layer 130 can be formed on the silicate-like structure interface 121, where the oxidant is configured as ozone.

[0068] ​In practical applications, the specific preparation process parameters of S340 can be deposition process temperature: 430°C, TEOS gas flow rate: 1800 - 2500 sccm, O3 gas flow rate: 20000 - 30000 sccm, distance between the wafer and the gas nozzle: 300 - 500 mils. It can be seen that the environmental parameters of S330 and S340 are basically the same. When executing S330 based on the process equipment of S340, it is necessary to close the release of ozone gas, synchronously adjust the switch state and power of the radio frequency power supply, and adjust the distance between the wafer and the gas nozzle and control the TEOS gas flow rate to achieve the reuse of the equipment in the two process procedures.

[0069] In some embodiments, the present application further discovers that the reason for the formation of bubble defects in the dielectric layer 130 may be that when silicon oxide is deposited, the silicon oxide precursor is not completely reacted, and water vapor is further released during subsequent use (for example, the reaction intermediate of TEOS often contains hydrogen-oxygen bonds and releases water during the reaction). When the present application executes the deposition process, a high aspect ratio chemical vapor deposition process assisted by multiple rounds of plasma treatment (denoted as deposition - plasma treatment) can be adopted. That is, during actual deposition, multiple depositions are used to make the deposition thickness of silicon oxide the desired total thickness, and after each deposition, plasma treatment is performed on the deposited silicon oxide to remove the residual moisture and reaction intermediates therein.

[0070] To further illustrate this process, the present application also provides an exemplary flowchart of the deposition process of the dielectric layer 130 ( Figure 8 )

[0071] As Figure 8 shown, the dielectric layer deposition process P800 may include the following steps: S810, in response to the formation of a silicate-like structure interface in the dielectric layer, adjust the equipment process parameters to deposition parameters.

[0072] S820, release the silicon oxide precursor and ozone to the substrate, and deposit silicon oxide with a target thickness based on the silicon oxide precursor.

[0073] S830, perform a plasma scanning process on the silicon oxide with the target thickness to remove moisture and deposition reaction intermediates.

[0074] Among them, S820 and S830 can be iterative steps, that is, after completing S830, return to S820 for processing until a dielectric layer 130 with the desired total thickness is formed on the silicate-like structure interface 121.

[0075] In some embodiments, the iteration rounds of the foregoing S820 and S830 can be executed based on a preset number of rounds. That is, by setting process parameters, the thickness to be deposited in each round (denoted as the foregoing target thickness) can be determined, and then the actual number of rounds to be executed can be determined. When executing the foregoing S820 and S830, iterative processing is performed based on this round. Among them, after the iterative processing is completed, it can form Figure 1 the semiconductor structure shown. If the iterative processing is not completed, it can form Figure 7 the semiconductor structure shown. Among them, Figure 7 H in can be understood as the expected total thickness of silicon oxide, and h can be understood as the actual thickness of silicon oxide after the current round is completed.

[0076] In some embodiments, the foregoing S820 and S830 can also be executed in multiple rounds by detecting the deposition thickness of silicon oxide, that is, the deposition thickness of silicon oxide can be detected (such as by scanning probe microscopy), and the deposition is stopped only after its actual deposition thickness is greater than the expected total thickness.

[0077] In some embodiments, the foregoing two methods can also be combined, that is, after detecting the actual deposition thickness h again. If the deposition is not completed (that is, the foregoing h < H), at least one more round of deposition plasma treatment is supplemented. If the deposition is completed (that is, h ≥ H), the subsequent parameters (such as chemical mechanical mask parameters) are adjusted based on the actual deposition thickness h.

[0078] Only as an exemplary illustration, when redepositing 1800 Å of silicon oxide in the foregoing multi-round deposition plasma treatment, 6 rounds of treatment can be used. In each round of treatment, the process parameters for silicon oxide deposition are: deposition process temperature: 430 °C, TEOS gas flow rate: 1800 - 2500 sccm, O3 gas flow rate: 20000 - 30000 sccm, time: 8 s, wafer-to-gas nozzle distance: 300 - 500 mils. The process parameters for plasma treatment based on a noble gas (such as argon (Ar), etc.) are: process temperature: 430 °C, Ar gas flow rate: 3000 - 5000 sccm, time: 12 - 18 s, wafer-to-gas nozzle distance: 550 - 800 mils, radio frequency power: 300 - 600 W.

[0079] As mentioned above, a hydrophobic layer 131 can be formed on the surface of the dielectric layer 130 away from the dielectric layer 120 (see Figure 2 ), to further prevent moisture from entering the semiconductor device 100 and forming voids. Then, after the foregoing P300 and P800, the surface of the dielectric layer 130 can also be surface-modified. Specifically, the surface of the dielectric layer 130 can be surface-modified based on a precursor containing a hydrophobic group to form a hydrophobic layer 131 on the surface of the dielectric layer 130.

[0080] In some embodiments, the parameters for the foregoing surface modification may be: process temperature: 430°C, ATRP (α-terpinene) gas flow rate: 800 - 1500 sccm, time: 6 - 12 s, distance between the wafer and the gas nozzle: 800 - 1500 mils, radio frequency power: 400 - 800 W.

[0081] Unexpected technical effects: In summary, the semiconductor device and manufacturing method provided by this application have formed the following unexpected effects: ① For the semiconductor device and its manufacturing method provided by this application, when docking the dielectric layer with the dielectric medium layer, the dielectric layer is bombarded with a silicon oxide precursor to break the oxygen-containing bonds on the surface of the dielectric layer and combine with the silicon-oxygen bonds of the silicon oxide precursor, thereby forming a silicate-like structure interface on the surface of the dielectric layer. Thus, the silicon oxide of the dielectric medium layer can be deposited on the silicate-like structure interface, and the silicate-like structure interface provides continuous nucleation points for the silicon oxide, enabling the silicon oxide to be densely deposited on the silicate-like structure interface, and enabling the dielectric layer and the dielectric medium layer to be densely combined through the silicate-like structure interface, avoiding bubble defects caused by hierarchical separation of the dielectric medium layer.

[0082] ② This application creatively uses a silicon oxide precursor (such as TEOS) in a process similar to plasma treatment, bombarding the surface of the dielectric layer (such as tantalum oxide) with the silicon oxide precursor, so that the oxygen-containing bonds on the surface of the dielectric layer (such as Ta - O bonds) are broken and directly bonded to the silicon-oxygen bonds released by the decomposition of the silicon oxide precursor to form a silicate-like structure interface (such as tantalum silicate layer). This simplifies the special preparation process required for breaking the oxygen-containing bonds, and the two processes of breaking and recombining the oxygen-containing bonds can be directly completed using the silicon oxide precursor.

[0083] ③ The formation process of the silicate-like structure interface and the silicon oxide deposition process in this application can specifically use the same silicon oxide precursor, and the execution of the two process steps can be specifically completed by adjusting the process parameters of the equipment, simplifying the complexity of the steps.

[0084] ④ When depositing silicon oxide in this application, it is realized by multiple rounds of deposition - plasma treatment, that is, plasma treatment is performed after depositing a partial thickness of silicon oxide to remove the moisture and reaction intermediates in the deposited silicon oxide, thereby further avoiding bubble defects caused by moisture inside the dielectric medium layer.

[0085] ⑤ After depositing silicon oxide in this application, the surface of the silicon oxide can be surface-modified to bond hydrophobic groups to its surface, thereby preventing external moisture from entering the semiconductor device from the surface of the silicon oxide, and further avoiding the formation of holes inside the dielectric medium layer due to moisture.

[0086] All of the above optional technical solutions can be combined arbitrarily to form optional embodiments of this application, which will not be elaborated one by one here.

[0087] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be implemented in electronic hardware, or in a combination of computer software and electronic hardware. Whether these functions are executed in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods for each specific application to implement the described functions, but such implementation should not be considered to exceed the scope of this application.

[0088] Those skilled in the art can clearly understand that for the sake of convenience and brevity of description, the specific working processes of the systems, devices, and units described above can refer to the corresponding processes in the foregoing method embodiments and will not be elaborated herein.

[0089] In several embodiments provided in this application, it should be understood that the disclosed systems, devices, and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the units is only a logical function division. In actual implementation, there can be other division methods. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the displayed or discussed couplings or direct couplings or communication connections to each other can be through some interfaces. The indirect couplings or communication connections of the devices or units can be in electrical, mechanical, or other forms.

[0090] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they can be located in one place, or distributed to multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0091] In addition, in each embodiment of this application, the functional units can be integrated in a processing unit, or each unit can exist physically alone, or two or more units can be integrated in one unit.

[0092] If the above-mentioned functions are implemented in the form of software function units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of this application. The aforementioned storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memories (ROM, Read-Only Memory), random access memories (RAM, Random Access Memory), magnetic disks, or optical discs that can store program check codes.

[0093] It should be noted that in the description of this application, the terms "first", "second", "third", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance. In addition, in the description of this application, unless otherwise specified, the meaning of "a plurality of" is two or more.

[0094] The above are only the preferred embodiments of this application and are not intended to limit this application. Any modifications, equivalent replacements, etc. made within the spirit and principles of this application shall be included within the protection scope of this application.

Claims

1. A method for manufacturing a semiconductor device, characterized in that, The manufacturing method includes: providing a substrate, wherein the substrate includes a plurality of pixel units and isolation trenches isolating the pixel units; forming a dielectric layer on the substrate, wherein the deposition material of the dielectric layer includes an oxygen-containing light-transmitting compound or a combination thereof having a dielectric constant higher than that of silicon oxide; performing a plasma process and releasing a silicon oxide precursor to the substrate, so that oxygen-containing bonds on the surface of the dielectric layer are broken and combined with silicon-oxygen bonds of the silicon oxide precursor, and a silicate-like structure interface is formed on the surface of the dielectric layer; depositing silicon oxide on the dielectric layer to fill the isolation trenches, and forming a dielectric layer on the silicate-like structure interface.

2. The manufacturing method according to claim 1, characterized in that, The surface deposition material of the dielectric layer includes tantalum oxide.

3. The manufacturing method according to claim 1, wherein The releasing of the silicon oxide precursor to the substrate includes: releasing the silicon oxide precursor to the substrate based on a high-temperature process environment and a plasma process, so that oxygen-containing bonds on the surface of the dielectric layer react with the silicon oxide precursor driven by the plasma process in the high-temperature process environment to cause valence bond breakage, and are combined with silicon-oxygen bonds decomposed from the silicon oxide precursor to form a silicate-like structure interface, wherein the silicon oxide precursor is configured as tetraethoxysilane.

4. The manufacturing method according to claim 3, characterized in that, The depositing of silicon oxide on the dielectric layer and forming a dielectric layer on the silicate-like structure interface includes: in response to the formation of the silicate-like structure interface on the dielectric layer, releasing a silicon oxide precursor and an oxidant to the substrate, and forming a dielectric layer on the silicate-like structure interface, wherein the oxidant is configured as ozone.

5. The manufacturing method according to claim 1, characterized in that, The depositing of silicon oxide on the dielectric layer and forming a dielectric layer on the silicate-like structure interface includes: depositing silicon oxide on the silicate-like structure interface based on multiple rounds of deposition plasma processing, wherein each round of deposition plasma processing includes: depositing silicon oxide with a target thickness based on the silicon oxide precursor; performing a plasma scanning process on the silicon oxide with the target thickness to remove moisture and deposition reaction intermediates.

6. The manufacturing method according to claim 1, characterized in that, The manufacturing method further includes: performing surface modification on the dielectric layer based on a precursor containing a hydrophobic group to form a hydrophobic layer on the surface of the dielectric layer.

7. The manufacturing method according to claim 1, characterized in that, The forming of the dielectric layer on the substrate includes: depositing silicon oxide on the substrate to form a buffer layer; depositing the deposition material of the dielectric layer on the buffer layer to form the dielectric layer.

8. A semiconductor device, characterized in that, The semiconductor device includes: a substrate, wherein the substrate includes a plurality of pixel units and isolation trenches isolating the pixel units; a dielectric layer on the substrate, wherein the deposition material of the dielectric layer includes an oxygen-containing light-transmitting compound or a combination thereof having a dielectric constant higher than that of silicon oxide; and a dielectric layer on the dielectric layer and filling the isolation trenches, wherein the deposition material of the dielectric layer is silicon oxide; One side of the dielectric layer close to the dielectric layer has a silicate-like structure interface, and the silicate-like structure interface is formed by the combination of broken oxygen-containing bonds on the surface of the dielectric layer and silicon-oxygen bonds released by the decomposition of the silicon oxide precursor.

9. The semiconductor device according to claim 8, wherein, A buffer layer formed based on silicon oxide is provided between the substrate and the dielectric layer.

10. The semiconductor device according to claim 8, wherein, At least a part of the silicon oxide on the surface of the dielectric layer is bonded to a hydrophobic group to form a hydrophobic layer on the surface of the dielectric layer.

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