Semiconductor device and manufacturing method thereof

Abstract

The present application provides a semiconductor device and a method for manufacturing the same, and relates to the field of semiconductor technology. The present application has discovered that the high-K value metal oxide dielectric layer and the silicon oxide dielectric layer in the semiconductor optical sensor have poor bonding, which easily leads to voids inside the device and seriously affects the device performance. In response to this situation, the semiconductor device and the method for manufacturing the same provided by the present application, before forming the dielectric layer on the dielectric layer, perform a plasma process and bombard the dielectric layer with a silicon oxide precursor to break the oxygen-containing bonds on the surface of the dielectric layer and combine with the silicon-oxygen bonds of the silicon oxide precursor, thereby forming a silicate-like structure interface on the surface of the dielectric layer to form a dielectric layer on the silicate-like structure interface. As a result, the silicate-like structure interface provides continuous nucleation points for silicon oxide, allowing silicon oxide to be densely deposited on the silicate-like structure interface, so that the dielectric layer and the dielectric layer are densely bonded through the silicate-like structure interface, thereby avoiding internal voids caused by hierarchical separation in the dielectric layer.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a semiconductor device and a method for manufacturing the same. Background Art

[0002] In semiconductor device manufacturing, back-illuminated CMOS image sensors (CIS) often feature isolation trenches to separate pixel cells. To electrically isolate the optoelectronic properties of pixel cells through the isolation trench structure, the isolation trenches are typically filled with silicon oxide (SiO2) to achieve physical separation.

[0003] However, due to the inherent morphology of the trench, filling the isolation trench can easily lead to the formation of voids. This is especially true when the dielectric layer filling the isolation trench is delaminated, making it more susceptible to voids (also known as bubble defects) due to the uneven filling of the different dielectric materials. Therefore, ensuring the denseness of the isolation trench filling is a pressing technical challenge facing researchers in this field. Summary of the Invention

[0004] In view of this, an embodiment of the present application provides a semiconductor device and a method for manufacturing the same. The present application optimizes the interfaces between different hierarchical structures to achieve close integration between different levels, thereby ensuring the density of isolation trench filling.

[0005] In a first aspect, the present application provides a method for manufacturing a semiconductor device, the manufacturing method comprising: providing a substrate, wherein the substrate comprises a plurality of pixel units and isolation trenches for isolating the pixel units; forming a dielectric layer on the substrate, wherein the deposition material of the dielectric layer comprises an oxygen-containing light-transmitting compound or a combination thereof having a dielectric constant higher than that of silicon oxide; performing a plasma process and releasing a silicon oxide precursor to the substrate to break the oxygen-containing bonds on the surface of the dielectric layer and combine with the silicon-oxygen bonds of the silicon oxide precursor to form a silicate-like structure interface on the surface of the dielectric layer; depositing silicon oxide on the dielectric layer to fill the isolation trenches, and forming a dielectric layer on the silicate-like structure interface.

[0006] In a second aspect, the present application provides a semiconductor device comprising a substrate, a dielectric layer, and a dielectric layer. The dielectric layer is disposed on the substrate, and the dielectric layer is disposed on the dielectric layer. The substrate comprises a plurality of pixel units and isolation trenches for isolating the pixel units; the deposited material of the dielectric layer comprises an oxygen-containing, light-transmitting compound or a combination thereof having a dielectric constant higher than that of silicon oxide. The dielectric layer fills the isolation trench, and the deposited material of the dielectric layer is silicon oxide. The dielectric layer has a silicate-like structure interface on the side close to the dielectric layer, and the silicate-like structure interface is formed by the oxygen-containing bonds broken on the surface of the dielectric layer and the silicon-oxygen bonds released by the decomposition of the silicon oxide precursor.

[0007] The embodiments of the present application provide a semiconductor device and a method for manufacturing the same, which address the technical problem that the poor bonding between the high-K metal oxide dielectric layer and the silicon oxide dielectric layer in semiconductor optical sensors easily leads to voids inside the device and seriously affects the performance of the device. The semiconductor device and its manufacturing method provided by the present application, before forming the dielectric layer on the dielectric layer, perform a plasma process and bombard the dielectric layer with a silicon oxide precursor to break the oxygen-containing bonds on the surface of the dielectric layer and combine with the silicon-oxygen bonds of the silicon oxide precursor, thereby forming a silicate-like structure interface on the surface of the dielectric layer to form a dielectric layer on the silicate-like structure interface. As a result, the silicate-like structure interface provides continuous nucleation points for silicon oxide, allowing silicon oxide to be densely deposited on the silicate-like structure interface, so that the dielectric layer and the dielectric layer are densely bonded through the silicate-like structure interface, avoiding internal voids caused by hierarchical separation in the dielectric layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. It should be understood that the following drawings only illustrate certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying any creative work.

[0009] Figure 1 This is a schematic structural diagram of a semiconductor device provided in some embodiments of the present application.

[0010] Figure 2 This is a schematic structural diagram of another semiconductor device provided in some embodiments of the present application.

[0011] Figure 3 This is an exemplary flow chart of a method for manufacturing a semiconductor device provided in some embodiments of the present application.

[0012] Figure 4 This is a schematic structural diagram of a substrate provided in some embodiments of the present application.

[0013] Figure 5 This is a schematic structural diagram of a dielectric layer provided in some embodiments of the present application.

[0014] Figure 6 This is a schematic structural diagram of a dielectric layer including a silicate-like structure interface provided by some embodiments of the present application.

[0015] Figure 7 This is a structural schematic diagram of a silicon oxide deposition process provided in some embodiments of the present application.

[0016] Figure 8 This is an exemplary flow chart of a silicon oxide deposition process provided in some embodiments of the present application.

[0017] Among them, 100, semiconductor device; 110, substrate; 111, pixel unit; 112, isolation trench; 120, dielectric layer; 121, silicate-like structure interface; 130, dielectric layer; 131, hydrophobic layer; 140, buffer layer; 150, filter layer. DETAILED DESCRIPTION

[0018] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0019] Application Overview:

[0020] In the field of semiconductor device manufacturing, the isolation trench structure of back-illuminated image sensors plays a key role in the optoelectronic performance and electrical isolation of pixel units. In existing technologies, the isolation trench is typically filled with silicon oxide (SiO2) to achieve physical separation.

[0021] As device performance requirements increase, a single silicon oxide layer is unable to meet the high dielectric properties required. Therefore, existing technologies attempt to introduce high-k dielectric materials as dielectric layers to enhance charge isolation, reduce leakage current and breakdown electric field, and improve reliability.

[0022] In addition to the aforementioned high-K value restriction, dielectric layer materials generally need to be easy to deposit and meet light-transmitting requirements. Therefore, in practical production, light-transmitting oxides are often used. However, the present applicant has discovered that the surface of this high-K dielectric has poor adhesion to the silicon oxide interface, which can easily lead to voids within the device and seriously affect device performance. Due to insufficient interfacial adhesion between the materials and inherent defects in the deposition process, bubble defects are easily formed within the film layer or at the interface, resulting in reduced device reliability.

[0023] To address this technical issue, the semiconductor device and manufacturing method provided in this application utilize a silicon oxide precursor to bombard the dielectric layer when the dielectric layer is bonded to the dielectric layer. This breaks the oxygen bonds on the dielectric layer's surface and combines with the silicon-oxygen bonds of the silicon oxide precursor, thereby forming a silicate-like structure interface on the dielectric layer's surface. As a result, the silicon oxide in the dielectric layer can be deposited and formed on the silicate-like structure interface. The silicate-like structure interface provides continuous nucleation points for the silicon oxide, allowing the silicon oxide to be densely deposited on the silicate-like structure interface. This allows the dielectric layer and the dielectric layer to be densely bonded through the silicate-like structure interface, avoiding bubble-like defects (which may also be referred to as internal voids later) caused by hierarchical separation of the dielectric layer.

[0024] Exemplary semiconductor devices:

[0025] To further illustrate the semiconductor device provided by the present application, the present application provides a structural schematic diagram of a semiconductor device ( Figure 1 It should be noted that, considering the complexity of semiconductor structures, different hierarchical structures are distinguished by different image filling / grayscale filling in order to display different hierarchical structures.

[0026] like Figure 1 As shown, the semiconductor device 100 may include a substrate 110 , a dielectric layer 120 , and a dielectric layer 130 . The dielectric layer 120 is disposed on the substrate 110 , and the dielectric layer 130 is disposed on the dielectric layer 120 .

[0027] The substrate 110 is the base of the semiconductor device 100 (shown as a dot-filled structure in the figure). The substrate 110 may include a plurality of pixel units 111 and isolation trenches 112. The pixel units 111 and the isolation trenches 112 are generally arranged alternately, so that the isolation trenches 112 isolate the pixel units 111. Figure 1 Two pixel units 111 and an isolation trench 112 is shown that isolates the two pixel units 111 .

[0028] Considering that the semiconductor device 100 of the present application is often configured as a back-illuminated image sensor, the aforementioned pixel unit 111 can receive an optical signal transmitted from the structure above (above the hierarchical stacking direction of the semiconductor device 100 in the figure, omitted below) and generate a corresponding electrical signal, thereby analyzing the optical signal of the external environment.

[0029] Dielectric layer 120 may be a high-K thin film layer (e.g., with a dielectric constant K greater than that of silicon oxide) disposed on substrate 110 to improve the anti-interference capability of semiconductor device 100 (e.g., the gray structure shown in the figure). To meet device performance requirements and facilitate deposition, the deposited material for dielectric layer 120 generally includes an oxygen-containing, light-transmitting compound or a combination thereof with a dielectric constant greater than that of silicon oxide. For example, the deposited material for dielectric layer 120 may include tantalum oxide.

[0030] The dielectric layer 130 is a general filler on the substrate 110 (the white filler structure in the schematic diagram is used to distinguish its boundary). Figure 1 The edge of the dielectric layer 130 is shown by a black edge line in the figure. It is generally used to fill the isolation trench 112 to form a platform interface to facilitate the further formation of related devices (such as the filter layer and microlens layer) on the upper layer. The deposited material of the dielectric layer 130 is silicon oxide.

[0031] As mentioned above, directly depositing the dielectric layer 130 on the dielectric layer 120 will easily cause bubble defects due to the poor adhesion between the dielectric layer 120 and the dielectric layer 130. In the semiconductor device 100 provided in the present application, the dielectric layer 120 forms a Figure 1 The silicate-like structure interface 121 is shown in FIG, and the dielectric layer 130 is deposited on the silicate-like structure interface 121 .

[0032] Silicate-like structure interface 121 (presented as Figure 1 The black edge line (set on the gray structure in the figure) is formed by the combination of broken oxygen-containing bonds on the surface of dielectric layer 120 and silicon-oxygen bonds released by the decomposition of the silicon oxide precursor. Specifically, the oxygen-containing bonds (such as the MO bonds between metal (M) and oxygen (O)) in the deposited material on the surface of dielectric layer 120 are broken by treatment. At this time, the silicon oxide precursor (i.e., a deposition gas containing silicon-oxygen bonds) enters this environment. The free silicon-oxygen bonds (i.e., Si-O bonds) generated by the decomposition of the silicon oxide precursor combine with the broken oxygen-containing bonds, forming a layer with a silicate-like structure (such as MO-Si composite bonds), denoted as silicate-like structure interface 121.

[0033] In the actual preparation process, whether the aforementioned silicate-like structure interface 121 can be formed generally depends on the material used, and the specific material generally needs to be tested through experiments to see whether it can break the oxygen-containing bonds of the surface deposited material through process means and whether the broken oxygen-containing bonds will combine with silicon-oxygen bonds in a high-temperature plasma silicon oxide precursor environment.

[0034] Experiments conducted by this application have shown that when tantalum oxide is used as a high-k dielectric, its oxygen bonds partially break when bombarded by a silicon oxide precursor and combine with the silicon-oxygen bonds released by thermal decomposition of the silicon oxide precursor to form a tantalum silicate layer. This means that the surface deposited material of dielectric layer 120 can be tantalum oxide, and the silicate-like structure interface 121 is a tantalum silicate layer.

[0035] In addition to tantalum oxide, aluminum oxide may also be used as the aforementioned dielectric material. In the related art, there are related experiments that have shown that the oxygen-aluminum bond in aluminum oxide can be broken under electron bombardment.

[0036] Furthermore, considering that different dielectrics within dielectric layer 120 may be difficult to deposit, thereby further exacerbating the generation of bubble-shaped defects, dielectric layer 120 can generally be formed of a single material. That is, dielectric layer 120 can be formed of a material capable of forming a silicate-like structure layer, such as tantalum oxide or aluminum oxide.

[0037] In some embodiments, considering the properties and requirements of the aforementioned reactions, the performance requirements of the deposited material capable of forming a silicate-like structure layer may also be specifically characterized as the bond energy of the oxygen-containing bonds of the surface deposited material of the dielectric layer 120 being smaller than that of the silicon-oxygen bonds. When bombarded by the silicon-oxygen bonds, due to their lower bond energy than the silicon-oxygen bonds, they are preferentially broken with sufficient energy and recombined with the silicon-oxygen bonds.

[0038] Thus, the silicon oxide of the dielectric layer can be deposited on the silicate-like structure interface and formed. The silicate-like structure interface 121 provides a continuous nucleation point for silicon oxide, so that silicon oxide can be densely deposited on the silicate-like structure interface, so that the dielectric layer and the dielectric layer are densely combined through the silicate-like structure interface, avoiding internal voids caused by hierarchical separation in the dielectric layer.

[0039] In addition, if Figure 1 As shown, the side of the dielectric layer 130 away from the substrate 110 forms a profile corresponding to the isolation trench 112 due to its filling of the isolation trench 112. To provide a planar interface for subsequent processes, after deposition, the dielectric layer 130 can be subjected to chemical mechanical polishing (CMP) to remove the profile corresponding to the isolation trench 112, resulting in a flat interface.

[0040] The present application further discovered that if there is moisture in the dielectric layer 130 , voids are easily formed during use. To avoid this, a hydrophobic layer can be provided (such as a hydrophobic layer provided on the upper surface of the dielectric layer 130 ) to prevent moisture from entering the dielectric layer 130 or the interior.

[0041] In some embodiments, to avoid the impact of additional structures on semiconductor device 100, the hydrophobic layer can be formed directly from dielectric layer 130. That is, the surface of dielectric layer 130 can be modified to allow it to be reused as a hydrophobic layer. Please note that this surface modification should be performed after polishing dielectric layer 130.

[0042] To further illustrate this situation, the present application also provides a semiconductor device having a hydrophobic layer ( Figure 2 ).like Figure 2 As shown, a hydrophobic layer 131 is formed on the side of the dielectric layer 130 away from the dielectric layer 120. Figure 2 The thick edge line of the dielectric layer 130 is shown in FIG.

[0043] In some embodiments, in order to form a hydrophobic layer 131 on the dielectric layer 130 , a hydrophobic group (such as -CH3) can be introduced into the surface of the dielectric layer 130 during surface modification. Based on the hydrophobicity of the hydrophobic group, the surface of the dielectric layer 130 after surface modification functionally serves as the hydrophobic layer 131 .

[0044] In some embodiments, the hydrophobic layer 131 is generally formed by modifying the surface of the dielectric layer using a precursor containing hydrophobic groups. For example, ATRP (α-terpinene) can be used as a precursor containing hydrophobic groups to modify the surface of the dielectric layer.

[0045] In some embodiments, further considering that there may be lattice mismatch between the substrate 110 material and the dielectric layer 120 material, in order to achieve the deposition of the dielectric layer 120, a buffer layer 140 (generally silicon oxide, Figure 2 The white structure (shown in FIG. 1 ) between substrate 110 and dielectric layer 120 acts as a buffer to achieve lattice matching between the two, allowing dielectric layer 120 to be deposited on buffer layer 140. Buffer layer 140 itself can be prepared through deposition and / or oxidation processes. Specifically, buffer layer 140, formed from silicon oxide, is disposed between substrate 110 and dielectric layer 120.

[0046] In addition, a filter layer and a microlens layer of the semiconductor device 100 may be further formed on the hydrophobic layer 131. The filter layer may be used to filter the wavelength of the light entering the semiconductor device 100, while the microlens layer may enhance the semiconductor device 100's ability to absorb external light.

[0047] In practical applications, in order to improve the integration of the semiconductor device 100, the aforementioned microlens layer and the filter layer can be combined into one. That is, the filter layer 150 is formed on the aforementioned hydrophobic layer 131, and the filter layer 150 forms a curved surface on the surface away from the hydrophobic layer 131 (specifically, Figure 2 It is presented as a grid-filled structure with a spherical surface, where the grid filling reflects its filtering ability) to be multiplexed as a microlens.

[0048] Exemplary semiconductor device fabrication method:

[0049] To further illustrate the formation process of the aforementioned semiconductor device, the present application also provides an exemplary flow chart of a method for manufacturing a semiconductor device ( Figure 3 ) and the schematic diagram of the structure of the intermediate in the preparation process of semiconductor devices ( Figures 4 to 7 ).

[0050] The following collection Figures 3 to 7 The method for manufacturing the semiconductor device provided in this application is described.

[0051] like Figure 3 As shown, the manufacturing method P300 of the semiconductor device provided in this application may include the following steps:

[0052] S310: Provide a substrate.

[0053] S320 , forming a dielectric layer on the substrate.

[0054] S330 , performing a plasma process and releasing a silicon oxide precursor to the substrate, so as to break oxygen bonds on the surface of the dielectric layer and combine with silicon-oxygen bonds of the silicon oxide precursor, thereby forming a silicate-like structure interface on the surface of the dielectric layer.

[0055] S340, depositing silicon oxide on the dielectric layer containing the silicate-like structure interface to fill the isolation trench, and forming a dielectric layer on the silicate-like structure interface.

[0056] The substrate provided in S310 may refer to Figure 4 The semiconductor device 100 shown has formed a pixel unit 111 and an isolation trench 112 , so that subsequent processes can continue to form a specific semiconductor structure based on the substrate 110 .

[0057] It should be noted that, considering that the semiconductor device 100 of the present application is generally configured as a back-illuminated image sensor, the metal layer used for transmitting signals is generally disposed below the pixel unit 111 along the stacking direction. In actual fabrication, the aforementioned substrate 110 may directly carry the metal layer for performing the processes described in this application, or it may not carry the metal layer and the metal layer may be bonded below the substrate 110 in a subsequent process.

[0058] The aforementioned S320 can be used for Figure 4 The substrate 110 is processed to form a Figure 5 The dielectric layer 120 is shown.

[0059] As previously mentioned, dielectric layer 120 is typically an oxygen-containing, light-transmitting compound with a higher dielectric constant than silicon oxide. Vapor deposition is typically used for its formation. For example, tantalum oxide can be formed by depositing a thin film of tantalum oxide at a specific temperature and time using tantalum ethoxide as a precursor.

[0060] As mentioned above, considering the lattice matching problem of directly depositing tantalum oxide, a buffer layer 140 may be disposed between the dielectric layer 120 and the substrate 110 .

[0061] That is, when performing the aforementioned S320, silicon oxide may be first deposited on the substrate 110 to form Figure 5 The buffer layer 140 is shown. The dielectric layer 120 is deposited on the buffer layer 140 to form Figure 5 The dielectric layer 120 is shown.

[0062] In the aforementioned S330, Figure 5 The dielectric layer 120 is processed as shown to form Figure 6The silicate-like structure interface 121 is shown. In principle, to achieve S330, it is necessary to first break the oxygen-containing bonds on the surface of the dielectric layer 120, and then combine the broken oxygen-containing bonds with the silicon-oxygen bonds of the silicon oxide precursor to form the silicate-like structure interface 121.

[0063] Specifically, in the aforementioned S330, a plasma process can be used to break oxygen bonds on the surface of dielectric layer 120, and the released silicon oxide precursor is used to provide free silicon-oxygen bonds. The plasma process can ionize gas using a radio frequency power source to form a plasma, and the plasma bombards dielectric layer 120, thereby breaking the oxygen bonds on the surface of dielectric layer 120.

[0064] In some embodiments, the plasma process in S330 and the silicon oxide precursor release process can be configured as two separate processes. As just one example, dielectric layer 120 can be bombarded using a plasma process (e.g., rare gas bombardment, electron bombardment, etc.) to break oxygen bonds on the surface of dielectric layer 120. After the oxygen bonds on the surface of dielectric layer 120 are broken, the preparation process parameters are modified (e.g., changing the gas flow) to release the silicon oxide precursor containing free silicon-oxygen bonds onto the surface of dielectric layer 120.

[0065] In some embodiments, to prevent other reagents (such as oxidants) from participating in the bonding process and causing other reactions during the formation process, the silicon oxide precursor used may itself contain silicon-oxygen bonds. For example, the silicon oxide precursor may include tetraethoxysilane (Si(OC2H5)4, abbreviated as TEOS), methyltrimethoxysilane (CH3Si(OCH3)3, abbreviated as MTMS), etc.

[0066] In some embodiments, the aforementioned "plasma process" and "releasing the silicon oxide precursor" can also be achieved through a combined process. Specifically, the aforementioned silicon oxide precursor release process can be performed similarly to a plasma treatment process, whereby a silicon oxide precursor driven by the plasma process (i.e., directly ionizing the silicon oxide precursor using an RF power source) bombards the dielectric layer 120 (i.e., releases toward the dielectric layer 120) to form a silicate-like structure interface 121. Specifically, the silicon oxide precursor can be released onto the substrate using a high-temperature process environment and plasma technology. In the high-temperature process environment, oxygen bonds on the surface of the dielectric layer 120 react with (i.e., bombard) the silicon oxide precursor driven by the plasma technology, causing valence bond cleavage. These bonds then combine with silicon-oxygen bonds generated by the decomposition of the silicon oxide precursor to form a silicate-like structure interface. The high-temperature process environment may refer to a specific ambient temperature requirement (e.g., a high temperature) for the aforementioned reaction to occur. The specific parameters can be determined based on actual testing.

[0067] When the surface deposited material of the dielectric layer 120 includes tantalum oxide, the silicon oxide precursor can be configured with tetraethoxysilane to form a tantalum silicate layer on the surface of the dielectric layer 120. Specific preparation process parameters may include: process temperature: 430°C, TEOS gas flow rate: 600-800 sccm, time: 5-10 seconds, wafer-to-showerhead distance: 600-800 mils, and RF power of 500-800 W.

[0068] It is important to note that the release of the aforementioned silicon oxide precursor does not require the simultaneous release of other reactants. For example, in the case of tetraethoxysilane, the formation of a silicate-like structure only requires the release of tetraethoxysilane, without the need for the release of ozone.

[0069] The aforementioned S340 can be directed to the aforementioned Figure 6 The dielectric layer 120 including the silicate-like structure interface 121 is vapor deposited to form Figure 1 The semiconductor device 100 is shown.

[0070] In some embodiments, S340 can be performed using a conventional vapor deposition process, using a silicon oxide precursor that can deposit silicon oxide on the silicate-like structure interface 121. For example, the silicon oxide precursor used in S340 can be different from that used in S330. For example, S340 deposits silicon oxide using silane and oxygen.

[0071] In addition, considering that the dielectric layer 130 needs to fill the isolation trench 112, the aforementioned vapor deposition process can be formed by a high aspect ratio vapor deposition process.

[0072] In some embodiments, the silicon oxide precursor used in S330 and S340 can be the same, so that S330 and S340 can be performed using the same equipment with different process parameters. Specifically, in S340, in response to the formation of the silicate-like structure interface 121 in the dielectric layer 120, the silicon oxide precursor and the oxidant can be released toward the substrate 110 to form the dielectric layer 130 on the silicate-like structure interface 121, wherein the oxidant is configured as ozone.

[0073] In practical applications, the specific S340 process parameters include a deposition temperature of 430°C, a TEOS flow rate of 1800-2500 sccm, an O3 flow rate of 20,000-30,000 sccm, and a wafer-to-gas showerhead distance of 300-500 mils. These parameters are essentially the same for S330 and S340. When executing S330 on an S340-based process tool, the ozone release must be disabled, the RF power supply state and power must be adjusted simultaneously, the wafer-to-gas showerhead distance must be adjusted, and the TEOS flow rate must be controlled to reuse the equipment for both processes.

[0074] In some embodiments, the present application further discovered that the formation of bubble defects within dielectric layer 130 may be caused by incomplete reaction of the silicon oxide precursor during silicon oxide deposition, leading to the subsequent release of water vapor during further reactions (e.g., the reaction intermediates of TEOS described above often contain hydrogen-oxygen bonds, which release water during the reaction). The present application can utilize a high-aspect-ratio vapor deposition process assisted by multiple rounds of plasma treatment (referred to as deposition-plasma treatment, or deposition-plasma treatment) during the deposition process. Specifically, multiple depositions are performed to achieve the desired total thickness of silicon oxide. After each deposition, the deposited silicon oxide is plasma treated to remove any residual water and reaction intermediates.

[0075] To further illustrate the process, the present application also provides an exemplary flow chart of the dielectric layer 130 deposition process ( Figure 8 ).

[0076] like Figure 8 As shown, the dielectric layer deposition process P800 may include the following steps:

[0077] S810 , in response to the dielectric layer forming a silicate-like structure interface, adjusting the equipment process parameters to deposition parameters.

[0078] S820 , releasing a silicon oxide precursor and ozone onto the substrate, and depositing silicon oxide to a target thickness based on the silicon oxide precursor.

[0079] S830 , performing a plasma scanning process on the silicon oxide having a target thickness to remove moisture and deposition reaction intermediates.

[0080] S820 and S830 may be iterative steps, that is, after completing S830 , the process returns to S820 until the dielectric layer 130 with a desired total thickness is formed on the silicate-like structure interface 121 .

[0081] In some embodiments, the iterative rounds of S820 and S830 can be performed based on preset rounds, that is, the thickness required for deposition in each round (recorded as the target thickness) can be determined by setting process parameters, and then the actual number of rounds to be performed can be determined. When executing S820 and S830, iterative processing is performed based on the rounds. After the iterative processing is completed, it can form Figure 1 If the iterative process is not completed, it can form Figure 7 The semiconductor structure shown. Figure 7 The H in the equation can be understood as the expected total thickness of silicon oxide, and h can be understood as the actual thickness of silicon oxide after the current round is completed.

[0082] In some embodiments, the aforementioned S820 and S830 may be performed in multiple rounds by detecting the deposition thickness of silicon oxide, that is, the deposition thickness of silicon oxide may be detected (eg, by a scanning mirror), and deposition may be stopped only when the actual deposition thickness is greater than the desired total thickness.

[0083] In some embodiments, the aforementioned two methods can be combined, that is, the actual deposition thickness h is re-detected after completion. If deposition is not complete (i.e., h < H), at least one additional round of deposition plasma treatment is performed. If deposition is complete (i.e., h ≥ H), subsequent parameters (such as chemical mechanical mask parameters) are adjusted based on the actual deposition thickness h.

[0084] For illustrative purposes only, six cycles of deposition plasma treatment can be used to deposit 1800Å of silicon oxide. In each cycle, the process parameters for silicon oxide deposition are: deposition temperature: 430°C, TEOS gas flow rate: 1800-2500 sccm, O3 gas flow rate: 20,000-30,000 sccm, duration: 8 seconds, and wafer-to-showerhead distance: 300-500 mils. The process parameters for plasma treatment using a noble gas (such as argon (Ar)) are: process temperature: 430°C, Ar gas flow rate: 3,000-5,000 sccm, duration: 12-18 seconds, wafer-to-showerhead distance: 550-800 mils, and RF power: 300-600W.

[0085] As mentioned above, a hydrophobic layer 131 may be formed on the surface of the dielectric layer 130 away from the dielectric layer 120 (see Figure 2 ) to further prevent moisture from entering the semiconductor device 100 and forming gaps. After the aforementioned P300 and P800, the surface of the dielectric layer 130 may be modified. Specifically, the surface of the dielectric layer 130 may be modified using a precursor containing hydrophobic groups to form a hydrophobic layer 131 on the surface of the dielectric layer 130.

[0086] In some embodiments, the surface modification parameters may be: process temperature: 430° C., ATRP (α-terpinene) gas flow rate: 800-1500 sccm, time: 6-12 seconds, wafer-to-gas nozzle distance: 800-1500 mils, and RF power: 400-800 W.

[0087] Unexpected technical effects:

[0088] In summary, the semiconductor device and manufacturing method provided by this application have the following unexpected effects:

[0089] ① The semiconductor device and manufacturing method provided in this application utilizes a silicon oxide precursor to bombard the dielectric layer when the dielectric layer is bonded to the dielectric layer. This breaks the oxygen bonds on the dielectric layer's surface and combines with the silicon-oxygen bonds of the silicon oxide precursor, thereby forming a silicate-like structure interface on the dielectric layer's surface. As a result, the silicon oxide of the dielectric layer can be deposited and formed on the silicate-like structure interface. The silicate-like structure interface provides continuous nucleation points for the silicon oxide, allowing the silicon oxide to be densely deposited on the silicate-like structure interface. This allows the dielectric layer and the dielectric layer to be densely bonded through the silicate-like structure interface, thus avoiding bubble defects caused by hierarchical separation of the dielectric layers.

[0090] ② This application innovatively employs a silicon oxide precursor (such as TEOS) in a process similar to plasma treatment, bombarding the surface of a dielectric layer (such as tantalum oxide) with the silicon oxide precursor. This breaks oxygen bonds (such as Ta-O bonds) on the dielectric layer's surface, allowing them to directly bond with silicon-oxygen bonds released by the decomposition of the silicon oxide precursor, forming a silicate-like interface structure (such as a tantalum silicate layer). This simplifies the specialized preparation process required for oxygen bond breakage, allowing the two processes of oxygen bond breakage and recombination to be accomplished directly using the silicon oxide precursor.

[0091] ③ The formation process of the silicate-like structure interface of the present application and the silicon oxide deposition process can specifically use the same silicon oxide precursor. Specifically, the execution of the two process steps can be completed by adjusting the process parameters of the equipment, which simplifies the complexity of the steps.

[0092] ④ When depositing silicon oxide, the present application adopts multiple rounds of deposition-plasma treatment, that is, plasma treatment is performed after depositing a partial thickness of silicon oxide to remove moisture and reaction intermediates in the deposited silicon oxide, thereby further avoiding the generation of bubble defects inside the dielectric layer due to moisture.

[0093] ⑤ After depositing silicon oxide, the present application can modify the surface of the silicon oxide so that hydrophobic groups are bonded to its surface, thereby preventing external moisture from entering the semiconductor device from the silicon oxide surface, thereby further preventing the formation of holes in the dielectric layer due to moisture.

[0094] All of the above optional technical solutions can be arbitrarily combined to form optional embodiments of the present application, and will not be described in detail here.

[0095] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0096] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0097] In the several embodiments provided in this application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0098] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0099] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0100] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program check codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0101] It should be noted that, in the description of this application, the terms "first," "second," "third," etc. are used for descriptive purposes only and should not be understood as indicating or implying relative importance. In addition, in the description of this application, unless otherwise specified, "plurality" means two or more.

[0102] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent replacements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A method for manufacturing a semiconductor device, characterized in that: The manufacturing method comprises: Providing a substrate, wherein the substrate includes a plurality of pixel units and isolation trenches isolating the pixel units; forming a dielectric layer on the substrate, wherein a deposition material of the dielectric layer comprises an oxygen-containing light-transmitting compound or a combination thereof having a higher dielectric constant than silicon oxide; performing a plasma process and releasing a silicon oxide precursor toward the substrate, so that oxygen bonds on the surface of the dielectric layer are broken and combined with silicon-oxygen bonds of the silicon oxide precursor to form a silicate-like structure interface on the surface of the dielectric layer; Silicon oxide is deposited on the dielectric layer to fill the isolation trench, and a dielectric layer is formed on the interface of the silicate-like structure.

2. The manufacturing method according to claim 1, characterized in that The surface deposition material of the dielectric layer includes tantalum oxide.

3. The manufacturing method according to claim 1, characterized in that The releasing of the silicon oxide precursor onto the substrate comprises: Based on a high-temperature process environment and a plasma process, a silicon oxide precursor is released to the substrate, so that the oxygen-containing bonds on the surface of the dielectric layer react with the silicon oxide precursor driven by the plasma process in the high-temperature process environment to cause valence bond breakage, and combine with the silicon-oxygen bonds generated by the decomposition of the silicon oxide precursor to form a silicate-like structure interface, wherein the silicon oxide precursor is configured as tetraethoxysilane.

4. The manufacturing method according to claim 3, characterized in that The step of depositing silicon oxide on the dielectric layer and forming a dielectric layer on the interface of the silicate-like structure comprises: In response to the dielectric layer forming the silicate-like structure interface, a silicon oxide precursor and an oxidant are released toward the substrate to form a dielectric layer on the silicate-like structure interface, wherein the oxidant is configured as ozone.

5. The manufacturing method according to claim 1, characterized in that The step of depositing silicon oxide on the dielectric layer and forming a dielectric layer on the interface of the silicate-like structure comprises: Depositing silicon oxide on the interface of the silicate-like structure based on multiple rounds of deposition plasma treatment, wherein each round of deposition plasma treatment includes: Depositing silicon oxide to a target thickness based on the silicon oxide precursor; A plasma scanning process is performed on the silicon oxide having the target thickness to remove moisture and deposition reaction intermediates.

6. The manufacturing method according to claim 1, characterized in that The manufacturing method further comprises: The surface of the dielectric layer is modified based on a precursor containing hydrophobic groups to form a hydrophobic layer on the surface of the dielectric layer.

7. The manufacturing method according to claim 1, characterized in that The step of forming a dielectric layer on the substrate comprises: depositing silicon oxide on the substrate to form a buffer layer; A deposition material for the dielectric layer is deposited on the buffer layer to form the dielectric layer.

8. A semiconductor device, characterized in that: The semiconductor device comprises: A substrate, wherein the substrate comprises a plurality of pixel units and isolation trenches for isolating the pixel units; a dielectric layer on the substrate, wherein the deposited material of the dielectric layer comprises an oxygen-containing light-transmitting compound or a combination thereof having a dielectric constant higher than that of silicon oxide; and a dielectric layer on the dielectric layer and filling the isolation trench, wherein the deposited material of the dielectric layer is silicon oxide; The dielectric layer has a silicate-like structure interface on a side close to the medium layer. The silicate-like structure interface is formed by the combination of broken oxygen-containing bonds on the surface of the dielectric layer and silicon-oxygen bonds released by decomposition of a silicon oxide precursor.

9. The semiconductor device according to claim 8, wherein A buffer layer formed based on silicon oxide is arranged between the substrate and the dielectric layer.

10. The semiconductor device according to claim 8, wherein At least a portion of the silicon oxide on the surface of the dielectric layer is bonded to the hydrophobic groups to form a hydrophobic layer on the surface of the dielectric layer.

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