Display panel and manufacturing method of display panel

By using the structural design of the base layer, circuit layer, light emitting element layer and packaging layer in the display panel, using hexamethyldisiloxane as a filler and combining chemical vapor deposition and anisotropic etching technology, the problem of insufficient resolution and reliability is solved, and a high resolution and improved reliability display panel is achieved.

CN120302828APending Publication Date: 2025-07-11SAMSUNG DISPLAY CO LTD
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
CN202510039171.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2024-01-11
Filing Date
2025-01-10
Publication Date
2025-07-11

AI Technical Summary

Technical Problem

The prior art is difficult to realize a display panel with high resolution and low reliability, especially in the patterning method of the light emitting element.

Method used

The structural design includes a base layer, a circuit layer, a light emitting element layer and a packaging layer is adopted, and the packing layer is used to form a filler layer through a chemical vapor deposition process, and combined with anisotropic etching technology, the sealing and reliability of the packaging layer are improved.

Benefits of technology

A display panel with high resolution and improved reliability is achieved, reducing moisture permeability and physical and chemical damage in the process, and improving processability and display quality.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN120302828A_ABST
    Figure CN120302828A_ABST
Patent Text Reader

Abstract

The invention discloses a display panel and a manufacturing method of the display panel. The display panel according to one embodiment of the present invention comprises a substrate layer, a circuit layer, a light emitting element layer, and an encapsulation layer, the light emitting element layer comprising a first electrode, a lower pixel defining film, an upper pixel defining film, a light emitting pattern, and a second electrode, the encapsulation layer comprising: a first encapsulation inorganic film, comprising a first portion arranged in the upper opening portion and covering the second electrode and a side surface of the upper pixel defining film, a second portion extending from the first portion in a thickness direction from the light-emitting element layer toward the encapsulation layer, and a third portion extending from the second portion in a direction toward a center of the upper pixel defining film; and a filler disposed between the upper pixel defining film and the third portion of the first encapsulation inorganic film and including hexamethyldisiloxane.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to a display panel and a method for manufacturing the display panel. More specifically, the present invention relates to a display panel capable of achieving high resolution and improved reliability and a method for manufacturing the same. Background Art

[0002] A display panel is used in various multimedia devices such as a television, a mobile phone, a tablet computer, and a game console to provide image information to a user. The display panel includes a light-emitting element and a pixel circuit for driving the light-emitting element. The light-emitting element included in the display panel emits light according to a voltage applied from the pixel circuit and generates an image. In order to achieve high resolution and improve reliability, a patterning method of the light-emitting element needs to be developed. Summary of the Invention

[0003] An object of the present invention is to provide a display panel capable of achieving high resolution and improved reliability.

[0004] Another object of the present invention is to provide a method for manufacturing a display panel with improved processability and improved reliability.

[0005] A display panel according to an embodiment of the present invention includes: a base layer; a circuit layer disposed on the base layer; a light-emitting element layer disposed on the circuit layer; and a packaging layer disposed on the light-emitting element layer. The light-emitting element layer includes: a first electrode disposed on the circuit layer; a lower pixel defining film covering a part of the first electrode to define a light-emitting opening and disposed on the circuit layer; an upper pixel defining film defining an upper opening and disposed on the lower pixel defining film; a light-emitting pattern disposed inside the upper opening on the first electrode; and a second electrode disposed on the light-emitting pattern. The packaging layer includes: a first packaging inorganic film including a first part disposed inside the upper opening to cover the second electrode and a side surface of the upper pixel defining film, a second part extending from the first part in a thickness direction from the light-emitting element layer toward the packaging layer, and a third part extending from the second part in a direction toward the center of the upper pixel defining film; and a filler disposed between the upper pixel defining film and the third part of the first packaging inorganic film and including hexamethyldisiloxane.

[0006] It may be that the filler includes a silicon atom and an oxygen atom, and a ratio of the oxygen atom to the silicon atom is 1.5 or more and 2.5 or less.

[0007] It may be that the filler includes a silicon atom and a carbon atom, and a ratio of the carbon atom to the silicon atom is 0.6 or less.

[0008] It may be that the transmittance of the filler in the visible light region is more than 95%.

[0009] It may be that the third part of the first encapsulation inorganic film is disposed at a distance from the upper pixel defining film in the thickness direction.

[0010] It may be that the filler is in contact with each of the third part of the first encapsulation inorganic film and the upper pixel defining film.

[0011] It may be that the display panel further includes: a dummy filler covering the first part of the first encapsulation inorganic film, the side surface of the second part facing the light emitting pattern, and the upper surface of the third part, and the dummy filler includes the same substance as the filler.

[0012] It may be that the filler and the dummy filler are integrally connected.

[0013] It may be that the display panel further includes: a dummy filler disposed at a distance from the upper pixel defining film across the first part of the first encapsulation inorganic film, and the dummy filler includes the same substance as the filler.

[0014] It may be that the filler and the dummy filler are separated.

[0015] It may be that the side surface of the second part facing the filler is separated from the filler.

[0016] It may be that the side surface of the second part facing the filler is in contact with the filler.

[0017] It may be that the upper pixel defining film includes: a first inorganic film disposed on the lower pixel defining film; and a second inorganic film disposed on the first inorganic film and protruding in the direction toward the center of the light emitting pattern as compared with the first inorganic film.

[0018] It may be that the display panel further includes: an encapsulation organic film disposed on the first encapsulation inorganic film to cover the step caused by the light emitting element layer; and a second encapsulation inorganic film disposed on the encapsulation organic film.

[0019] A method of manufacturing a display panel according to an embodiment of the present invention includes: providing a preliminary display panel including a first electrode, a lower pixel defining film covering a part of the first electrode to define a light-emitting opening, an upper pixel defining film defining an upper opening and disposed on the lower pixel defining film, a light-emitting pattern disposed inside the upper opening on the first electrode, a second electrode disposed on the light-emitting pattern, and a first encapsulation inorganic film disposed on the second electrode; a step of depositing hexamethyldisiloxane on the first encapsulation inorganic film to form a filler layer, wherein the first encapsulation inorganic film includes a first part disposed inside the upper opening to cover the side surfaces of the second electrode and the upper pixel defining film, a second part extending from the first part in a direction from the first electrode toward the second electrode, and a third part extending from the second part in a direction away from the center of the light-emitting pattern.

[0020] It may be that the filler layer seals between the upper pixel defining film and the third part and is formed over the entire surface of the preliminary display panel.

[0021] It may be that the method of manufacturing the display panel further includes: a step of anisotropically etching the filler layer in a direction from the second electrode toward the first electrode.

[0022] It may be that the hexamethyldisiloxane includes silicon atoms and oxygen atoms, and a ratio of the oxygen atoms to the silicon atoms is 1.5 or more and 2.5 or less.

[0023] It may be that the hexamethyldisiloxane includes silicon atoms and carbon atoms, and a ratio of the carbon atoms to the silicon atoms is 0.6 or less.

[0024] It may be that the step of forming the filler layer deposits hexamethyldisiloxane by a chemical vapor deposition process.

[0025] According to the foregoing, a display panel capable of achieving high resolution and improved reliability can be provided.

[0026] In addition, a method of manufacturing a display panel can be provided, which improves processability and reliability by reducing moisture permeability and physical and chemical damage in the process. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 is an assembled perspective view of a display device according to an embodiment of the present invention.

[0028] Figure 2 is an exploded perspective view of a display device according to an embodiment of the present invention.

[0029] Figure 3 It is a cross-sectional view of a display module according to an embodiment of the present invention.

[0030] Figure 4 It is a plan view of a display panel according to an embodiment of the present invention.

[0031] Figure 5 It is a plan view enlarging a part of an active region according to an embodiment of the present invention.

[0032] Figure 6a And Figure 6b It is a cross-sectional view of a display panel according to an embodiment of the present invention taken along the I-I' line of Figure 5 respectively.

[0033] Figure 7 It is a flowchart of a method for manufacturing a display panel according to an embodiment of the present invention.

[0034] Figures 8a to 8c It is a cross-sectional view respectively showing some steps of a method for manufacturing a display panel according to an embodiment of the present invention.

[0035] (Description of reference numerals)

[0036] Display device DD

[0037] Display panel DP

[0038] Base layer BS

[0039] Circuit layer CL

[0040] Light-emitting element layer EDL

[0041] Encapsulation layer TFE

[0042] Filler FL Detailed description

[0043] The present invention can implement various changes and can have various forms. Specific embodiments will be illustrated in the drawings and described in detail herein. However, it should be understood that these do not limit the present invention to a specific disclosed form, but include all changes, equivalents, and alternatives within the concept and technical scope of the present invention.

[0044] In this specification, when referring to a certain component (or region, layer, part, etc.) being "on", "connected to", or "coupled to" another component, it means that a certain component can be directly disposed / connected / coupled on another component, or a third component can be disposed between them.

[0045] On the other hand, in the present application, "directly disposed" may mean that no layer, film, region, plate, or the like is added between parts such as a layer, film, region, plate, and other parts. For example, "directly disposed" may mean that no additional parts such as an adhesive part are used between two layers or two components for disposition.

[0046] The same reference numerals denote the same components. In addition, in the drawings, the thickness, ratio, and dimensions of the components are enlarged for effective illustration of the technical content.

[0047] "And / or" includes all combinations that can be defined by the relevant components.

[0048] Terms such as first, second, etc. may be used to describe various components, but the above components are not limited by the above terms. The above terms are only for the purpose of distinguishing one component from other components. For example, without departing from the scope of the claims of the present invention, the first component may be named the second component, and similarly, the second component may be named the first component. As long as it is not clearly indicated as different in the context, the singular expression includes the plural expression.

[0049] In addition, terms such as "under", "lower side", "above", "upper side", etc. are used to describe the relationship between the components shown in the drawings. The above terms are relative concepts and are described based on the directions shown in the drawings. In this specification, "disposed on..." may not only mean the case of being disposed above any component but also the case of being disposed below.

[0050] Terms such as "comprising" or "having" should be understood as being used to specify the existence of the features, numbers, steps, operations, components, parts, or combinations thereof described in the specification, and do not preclude the existence or additional possibility of one or more other features or numbers, steps, operations, components, parts, or combinations thereof in advance.

[0051] Unless otherwise defined, all terms (including technical terms and scientific terms) used in this specification have the same meaning as commonly understood by those skilled in the technical field to which the present invention pertains. In addition, terms such as those defined in a commonly used dictionary should be interpreted as having the same meaning as that in the context of the related art, and should not be interpreted as having an overly idealized or overly formalized meaning unless clearly defined herein.

[0052] Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

[0053] Figure 1 is a combined perspective view of a display device DD according to an embodiment of the present invention.

[0054] The display device DD of an embodiment may be a device activated according to an electrical signal. For example, the display device DD may be a large electronic device such as a television, a monitor, or an outdoor billboard. Additionally, the display device DD may be a small or medium-sized electronic device such as a personal computer, a notebook computer, a personal digital terminal, a car navigator, a game console, a mobile phone, a tablet, or a camera. These are exemplary, and the embodiment is not limited thereto. In Figure 1 the display device DD is exemplarily shown as a mobile phone.

[0055] In Figure 1 and the following drawings, a first direction DR1, a second direction DR2, and a third direction DR3 are shown. The directions indicated by the first to third directions DR1, DR2, DR3 described in this specification are relative concepts and can be converted to other directions. Additionally, the directions directly opposite to the directions indicated by the first to third directions DR1, DR2, DR3 can also be described as the first to third directions, and the same reference numerals can be used.

[0056] Referring to Figure 1 , the display device DD of an embodiment may include a display surface DS defined by a first direction DR1 and a second direction DR2 that intersects the first direction DR1. The display device DD may provide an image IM to a user through the display surface DS. The display device DD of an embodiment may display the image IM toward a third direction DR3 on the display surface DS that is parallel to each of the first direction DR1 and the second direction DR2. In this specification, the front (or upper) and the back (or lower) of each component are defined based on the direction of displaying the image IM. It may be that the front and the back oppose each other in the third direction DR3, and the normal direction of each of the front and the back is parallel to the third direction DR3.

[0057] In one embodiment, the display surface DS may include a display area DA and a non-display area NDA adjacent to the display area DA. The non-display area NDA may be an area where the image IM is not displayed. However, the embodiment is not limited thereto, and the non-display area NDA may be omitted.

[0058] The display device DD according to an embodiment may sense an external input applied from the outside. The external input may include various forms of input provided from the outside of the display device DD. For example, the external input may include not only contact caused by a part of the body such as a user's hand but also an external input (e.g., hovering) applied when approaching or adjacent to the display device DD at a predetermined distance. Additionally, it may have various forms such as force, pressure, temperature, light, etc.

[0059] The display device DD of one embodiment may further include various electronic modules. For example, the electronic module may include at least any one of a camera, a speaker, a light sensing sensor, and a heat sensing sensor. The electronic module may sense an external subject received through the display surface DS or provide a sound signal such as voice to the outside through the display surface DS. The electronic module may also include a plurality of components and is not limited to any one embodiment.

[0060] Figure 2 is an exploded perspective view of a display device DD according to an embodiment of the present invention. Figure 2 Exemplarily shown Figure 1 an exploded perspective view of a display device DD according to an embodiment of the present invention.

[0061] Referring to Figure 2 , the display device DD of one embodiment may include a display module DM and a window WM disposed on the display module DM. The window WM may be disposed on at least one of the upper and lower sides of the display module DM. In Figure 2 it is shown that the window WM is disposed above the display module DM.

[0062] In addition, the display device DD of one embodiment may further include an electronic module (not shown) disposed on the lower side of the display module DM. For example, the electronic module (not shown) may include a camera module.

[0063] In addition, although not shown, the display device DD of one embodiment may further include an adhesive layer and / or a polarizing film disposed between the display module DM and the window WM. In addition, although not shown, the display device DD of one embodiment may further include a lower functional layer disposed on the lower side of the display module DM.

[0064] The display device DD of one embodiment may further include a housing HAU that houses the display module DM and the lower functional layer, etc. The housing HAU may be combined with the window WM to form the appearance of the display device DD. The housing HAU may include a material having relatively high rigidity. For example, the housing HAU may include a plurality of frames and / or plates made of glass, plastic, or metal. The display module DM may be housed in the accommodation space and be protected from external impacts.

[0065] The display module DM of one embodiment may display an image IM according to an electrical signal (refer to Figure 1 ), and send / receive information about an external input. The display module DM may include a display panel DP (refer to Figure 3 ) and a sensor layer SS (refer to Figure 3 ) disposed on the display panel DP (refer to Figure 3 ).

[0066] The display module DM may include an active area AA and a peripheral area NAA. The active area AA may be an area that provides an image IM (refer to Figure 1 ). Pixels PX may be arranged in the active area AA. The peripheral area NAA may be adjacent to the active area AA. The peripheral area NAA may surround the active area AA. A driving circuit or driving wiring for driving the active area AA may be arranged in the peripheral area NAA.

[0067] The display module DM may include a plurality of pixels PX. Each of the pixels PX may display light in response to an electrical signal. The light displayed by the pixels PX may implement the image IM (refer to Figure 1 ). Each of the pixels PX may include a display element. For example, the display element may be an organic light-emitting element, an inorganic light-emitting element, an organic-inorganic light-emitting element, a micro LED, a nano LED, a quantum dot light-emitting element, an electrophoretic element, an electrowetting element, etc.

[0068] The window WM may entirely cover the top of the display module DM. The window WM may have a shape corresponding to the shape of the display module DM. The window WM may be flexible such that it deforms according to the folding or bending deformation of the display device DD. The window WM may function to protect the display module DM from the influence of external shocks.

[0069] The window WM may include a transmissive area TA and a border area BZA. The transmissive area TA may overlap at least a part of the active area AA of the display module DM. The transmissive area TA may be an optically transparent area. For example, the transmittance of the transmissive area TA for wavelengths in the visible light region may be about 90% or more. It may be that the image IM (refer to Figure 1 ) is provided to the user through the transmissive area TA, and the user receives information through the image IM (refer to Figure 1 ).

[0070] Compared with the transmissive area TA, the border area BZA may be an area with a relatively low light transmittance. The border area BZA may define the shape of the transmissive area TA. The border area BZA may have a predetermined color. The border area BZA may cover the peripheral area NAA of the display module DM to prevent the peripheral area NAA from being recognized externally. On the other hand, it is exemplary that the border area BZA may be omitted in the window WM according to an embodiment.

[0071] Figure 3 It is a cross-sectional view of a display module DM according to an embodiment of the present invention.

[0072] Refer to Figure 3 , the display module DM may include a display panel DP and a sensor layer SS disposed on the display panel DP.Figure 3 The active region AA and the peripheral region NAA shown can correspond to Figure 2 the active region AA and the peripheral region NAA shown.

[0073] The display panel DP can include a base layer BS, a circuit layer CL, a light-emitting element layer EDL, and a packaging layer TFE.

[0074] The base layer BS can be a component providing a base surface for configuring the circuit layer CL. The base layer BS can be a rigid substrate or a flexible substrate capable of bending, folding, or rolling, etc. The base layer BS can be a glass substrate, a metal substrate, or a polymer substrate, etc. However, the embodiments of the present invention are not limited thereto, and the base layer BS can be an inorganic layer, an organic layer, or a composite material layer.

[0075] The circuit layer CL can be disposed on the base layer BS. The circuit layer CL can include an insulating layer, a semiconductor pattern, a conductive pattern, and signal lines, etc. It can be that an insulating layer, a semiconductor layer, and a conductive layer are formed on the base layer BS by coating, evaporation, etc., and then, the insulating layer, the semiconductor layer, and the conductive layer are optionally patterned through multiple photolithography processes and etching processes. Thereafter, the semiconductor pattern, the conductive pattern, and the signal lines included in the circuit layer CL can be formed.

[0076] The light-emitting element layer EDL can be disposed on the circuit layer CL. The light-emitting element layer EDL can include light-emitting elements. For example, the light-emitting elements can include organic light-emitting materials, inorganic light-emitting materials, organic-inorganic light-emitting materials, quantum dots, quantum rods, micro LEDs, or nano LEDs.

[0077] The packaging layer TFE can be disposed on the light-emitting element layer EDL. The packaging layer TFE can cover the light-emitting element layer EDL. The packaging layer TFE can protect the light-emitting element layer EDL from the influence of foreign substances such as moisture, oxygen, and dust particles.

[0078] The sensor layer SS can be disposed on the display panel DP. The sensor layer SS can sense an external input applied from the outside. The external input can be a user input. The user input can include various forms of external inputs such as a part of the user's body, light, heat, a pen, or pressure. For example, the sensor layer SS can sense the external input by a capacitive method. In the present invention, the working method of the sensor layer SS is not particularly limited, and the sensor layer SS can also sense the external input by an electromagnetic induction method or a pressure sensing method.

[0079] The sensor layer SS can be formed on the display panel DP through a continuous process. At this time, the sensor layer SS can be directly disposed on the display panel DP. Herein, "directly disposed" can mean that no third component is disposed between the sensor layer SS and the display panel DP. That is, no separate bonding component may be disposed between the sensor layer SS and the display panel DP. For example, the sensor layer SS can be directly disposed on the encapsulation layer TFE of the display panel DP. Additionally, the sensor layer SS can be bonded to the display panel DP through a bonding component. The bonding component can include a general adhesive or an adhesive.

[0080] The sensor layer SS can have a multi-layer structure. The sensor layer SS can include a single layer or multiple layers of conductive layers. The sensor layer SS can include a single layer or multiple layers of insulating layers.

[0081] An optical layer (not shown) can also be disposed on the sensor layer SS. The optical layer can be directly disposed on the sensor layer SS. The optical layer can be formed on the sensor layer SS through a continuous process. The optical layer can reduce the reflectance caused by external light incident from the outside of the display module DM. The optical layer can include a polarization layer or a color filter layer.

[0082] In one embodiment, the sensor layer SS can be omitted, and the optical layer can be directly disposed on the display panel DP. In one embodiment, the positions of the sensor layer SS and the optical layer can be changed with respect to each other.

[0083] Figure 4 is a plan view of a display panel DP according to an embodiment of the present invention.

[0084] Referring to Figure 4 , the display panel DP can include a base layer BS divided into an active area AA and a peripheral area NAA.

[0085] The display panel DP can include pixels PX disposed in the active area AA and signal lines SGL electrically connected to the pixels PX. The display panel DP can include a driving circuit GDC and a pad portion PLD disposed in the peripheral area NAA.

[0086] The pixels PX can be arranged in a first direction DR1 and a second direction DR2. The pixels PX can include a plurality of pixel rows extending in the first direction DR1 and arranged in the second direction DR2, and a plurality of pixel columns extending in the second direction DR2 and arranged in the first direction DR1.

[0087] The signal line SGL may include a gate line GL, a data line DL, a power line PL, and a control signal line CSL. Each of the gate lines GL may be connected to a corresponding pixel in the pixel PX, and each of the data lines DL may be connected to a corresponding pixel in the pixel PX. The power line PL may be electrically connected to the pixel PX. The control signal line CSL may be connected to the driving circuit GDC to provide a control signal to the driving circuit GDC.

[0088] The driving circuit GDC may include a gate driving circuit. The gate driving circuit may generate a gate signal and sequentially output the generated gate signal to the gate line GL. The gate driving circuit may further output yet another control signal to the pixel driving circuit.

[0089] The pad portion PLD may be a portion where a flexible circuit board is connected. The pad portion PLD may include pixel pads D-PD, and the pixel pads D-PD may be pads for connecting the flexible circuit board to the display panel DP. Each of the pixel pads D-PD may be connected to a corresponding signal line in the signal line SGL. The pixel pads D-PD may be connected to the corresponding pixels PX through the signal line SGL. Additionally, any one of the pixel pads D-PD may be connected to the driving circuit GDC.

[0090] Additionally, the pad portion PLD may further include input pads. The input pads may be pads for connecting the flexible circuit board to the sensor layer SS (refer to Figure 3 ). However, it is not limited thereto, and the input pads may be disposed on the sensor layer SS (refer to Figure 3 ) and connected to a circuit board independent of the pixel pads D-PD. Alternatively, the sensor layer SS (refer to Figure 3 ) may be omitted, and the input pads may not be further included.

[0091] Figure 5 is a plan view magnifying a part of the active region AA according to an embodiment of the present invention. Figure 5 Magnified to exemplarily show the plane of the active region AA of the display module DM (refer to Figure 1 ) observed on the display surface DS (refer to Figure 2 ).

[0092] Refer to Figure 5 , the active region AA may include first to third light-emitting regions PXA-R, PXA-G, PXA-B and a non-light-emitting region NPXA surrounding the first to third light-emitting regions PXA-R, PXA-G, PXA-B. The first to third light-emitting regions PXA-R, PXA-G, PXA-B may respectively correspond to regions where light emitted from the light-emitting elements ED1, ED2, ED3 (refer to Figure 6a ) is emitted.

[0093] In Figure 5 , for the sake of convenience of explanation, only the lower electrodes LE1, LE2, and LE3 in the configuration of the light-emitting elements ED1, ED2, and ED3 (refer to Figure 6a ) are exemplarily shown. The first to third light-emitting regions PXA-R, PXA-G, and PXA-B can be divided according to the color of the light emitted to the outside of the display module DM (refer to Figure 2 ).

[0094] The first to third light-emitting regions PXA-R, PXA-G, and PXA-B can respectively provide first to third color lights having different colors from each other. For example, the first color light can be red light, the second color light can be green light, and the third color light can be blue light. However, the examples of the first to third color lights are not necessarily limited to the above examples.

[0095] Each of the first to third light-emitting regions PXA-R, PXA-G, and PXA-B can be defined as a region exposed through corresponding light-emitting openings OPE1, OPE2, and OPE3 in the upper surface of the corresponding lower electrodes LE1, LE2, and LE3. The light-emitting openings OPE1, OPE2, and OPE3 can be defined by a lower pixel defining film LDL (refer to Figure 6a ) that covers a part of the lower electrodes LE1, LE2, and LE3, and a detailed description thereof will be given later.

[0096] Specifically, the first light-emitting region PXA-R can be defined as a region exposed through the first light-emitting opening OPE1 in the upper surface of the first lower electrode LE1. In addition, the second light-emitting region PXA-G can be defined as a region exposed through the second light-emitting opening OPE2 in the upper surface of the second lower electrode LE2. In addition, the third light-emitting region PXA-B can be defined as a region exposed through the third light-emitting opening OPE3 in the upper surface of the third lower electrode LE3.

[0097] The non-light-emitting region NPXA can set the boundaries of the first to third light-emitting regions PXA-R, PXA-G, and PXA-B and prevent color mixing between the first to third light-emitting regions PXA-R, PXA-G, and PXA-B.

[0098] Each of the first to third light-emitting regions PXA-R, PXA-G, and PXA-B can be provided as multiple and arranged in a predetermined form and repeatedly configured within the active region AA.

[0099] For example, refer to Figure 5, a plurality of first light-emitting regions PXA-R and a plurality of third light-emitting regions PXA-B can be alternately arranged along a first direction DR1 to form a "first group". Additionally, a second light-emitting region PXA-G can be arranged along the first direction DR1 to form a "second group". Each of the "first group" and the "second group" can be provided as a plurality, and the "first group" and the "second group" can be alternately arranged with each other along a second direction DR2.

[0100] A second light-emitting region PXA-G can be disposed at a distance from a first light-emitting region PXA-R or a third light-emitting region PXA-B in a fourth direction DR4. The fourth direction DR4 can be defined as a direction toward a direction between the first direction DR1 and the second direction DR2 on a plane defined by the first direction DR1 and the second direction DR2.

[0101] As Figure 5 shown, the first to third light-emitting regions PXA-R, PXA-G, PXA-B can have a PENTILE arrangement form. However, Figure 5 the arrangement form of the first to third light-emitting regions PXA-R, PXA-G, PXA-B shown is exemplary and not limited thereto, and they can be arranged in various forms. For example, the first to third light-emitting regions PXA-R, PXA-G, PXA-B can also have a stripe arrangement form or a diamond ( ) arrangement form.

[0102] On the other hand, the first to third light-emitting regions PXA-R, PXA-G, PXA-B can respectively have various shapes on a plane. For example, the first to third light-emitting regions PXA-R, PXA-G, PXA-B can respectively have shapes such as a polygon, a circle, or an ellipse. In Figure 5 it is exemplarily shown that the first light-emitting region PXA-R and the third light-emitting region PXA-B having a quadrilateral (or, a rhombus) on a plane and the second light-emitting region PXA-G having an octagon.

[0103] The first to third light-emitting regions PXA-R, PXA-G, PXA-B can also have the same shape as each other on a plane or at least a part of them can have different shapes from each other. Figure 5 It is exemplarily shown that the first light-emitting region PXA-R and the third light-emitting region PXA-B having the same shape as each other on a plane and the second light-emitting region PXA-G having a shape different from the first light-emitting region PXA-R and the third light-emitting region PXA-B respectively.

[0104] At least a part of the first to third light-emitting regions PXA-R, PXA-G, and PXA-B may have different areas from each other on a plane. Specifically, the area of the first light-emitting region PXA-R that emits red light may be larger than the area of the second light-emitting region PXA-G that emits green light, and smaller than the area of the third light-emitting region PXA-B that emits blue light. However, depending on the emitted color, the size relationship among the areas of the first to third light-emitting regions PXA-R, PXA-G, and PXA-B is not limited to this, and it may vary according to the design of the display module DM (refer to Figure 2 ). For example, the first to third light-emitting regions PXA-R, PXA-G, and PXA-B may also have the same area as each other on a plane.

[0105] On the other hand, the shapes, areas, and arrangements on a plane of the first to third light-emitting regions PXA-R, PXA-G, and PXA-B of the display module DM (refer to Figure 2 ) of the present invention may be designed in various ways according to the color of the emitted light or the size and configuration of the display module DM (refer to Figure 2 ), and are not limited to Figure 5 the illustrated embodiments.

[0106] The lower electrodes LE1, LE2, and LE3 may be connected to the driving circuits of the pixels in the aforementioned circuit layer CL (refer to Figure 3 ) through connection contact holes (not shown). The connection contact holes may be disposed separately from the light-emitting regions PXA-R, PXA-G, and PXA-B defined in the lower electrodes LE1, LE2, and LE3, respectively. Alternatively, the connection contact holes may also be disposed to overlap at least a part of the light-emitting regions PXA-R, PXA-G, and PXA-B defined in the lower electrodes LE1, LE2, and LE3, respectively.

[0107] Figure 6a And Figure 6b are cross-sectional views of a display panel DP according to an embodiment of the present invention taken along the I-I' line of Figure 5 . That is, it may be a cross-section showing the first to third light-emitting regions PXA-R, PXA-G, and PXA-B and the non-light-emitting regions NPXA surrounding the first to third light-emitting regions PXA-R, PXA-G, and PXA-B of Figure 5 . The first to third light-emitting regions PXA-R, PXA-G, and PXA-B may respectively correspond to the regions where light is emitted from the light-emitting elements ED1, ED2, and ED3.

[0108] Refer to Figure 6a And Figure 6b, the display panel DP may include a base layer BS, a circuit layer CL disposed on the base layer BS, a light-emitting element layer EDL disposed on the circuit layer CL, and a encapsulation layer TFE disposed on the light-emitting element layer EDL. Regarding Figure 6a and Figure 6b for the base layer BS and the circuit layer CL, the same content as that referred to in Figure 3 the foregoing may be applicable. In Figure 6a and Figure 6b , the light-emitting element layer EDL and the encapsulation layer TFE are described in detail.

[0109] The light-emitting element layer EDL may include light-emitting elements ED1, ED2, ED3, protection patterns TPL1, TPL2, TPL3, a lower pixel defining film LDL, an upper pixel defining film UDL, and covering patterns CP1, CP2, CP3.

[0110] The light-emitting elements ED1, ED2, ED3 may include a first light-emitting element ED1, a second light-emitting element ED2, and a third light-emitting element ED3. The first light-emitting element ED1 may include a first lower electrode LE1, a first light-emitting pattern EP1, and a first upper electrode UE1. The second light-emitting element ED2 may include a second lower electrode LE2, a second light-emitting pattern EP2, and a second upper electrode UE2. The third light-emitting element ED3 may include a third lower electrode LE3, a third light-emitting pattern EP3, and a third upper electrode UE3.

[0111] The first to third lower electrodes LE1, LE2, LE3 may be provided by a plurality of patterns. Hereinafter, the first lower electrode LE1 is mainly described, and the description of the first lower electrode LE1 may be equally applicable to the second lower electrode LE2 and the third lower electrode LE3.

[0112] The first lower electrode LE1 may be disposed on the circuit layer CL. The first lower electrode LE1 may be a (semi) transmissive electrode or a reflective electrode. The first lower electrode LE1 may be single-layer or multi-layer. For example, the first lower electrode LE1 may include a first layer and a second layer.

[0113] The first layer may include a metallic substance. For example, the first layer may be a reflective layer formed of silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), or a compound thereof.

[0114] The second layer may be disposed on the first layer. The second layer may include a transparent conductive oxide. For example, the second layer may be a transparent or semi-transparent layer including at least one selected from the group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), zinc oxide (ZnO), indium oxide (In2O3), and aluminum-doped zinc oxide (AZO). In one embodiment, the second layer may include a crystallized transparent conductive oxide. For example, the transparent conductive oxide may include poly-ITO.

[0115] In one embodiment, the first lower electrode LE1 may further include a third layer below the first layer. The third layer may include a transparent conductive oxide. At this time, the third layer may also include the same material as the second layer or may include different materials from each other.

[0116] The first to third light-emitting patterns EP1, EP2, and EP3 may be respectively disposed on corresponding lower electrodes among the first to third lower electrodes LE1, LE2, and LE3. Specifically, the first light-emitting pattern EP1 may be disposed on the first lower electrode LE1, the second light-emitting pattern EP2 may be disposed on the second lower electrode LE2, and the third light-emitting pattern EP3 may be disposed on the third lower electrode LE3. In one embodiment, the first light-emitting pattern EP1 may provide red light, the second light-emitting pattern EP2 may provide green light, and the third light-emitting pattern EP3 may provide blue light.

[0117] Each of the first to third light-emitting patterns EP1, EP2, and EP3 may include a light-emitting layer containing a light-emitting substance. Each of the first to third light-emitting patterns EP1, EP2, and EP3 may further include a hole injection layer and / or a hole transport layer disposed between the corresponding lower electrode among the first to third lower electrodes LE1, LE2, and LE3 and the light-emitting layer. In addition, each of the first to third light-emitting patterns EP1, EP2, and EP3 may further include an electron transport layer and an electron injection layer disposed on the light-emitting layer.

[0118] The first light-emitting pattern EP1, the second light-emitting pattern EP2, and the third light-emitting pattern EP3 may be respectively patterned through a first light-emitting opening OPE1, a second light-emitting opening OPE2, and a third light-emitting opening OPE3 defined by a lower pixel defining film LDL.

[0119] In addition, the first light-emitting pattern EP1, the second light-emitting pattern EP2, and the third light-emitting pattern EP3 may be respectively disposed in a first upper opening OPU1, a second upper opening OPU2, and a third upper opening OPU3 defined by the upper pixel defining film UDL. Specifically, the first light-emitting pattern EP1, the second light-emitting pattern EP2, and the third light-emitting pattern EP3 may be respectively disposed in a 1-1 upper opening OPU1-1, a 2-1 upper opening OPU2-1, and a 3-1 upper opening OPU3-1 defined by a first inorganic film INL1 of the upper pixel defining film UDL.

[0120] Thus, at least a part of the upper surface of the lower pixel defining film LDL exposed in the 1-1 upper opening OPU1-1, the 2-1 upper opening OPU2-1, and the 3-1 upper opening OPU3-1 and not covered by the first inorganic film INL1 may be respectively covered by the first light-emitting pattern EP1, the second light-emitting pattern EP2, and the third light-emitting pattern EP3.

[0121] In Figure 6a and Figure 6b it is shown that a part of the upper surface of the lower pixel defining film LDL exposed in the 1-1 upper opening OPU1-1, the 2-1 upper opening OPU2-1, and the 3-1 upper opening OPU3-1 is covered, but not limited thereto, and the entire exposed upper surface of the lower pixel defining film LDL may also be covered by the first light-emitting pattern EP1, the second light-emitting pattern EP2, and the third light-emitting pattern EP3.

[0122] The first to third upper electrodes UE1, UE2, and UE3 may be disposed on corresponding light-emitting patterns among the first to third light-emitting patterns EP1, EP2, and EP3. Specifically, the first upper electrode UE1 may be disposed on the first light-emitting pattern EP1, the second upper electrode UE2 may be disposed on the second light-emitting pattern EP2, and the third upper electrode UE3 may be disposed on the third light-emitting pattern EP3.

[0123] The first upper electrode UE1, the second upper electrode UE2, and the third upper electrode UE3 may be respectively patterned by being disposed in the first upper opening OPU1, the second upper opening OPU2, and the third upper opening OPU3 defined by the upper pixel defining film UDL. Specifically, the first upper electrode UE1, the second upper electrode UE2, and the third upper electrode UE3 may be respectively disposed in the 1-1 upper opening OPU1-1, the 2-1 upper opening OPU2-1, and the 3-1 upper opening OPU3-1 defined by the first inorganic film INL1 of the upper pixel defining film UDL.

[0124] Accordingly, at least a part of the upper surface of the lower pixel defining film LDL that is not covered by the first inorganic film INL1 and is exposed at the first upper opening OPU1-1, the second upper opening OPU2-1, and the third upper opening OPU3-1 can be covered by the first upper electrode UE1, the second upper electrode UE2, and the third upper electrode UE3, respectively.

[0125] That is, as Figure 6a and Figure 6b shown, the first upper electrode UE1, the second upper electrode UE2, and the third upper electrode UE3 can cover the portions of the upper surface of the lower pixel defining film LDL that are exposed at the first upper opening OPU1-1, the second upper opening OPU2-1, and the third upper opening OPU3-1 and are not covered by the first light emitting pattern EP1, the second light emitting pattern EP2, and the third light emitting pattern EP3.

[0126] The first upper electrode UE1 can be in contact with at least a part of the side surface of the upper pixel defining film UDL that defines the first upper opening OPU1. Specifically, the first upper electrode UE1 can be in contact with at least a part of the side surface of the first inorganic film INL1 that defines the first upper opening OPU1-1.

[0127] Accordingly, the first upper electrode UE1 can be electrically connected to the first inorganic film INL1 and receive a bias voltage through the first inorganic film INL1. The description of the foregoing first upper electrode UE1 can also be similarly applied to the second and third upper electrodes UE2 and UE3.

[0128] On the other hand, when the upper electrode is in the form of a common layer that overlaps all of the first to third light emitting patterns EP1, EP2, and EP3, a lateral leakage current may be generated through the common layer. On the other hand, since the first to third upper electrodes UE1, UE2, and UE3 according to the present invention are provided in a form separated from each other on the first to third light emitting patterns EP1, EP1, and EP3 that are separated from each other, the leakage current that may be generated in the form of a common layer can be prevented.

[0129] In addition, as the upper electrodes UE1, UE2, and UE3 are electrically connected to the first inorganic film INL1 having a relatively large thickness, the driving resistance of the first to third light emitting elements ED1, ED2, and ED3 can be reduced, thereby increasing the light emitting efficiency and increasing the lifespan.

[0130] The first protection pattern TPL1 may define a first lower opening exposing a part of the upper surface of the first lower electrode LE1, the second protection pattern TPL2 may define a second lower opening exposing a part of the upper surface of the second lower electrode LE2, and the third protection pattern TPL3 may define a third lower opening exposing a part of the upper surface of the third lower electrode LE3.

[0131] The first to third protection patterns TPL1, TPL2, and TPL3 may respectively define, together with the lower pixel defining film LDL, Figure 6a and Figure 6b the first light emitting opening OPE1, the second light emitting opening OPE2, and the third light emitting opening OPE3 as shown.

[0132] On the other hand, different from Figure 6a and Figure 6b as shown, the protection patterns TPL1, TPL2, and TPL3 may be omitted. In this case, the lower pixel defining film LDL may define the first light emitting opening OPE1, the second light emitting opening OPE2, and the third light emitting opening OPE3 respectively on the first lower electrode LE1, the second lower electrode LE2, and the third lower electrode LE3.

[0133] The protection patterns TPL1, TPL2, and TPL3 may prevent damage to the first to third lower electrodes LE1, LE2, and LE3 during the etching process for forming the lower pixel defining film LDL.

[0134] The lower pixel defining film LDL may be disposed on the circuit layer CL. Additionally, the lower pixel defining film LDL may be configured to cover a part of the upper surfaces of the first to third lower electrodes LE1, LE2, and LE3, thereby defining the first to third light emitting openings OPE1, OPE2, and OPE3.

[0135] Additionally, as Figure 6a and Figure 6b shown, when the first to third protection patterns TPL1, TPL2, and TPL3 are disposed on the upper surfaces of the first to third lower electrodes LE1, LE2, and LE3, the lower pixel defining film LDL may be disposed on the upper surfaces of the first to third protection patterns TPL1, TPL2, and TPL3. Thus, the first to third protection patterns TPL1, TPL2, and TPL3 may define the first to third light emitting openings OPE1, OPE2, and OPE3 together with the lower pixel defining film LDL.

[0136] In Figure 6a and Figure 6bShown therein are that the sides of the first to third protection patterns TPL1, TPL2, TPL3 defining the first to third light-emitting openings OPE1, OPE2, OPE3 in a cross-section are more adjacent to the centers of the first to third lower electrodes LE1, LE2, LE3 respectively than the side of the lower pixel defining film LDL. However, not limited thereto, the side of the lower pixel defining film LDL in the cross-section may also be more adjacent to the centers of the first to third lower electrodes LE1, LE2, LE3 than the sides of the first to third protection patterns TPL1, TPL2, TPL3.

[0137] The lower pixel defining film LDL may include an inorganic insulating material. For example, it may include silicon nitride (SiN x ). The lower pixel defining film LDL may be disposed between the first to third lower electrodes LE1, LE2, LE3 and the upper pixel defining film UDL to block the electrical connection between the first to third lower electrodes LE1, LE2, LE3 and the upper pixel defining film UDL.

[0138] The protection patterns TPL1, TPL2, TPL3 may include a first protection pattern TPL1, a second protection pattern TPL2, and a third protection pattern TPL3. Specifically, the first protection pattern TPL1 may be disposed on the upper surface of the first lower electrode LE1, the second protection pattern TPL2 may be disposed on the upper surface of the second lower electrode LE2, and the third protection pattern TPL3 may be disposed on the upper surface of the third lower electrode LE3.

[0139] The upper pixel defining film UDL may be disposed on the lower pixel defining film LDL. The first to third upper openings OPU1, OPU2, OPU3 may be defined by the upper pixel defining film UDL.

[0140] The upper pixel defining film UDL may include a first inorganic film INL1 and a second inorganic film INL2. The first inorganic film INL1 may be disposed on the lower pixel defining film LDL, and the second inorganic film INL2 may be disposed on the first inorganic film INL1. The thickness of the first inorganic film INL1 may be thicker than the thickness of the second inorganic film INL2.

[0141] In a plane, the side of the second inorganic film INL2 may be more adjacent to the centers of the first to third lower electrodes LE1, LE2, LE3 than the side of the first inorganic film INL1. In the second inorganic film INL2, the portion more adjacent to the centers of the first to third lower electrodes LE1, LE2, LE3 than the side of the first inorganic film INL1 may be defined as the end (Tip) portion of the upper pixel defining film UDL.

[0142] The first inorganic film INL1 can define the first upper opening OPU1-1, the second upper opening OPU2-1, and the third upper opening OPU3-1. The second inorganic film INL2 can define the first upper opening OPU1-2, the second upper opening OPU2-2, and the third upper opening OPU3-2. The first upper opening OPU1-2, the second upper opening OPU2-2, and the third upper opening OPU3-2 can respectively correspond to the first light-emitting opening OPE1, the second light-emitting opening OPE2, and the third light-emitting opening OPE3.

[0143] In a plane, the areas of the first upper opening OPU1-1, the second upper opening OPU2-1, and the third upper opening OPU3-1 can be respectively larger than the areas of the first upper opening OPU1-2, the second upper opening OPU2-2, and the third upper opening OPU3-2. Additionally, in a plane, the areas of the first upper opening OPU1-1, the second upper opening OPU2-1, and the third upper opening OPU3-1 can be respectively larger than the areas of the first light-emitting opening OPE1, the second light-emitting opening OPE2, and the third light-emitting opening OPE3.

[0144] Each of the first inorganic film INL1 and the second inorganic film INL2 can include an inorganic material. Each of the first inorganic film INL1 and the second inorganic film INL2 can include an insulating inorganic film or a conductive metal. Each of the first inorganic film INL1 and the second inorganic film INL2 can include a conductive metal. For example, the first inorganic film INL1 can include aluminum (Al) or molybdenum (Mo), and the second inorganic film INL2 can include titanium (Ti). However, the substances included in the first and second inorganic films INL1 and INL2 are not limited to this. For example, the second inorganic film INL2 can include an insulating substance.

[0145] In an etching process for forming the upper pixel defining film UDL, the etching rate of the first inorganic film INL1 can be greater than the etching rate of the second inorganic film INL2. That is, the first inorganic film INL1 can include a substance with a higher etching selectivity ratio than the second inorganic film INL2.

[0146] The second inorganic film INL2 can include a substance with a lower reflectivity than the first inorganic film INL1. Since the second inorganic film INL2 constitutes the upper part of the upper pixel defining film UDL, it can reduce the reflectivity on the upper surface of the upper pixel defining film UDL, thereby improving the display quality of the display panel DP.

[0147] On the other hand, the upper pixel defining film UDL may further include a third inorganic film (not shown). The third inorganic film may be disposed between the lower pixel defining film LDL and the first inorganic film INL1. The third inorganic film may be applicable to the foregoing content in the second inorganic film INL2.

[0148] The covering patterns CP1, CP2, CP3 may include a first covering pattern CP1 disposed on the first upper electrode UE1, a second covering pattern CP2 disposed on the second upper electrode UE2, and a third covering pattern CP3 disposed on the third upper electrode UE3.

[0149] The covering patterns CP1, CP2, CP3 may include a single layer or multiple layers. The covering patterns CP1, CP2, CP3 may be an inorganic layer or an organic layer. For example, when the covering patterns CP1, CP2, CP3 include inorganic substances, the inorganic substances may include alkali metal compounds such as LiF, alkaline earth metal compounds such as MgF2, SiON, SiN x , SiO y etc. For example, when the covering patterns CP1, CP2, CP3 include organic substances, the organic substances may include α-NPD, NPB, TPD, m-MTDATA, Alq3, CuPc, TPD15 (N4,N4,N4',N4'-tetra(biphenyl-4-yl)biphenyl-4,4'-diamine; N4,N4,N4',N4'-tetrakis(biphenyl-4-yl)biphenyl-4,4'-diamine), TCTA (4,4',4"-Tris(carbazol-9-yl)triphenylamine; 4,4',4"-tris(carbazol-9-yl)triphenylamine), etc. or include acrylic esters such as epoxy resins or methacrylates.

[0150] The covering patterns CP1, CP2, CP3 may function as a buffer layer for protecting the light-emitting elements ED1, ED2, ED3, etc. disposed therebelow. The refractive index of the covering patterns CP1, CP2, CP3 may be 1.6 or more. For example, the refractive index of the covering patterns CP1, CP2, CP3 may be about 1.9. The covering patterns CP1, CP2, CP3 have a refractive index of about 1.9, thereby improving the light extraction efficiency of the light-emitting element layer EDL, etc. The covering patterns CP1, CP2, CP3 may also be omitted.

[0151] The encapsulation layer TFE may cover the light-emitting elements ED1, ED2, ED3. The encapsulation layer TFE may seal the light-emitting element layer EDL. The encapsulation layer TFE may be a thin film encapsulation layer. The encapsulation layer TFE may be a single layer or multiple layers stacked. The encapsulation layer TFE may include at least one insulating layer.

[0152] The encapsulation layer TFE may include at least one inorganic film and at least one organic film. The encapsulation layer TFE may include a first encapsulation inorganic film IEN1, an encapsulation organic film OEN, and a second encapsulation inorganic film IEN2.

[0153] The first encapsulation inorganic film IEN1 and the second encapsulation inorganic film IEN2 protect the light-emitting element layer EDL from moisture and oxygen. The first encapsulation inorganic film IEN1 and the second encapsulation inorganic film IEN2 may include silicon nitride, silicon oxynitride, silicon oxide, titanium oxide, aluminum oxide, etc., without particular limitation thereto.

[0154] The encapsulation organic film OEN protects the light-emitting element layer EDL from foreign substances such as dust particles. The encapsulation organic film OEN may be one including an acrylic compound, an epoxy compound, etc. The encapsulation organic film OEN may be one including an organic substance capable of photopolymerization, without particular limitation. In addition, the encapsulation organic film OEN may cover the steps caused by the underlying light-emitting element layer EDL to flatten them.

[0155] The first encapsulation inorganic film IEN1 may be configured to cover the light-emitting element layer EDL. The first encapsulation inorganic film IEN1 may be disposed on the upper electrodes UE1, UE2, UE3. As Figure 6a and Figure 6b shown, when the covering patterns CP1, CP2, CP3 are disposed on the upper electrodes UE1, UE2, UE3, the first encapsulation inorganic film IEN1 may be disposed on the covering patterns CP1, CP2, CP3. The first encapsulation inorganic film IEN1 may cover the upper surfaces of the exposed upper electrodes UE1, UE2, UE3 and the upper surfaces of the covering patterns CP1, CP2, CP3. The first encapsulation inorganic film IEN1 may cover the side surfaces of the exposed first inorganic film INL1. That is, the first encapsulation inorganic film IEN1 may cover the 1-1 to 3-1 upper openings OPU1-1, OPU2-1, OPU3-1. The first encapsulation inorganic film IEN1 may cover the lower surface of the exposed second inorganic film INL2. Specifically, compared with the first inorganic film INL1, the second inorganic film INL2 protrudes in the direction toward the centers of the respective light-emitting patterns EP1, EP2, EP3, whereby a part of the lower surface of the second inorganic film INL2 is not in contact with the first inorganic film INL1 and is exposed. The exposed lower surface of the second inorganic film INL2 may be covered by the first encapsulation inorganic film IEN1. The first encapsulation inorganic film IEN1 may cover the side surfaces of the second inorganic film INL2. That is, the first encapsulation inorganic film IEN1 may cover the 1-2 to 3-2 upper openings OPU1-2, OPU2-2, OPU3-2.

[0156] The first encapsulation inorganic film IEN1 may include a first portion P1, a second portion P2, and a third portion P3. The first portion P1 may be disposed within a first upper opening OPU1, a second upper opening OPU2, and a third upper opening OPU3 defined by an upper pixel defining film UDL. The second portion P2 may be disposed to extend from the first portion P1 in a third direction DR3. However, it is not limited to the case of extending exactly in the third direction DR3. For example, in Figure 6a and Figure 6b it is shown that the second portion P2 extends while forming a predetermined angle with the third direction DR3. The third portion P3 may be disposed to extend on a plane from the second portion P2 in a direction toward the center of the upper pixel defining film UDL. The third portion P3 may be disposed at a distance from the second inorganic film INL2 in the third direction DR3.

[0157] The encapsulation layer TFE may further include a filler FL. The filler FL may be disposed between the first encapsulation inorganic film IEN1 and the upper pixel defining film UDL. Specifically, the filler FL may be disposed between the third portion P3 of the first encapsulation inorganic film IEN1 and the second inorganic film INL2 of the upper pixel defining film UDL. The filler FL may be in contact with each of the third portion P3 of the first encapsulation inorganic film IEN1 and the upper pixel defining film UDL.

[0158] The filler FL may also fill all or only a part of the spaced-apart space between the third portion P3 of the first encapsulation inorganic film IEN1 and the second inorganic film INL2 of the upper pixel defining film UDL. When the filler FL fills only a part of the spaced-apart space between the third portion P3 of the first encapsulation inorganic film IEN1 and the second inorganic film INL2 of the upper pixel defining film UDL, the filler FL may be disposed at a distance from the second portion P2 of the first encapsulation inorganic film IEN1. When the filler FL fills all of the spaced-apart space between the third portion P3 of the first encapsulation inorganic film IEN1 and the second inorganic film INL2 of the upper pixel defining film UDL, the filler FL may be disposed in contact with the second portion P2 of the first encapsulation inorganic film IEN1.

[0159] The filler FL may be disposed to seal the spaced-apart space between the upper pixel defining film UDL and the third portion P3 of the first encapsulation inorganic film IEN1. The spaced-apart space between the upper pixel defining film UDL and the third portion P3 of the first encapsulation inorganic film IEN1 may be entirely filled or only partially filled, but in both cases, the spaced-apart space may be sealed by the filler FL.

[0160] After a pixel region is formed with a spaced-apart space between the upper pixel defining film UDL and the third portion P3 of the first encapsulation inorganic film IEN1, moisture permeation and / or physicochemical damage through the upper pixel defining film UDL and the third portion P3 of the first encapsulation inorganic film IEN1 can be prevented during the process for forming another pixel region. For example, after the first light-emitting region PXA-R is formed, moisture permeation and / or physicochemical damage through the upper pixel defining film UDL and the third portion P3 of the first encapsulation inorganic film IEN1 can be prevented during the process for forming the second light-emitting region PXA-G.

[0161] The filler FL may include hexamethyldisiloxane. Hexamethyldisiloxane may have SiO x C y composition. Hexamethyldisiloxane may have excellent reflow characteristics. Additionally, hexamethyldisiloxane may have the property of preventing the permeation of moisture and oxygen.

[0162] The filler FL may include silicon (Si) atoms, oxygen (O) atoms, and carbon (C) atoms. The ratio of oxygen atoms to silicon atoms may be 1.5 or more and 2.5 or less. The ratio of carbon atoms to silicon atoms may be 0.6 or less. Within this range, the hexamethyldisiloxane included in the filler FL has characteristics similar to those of silicon oxide (SiO2), and thus may have a transparent property. For example, the transmittance of the filler FL in the visible light region may be 95% or more.

[0163] The encapsulation layer TFE may further include dummy fillers D1-FL, D2-FL. The dummy fillers D1-FL, D2-FL may be terms defined to refer to the following situation: including the same substances as the filler FL, formed by the same process, and different from the filler FL only in the configured positions.

[0164] Referring to Figure 6a , the dummy filler D1-FL may cover the sides of the first portion P1 and the second portion P2 of the first encapsulation inorganic film IEN1 facing the light-emitting patterns EP1, EP2, EP3 and the upper surface of the third portion P3. The dummy filler D1-FL may be integrally connected to the filler FL. Specifically, the dummy filler D1-FL may cover the side of the third portion P3 facing the center of the upper pixel defining film UDL and be integrally connected to the filler FL disposed under the third portion P3.

[0165] Referring to Figure 6b , the dummy filler D2-FL may be disposed spaced apart from the upper pixel defining film UDL with the first portion P1 of the first encapsulation inorganic film IEN1 interposed therebetween.

[0166] Dummy fillers D1-FL and D2-FL may include the same material as filler FL. The dummy fillers D1-FL and D2-FL may be formed in the same process step as filler FL. The dummy fillers D1-FL and D2-FL may have a transparent property.

[0167] Figure 7 is a flowchart of a method for manufacturing a display panel according to an embodiment of the present invention. Figures 8a to 8c is a cross-sectional view showing some steps of a method for manufacturing a display panel according to an embodiment of the present invention.

[0168] Referring to Figure 7 , the method for manufacturing a display panel of the present invention may include a step (S100) of providing a preliminary display panel p-DP (referring to Figure 8a ) and a step of forming a filler layer FLL (referring to Figure 8b ).

[0169] Figure 8a Briefly shows the step (S100) of providing a preliminary display panel p-DP. Referring to Figure 8a , the preliminary display panel p-DP may include a first electrode LE, a lower pixel defining film LDL that covers a part of the first electrode LE to define a light emitting opening OPE, an upper pixel defining film UDL that defines upper openings OPUa and OPUb and is disposed on the lower pixel defining film LDL, a light emitting pattern EP disposed inside the upper opening OPUa on the first electrode LE, a second electrode UE disposed on the light emitting pattern EP, and a first encapsulation inorganic film IEN1 disposed on the second electrode UE.

[0170] The first encapsulation inorganic film IEN1 may include a first part P1 (referring to Figure 6a ) disposed inside the upper openings OPUa and OPUb to cover the side surfaces of the second electrode UE and the upper pixel defining film UDL, a second part P2 (referring to Figure 6a ) extending from the first part P1 (referring to Figure 6a ) in the direction from the first electrode LE toward the second electrode UE (i.e., the thickness direction of the preliminary display panel p-DP), and a third part P3 (referring to Figure 6a ) extending from the second part P2 (referring to Figure 6a ) in a direction away from the center of the light emitting pattern EP. The second part P2 (referring to Figure 6a ) is not limited to the case of extending exactly in the thickness direction. For example, in Figures 8a to 8c , it is shown that the second part P2 (referring to Figure 6a ) extends while forming a predetermined angle with the thickness direction. Regarding the base layer BS, the circuit layer CL, the light emitting element layer EDL, and the first encapsulation inorganic film IEN1, the same applies in Figures 3 to 6bThe foregoing content.

[0171] Figure 8b Step (S200) of forming the filler layer FLL is schematically shown. Here, the filler layer FLL may include the foregoing filler FL and dummy fillers D1-FL, D2-FL (refer to Figure 8c ). Refer to Figure 8b , and the filler layer FLL may be formed on the first encapsulation inorganic film IEN1.

[0172] The filler layer FLL may be formed on the first encapsulation inorganic film IEN1 to fabricate the first preliminary display panel p-DPa. Thereafter, an encapsulation organic film OEN (refer to Figure 6a ) and a second encapsulation inorganic film IEN2 (refer to Figure 6a ) may be formed on the filler layer FLL to fabricate Figure 6a the display panel DP.

[0173] The filler layer FLL may be formed by vapor-depositing hexamethyldisiloxane on the first encapsulation inorganic film IEN1. Hexamethyldisiloxane may be vapor-deposited by a chemical vapor deposition (CVD) process. Hexamethyldisiloxane may have excellent reflow characteristics. In addition, hexamethyldisiloxane may have the property of preventing the penetration of moisture and oxygen. When performing the vapor-deposition process of hexamethyldisiloxane, high-temperature processes such as forming and curing an organic layer are not required, thereby preventing the already formed organic layer and the light-emitting element ED from being damaged by high temperature. In addition, a separate heat treatment such as curing is not required, so the processability may be excellent.

[0174] The filler layer FLL may be formed by sealing the separation space between the upper pixel defining film UDL and the third portion P3 of the first encapsulation inorganic film IEN1 (refer to Figure 6a ). The separation space between the upper pixel defining film UDL and the third portion P3 of the first encapsulation inorganic film IEN1 (refer to Figure 6a ) may be entirely filled, or only a part of it may be filled. However, in both cases, the separation space may be sealed by the filler layer FLL.

[0175] Due to sealing the separation space between the upper pixel defining film UDL and the third portion P3 of the first encapsulation inorganic film IEN1 (refer to Figure 6a ), during the process of forming another pixel region after forming a pixel region, moisture permeation and / or physicochemical damage through the separation space between the upper pixel defining film UDL and the third portion P3 of the first encapsulation inorganic film IEN1 (refer to Figure 6a ) can be prevented.

[0176] Hexamethyldisiloxane may include silicon atoms, oxygen atoms, and carbon atoms. That is, hexamethyldisiloxane may have SiO xC y It consists of. The ratio of oxygen atoms to silicon atoms in hexamethyldisiloxane can be 1.5 or more and 2.5 or less. The ratio of carbon atoms to silicon atoms in hexamethyldisiloxane can be 0.6 or less. Within the above range, hexamethyldisiloxane has properties similar to those of silicon oxide (SiO2), so it can have transparent properties. Therefore, even when the filler layer FLL overlaps with the pixel region PXA to form, it can not affect the light-emitting properties. Full evaporation can be performed, so no additional mask is required, and thus the processability may be excellent.

[0177] The method for manufacturing a display panel according to the present invention may further include a step of anisotropically etching the filler layer FLL. Figure 8c The step of anisotropically etching the filler layer FLL is schematically shown.

[0178] The filler layer FLL can be anisotropically etched to manufacture the second preliminary display panel p-DPb. Thereafter, an encapsulation organic film OEN (refer to Figure 6b ) and a second encapsulation inorganic film IEN2 (refer to Figure 6b ) can be formed on the filler layer FLL to manufacture Figure 6b the display panel DP.

[0179] In the process of forming one pixel region, an etching process may be required in the process of forming another pixel region. When performing an anisotropic etching process, the separation space between the upper pixel defining film UDL and the third part P3 of the first encapsulation inorganic film IEN1 (refer to Figure 6a ) can also be kept in a sealed state. Therefore, in this case, moisture permeation and / or physicochemical damage during the process can also be prevented as described above in Figure 8b .

[0180] As described above, the present invention has been described with reference to the preferred embodiments of the present invention. However, for those skilled in the art or those with ordinary knowledge in the technical field, it can be understood that various modifications and changes can be made to the present invention without departing from the concept of the present invention and the technical scope described in the appended claims.

[0181] Therefore, the technical scope of the present invention is not limited by the content described in the detailed description of the specification, but should be defined by the claims.

Claims

1. A display panel, wherein, Comprising: A base layer; A circuit layer disposed on the base layer; A light-emitting element layer disposed on the circuit layer; And A packaging layer disposed on the light-emitting element layer, The light-emitting element layer includes: A first electrode disposed on the circuit layer; A lower pixel defining film covering a part of the first electrode to define a light-emitting opening and disposed on the circuit layer; An upper pixel defining film defining an upper opening and disposed on the lower pixel defining film; A light-emitting pattern disposed inside the upper opening on the first electrode; and A second electrode disposed on the light-emitting pattern, The packaging layer includes: A first packaging inorganic film including a first part disposed inside the upper opening to cover the second electrode and the side surface of the upper pixel defining film, a second part extending in the thickness direction from the first part from the light-emitting element layer toward the packaging layer, and a third part extending in the direction toward the center of the upper pixel defining film from the second part; and A filler disposed between the upper pixel defining film and the third part of the first packaging inorganic film and including hexamethyldisiloxane.

2. The display panel according to claim 1, wherein The filler includes silicon atoms and oxygen atoms, and the ratio of oxygen atoms to silicon atoms is 1.5 or more and 2.5 or less.

3. The display panel according to claim 1, wherein The filler includes silicon atoms and carbon atoms, and the ratio of carbon atoms to silicon atoms is 0.6 or less.

4. The display panel according to claim 1, wherein The transmittance of the filler in the visible light region is 95% or more.

5. The display panel according to claim 1, wherein The third part of the first packaging inorganic film is spaced apart in the thickness direction with respect to the upper pixel defining film.

6. The display panel according to claim 1, wherein The filler is in contact with each of the third part of the first packaging inorganic film and the upper pixel defining film.

7. The display panel according to claim 1, wherein The display panel further includes: A dummy filler covering the first part of the first packaging inorganic film, the side surface of the second part facing the light-emitting pattern, and the upper surface of the third part, The dummy filler includes the same substance as the filler.

8. The display panel according to claim 7, wherein The filler and the dummy filler are integrally connected.

9. The display panel according to claim 1, wherein The display panel further includes: A dummy filler disposed spaced apart from the upper pixel defining film across the first part of the first packaging inorganic film, The dummy filler includes the same substance as the filler.

10. The display panel according to claim 9, wherein The filler and the dummy filler are spaced apart.

11. The display panel according to claim 1, wherein The side surface of the second part facing the filler is spaced apart from the filler.

12. The display panel according to claim 1, wherein The side surface of the second part facing the filler is in contact with the filler.

13. The display panel according to claim 1, wherein, the upper pixel defining film includes: a first inorganic film disposed on the lower pixel defining film; and a second inorganic film disposed on the first inorganic film and protruding in a direction toward the center of the light-emitting pattern as compared with the first inorganic film.

14. The display panel according to claim 1, wherein, the display panel further includes: a packaging organic film disposed on the first packaging inorganic film to cover a step caused by the light-emitting element layer; and a second packaging inorganic film disposed on the packaging organic film.

15. A manufacturing method of a display panel, wherein, Including: providing a preliminary display panel including a first electrode, a lower pixel defining film covering a part of the first electrode to define a light-emitting opening, an upper pixel defining film defining an upper opening and disposed on the lower pixel defining film, a light-emitting pattern disposed inside the upper opening on the first electrode, a second electrode disposed on the light-emitting pattern, and a first packaging inorganic film disposed on the second electrode; the step of depositing hexamethyldisiloxane on the first packaging inorganic film to form a filler layer, the first packaging inorganic film includes a first part disposed inside the upper opening to cover the second electrode and the side surfaces of the upper pixel defining film, a second part extending from the first part in a direction from the first electrode toward the second electrode, and a third part extending from the second part in a direction away from the center of the light-emitting pattern.

16. The method for manufacturing a display panel according to claim 15, wherein, the filler layer seals between the upper pixel defining film and the third part and is formed over the entire surface of the preliminary display panel.

17. The method for manufacturing a display panel according to claim 15, wherein, the method for manufacturing the display panel further includes: the step of anisotropically etching the filler layer in a direction from the second electrode toward the first electrode.

18. The method for manufacturing a display panel according to claim 15, wherein, the hexamethyldisiloxane includes silicon atoms and oxygen atoms, and a ratio of the oxygen atoms to the silicon atoms is 1.5 or more and 2.5 or less.

19. The method for manufacturing a display panel according to claim 15, wherein, the hexamethyldisiloxane includes silicon atoms and carbon atoms, and a ratio of the carbon atoms to the silicon atoms is 0.6 or less.

20. The method for manufacturing a display panel according to claim 15, wherein, the step of forming the filler layer deposits hexamethyldisiloxane by a chemical vapor deposition process.

Citation Information

Patent Citations

  • Device for cold-forming wire

    EP0011612A1

  • Preparation of benzaldehyde dialkyl acetals substituted in the 4-position

    EP0011712A2