A low-level high-precision digital acquisition system with gate high voltage

Abstract

The application belongs to the technical field of space plasma environment detection, and relates to a low-level high-precision digital acquisition system of a gated high voltage, which comprises a level processing circuit, is realized based on a field effect transistor, is used for filtering a high voltage part of an input gated high voltage, and only outputs a low voltage; an ADC conversion circuit is used for periodically outputting gated high voltage level data after analog-digital conversion at a set frequency under the control of a data processing unit; and the data processing unit is realized based on an FPGA, is used for controlling the ADC conversion circuit, collecting level data output by the ADC conversion circuit, and outputting the level data to a PC end through an RS422 interface in a package. By using the system, the measurement range of an oscilloscope is reduced from 300V to 3V, and the measurement precision is improved from 50V / div to 0.5V / div, so that the problem of low measurement precision of high-low level switching of a gated high voltage is overcome, and the risk of high voltage discharge caused by direct measurement of a high voltage by a probe of the oscilloscope is avoided.

Description

[0001] This application is a divisional application of the invention application with application number "2025101041613", invention title "A Low-Level High-Precision Detection Device Based on Field-Effect Transistor Gated High Voltage", and application date of January 23, 2025. Technical Field

[0002] This invention belongs to the field of space plasma environment detection technology, and particularly relates to a low-level, high-precision digital acquisition system with gated high voltage. Background Technology

[0003] In space plasma environment detection, ion energy, orientation, flux, and mass spectrometry are crucial detection elements. Among these, gated high voltage has extensive applications in plasma flux measurement and ion mass spectrometry analysis. The stable level of the gated high voltage after switching between high and low levels is an important parameter for evaluating its performance.

[0004] Firstly, gated high voltage is mainly used for flux control in ionospheric ion imaging detection. Typical ionospheric probe satellites orbit at 340–450 km, and the total variation range of their ion differential flux reaches approximately eight orders of magnitude (5 × 10⁻⁶). 6 cm-2s-1sr-1eV-1~5×10 14 The dynamic range (cm⁻²s⁻¹sr⁻¹eV⁻¹) is relatively large, representing a typical region for high-flux ions. Ion imaging detection works by amplifying and imaging individual ion charge signals using a microchannel plate (MCP) and a fluorescent screen, allowing for detailed analysis of ion density, temperature, drift velocity, and spatial distribution of ion composition, offering advantages in high spatiotemporal analysis. However, such ion imaging detection instruments will saturate and malfunction without flux control when measuring in environments with extremely high ion flux in the ionosphere. Figure 1 The diagram shows a cross-sectional view of the ion imager design. A gated electrode is set at the ion inlet to limit the incident ion beam by applying a gated high voltage. When the gated high voltage output is high, the gate is closed to prevent ions from entering; when the output is low, the gate is open to allow ions to enter, thereby ensuring that the microchannel plate (MCP) and the fluorescent screen operate within a suitable dynamic range.

[0005] Secondly, gated high voltage is a key technology in mass spectrometry analysis based on time-of-flight measurement systems. The basic principle of a mass spectrometer based on a time-of-flight measurement system is: Where m is the ion mass (unit: kilogram), and v is the ion velocity (unit: m / s). The flight velocity v can be calculated from the ion flight time T, and the ion energy E is calculated using the high-voltage amplitude of the electrostatic analyzer; combined with... Information on ionic composition can be deduced.

[0006] like Figure 2 The diagram illustrates the application of gated high voltage in a time-of-flight measurement system. The TDC-GPX is the time-of-flight measurement chip, timing the time interval between the start signal (START) and the stop signal (STOP). The gated high voltage output from the gated high voltage module controls the "opening" of the gated electrodes: allowing incident ions to enter. Simultaneously, it serves as the start signal (START) for the TDC-GPX time-of-flight measurement. After the incident ions pass through a free-flight zone of distance L and reach the detector, a digital pulse is output as the stop signal (STOP) for the TDC-GPX time-of-flight measurement. The TDC-GPX ultimately provides the flight time of the incident ions.

[0007] like Figure 3 As shown, the characteristic of gated high voltage is that the output voltage switches periodically between high and low levels at a fixed frequency, with fixed pulse widths for both high and low levels. In plasma detector applications, there are specific requirements for the high and low level amplitudes, high-to-low level switching time, minimum pulse width, and post-switching level stability of the gated high voltage. For gated high voltage used in ion flux control, the high level must be +300V (gate off), the low level 0V (gate on), the pulse width is adjustable with a minimum width of 10µs, and the high-to-low level switching time is 100ns. Accurate low-level 0V output and effective level hold time are required; otherwise, flux control accuracy will be affected. For gated high voltage used in mass spectrometers, the high level must be +300V (gate off), the low level 0V (gate on), the pulse width is adjustable with a minimum width of 30ns, and the high-to-low level switching time should be less than 20ns. Accurate low-level 0V output and effective level hold time are required; otherwise, mass spectrometry resolution will be affected.

[0008] Due to the charging and discharging of parasitic capacitance within the gated high-voltage circuit, an overshoot phenomenon occurs at the moment of gate opening. This phenomenon can damage the components within the gated high-voltage circuit and affect their lifespan. This overshoot phenomenon can be eliminated by adjusting the RC matching within the circuit, but this requires high-precision measurement of the level stabilization process after the high-low level switching.

[0009] In different application scenarios, the stable level state after the high-low level switching of the gated high voltage is an important parameter for evaluating the performance of the gated high voltage. The level state directly affects the detector's detection performance and the reliability of the gated high voltage. However, during the debugging of the gated high voltage circuit, due to limitations in measurement technology, the measurement accuracy of the stable level state after the high-low level switching is relatively low.

[0010] Because the high level of the gated high voltage output is +300V, the voltage amplitude is high, the amplitude difference between the high level and the low level is 300V, the amplitude difference is large, the high-low level switching frequency is greater than 10kHz, and the low level holding time is less than 10us.

[0011] Currently, the high-low level switching process of the gated high-voltage output is measured using an oscilloscope. The oscilloscope needs to cover a range of +300V, but its measurement resolution is only 50V / div, resulting in low accuracy. The stable level after switching cannot be accurately measured. Furthermore, the high level of the gated high-voltage output is a high voltage of +300V; directly measuring it with the oscilloscope probes poses a risk of high-voltage discharge, creating a safety hazard for testing personnel. Summary of the Invention

[0012] The purpose of this invention is to overcome the shortcomings of the prior art and to propose a low-level, high-precision digital acquisition system for gated high voltage.

[0013] In view of this, the present invention discloses a low-level, high-precision digital acquisition system for gated high voltage, comprising: a level processing circuit, an ADC conversion circuit, and a data processing unit, wherein,

[0014] The level processing circuit, implemented based on a field-effect transistor, is used to filter the high-voltage portion of the input gated high voltage and output only a low voltage.

[0015] The ADC conversion circuit is used to periodically output gated high-voltage level data after analog-to-digital conversion at a set frequency under the control of the data processing unit.

[0016] The data processing unit, implemented based on FPGA, is used to control the ADC conversion circuit, acquire the level data output by the ADC conversion circuit, and package and output it to the PC through the RS422 driver circuit.

[0017] The high-level value of the input gated high voltage is +300V, and the low-level value is 0V.

[0018] In the level processing circuit, the breakdown voltage V of the field-effect transistor DS The gate-source turn-on threshold voltage is 500V. GS The gate-source voltage tolerance range is ±20V, and the gate voltage V is greater than 2V. G Fixed at 5V, source voltage V S Within the range of 0V to 3V, the drain and source terminals (DS) are turned on, and the source voltage V... S When the voltage is greater than 3V, the drain and source of the field-effect transistor are cut off.

[0019] Preferably, the ADC conversion circuit uses a 16-bit high-precision ADC converter.

[0020] Preferably, the data processing unit includes an FPGA and an RSS422 driver circuit, wherein,

[0021] The FPGA controls the ADC conversion circuit to periodically acquire the level data output by the level processing circuit at a frequency of 100kHz and transmit it to the RS422 driver circuit.

[0022] The RS422 driver circuit converts the level data from a single-ended signal to a differential signal and outputs it to the PC.

[0023] Preferably, the interface signals between the ADC conversion circuit and the FPGA include: ADC data bus, ADC chip select signal, ADC conversion enable flag signal and ADC conversion complete flag signal.

[0024] Preferably, the PC stores data on the high-low level switching process of the gated high voltage and the stable low-level state for later data analysis and comparison.

[0025] Compared with the prior art, the advantages of the present invention are:

[0026] 1. This invention utilizes the conduction and turn-off characteristics of field-effect transistors to design a gated high-voltage level processing circuit, which filters out the high-voltage portion of the gated high voltage and outputs only a low voltage. After using this invention, the oscilloscope measurement range is reduced from 300V to 3V, and the measurement accuracy is improved from 50V / div to 0.5V / div. This overcomes the problem of low measurement accuracy when switching between high and low levels of gated high voltage and avoids the risk of high-voltage discharge caused by directly measuring high voltage with the oscilloscope probes.

[0027] 2. The present invention integrates an analog output interface with level processing and an RS422 digital output interface. The level can be viewed in real time with an oscilloscope, or it can be used to perform data analysis, comparison and research through data stored on a PC. Attached Figure Description

[0028] Figure 1 This is a cross-sectional view of the ion imager design;

[0029] Figure 2 This is a schematic diagram of the flight time measurement principle based on gated high voltage;

[0030] Figure 3 This is a schematic diagram of the gate control power supply operation;

[0031] Figure 4 This is a schematic block diagram of the low-level, high-precision digital acquisition system for gated high voltage of the present invention;

[0032] Figure 5 yes Figure 4 Schematic diagram of the level processing circuit;

[0033] Figure 6 yes Figure 4 Schematic diagram of ADC conversion circuit;

[0034] Figure 7 yes Figure 4 Schematic diagram of the data processing unit circuit;

[0035] Figure 8 This is the input and output waveform diagram of the low-level high-precision digital acquisition system for gated high voltage of the present invention. Detailed Implementation

[0036] This invention discloses a low-level, high-precision digital acquisition system for gated high voltage, comprising: a level processing circuit, an ADC conversion circuit, and a data processing unit, wherein,

[0037] The level processing circuit, implemented based on a field-effect transistor, is used to filter the high-voltage portion of the input gated high voltage, outputting only a low voltage.

[0038] The ADC conversion circuit is used to periodically output gated high-voltage level data after analog-to-digital conversion at a set frequency under the control of the data processing unit.

[0039] The data processing unit, implemented based on FPGA (Field-Programmable Gate Array), is used to control the ADC (Analog to Digital Converter) conversion circuit, acquire the level data output by the ADC conversion circuit, and package and output it to the PC through the RS422 driver circuit.

[0040] The technical solution of the present invention will be described in detail below with reference to the accompanying drawings and embodiments.

[0041] Example

[0042] Embodiments of the present invention provide a low-level, high-precision digital acquisition system for gated high voltage. For example... Figure 4 This is a schematic block diagram of a low-level, high-precision digital acquisition system for gated high voltage. The system includes a level processing circuit, an ADC conversion circuit, and a data processing unit. Its analog input is the gated high voltage, and its output is the processed low-voltage portion of the gated high voltage, which can be measured using an oscilloscope. It also has an RS422 interface to package and output the acquired data.

[0043] like Figure 5 The diagram shows the circuit diagram of the low-level high-precision digital acquisition system for gated high voltage. In this invention, the high-level value of the input gated high voltage is +300V, and the low-level value is 0V. GND represents ground. In one embodiment, the key component, the field-effect transistor, is model RCS7464ET2, and its breakdown voltage is V. DSAt 500V, due to the charging and discharging of parasitic capacitance within the gated high-voltage circuit, an overshoot phenomenon occurs at the moment of gate opening. This phenomenon can damage the components within the gated high-voltage circuit and affect their lifespan. This overshoot phenomenon can be eliminated by adjusting the RC matching within the circuit, but this requires high-precision measurement of the level stabilization process after the high-low level switching.

[0044] like Figure 6 , Figure 7 The diagram shows the schematic diagrams of the ADC conversion circuit and data processing unit circuit of the low-level high-precision digital acquisition system for gated high voltage. In one embodiment, the ADC converter uses the AD976, a 16-bit high-precision ADC converter. The interface signals between the ADC converter and the data processing unit FPGA include: ADC data bus, ADC chip select signal, ADC conversion enable flag signal, and ADC conversion complete flag signal. In one embodiment, the data processing unit FPGA controls the ADC to periodically acquire the analog level curve output by the level processing circuit at a frequency of 100kHz. The acquired data is then packaged and output to the PC via the RS422 interface. The PC stores the data on the high-low level switching process and the low-level stable state of the gated high voltage system, which can be used for subsequent data analysis and comparison.

[0045] like Figure 8 The diagram shows the input-output voltage waveforms of the level processing circuit. The input voltage range is 0 to +300V, and the output voltage range is 0 to +3V. The maximum output voltage is +3V. The output terminal connects to the ADC conversion circuit within the system and also provides an external analog output, which can be measured with an oscilloscope for high precision. The system's output voltage range of 0 to +3V is within the safe voltage range for human use, posing no safety concerns for test personnel.

[0046] By employing the system of this invention to detect the output of the gated high voltage, the low-level stabilization process, low-level amplitude, and low-level holding time after high-low level switching can be measured with high precision. Overshoot can be effectively avoided by adjusting the relevant resistor-capacitor matching state within the gated high voltage circuit. Accurate measurement of the low-level amplitude and low-level holding time effectively ensures high-precision measurements for flux control and mass spectrometry analysis instruments.

[0047] This invention overcomes the problem of low measurement accuracy in gated high-voltage high-low level switching, and avoids direct measurement of high voltage by oscilloscope probes, effectively preventing the risk of high-voltage discharge. This invention utilizes the conduction and turn-off characteristics of field-effect transistors to design a gated high-voltage level measurement circuit, filtering out the high-voltage portion of the gated high voltage and outputting only a low voltage. Using this invention, the oscilloscope measurement range is reduced from 300V to 3V, and the measurement accuracy is improved from 50V / div to 0.5V / div. Specific performance indicators are shown in Table 1.

[0048] Table 1

[0049]

[0050] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to the embodiments, those skilled in the art should understand that modifications or equivalent substitutions to the technical solutions of the present invention do not depart from the spirit and scope of the technical solutions of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A low-level, high-precision digital acquisition system for gated high voltage, characterized in that, include: The circuit includes a level processing circuit, an ADC conversion circuit, and a data processing unit. The level processing circuit, implemented based on a field-effect transistor, is used to filter the high-voltage portion of the input gated high voltage, outputting only a low voltage, which can be viewed in real time using an oscilloscope; the high and low levels of the gated high voltage switch periodically at a fixed frequency, with fixed pulse widths for both high and low levels; The ADC conversion circuit is used to periodically output gated high-voltage level data after analog-to-digital conversion at a set frequency under the control of the data processing unit. The data processing unit, implemented based on FPGA, is used to control the ADC conversion circuit, acquire the level data output by the ADC conversion circuit, and package and output it to the PC through the RS422 interface. The ADC conversion circuit uses a 16-bit high-precision ADC converter AD976. The data processing unit includes an FPGA and an RS422 driver circuit, wherein, The FPGA controls the ADC conversion circuit to periodically acquire the level data output by the level processing circuit at a frequency of 100kHz and transmit it to the RS422 driver circuit. The RS422 driver circuit converts the level data from a single-ended signal to a differential signal and outputs it to the PC for storage, enabling data analysis, comparison, and research. The high-level value of the input gated high voltage is +300V, and the low-level value is 0V.

2. The low-level, high-precision digital acquisition system for gated high voltage according to claim 1, characterized in that, In the level processing circuit, the breakdown voltage V of the field-effect transistor DS The gate-source turn-on threshold voltage is 500V. GS The gate-source voltage tolerance range is ±20V, and the gate voltage V is greater than 2V. G Fixed at 5V, source voltage V S Within the range of 0V to 3V, the drain and source terminals (DS) are turned on, and the source voltage V... S When the voltage is greater than 3V, the drain and source of the field-effect transistor are cut off.

3. The low-level, high-precision digital acquisition system for gated high voltage according to claim 1, characterized in that, The interface signals between the ADC conversion circuit and the FPGA include: ADC data bus, ADC chip select signal, ADC conversion enable signal, and ADC conversion complete signal.

4. The low-level, high-precision digital acquisition system for gated high voltage according to claim 1, characterized in that, The PC terminal stores data on the high-low level switching process of the gated high voltage and the stable low-level state, which is used for later data analysis and comparison.

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