Clock signal compensation method

Abstract

The present application discloses a clock signal compensation method, which relates to the technical field of network time synchronization, including detecting the program running status of a first synchronization program; when the program running status indicates that a first clock signal synchronized by the first synchronization program for a network device has a clock signal deviation, generating a clock compensation parameter for the first synchronization program according to the first clock signal and a second clock signal synchronized by the second synchronization program for the network device, and obtaining a target deviation parameter of the first synchronization program; compensating the first clock signal according to the clock compensation parameter and the target deviation parameter to obtain a target clock signal, wherein the network device is used to use the target clock signal to execute a business to be run, thereby solving the technical problem of low time synchronization efficiency of the network device in the related art and achieving the technical effect of improving the time synchronization efficiency of the network device.

Description

Technical Field

[0001] The present application relates to the technical field of network time synchronization, and in particular to a clock signal compensation method. Background Art

[0002] In modern network communications, clock signals are critical information required by network devices to perform network operations, ensuring efficient and accurate execution. Related technologies employ clock synchronization programs configured on network devices to synchronize their clocks. While this approach generally meets the clock synchronization requirements of network devices, any failure in the clock synchronization program can lead to inaccurate synchronized clock signals, which in turn affects the operational status of network devices. Summary of the Invention

[0003] The present application provides a clock signal compensation method to at least solve the problem of low time synchronization efficiency of network devices in related technologies.

[0004] The present application provides a clock signal compensation method, comprising:

[0005] detecting a program running status of a first synchronization program;

[0006] In a case where the program running status indicates that a first clock signal used by the first synchronization program to synchronize the network device has a clock signal deviation, a clock compensation parameter for the first synchronization program is generated based on the first clock signal and a second clock signal used by the second synchronization program to synchronize the network device, and a target deviation parameter of the first synchronization program is obtained, wherein the clock synchronization accuracy of the first synchronization program is higher than the clock synchronization accuracy of the second synchronization program, and the target deviation parameter is used to indicate the influence relationship between the clock signal synchronization method currently used by the first synchronization program to synchronize the clock signal of the network device and the clock signal deviation amount;

[0007] The first clock signal is compensated according to the clock compensation parameter and the target deviation parameter to obtain a target clock signal, wherein the network device is configured to execute the service to be run using the target clock signal.

[0008] The present application also provides an electronic device, comprising: a memory for storing a computer program; and a processor for implementing the steps of any of the above-mentioned clock signal compensation methods when executing the computer program.

[0009] The present application also provides a computer-readable storage medium, in which a computer program is stored. When the computer program is executed by a processor, the steps of any of the above-mentioned clock signal compensation methods are implemented.

[0010] The present application also provides a computer program product, including a computer program, which implements the steps of any of the above-mentioned clock signal compensation methods when executed by a processor.

[0011] The present application provides a method for synchronizing a clock signal of a network device by setting two synchronization programs with different synchronization accuracies, wherein the program with higher clock synchronization accuracy serves as a first synchronization program and the program with lower clock synchronization accuracy serves as a second synchronization program. The method first detects the program running status of the first synchronization program. When the program running status of the first synchronization program indicates that a clock signal deviation exists in a first clock signal synchronized by the first synchronization program for the network device, a clock compensation parameter for the first synchronization program is generated based on the first clock signal and the second clock signal synchronized by the second synchronization program for the network device. Furthermore, a target deviation parameter is obtained for the first synchronization program, which indicates the relationship between the clock signal synchronization method currently used by the first synchronization program for synchronizing the clock signal of the network device and the amount of clock signal deviation. The first clock signal is then compensated for based on the clock compensation parameter and the target deviation parameter to obtain a target clock signal, thereby ensuring the accuracy of the clock signal synchronized by the network device. The network device can then use the target clock signal with higher accuracy to execute services to be run. Therefore, the technical problem of low time synchronization efficiency of network devices in the related art can be solved, achieving the technical effect of improving the time synchronization efficiency of network devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0013] Figure 1 This is a hardware structure block diagram of a clock signal compensation method according to an embodiment of the present application;

[0014] Figure 2 is a flowchart of a clock signal compensation method according to an embodiment of the present application;

[0015] Figure 3 This is a system architecture diagram of a PTP / NTP dynamic switching time synchronization system based on an SR-IOV network card according to an embodiment of the present application;

[0016] Figure 4 This is a flowchart of a protocol switching trigger condition according to an embodiment of the present application;

[0017] Figure 5 is a flow chart of a protocol switching process according to an embodiment of the present application;

[0018] Figure 6 This is a structural block diagram of a clock signal compensation device according to an embodiment of the present application. DETAILED DESCRIPTION

[0019] The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0020] It should be noted that, in the description of this application, the terms "comprises," "includes," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. The terms "first," "second," etc., in this application are used to distinguish similar objects, and are not used to describe a particular order or sequence.

[0021] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0022] In conjunction with the specific application environment architecture or specific hardware architecture on which the execution of the clock signal compensation method depends, the specific application environment architecture or specific hardware architecture is described herein.

[0023] The method embodiments provided in the embodiments of the present application can be executed in a server device or a similar computing device. Taking running on a server device as an example, Figure 1 This is a hardware structure diagram of a clock signal compensation method according to an embodiment of the present application. Figure 1 As shown, the server device may include one or more ( Figure 1 Only one is shown) a processor 102 (the processor 102 may include but is not limited to a microprocessor MCU or a programmable logic device FPGA) and a memory 104 for storing data. The server device may also include a transmission device 106 and an input / output device 108 for communication functions. It will be understood by those skilled in the art that Figure 1 The structure shown is only for illustration and does not limit the structure of the above server device. Figure 1 More or fewer components than shown, or with Figure 1 Different configurations shown.

[0024] The memory 104 can be used to store computer programs, for example, software programs and modules of application software, such as the computer program corresponding to the startup method of the operating system in the embodiment of the present application. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, that is, implementing the above-mentioned method. The memory 104 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 104 may further include a memory remotely located relative to the processor 102, and these remote memories can be connected to the server device via a network. Examples of the above-mentioned network include but are not limited to the Internet, an intranet, a local area network, a mobile communication network, and a combination thereof.

[0025] Transmission device 106 is used to receive or transmit data via a network. A specific example of the aforementioned network may include a wireless network provided by a communication provider of the server device. In one embodiment, transmission device 106 includes a network interface controller (NIC), which can be connected to other network devices via a base station to enable communication with the Internet. In another embodiment, transmission device 106 may be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.

[0026] An embodiment of the present application provides a clock signal compensation method, and the method is described in detail in conjunction with the execution flow of the clock signal compensation method.

[0027] The following is an explanation of the professional terms that appear in this application:

[0028] PTP: Precision Time Protocol, high-precision time protocol;

[0029] NTP: Network Time Protocol;

[0030] VF: Virtual Function, virtual function;

[0031] VM: Virtual Machine;

[0032] SR-IOV: Single Root I / O Virtualization. SR-IOV allows a physical network card to be virtualized into multiple independent virtual functions (VFs). Each VF can be directly mapped to a virtual machine (VM), bypassing the intervention of the host hypervisor, thereby reducing network latency and improving performance.

[0033] PF: Physical Function, physical function;

[0034] PCIe: Peripheral Component Interconnect Express, peripheral component interconnect express channel;

[0035] DMA: Direct Memory Access, direct memory access;

[0036] CPU: Central Processing Unit, central processing unit;

[0037] API: Application Programming Interface, application programming interface.

[0038] In this embodiment, a clock signal compensation method is provided. Figure 2 is a flow chart of a clock signal compensation method according to an embodiment of the present application, such as Figure 2 As shown, the method includes the following steps:

[0039] Step S202, detecting the program running status of the first synchronization program;

[0040] Step S204, when the program running status indicates that the first synchronization program synchronizes the first clock signal of the network device with the first synchronization program and there is a clock signal deviation, a clock compensation parameter for the first synchronization program is generated according to the first clock signal and the second clock signal synchronized by the second synchronization program for the network device, and a target deviation parameter of the first synchronization program is obtained, wherein the clock synchronization accuracy of the first synchronization program is higher than the clock synchronization accuracy of the second synchronization program, and the target deviation parameter is used to indicate the influence relationship of the clock signal synchronization method currently adopted by the first synchronization program to synchronize the clock signal of the network device on the clock signal deviation amount;

[0041] Step S206 : Compensate the first clock signal according to the clock compensation parameter and the target deviation parameter to obtain a target clock signal, wherein the network device is configured to execute the service to be run using the target clock signal.

[0042] Through the above steps, two synchronization programs with different synchronization accuracies are set to synchronize the clock signal of the network device, wherein the program with higher clock synchronization accuracy is used as the first synchronization program, and the program with lower clock synchronization accuracy is used as the second synchronization program. First, the program running status of the first synchronization program is detected. When the program running status of the first synchronization program indicates that there is a clock signal deviation in the first clock signal synchronized by the first synchronization program for the network device, a clock compensation parameter for the first synchronization program is generated based on the first clock signal and the second clock signal synchronized by the second synchronization program for the network device, and a target deviation parameter is obtained for the first synchronization program, which indicates the relationship between the clock signal synchronization method currently used by the first synchronization program to synchronize the clock signal of the network device and the amount of clock signal deviation. Then, the first clock signal is compensated according to the clock compensation parameter and the target deviation parameter to obtain the target clock signal, thereby ensuring the accuracy of the clock signal synchronized for the network device, and the network device can use the target clock signal with higher accuracy to execute the service to be run. Therefore, the technical problem of low time synchronization efficiency of network devices in the related art can be solved, and the technical effect of improving the time synchronization efficiency of network devices can be achieved.

[0043] In the embodiment provided in step S202 , the first synchronization program is a clock synchronization program with a clock synchronization accuracy higher than a set threshold. The first synchronization program may be PTP (Precision Time Protocol).

[0044] Optionally, in an embodiment of the present application, detecting the program running status of the first synchronization program is used to monitor in real time the accuracy and stability of the clock signal synchronization performed by the first synchronization program. Detecting the program running status of the first synchronization program is achieved by: continuously collecting the running data of the first synchronization program, the running data including peer delay (PeerDelay) and clock offset, the peer delay being used to indicate the one-way average delay of the round-trip transmission signal between the master clock and the slave clock of the first synchronization program, and the clock offset being used to indicate the time deviation value between the master clock and the slave clock of the first synchronization program; setting a peer delay threshold and a clock offset threshold for the first synchronization program; and determining that the first clock signal synchronized by the first synchronization program for the network device has a clock signal deviation when the peer delay of the first synchronization program is greater than the peer delay threshold, or when the clock offset is greater than the clock offset threshold.

[0045] In the embodiment provided in step S204, the second synchronization program is a clock synchronization program with a clock synchronization accuracy lower than a set threshold. The second synchronization program can be NTP (Network Time Protocol). This application uses the first synchronization program with higher clock synchronization accuracy (such as PTP protocol) as the main synchronization program, and the second synchronization program with lower clock synchronization accuracy (such as NTP protocol) as the auxiliary synchronization program, forming a dual-mode time synchronization architecture. Under normal working conditions, PTP can provide sub-microsecond high-precision time synchronization due to its hardware support characteristics. When PTP performance is insufficient or unavailable, NTP serves as a backup to ensure network device time synchronization, ensuring the continuity and accuracy of clock signal synchronization. Therefore, when PTP performance degrades due to network fluctuations, hardware failures, etc., it can also maintain high-precision time synchronization through NTP dynamic compensation, thereby ensuring stable operation and business continuity of network devices.

[0046] Optionally, in an embodiment of the present application, the clock compensation parameter is used to indicate the amount of clock compensation required for the first clock signal currently synchronized by the first synchronization program, given the clock synchronization accuracy of the second synchronization program. The clock compensation parameter may be, but is not limited to, the time difference between the first clock signal and the second clock signal.

[0047] Optionally, in an embodiment of the present application, when synchronizing the clock signal, the first synchronization program uses different clock signal synchronization methods, which will have different degrees of impact on the deviation of the synchronized clock signal, and thus the target deviation parameter will affect the compensation amount for the first clock signal. The target deviation parameter is used to quantify the degree of influence of the clock signal synchronization method currently used by the first synchronization program on the clock signal deviation. The clock signal deviation of the first clock signal may be caused by a variety of factors. The influencing factors that affect the clock signal deviation are obtained. The influencing factors may include but are not limited to network delay, clock offset, node temperature, CPU utilization, etc. The causal relationship between the above-mentioned influencing factors and the clock signal deviation is evaluated using a causal inference method (such as Granger causality analysis). For each influencing factor, a time series model is constructed to predict future clock signal deviations. The Granger causality test method is used to test whether each influencing factor is predictive of the clock signal deviation. For each influencing factor, if its causal relationship with the clock signal deviation is significant, its causal strength is calculated based on the contribution of the factor in the deviation prediction. The target deviation parameter includes the causal strength.

[0048] In the embodiment provided in step S206, compensating the first clock signal according to the clock compensation parameter and the target deviation parameter can be performed by converting the target deviation parameter into a weight parameter, multiplying the weight parameter by the initial clock compensation amount indicated by the clock compensation parameter to obtain the target clock compensation amount, and using the target clock compensation amount to compensate the first clock signal to obtain the target clock signal. Then, the network device can use the compensated target clock signal to update and synchronize the internal clock to ensure that the time base of all service modules is consistent.

[0049] As an optional implementation manner, compensating the first clock signal according to the clock compensation parameter and the target deviation parameter to obtain the target clock signal includes:

[0050] Converting the target deviation parameter into a weight parameter of an initial clock compensation amount, wherein the clock compensation parameter includes the initial clock compensation amount, and the initial clock compensation amount is used to indicate the difference between the first clock signal and the second clock signal;

[0051] Use the weight parameter to perform weighted calculation on the initial clock compensation amount to obtain the target clock compensation amount;

[0052] The first clock signal is compensated using the target clock compensation amount to obtain a target clock signal.

[0053] Optionally, in an embodiment of the present application, the initial clock compensation amount is an original compensation requirement calculated based on the deviation between the currently measured first and second clock signals, and is used to indicate the time difference between the first and second clock signals. The weight parameter is converted from the target deviation parameter and is used to reflect the initial clock compensation requirement of the clock signal synchronized by the first synchronization program using the current synchronization method.

[0054] Optionally, in an embodiment of the present application, the target deviation parameter is obtained by performing a causal analysis between the clock signal synchronization mode of the first synchronization program under the influence of external factors and the clock signal deviation amount of the first synchronization program synchronization, and is used to indicate the contribution of the clock signal synchronization mode of the first synchronization program under the influence of external factors to the clock signal deviation of the first synchronization program synchronization. In this embodiment, this contribution is first converted into a weight parameter W using the formula:

[0055] ;

[0056] Here, C is the target deviation parameter, and C0 is the preset threshold, which balances the low precision of NTP with the high precision of PTP. The final target clock offset is calculated by adding the weight parameter to the initial clock offset. This process ensures that the offset reflects the current deviation while dynamically adjusting the compensation weight based on the significance of external factors, thereby achieving more accurate time synchronization. After the target clock offset is determined, the first clock signal is accurately compensated to correct the deviation from the second clock signal.

[0057] Optionally, in this embodiment of the present application, assuming that the system detects a clock signal deviation between the first clock signal and the second clock signal, and the calculated target deviation parameter C = 0.2, and the preset threshold C0 = 0.1, the weight parameter W is calculated as follows:

[0058] = ;

[0059] This means that in the current situation, the compensation effect of the second clock signal accounts for about 67%. Assuming that the initial clock compensation amount is 10μs, the target clock compensation amount after weighted calculation is: initial clock compensation amount × weight parameter = 10μs × 0.67 = 6.7μs. The system then uses 6.7μs as the target clock compensation amount to compensate for the first clock signal.

[0060] Through the above method, not only can the deviation of the first clock signal be effectively corrected, but also through intelligent weight adjustment, it is ensured that the system can respond quickly and accurately when facing external factors, thereby enhancing the overall time synchronization performance and stability.

[0061] As an optional implementation, the weight parameter is calculated using the following formula:

[0062] ;

[0063] Among them, W is the weight parameter, C is the target deviation parameter, and C0 is the preset threshold.

[0064] Optionally, in an embodiment of the present application, by introducing W, C, and C0, the system has the ability to dynamically balance the time synchronization between the first synchronization program and the second synchronization program. When external factors cause the deviation of the first clock signal to increase, the value of C will also increase, thereby driving the value of W to rise. The system will increase the compensatory effect of the second clock signal, and vice versa. This dynamic balancing mechanism enables the system to respond more flexibly to changing network environments and hardware conditions, improving overall adaptability and robustness.

[0065] As an optional implementation manner, obtaining the target deviation parameter of the first synchronization program includes:

[0066] Obtaining reference running information of the first synchronization program at each of a plurality of reference moments before the current moment and a reference deviation of a clock signal synchronized by the first synchronization program at the corresponding reference moment, wherein the reference running information is used to indicate a clock signal synchronization mode when the first synchronization program synchronizes a clock signal for a network device at the reference moment;

[0067] The target deviation parameter is generated based on the reference travel information and the reference deviation amount.

[0068] Optionally, in an embodiment of the present application, the reference operation information is used to indicate the factors that cause deviations in the first clock signal. The reference operation information may include but is not limited to node temperature, network round-trip time, CPU utilization, etc. The reference deviation is used to indicate the clock signal deviation generated by the first synchronization program running in the clock signal synchronization mode indicated by the reference operation information, and then generate the target deviation parameter based on the reference operation information and the reference deviation.

[0069] As an optional implementation, generating a target deviation parameter according to the reference operating information and the reference deviation includes:

[0070] In a case where the reference operating information includes sub-operating information of multiple information types, generating an initial deviation parameter corresponding to the sub-operating information of the current information type based on the sub-operating information of multiple reference moments of the same information type and the reference deviations of the multiple reference moments, wherein the sub-operating information of the multiple information types is used to characterize a clock signal synchronization method when the first synchronization program synchronizes clock signals for network devices in multiple information dimensions;

[0071] The initial deviation parameters of sub-run information of multiple information types are merged into the target deviation parameters.

[0072] Optionally, in an embodiment of the present application, sub-operation information of multiple information types is used to indicate factors affecting the deviation of the first clock signal in different dimensions. The sub-operation information may include, but is not limited to, clock deviation values ​​(the difference between the actual value and the ideal value at a historical moment), network parameters (such as network round-trip time), hardware status (such as DMA latency, CPU utilization), environmental indicators (such as node temperature), etc. The method for merging the initial deviation parameters of the sub-operation information of multiple information types to obtain the target deviation parameter may be, but is not limited to, summing the initial deviation parameters of the sub-operation information of multiple information types to obtain the target deviation parameter, or may also be performed by weighted summing the multiple initial deviation parameters using the information weights of the sub-operation information of multiple information types to obtain the target deviation parameter, wherein the information weight is used to indicate the influence of the sub-operation information of the corresponding information type on the deviation amount of the clock signal output by the first synchronization program. The method for determining the information weight may be, but is not limited to, obtaining the information deviation between the sub-operation information of each information type and the information threshold corresponding to the information type, and allocating the information weight of the sub-operation information of the corresponding information type according to the information deviation of the sub-operation information of multiple information types, wherein the information weight of the sub-operation information of the information type with a larger information deviation is greater, and the information is used to indicate the normal information threshold of the operation information of the corresponding information type.

[0073] The target deviation parameters generated in this way integrate multiple influencing factors and can guide the system to make more intelligent compensation decisions. Regardless of hardware failure, network fluctuations, or environmental changes, the system can automatically adjust the compensation amount and compensation method based on the latest operating status to ensure high-precision and high-stability time synchronization.

[0074] As an optional implementation, the initial deviation parameter corresponding to the sub-operation information of the current information type is calculated using the following formula:

[0075] ;

[0076] in, It is the initial deviation parameter corresponding to the sub-operation information of the current information type. is the reference deviation at time t, is the reference deviation at time ti, is the first coefficient, is the second coefficient, is the third coefficient, It is the sub-run information of the current information type at time tj.

[0077] Optionally, in the embodiment of the present application, is the expected clock deviation, is the autoregressive coefficient, which is used to measure the deviation at time t Affected by past deviations The degree of influence reflects the autocorrelation of the deviation over time, that is, the ability of the historical trend of the deviation to predict the current deviation. is a random error term, which reflects the uncertainty factor in the prediction deviation.

[0078] Optionally, in this embodiment of the present application, a dynamic model is constructed to predict the clock deviation of the current information type. This model not only considers the influence coefficient and autoregressive component of past deviation values ​​on the current deviation, but also considers the predictive effect of historical data on external factors (such as node temperature, network round-trip time, CPU utilization, etc.) on clock deviation. This enables the system to more accurately predict future deviation trends based on past performance and dynamic changes in the current environment, thereby providing a more detailed and quantitative basis for decision-making in the dynamic time synchronization system (such as when to trigger protocol switching and how to adjust compensation strategies).

[0079] As an optional implementation, initial deviation parameters of sub-operation information of multiple information types are combined into target deviation parameters, including:

[0080] The target deviation parameter is obtained by summing up multiple initial deviation parameters.

[0081] Optionally, in an embodiment of the present application, multiple initial deviation parameters can be directly added and calculated to obtain a target deviation parameter, or multiple initial deviation parameters can be weighted and summed according to their importance. For example, different weights are set according to the degree of change of the sub-operation information, and the change rate over a period of time is calculated for each sub-operation information, such as the change rate of network delay, the fluctuation range of CPU occupancy, etc.; weight parameters are assigned from large to small to multiple sub-operation information in order of their change rates from high to low, wherein the sum of the weight parameters of multiple sub-operation information is 1; the initial deviation parameter corresponding to each sub-operation information and its corresponding weight parameter are weighted and summed to obtain the final target deviation parameter.

[0082] As an optional implementation manner, generating a clock compensation parameter for the first synchronization program according to the first clock signal and the second clock signal synchronized by the second synchronization program for the network device includes:

[0083] Calculating a difference between the first clock signal and the second clock signal to obtain a target clock difference;

[0084] The target clock difference is determined as an initial clock compensation amount for the clock signal synchronized by the first synchronization procedure, wherein the clock compensation parameter includes the initial clock compensation amount.

[0085] Optionally, in an embodiment of the present application, since the clock synchronization accuracy between the first synchronization program and the second synchronization program is different, there is a time difference between the first clock signal and the second clock signal. For example, at a certain moment, the time displayed by the first clock signal is 10:00:00.00001 seconds, and the time displayed by the second clock signal is 10:00:00.0001 seconds, that is, the clock signal synchronization accuracy of the first synchronization program is higher than the synchronization accuracy of the second synchronization program, resulting in a difference of 0.00009 seconds between the first clock signal and the second clock signal, and these 0.00009 seconds are determined as the initial clock compensation amount.

[0086] As an optional implementation manner, detecting the program running status of the first synchronization program includes:

[0087] detecting a current peer delay of the first synchronization program and detecting a clock offset;

[0088] When the peer delay is greater than or equal to the first threshold and the clock offset is greater than or equal to the second threshold, it is determined that the first clock signal synchronized by the first synchronization program for the network device has a clock signal deviation.

[0089] Optionally, in this embodiment of the present application, the peer delay is used to indicate the average one-way delay of the signal transmitted back and forth between the master clock and the slave clock of the first synchronization program, and the clock offset is used to indicate the time deviation between the master clock and the slave clock of the first synchronization program. The timestamp is obtained by the following message exchange to calculate the peer delay and clock offset:

[0090] 1. Message exchange and timestamp mechanism:

[0091] Sync: The master clock (Master) sends a synchronization message and records the sending time t1 (master clock time).

[0092] Follow_Up (optional): If the master clock does not support embedding timestamps in Sync messages, t1 is transmitted through the Follow_Up message.

[0093] Delay_Req: After receiving the Sync signal, the slave clock (Slave) sends a delay request message and records the sending time t3 (slave clock time).

[0094] Delay_Resp: The master clock replies with a Delay_Resp message, which carries the reception time t4 (master clock time).

[0095] 2. Derivation of the calculation formula for peer delay time:

[0096] 1. Delay from master to slave ( ):

[0097] ;

[0098] t1: The time when the master clock sends Sync.

[0099] t2: The time when the slave clock receives Sync (the local time of the slave clock, which needs to be corrected for offset and converted to the time aligned with the master clock).

[0100] 2. Delay from slave to master direction ( ):

[0101] ;

[0102] t3: The time when the slave clock sends Delay_Req.

[0103] t4: The time when the master clock receives Delay_Req.

[0104] 3. Assuming the network is symmetric (two-way delay is equal), the peer delay is:

[0105] ;

[0106] Implementation steps:

[0107] 1. The slave clock records the times t2 and t3, and the master clock records the times t1 and t4;

[0108] 2. The master clock passes t1 and t4 to the slave clock through Follow_Up and Delay_Resp;

[0109] 3. The slave clock calculates the peer delay D according to the formula.

[0110] 3. Clock offset calculation:

[0111] Derivation of the clock offset calculation formula:

[0112] 1. Define time relationships:

[0113] Master clock time ;

[0114] Slave clock time ;

[0115] 2. According to the timestamp of Sync message transmission (assuming the delay from master to slave is ):

[0116] ;

[0117] 3. Combined with the timestamp of the Delay_Req message (delay from slave to master direction ):

[0118] ;

[0119] 4. Solve the simultaneous equations to get Offset: .

[0120] Implementation steps:

[0121] 1. The slave clock receives t1 and t4 of the master clock;

[0122] 2. Use the locally recorded times t2 and t3 to enter the formula to calculate the offset;

[0123] 3. If Offset is a positive value, it means the master clock is slower than the slave clock; a negative value means the slave clock is faster.

[0124] 4. Implementation of the dynamic monitoring stage:

[0125] In a dynamic switching system, peer delay and clock offset need to be continuously calculated and compared with thresholds to trigger switching. The monitoring process is as follows:

[0126] 1. Periodic message exchange:

[0127] (1) The master and slave clocks exchange Sync, Delay_Req and other messages at fixed intervals (e.g., once per second);

[0128] (2) Collect timestamps t1, t2, t3, and t4.

[0129] 2. Real-time calculation:

[0130] (1) Update the peer delay D and clock offset Offset after each message exchange;

[0131] (2) Use a sliding window (such as the last 10 calculations) to smooth the data and reduce the impact of instantaneous jitter.

[0132] 3. Threshold judgment:

[0133] (1) Peer delay threshold (e.g., D>1ms): network congestion or hardware anomaly;

[0134] (2) Clock offset threshold (e.g. |Offset|>10μs): The clock cumulative error exceeds the limit;

[0135] (3) If any indicator exceeds the threshold, the switch evaluation is triggered.

[0136] As an optional implementation manner, after detecting the program running status of the first synchronization program, the method further includes:

[0137] When the program running status indicates that the first synchronization program is in a faulty state, the clock signal synchronization relationship between the first synchronization program and the network device is released, and a clock signal synchronization relationship between the second synchronization program and the network device is established, wherein the network device is used to execute the service to be run through the clock signal synchronized by the second synchronization program.

[0138] Optionally, in an embodiment of the present application, when the first synchronization program is in a faulty state, program switching is performed through the following steps: S1: Immediately freeze the update mechanism of the first synchronization program to prevent erroneous time information from further affecting system operation; S2: Send a notification to the system resource manager to request the release of the SR-IOV virtual function (VF) and other related resources allocated to the first synchronization program to prepare conditions for the startup of the second synchronization program; S3: Start the second synchronization program to ensure that it can normally receive and process time synchronization requests; S4: The client performs a protocol handshake with the second synchronization program to establish a synchronization relationship for the second synchronization program; S5: Obtain the difference between the first clock signal of the current first synchronization program and the second clock signal of the second synchronization program as the initial reference value for clock signal deviation compensation; S6: Apply a time deviation compensation algorithm to ensure that when switching from the first synchronization program to the second synchronization program, the clock signal of the network device can transition smoothly, avoiding service interruption or data inconsistency caused by protocol switching; S6: Update the system status to indicate that the second synchronization program is currently used as the time synchronization source, and record the switching event and reason for subsequent analysis and optimization reference.

[0139] In this way, the dynamic switching mechanism ensures that even if the first synchronization program fails, the system can maintain basic time synchronization functions through the backup time synchronization solution (second synchronization program), thereby enhancing the overall robustness and continuous operation capability of the system.

[0140] As an optional implementation manner, after releasing the clock signal synchronization relationship between the first synchronization program and the network device and establishing the clock signal synchronization relationship between the second synchronization program and the network device, the method further includes:

[0141] Performing a fault maintenance operation on the first synchronization program to obtain a third synchronization program;

[0142] detecting a target operating state of a third synchronization program;

[0143] When the target running state is used to indicate that there is no clock signal deviation in the clock signal synchronized by the third synchronization program for the network device, the clock signal synchronization relationship of the second synchronization program to the network device is released, and the clock signal synchronization relationship of the third synchronization program to the network device is established, wherein the network device is used to execute the business to be run through the clock signal synchronized by the third synchronization program.

[0144] Optionally, in an embodiment of the present application, after a failure occurs in the first synchronization program and the system switches to the second synchronization program, a fault maintenance operation will be immediately performed on the first synchronization program to ensure that the network device can always use the optimal clock signal to execute the pending business. After switching to the second synchronization program, the system should immediately start the fault diagnosis process to analyze the specific cause of the failure of the first synchronization program, such as hardware failure, software bug, network anomaly, etc., and then perform corresponding repair measures based on the fault diagnosis results, such as replacing the faulty hardware, upgrading the software version, or optimizing the network configuration.

[0145] Optionally, in an embodiment of the present application, the third synchronization program may be the repaired first synchronization program, or may be another clock synchronization program with higher clock accuracy, which is not limited in this solution.

[0146] Optionally, in an embodiment of the present application, after starting the third synchronization program, real-time status monitoring is performed on it, which may include but is not limited to parameters such as peer delay, clock offset, hardware resource status, etc., to evaluate its operating effect; only when the target operating status of the third synchronization program shows that it can provide an unbiased clock signal and is significantly better than the second synchronization program in terms of synchronization accuracy and stability, will the switch from the second synchronization program to the third synchronization program be triggered; the system will release the clock signal synchronization relationship of the second synchronization program to the network device, release the resources occupied by the second synchronization program, and then construct the clock signal synchronization relationship of the third synchronization program to the network device to ensure the continuity of the time signal and uninterrupted service in this process.

[0147] Through the above method, the system can not only quickly respond to and overcome synchronization program failures, but also automatically find and implement the optimal clock synchronization solution after recovery, significantly improving the overall performance and reliability of the time synchronization system. For business environments that rely on high-precision time synchronization, this is of great significance and has obvious implementation effects.

[0148] As an optional implementation manner, before detecting the program running status of the first synchronization program, the method further includes:

[0149] Obtaining the amount of running resources required when the first synchronization program is running;

[0150] Allocating a target running area for the first synchronization program from the target network card according to the amount of running resources, wherein the target network card is used to provide the running resources required for the clock synchronization program to run;

[0151] The first synchronization program is deployed in the target operation area, and an association relationship between the target operation area and the network device is established.

[0152] Optionally, in an embodiment of the present application, before detecting the program running status of the first synchronization program, it is necessary to predetermine the amount of running resources required for the first synchronization program to run, such as the number of CPU cores, memory size, dedicated network interface, etc.; based on the determined resource requirements, select a target network card that can meet the running conditions of the first synchronization program, and through SR-IOV technology, divide enough virtual functions (VFs) from the target network card as a target running area, dedicated to the operation of the PTP protocol to avoid resource conflicts with other applications; deploy the first synchronization program to the previously allocated target running area to ensure that it can directly use the hardware resources in the area for timestamp capture and data transmission; the system manager establishes an association relationship between the target running area and the network device, so that the network device can access the first synchronization program through the VF in this area to achieve high-precision time synchronization.

[0153] Through this approach, the system ensures stable operation of the primary synchronization process with sufficient hardware resources, significantly reducing network latency and time drift, and enhancing the accuracy and reliability of overall time synchronization. Furthermore, through the clear division of resources, the deployment process is simplified, facilitating subsequent maintenance and switching operations, and improving the performance and time accuracy of network equipment when executing critical tasks.

[0154] As an optional implementation, the present application also provides a PTP / NTP dynamic switching high-precision time synchronization system and method, including:

[0155] 1. Dynamic switching engine: monitors network latency, hardware status, and user policies in real time to trigger protocol switching;

[0156] 2.SR-IOV hardware acceleration: Provides exclusive virtual functions (VFs) for PTP to isolate clock traffic;

[0157] 3. Seamless transition algorithm: Maintain clock continuity through time deviation compensation during switching;

[0158] 4. Hybrid timing architecture: supports PTP and NTP collaboration, with configurable priority.

[0159] 1. Example 1: System initialization and hardware configuration:

[0160] 1. SR-IOV network card virtualization:

[0161] The physical function (PF) is divided into multiple VFs, of which at least one VF is dedicated to PTP traffic;

[0162] Bind VF to PTP master clock service through PCIe Passthrough technology;

[0163] Enable the hardware timestamp function, with precision calibrated to nanosecond level.

[0164] 2. Dual-stack deployment:

[0165] The PTP service runs on the SR-IOV VF, and the NTP service is bound to the normal network card port;

[0166] The client is pre-loaded with the PTP / NTP dual protocol stack, with PTP as the high priority by default.

[0167] 2. Example 2: Dynamic switching process:

[0168] 1. Monitoring phase:

[0169] Continuously collect SR-IOV network card status (such as DMA latency and packet loss rate);

[0170] Calculate the peer delay and clock offset of the PTP path.

[0171] If the PTP path delay is greater than 1ms or the clock offset is greater than 10μs, a switchover evaluation is triggered.

[0172] 2. Switching decision:

[0173] If the SR-IOV network card fails, immediately switch to NTP;

[0174] If network fluctuations cause PTP performance to degrade, enable the "PTP+NTP" hybrid mode to use NTP to compensate for long-term deviations.

[0175] Users can force a specific protocol through the API.

[0176] 3. Seamless switching execution:

[0177] Step 1: Freeze the PTP clock update and record the current PTP time T p ;

[0178] Step 2: Get time T from NTP server n , calculate the deviation ΔT=T p -T n ;

[0179] Step 3: The client clock uses ΔT as the initial offset and gradually converges to the NTP time.

[0180] Step 4: Release the SR-IOV VF resources for reuse by other VMs.

[0181] 3. Example 3: Hybrid Timing Mode:

[0182] Master-slave collaboration: PTP is responsible for high-frequency synchronization (1000 times per second), and NTP corrects the accumulated error every 60 seconds;

[0183] Failure fallback: When PTP is interrupted for more than 5 seconds, the client automatically locks NTP as the only source.

[0184] The key technical points of this solution are:

[0185] 1. Hardware virtualization and resource isolation of SR-IOV network cards:

[0186] The physical function (PF) of the SR-IOV network card is divided into multiple virtual functions (VFs), at least one of which is dedicated to the PTP protocol and bound to the PTP master clock service through PCIe passthrough technology to achieve hardware timestamp and traffic isolation, ensuring PTP synchronization accuracy of ±100 nanoseconds.

[0187] The VF's DMA channel and interrupt mechanism are independently configured to avoid resource competition with other virtual machines or applications; the hardware timestamp is generated directly in the network card chip, bypassing the operating system protocol stack delay.

[0188] 2. Dynamically switch decision engines:

[0189] Triggering protocol switching based on multi-dimensional conditions:

[0190] Hardware status: SR-IOV network card DMA latency > 500 μs, packet loss rate > 1%;

[0191] Network performance: PTP path delay > 1ms or clock offset > 10μs;

[0192] User policy: Manually specify protocol priority or switching timing.

[0193] Algorithm implementation: A sliding window algorithm is used to collect statistics on historical network indicators, and a Bayesian decision model is used to evaluate switching risks.

[0194] 3. Seamless time transition and deviation compensation:

[0195] During the switch, time continuity is maintained by performing the following steps:

[0196] Freeze the PTP clock and record the current time T p ;

[0197] Get NTP time T n , calculate the deviation ΔT=T p -T n ;

[0198] The client uses ΔT as the initial offset and gradually converges to the NTP time through the PID controller (convergence time < 500ms).

[0199] 4. Hybrid timing mode of PTP and NTP:

[0200] Collaboration mechanism: PTP is responsible for high-frequency synchronization (1kHz), and NTP corrects the accumulated error every 60 seconds;

[0201] Failure fallback: If PTP is interrupted for more than 5 seconds, the client automatically switches to NTP exclusive mode.

[0202] The core inventions of this solution include the following aspects:

[0203] (1) A PTP / NTP dynamic switching time synchronization system based on an SR-IOV network card, comprising:

[0204] A network card that supports SR-IOV virtualization and has at least one virtual function (VF) configured specifically for PTP protocol transmission;

[0205] Protocol control module, used to run PTP master clock service, NTP service and switching decision logic;

[0206] The client device has a built-in PTP / NTP dual protocol stack and can receive switching instructions and switch clock sources.

[0207] (2) The triggering conditions for switching decision logic include:

[0208] The DMA latency of the SR-IOV network card exceeds the preset threshold;

[0209] The clock skew of the PTP path exceeds 10 microseconds;

[0210] The user issues a forced switching command through the API or management interface.

[0211] (3) The virtual function (VF) resource allocation method of the SR-IOV network card includes:

[0212] When PTP is activated, VF is used exclusively for timestamp generation and PTP message transmission;

[0213] After switching to NTP, VF resources are released and reallocated to other virtual machines or applications.

[0214] The seamless time transition method of the aforementioned system includes:

[0215] Calculate the time deviation ΔT between PTP and NTP;

[0216] The client uses the PID control algorithm to smoothly migrate the local clock from PTP time to NTP time.

[0217] (4) A PTP / NTP dynamic switching time synchronization method, comprising the following steps:

[0218] Initialize the SR-IOV network card, allocate a dedicated VF for PTP and enable hardware timestamps;

[0219] Real-time monitoring of network latency, clock offset, and hardware health status;

[0220] When the switching conditions are met, the current protocol clock is frozen and deviation compensation is started;

[0221] After completing the protocol handshake, switch to the target protocol and release or apply for hardware resources.

[0222] Figure 3 This is a system architecture diagram of a PTP / NTP dynamic switching time synchronization system based on an SR-IOV network card according to an embodiment of the present application, such as Figure 3 As shown, the system includes:

[0223] SR-IOV network card: allocates a dedicated VF for PTP to achieve hardware timestamp and traffic isolation;

[0224] Protocol control layer: includes PTP master clock, NTP server and switching decision module;

[0225] Monitoring module: collects network jitter, clock offset and hardware health status;

[0226] Client: Supports dual protocol stacks, receives synchronization commands and switches clock sources, including PTP high-precision network and PTP backup clocks and NTP clients.

[0227] Figure 4 This is a flow chart of a protocol switching trigger condition according to an embodiment of the present application. Figure 4 As shown, the trigger conditions include: SR-IOV network card failure, network delay exceeding the threshold, and user manual switching; Figure 5 This is a flow chart of a protocol switching process according to an embodiment of the present application. Figure 5 As shown in FIG, the switching process includes three stages: clock deviation calculation, resource release / application, and protocol handshake.

[0228] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method.

[0229] The embodiment of the present application further provides a clock signal compensation device, Figure 6 is a structural block diagram of a clock signal compensation device according to an embodiment of the present application, such as Figure 6As shown, the device includes:

[0230] A first detection module 602 is used to detect the program running status of the first synchronization program;

[0231] A generation module 604 is configured to generate a clock compensation parameter for the first synchronization program based on the first clock signal and the second clock signal synchronized by the second synchronization program for the network device, and obtain a target deviation parameter for the first synchronization program, when the program running state indicates that a clock signal deviation exists in the first clock signal synchronized by the first synchronization program for the network device, wherein the clock synchronization accuracy of the first synchronization program is higher than the clock synchronization accuracy of the second synchronization program, and the target deviation parameter is configured to indicate the influence of the clock signal synchronization method currently adopted by the first synchronization program for synchronizing the clock signal of the network device on the clock signal deviation;

[0232] The compensation module 606 is configured to compensate the first clock signal according to the clock compensation parameter and the target deviation parameter to obtain a target clock signal, wherein the network device is configured to use the target clock signal to execute the service to be run.

[0233] The above device synchronizes the clock signal of a network device by setting two synchronization programs with different synchronization accuracies, wherein the program with higher clock synchronization accuracy is used as the first synchronization program, and the program with lower clock synchronization accuracy is used as the second synchronization program. The program running status of the first synchronization program is first detected. When the program running status of the first synchronization program indicates that there is a clock signal deviation in the first clock signal synchronized by the first synchronization program for the network device, a clock compensation parameter for the first synchronization program is generated based on the first clock signal and the second clock signal synchronized by the second synchronization program for the network device, and a target deviation parameter is obtained for the first synchronization program, which indicates the relationship between the clock signal synchronization method currently used by the first synchronization program to synchronize the clock signal of the network device and the amount of clock signal deviation. The first clock signal is then compensated for according to the clock compensation parameter and the target deviation parameter to obtain a target clock signal, thereby ensuring the accuracy of the clock signal synchronized for the network device. The network device can then use the target clock signal with higher accuracy to execute the service to be run. Therefore, the technical problem of low time synchronization efficiency of network devices in the related art can be solved, and the technical effect of improving the time synchronization efficiency of network devices can be achieved.

[0234] Optional compensation module, including:

[0235] a conversion unit, configured to convert the target deviation parameter into a weight parameter of an initial clock compensation amount, wherein the clock compensation parameter includes the initial clock compensation amount, and the initial clock compensation amount is used to indicate a difference between the first clock signal and the second clock signal;

[0236] A first calculation unit is configured to perform weighted calculation on the initial clock compensation amount using a weight parameter to obtain a target clock compensation amount;

[0237] The compensation unit is configured to compensate the first clock signal using a target clock compensation amount to obtain a target clock signal.

[0238] Optionally, the conversion unit is also used to:

[0239] The weight parameter is calculated by the following formula:

[0240] ;

[0241] Among them, W is the weight parameter, C is the target deviation parameter, and C0 is the preset threshold.

[0242] Optionally, generate modules, including:

[0243] an acquiring unit, configured to acquire reference running information of the first synchronization program at each of a plurality of reference moments before a current moment and a reference deviation of a clock signal synchronized by the first synchronization program at the corresponding reference moment, wherein the reference running information is used to indicate a clock signal synchronization mode when the first synchronization program synchronizes a clock signal of a network device at the reference moment;

[0244] The generating unit is used to generate a target deviation parameter according to the reference running information and the reference deviation amount.

[0245] Optionally, the generation unit is also used to:

[0246] In a case where the reference operating information includes sub-operating information of multiple information types, generating an initial deviation parameter corresponding to the sub-operating information of the current information type based on the sub-operating information of multiple reference moments of the same information type and the reference deviations of the multiple reference moments, wherein the sub-operating information of the multiple information types is used to characterize a clock signal synchronization method when the first synchronization program synchronizes clock signals for network devices in multiple information dimensions;

[0247] The initial deviation parameters of sub-run information of multiple information types are merged into the target deviation parameters.

[0248] Optionally, the generation unit is also used to:

[0249] The initial deviation parameter corresponding to the sub-operation information of the current information type is calculated using the following formula:

[0250] ;

[0251] in, It is the initial deviation parameter corresponding to the sub-operation information of the current information type. is the reference deviation at time t, is the reference deviation at time ti, is the first coefficient, is the second coefficient, is the third coefficient, It is the sub-run information of the current information type at time tj.

[0252] Optionally, the generation unit is also used to:

[0253] The target deviation parameter is obtained by summing up multiple initial deviation parameters.

[0254] Optionally, the generation module also includes:

[0255] a second calculating unit, configured to calculate a difference between the first clock signal and the second clock signal to obtain a target clock difference;

[0256] The first determining unit is configured to determine the target clock difference as an initial clock compensation amount for the clock signal synchronized by the first synchronization procedure, wherein the clock compensation parameter includes the initial clock compensation amount.

[0257] Optionally, the first detection module includes:

[0258] a detection unit, configured to detect a current peer delay of the first synchronization program and a detection clock offset;

[0259] The second determining unit is configured to determine that a first clock signal synchronized by the first synchronization program for the network device has a clock signal deviation when the peer delay is greater than or equal to the first threshold and the clock offset is greater than or equal to the second threshold.

[0260] Optionally, the device further includes:

[0261] The first construction module is used to, after detecting the program running status of the first synchronization program, cancel the clock signal synchronization relationship between the first synchronization program and the network device, and construct the clock signal synchronization relationship between the second synchronization program and the network device when the program running status indicates that the first synchronization program is in a fault state, wherein the network device is used to execute the to-be-run business through the clock signal synchronized by the second synchronization program.

[0262] Optionally, the device further includes:

[0263] an execution module, configured to, after releasing the clock signal synchronization relationship between the first synchronization program and the network device and establishing the clock signal synchronization relationship between the second synchronization program and the network device, perform a fault maintenance operation on the first synchronization program to obtain a third synchronization program;

[0264] A second detection module is used to detect the target running state of the third synchronization program;

[0265] The second construction module is used to release the clock signal synchronization relationship between the second synchronization program and the network device, and to construct the clock signal synchronization relationship between the third synchronization program and the network device when the target operating state is used to indicate that the clock signal synchronized by the third synchronization program for the network device does not have a clock signal deviation, wherein the network device is used to execute the service to be run through the clock signal synchronized by the third synchronization program.

[0266] Optionally, the device further includes:

[0267] An acquisition module, configured to acquire the amount of running resources required when the first synchronization program is running;

[0268] an allocation module, configured to allocate a target operating area for the first synchronization program from a target network card according to an amount of operating resources, wherein the target network card is configured to provide the clock synchronization program with the operating resources required for the operation;

[0269] The third building module is used to deploy the first synchronization program in the target operation area and build an association relationship between the target operation area and the network device.

[0270] For the description of the features in the embodiment corresponding to the clock signal compensation device, reference can be made to the relevant description of the embodiment corresponding to the clock signal compensation method, which will not be repeated here.

[0271] An embodiment of the present application further provides an electronic device, comprising a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any of the above-mentioned clock signal compensation method embodiments.

[0272] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above-mentioned clock signal compensation method embodiments when running.

[0273] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk, or an optical disk.

[0274] An embodiment of the present application further provides a computer program product, which includes a computer program. When the computer program is executed by a processor, the steps in any of the above-mentioned clock signal compensation method embodiments are implemented.

[0275] An embodiment of the present application further provides another computer program product, comprising a non-volatile computer-readable storage medium, wherein the non-volatile computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps in any of the above-mentioned clock signal compensation method embodiments are implemented.

[0276] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the components and steps of each example according to their functions. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0277] The above is a detailed introduction to a clock signal compensation method provided by the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only intended to help understand the method and core ideas of the present application. It should be noted that, for those skilled in the art, without departing from the principles of the present application, several improvements and modifications may be made to the present application, and such improvements and modifications also fall within the scope of protection of the claims of the present application.

Claims

1. A clock signal compensation method, characterized in that: include: detecting a program running status of a first synchronization program; In a case where the program running status is used to indicate that a clock signal deviation exists in a first clock signal synchronized by the first synchronization program for a network device, a clock compensation parameter for the first synchronization program is generated based on the first clock signal and a second clock signal synchronized by the second synchronization program for the network device, and a target deviation parameter of the first synchronization program is obtained, wherein the clock synchronization accuracy of the first synchronization program is higher than the clock synchronization accuracy of the second synchronization program, and the target deviation parameter is used to indicate the influence relationship between the clock signal synchronization method currently adopted by the first synchronization program for synchronizing the clock signal of the network device and the clock signal deviation amount; Compensating the first clock signal according to the clock compensation parameter and the target deviation parameter to obtain a target clock signal, wherein the network device is configured to execute a service to be run using the target clock signal; The compensating the first clock signal according to the clock compensation parameter and the target deviation parameter to obtain a target clock signal includes: converting the target deviation parameter into a weight parameter of an initial clock compensation amount, wherein the clock compensation parameter includes the initial clock compensation amount, and the initial clock compensation amount is used to indicate the difference between the first clock signal and the second clock signal; performing a weighted calculation on the initial clock compensation amount using the weight parameter to obtain a target clock compensation amount; and compensating the first clock signal using the target clock compensation amount to obtain the target clock signal; The obtaining of the target deviation parameter of the first synchronization program includes: obtaining the reference operation information of the first synchronization program at each of the multiple reference moments before the current moment and the reference deviation of the clock signal synchronized by the first synchronization program at the corresponding reference moment, wherein the reference operation information is used to indicate the clock signal synchronization method of the first synchronization program when synchronizing the clock signal of the network device at the reference moment; generating the target deviation parameter according to the reference operation information and the reference deviation.

2. The method according to claim 1, characterized in that The weight parameter is calculated by the following formula: ； Wherein, W is the weight parameter, C is the target deviation parameter, and C0 is the preset threshold.

3. The method according to claim 1, characterized in that Generating the target deviation parameter according to the reference operating information and the reference deviation includes: In a case where the reference operation information includes sub-operation information of multiple information types, an initial deviation parameter corresponding to the sub-operation information of the current information type is generated according to the sub-operation information of multiple reference moments of the same information type and the reference deviation amounts of the multiple reference moments, wherein the sub-operation information of multiple information types is used to characterize a clock signal synchronization method when the first synchronization program synchronizes the clock signal of the network device in multiple information dimensions; The initial deviation parameters of the sub-operation information of multiple information types are combined into the target deviation parameter.

4. The method according to claim 3, characterized in that The initial deviation parameter corresponding to the sub-operation information of the current information type is calculated by the following formula: ； in, is the initial deviation parameter corresponding to the sub-operation information of the current information type, is the reference deviation at time t, is the reference deviation at time ti, is the first coefficient, is the second coefficient, is the third coefficient, which is the sub-run information of the current information type at time tj.

5. The method according to claim 3, characterized in that The step of merging the initial deviation parameters of the sub-operation information of multiple information types into the target deviation parameter includes: The target deviation parameter is obtained by summing up the multiple initial deviation parameters.

6. The method according to claim 1, characterized in that Generating a clock compensation parameter for the first synchronization program according to the first clock signal and the second synchronization program for synchronizing the network device with the second clock signal includes: Calculating a difference between the first clock signal and the second clock signal to obtain a target clock difference; The target clock difference is determined as an initial clock compensation amount for a clock signal synchronized by the first synchronization procedure, wherein the clock compensation parameter includes the initial clock compensation amount.

7. The method according to claim 1, characterized in that The detecting the program running status of the first synchronization program includes: detecting a current peer delay and a clock offset of the first synchronization program; When the peer delay is greater than or equal to a first threshold and the clock offset is greater than or equal to a second threshold, it is determined that a first clock signal synchronized by the first synchronization program for the network device has a clock signal deviation.

8. The method according to claim 1, characterized in that After detecting the program running status of the first synchronization program, the method further includes: When the program running status indicates that the first synchronization program is in a faulty state, the clock signal synchronization relationship between the first synchronization program and the network device is released, and the clock signal synchronization relationship between the second synchronization program and the network device is established, wherein the network device is used to execute the to-be-run business through the clock signal synchronized by the second synchronization program.

9. The method according to claim 8, characterized in that After canceling the clock signal synchronization relationship between the first synchronization program and the network device and establishing the clock signal synchronization relationship between the second synchronization program and the network device, the method further includes: performing a fault maintenance operation on the first synchronization program to obtain a third synchronization program; detecting a target running state of the third synchronization program; When the target operating state is used to indicate that there is no clock signal deviation in the clock signal synchronized by the third synchronization program for the network device, the clock signal synchronization relationship of the second synchronization program to the network device is released, and the clock signal synchronization relationship of the third synchronization program to the network device is established, wherein the network device is used to execute the to-be-run business through the clock signal synchronized by the third synchronization program.

10. The method according to claim 9, characterized in that Before detecting the program running status of the first synchronization program, the method further includes: Obtaining the amount of running resources required when the first synchronization program is running; Allocating a target running area for the first synchronization program from a target network card according to the running resource amount, wherein the target network card is used to provide the running resources required for the clock synchronization program to run; The first synchronization program is deployed in the target operation area, and an association relationship between the target operation area and the network device is established.

11. An electronic device, characterized in that: include: Memory for storing computer programs; A processor, configured to implement the steps of the clock signal compensation method according to any one of claims 1 to 10 when executing the computer program.

12. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, wherein when the computer program is executed by a processor, the steps of the clock signal compensation method according to any one of claims 1 to 10 are implemented.

13. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the clock signal compensation method according to any one of claims 1 to 10 are implemented.

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