Event-driven infrared detector and detection method

Abstract

The invention discloses an event-driven infrared detector and a detection method, and mainly solves the problems of high power consumption and high delay of an infrared detector in the prior art. The device comprises an infrared focal plane array and an event reading circuit, the event reading circuit comprises a pixel array circuit, an AER protocol event driving circuit and an output circuit, and the pixel array circuit comprises a plurality of pixel circuits with the same dimension as the infrared focal plane array; each pixel circuit comprises an IV conversion sub-circuit, a differential amplification sub-circuit, a threshold comparison sub-circuit and a logic sub-circuit which are cascaded; and each logic sub-circuit is provided with an input port and two output ports. The pixel circuit generates an ON event and an OFF event by using the captured changed infrared light intensity, and the AER protocol event driving circuit processes the pixels generating the events and outputs the events through the output circuit. The device can sense the transient change of the light intensity of infrared light at an ultra-high speed, reduces the output time delay of the infrared detector, greatly reduces the working power consumption of the infrared detector, and can be used for infrared imaging.

Description

Technical Field

[0001] The present invention belongs to the technical field of integrated circuits, and particularly relates to an infrared detector and a detection method, which are applicable to near-infrared imaging scenarios with ultra-high speed and low power consumption. Background Art

[0002] Infrared detectors are mainly used to convert and output infrared radiation signals into digital pixel information, including an infrared focal plane array and a readout circuit. The readout circuit includes a pixel array, an analog-to-digital converter (ADC), a digital control circuit, and a phase-locked loop (PLL). By integrating and sampling photocurrents, performing analog-to-digital conversion, and implementing logic control, the sequential synchronous output of digital pixel information is achieved, and it is widely used in fields such as industry, medical care, and environmental monitoring.

[0003] Traditional infrared detectors are mainly based on the energy integration mode, and output the digital pixel information of the image by fixing the frame rate and exposure time. They are limited by the frame rate in high-speed motion perception, and are prone to problems such as motion blur and data redundancy. In terms of power consumption, due to continuous acquisition and processing of global pixels, their energy consumption is high, and it is difficult to operate efficiently in low-power scenarios. For example, Guo Zhongjie published a journal article "High-Linearity and High-Speed ROIC of Ultra-Large Array Infrared Detectors Based on Adaptive Compensation and Enhancement" on SENSORS on June 17, 2023, which disclosed an infrared detector and its working method. The infrared detector in this article includes an infrared focal plane array and a readout circuit. The readout circuit includes a pixel array, a column readout optimization circuit, an analog-to-digital converter (ADC), a row logic control circuit, and a phase-locked loop (PLL). The working principle of this circuit is as follows: The HgCdTe diode in the infrared focal plane array receives infrared radiation and converts it into a photocurrent signal; each pixel circuit in the pixel array circuit denoises and amplifies the photocurrent generated by each corresponding HgCdTe diode through correlated double sampling to obtain a photovoltage; the output photovoltage is linearly corrected and accelerated by the column readout optimization circuit to obtain an optimized photovoltage; the optimized photovoltage is converted into a digital signal of the photovoltage by the analog-to-digital converter (ADC); the digital signal of the photovoltage is address decoded by the row logic control circuit to ensure that the correct data row is selected and transmitted; finally, it is output after timing synchronization by the phase-locked loop (PLL). Although this circuit improves the output speed of digital pixel information to a certain extent through an optimized column-level readout circuit. However, since this infrared detector still relies on a fixed frame rate and needs to continuously acquire and transmit the complete information of global pixels, even if the scene changes little, a large amount of invalid data still needs to be processed, resulting in relatively high overall power consumption and delay of the infrared detector. Summary of the Invention

[0004] The object of the present invention is to overcome the defects of the above-mentioned existing technologies, and propose an event-driven infrared detector and detection method to reduce the power consumption of the infrared detector, reduce the delay, and improve the detection efficiency.

[0005] The technical idea of the present invention is to use a pixel circuit composed of modules such as an IV conversion sub-circuit, a differential amplification sub-circuit, and a threshold comparison sub-circuit to only process the changing infrared radiation in the scene, so as to avoid frame-by-frame acquisition and global processing of all pixel information, and greatly reduce the high power consumption caused by data transmission and complex calculations; the AER protocol event-driven circuit responds to, arbitrates, and encodes the valid event request signals to efficiently output pixel information through an event-driven mechanism.

[0006] According to the above idea, the implementation scheme of the present invention includes the following:

[0007] 1. An event-driven infrared detector, comprising an infrared focal plane array and an event readout circuit coupled thereto, characterized in that:

[0008] The event readout circuit includes a pixel array circuit, an AER protocol event-driven circuit, and an output circuit. The pixel array circuit includes a plurality of pixel circuits having the same dimension as the infrared focal plane array; each pixel circuit includes a cascaded IV conversion sub-circuit, a differential amplification sub-circuit, a threshold comparison sub-circuit, and a logic sub-circuit; each logic sub-circuit is provided with an input port and two output ports, and the input port is connected to the AER protocol event-driven circuit; the first output port is cascaded with the AER protocol event-driven circuit and the output circuit, and the second output port is connected to the output circuit.

[0009] Further, the IV conversion sub-circuit uses a PMOS transistor MP1, whose source is connected to the power supply VDD, and the drain and gate are connected to the photodiode in the infrared focal plane array;

[0010] Further, the differential amplification sub-circuit includes an input capacitor C1, a feedback capacitor C2, an operational amplifier Amp, and a reset switch PMOS transistor MP2. Among them, the left plate of C1 is connected to the output end of the IV conversion sub-circuit, the right plate is connected to the negative input end of Amp, the left plate of C2, and the drain of MP2. The right plate of C2 is connected to the output end of Amp, the source of MP2, and the input end of the threshold comparison sub-circuit. The gate of MP2 is connected to the output end of the logic sub-circuit;

[0011] Further, the threshold comparison sub-circuit includes an upper threshold comparator Amp1 and a lower threshold comparator Amp2. The negative input end of Amp1 and the positive input end of Amp2 are both connected to the output end of Amp in the differential amplification sub-circuit. The output ends of Amp1 and Amp2 are both connected to the input end of the logic sub-circuit;

[0012] Further, the logic sub-circuit includes a preprocessing module, an event type judgment module, and a reset module. Among them, the input end of the preprocessing module is connected to the output ends of Amp1 and Amp2, and the output end is connected to the input end of the AER protocol event-driven circuit. The input end of the event type judgment module is connected to the output end of the AER protocol event-driven circuit and the output end of Amp1, and the output end is connected to the input end of the output circuit. The input end of the reset module is connected to the output end of the AER protocol event-driven circuit, and the output end is connected to the gate of MP2.

[0013] 2. An event-driven infrared detector detection method, characterized by including the following:

[0014] (1) Set a clamping voltage for each photodiode in the infrared focal plane array, so that it converts the change in the intensity of the external infrared light it senses into a photocurrent I h ;

[0015] (2) Each pixel circuit in the pixel array circuit sequentially performs logarithmic conversion, differential amplification, and threshold comparison on the photocurrent I h to generate an ON event signal or an OFF event signal, and then generates an event request signal through logical operation;

[0016] (3) The AER protocol event-driven circuit performs response arbitration on all valid event request signals, encodes the row and column addresses corresponding to the event request signals and pixel positions after arbitration, and transmits the encoded row and column addresses to the output circuit, and simultaneously generates an event response signal for this pixel;

[0017] (4) Each pixel circuit in the pixel array circuit performs a NOR operation on the event response signal and the ON event signal to generate an event type signal, and simultaneously performs a logical response to the event response signal to generate a reset signal;

[0018] (5) The pixel array circuit resets the pixel circuit through the reset signal;

[0019] (6) The output circuit performs a wired OR operation on the event type signals of all pixel circuits to generate an event signal, performs a wired AND operation on all event response signals to generate a pixel activation signal, and outputs these two generated signals together with the row and column address encodings of the pixels.

[0020] Compared with the prior art, the present invention has the following advantages:

[0021] First, since the event readout circuit of the present invention consists of a pixel array circuit, an AER protocol event-driven circuit, and an output circuit, a detection system structure is formed in which the pixel circuit generates events by capturing the changing infrared light intensity, and the AER protocol event-driven circuit processes the pixels that generate events and outputs them through the output circuit. Therefore, the data redundancy caused by frame-by-frame output is significantly reduced, enabling the infrared detector to consume almost no power in static or low-dynamic scenarios, and solving the problem of high working power consumption of the infrared detector.

[0022] Second, the present invention is based on the logarithmic conversion, differential amplification, and threshold comparison of photocurrent to achieve ultra-high-speed sensing of the transient change of infrared light intensity. Each pixel circuit operates independently and asynchronously, outputs events by capturing the transient change of infrared light intensity, and does not need to wait for the synchronous acquisition of global pixel information, avoiding inefficient frame-based reading. At the same time, due to the adoption of the event-driven mechanism, the processing and transmission of pixel signals are reduced, only the pixels that capture the change of infrared light intensity are processed, and an extremely small amount of data is output, improving the data processing efficiency of the infrared detector and reducing the output delay of the infrared detector. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 is a schematic diagram of the overall structure of the event-driven infrared detector of the present invention;

[0024] Figure 2 is Figure 1 a schematic diagram of the pixel circuit structure in

[0025] Figure 3 is Figure 1 a schematic diagram of the AER protocol event-driven circuit structure in

[0026] Figure 4 is Figure 1 a schematic diagram of the output circuit structure in

[0027] Figure 5 is a flowchart of the implementation of the detection method of the infrared detector of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0028] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0029] Refer to Figure 1, the event-driven infrared detector of the present invention includes an infrared focal plane array and an event readout circuit. Among them: the infrared focal plane array includes photodiodes with dimensions of H = M × N; the event readout circuit includes: a pixel array circuit, an AER protocol event-driven circuit, and an output circuit, and the pixel array circuit includes a plurality of pixel circuits with the same dimensions as the infrared focal plane array. Each pixel circuit includes a cascaded IV conversion sub-circuit, a differential amplification sub-circuit, a threshold comparison sub-circuit, and a logic sub-circuit; each logic sub-circuit is provided with an input port and two output ports. The input port is connected to the AER protocol event-driven circuit; the first output port is cascaded with the AER protocol event-driven circuit and the output circuit, and the second output port is connected to the output circuit;

[0030] The photodiode at (m, n) in the infrared focal plane array is connected to the pixel circuit at (m, n) in the pixel array circuit through an indium column, where m ∈ [1, M], n ∈ [1, N], and M and N respectively represent M rows and N columns.

[0031] Refer to Figure 2 , and the structures of each sub-circuit in the pixel circuit are exemplarily given:

[0032] For the IV conversion sub-circuit, a PMOS transistor MP1 is used. Its source is connected to the power supply VDD, and its drain and gate are connected to the photodiode in the infrared focal plane array, and it is used to convert the changing photocurrent into a changing photovoltage;

[0033] The differential amplification sub-circuit includes an input capacitor C1, a feedback capacitor C2, an operational amplifier Amp, and a reset switch PMOS transistor MP2. Among them, the left plate of C1 is connected to the output end of the IV conversion sub-circuit, the right plate is connected to the negative input end of Amp, the left plate of C2, and the drain of MP2. The right plate of C2 is connected to the output end of Amp, the source of MP2, and the input end of the threshold comparison sub-circuit. The gate of MP2 is connected to the output end of the logic sub-circuit, and it is used to perform differential amplification on the changing photovoltage;

[0034] The threshold comparison sub-circuit includes an upper threshold comparator Amp1 and a lower threshold comparator Amp2. The negative input end of Amp1 and the positive input end of Amp2 are both connected to the output end of Amp in the differential amplification sub-circuit. The output ends of Amp1 and Amp2 are both connected to the input end of the logic sub-circuit, and it is used to perform threshold comparison on the voltage value at the output end of Amp;

[0035] The logic sub-circuit includes a preprocessing module, an event type judgment module, and a reset module. Among them, the input end of the preprocessing module is connected to the output ends of Amp1 and Amp2, and the output end is connected to the input end of the AER protocol event-driven circuit; the input end of the event type judgment module is connected to the output end of the AER protocol event-driven circuit and the output end of Amp1, and the output end is connected to the input end of the output circuit; the input end of the reset module is connected to the output end of the AER protocol event-driven circuit, and the output end is connected to the gate of MP2.

[0036] Refer to Figure 3 , and the structure of the AER protocol event-driven circuit is exemplarily given, which includes a bus sub-circuit, an arbitration sub-circuit, and an encoding sub-circuit:

[0037] The bus sub-circuit is used to send an arbitration request after bus response to all event request signals, and is respectively connected to the arbitration sub-circuit, the encoding sub-circuit, and the logic sub-circuit in H = M×N pixel circuits, where M≥1, N≥1, and M and N respectively represent M rows and N columns;

[0038] The arbitration sub-circuit is used to perform arbitration processing on valid event request signals. It has H input ports and H output ports, and the h-th input port and the h-th output port are respectively connected to the h-th output port and the h-th input port of the bus sub-circuit, where h∈[1,H];

[0039] The encoding sub-circuit is used to encode the row and column addresses of the arbitrated pixels. It has H input ports and A = R + C output ports, and the h-th input port is connected to the h-th output port of the bus sub-circuit. The R output ports and the C output ports respectively output the row address encoding and the column address encoding to the output circuit.

[0040] Refer to Figure 4 , and the structure of the output circuit is exemplarily given, which includes an OR array and an AND array:

[0041] The OR array is used to perform an OR operation on the event type signals of all pixel circuits to generate an event signal;

[0042] The AND array is used to perform an AND operation on all event response signals to generate a pixel activation signal;

[0043] The input ends of the OR array and the AND array are both connected to the logic sub-circuit in all pixel circuits, and the output ends are both connected to the outside of the detector.

[0044] It should be noted that in addition to the structures of the sub-circuits in the above pixel circuit adopted in this embodiment, other structural forms can also be used. For example, in the IV conversion sub-circuit, multiple diode-connected PMOS transistors can be connected in series, the operational amplifier Amp in the differential amplification sub-circuit can adopt a five-transistor OTA circuit, and the upper threshold comparator Amp1 and the lower threshold comparator Amp2 in the threshold comparison sub-circuit can also adopt the form of a simple operational amplifier. Here, the specific structural forms of each sub-circuit are not limited.

[0045] Embodiment 2, a method for infrared detection using the above infrared detector

[0046] Refer to Figure 5 , the implementation steps of this embodiment include the following:

[0047] Step 1, convert the change in infrared light intensity into photocurrent I h .

[0048] External infrared light irradiates the photodiodes in the infrared focal plane array. Applying a voltage to it can enable the photodiodes to absorb the energy of infrared light to generate photons, and the photo-generated carriers can generate photocurrent I through directional movement h , so as to realize the conversion of the optical signal of the infrared light intensity into an electrical signal and flow into the corresponding IV conversion sub-circuit through the indium column.

[0049] In this embodiment, a clamping voltage of 700 mV is applied to the photodiode to perform photocurrent conversion.

[0050] Step 2, each pixel circuit in the pixel array circuit processes the photocurrent I h to perform different processing and logical operations to generate an event request signal.

[0051] (2.1) The IV conversion sub-circuit in each pixel circuit performs logarithmic conversion on the photocurrent I generated by its corresponding photodiode h to obtain the change amount ΔV of the optical voltage log :

[0052]

[0053] Among them, ΔV GS represents the change amount of the gate-source voltage of MP1, n represents the sub-threshold region slope factor, V T represents the thermal voltage, and ΔI h represents the change amount of the photocurrent I h ;

[0054] (2.2) The differential amplification sub-circuit in each pixel circuit amplifies the converted change amount ΔV of the optical voltage log to obtain the amplified change amount ΔV of the optical voltagediff :

[0055]

[0056] Among them, C1 represents the input capacitance, and C2 represents the feedback capacitance;

[0057] (2.3) Set the upper threshold voltage V high and the lower threshold voltage V low . The threshold comparison sub-circuit in each pixel circuit compares the amplified change in optical voltage ΔV diff with the set threshold voltage to determine whether an event occurs:

[0058] If ΔV diff > V high , a low-level active ON event is generated, and step (2.4) is executed;

[0059] If ΔV diff < V low , a low-level active OFF event is generated, and step (2.4) is executed;

[0060] Otherwise, no event is generated, and return to step (2.3);

[0061] In this example, the upper threshold voltage V high is set to 1.9V, and the lower threshold voltage V low is set to 1.3V.

[0062] (2.4) The logic sub-circuit of each pixel circuit performs a NAND operation on the ON event signal and the OFF event signal to generate an event request signal Req:

[0063]

[0064] Among them, represents the logical NOT operation, ∧ represents the logical AND operation. The event request signal Req generates an event request signal according to the input levels of its two events, that is, when an ON event signal or an OFF event signal with a low level is input, a high-level active event request signal Req is generated; when an ON event signal and an OFF event signal with a high level are input, a low-level inactive event request signal Req is generated.

[0065] Step 3, the AER protocol event-driven circuit performs priority arbitration and row-column address encoding on the event request signal to generate an event response signal Reply.

[0066] The bus sub-circuit in the AER protocol event-driven circuit responds to the event request signal on the bus and issues an arbitration request;

[0067] The arbitration sub - circuit selects the priorities of multiple high - level - active event request signals, and replies an event response signal Reply to the bus sub - circuit for the selected pixel. The bus sub - circuit transmits the event response signal Reply to the above - selected pixel circuit and issues an encoding request encode to the encoding sub - circuit at the same time;

[0068] The encoding sub - circuit encodes the address corresponding to the above - selected pixel position and outputs it in binary form. Among them, the row address is encoded as an R - bit row address r_addr, and the column address is encoded as a C - bit column address c_addr, and transmits the generated row address signal and column address signal to the output circuit.

[0069] Step 4, the pixel circuit generates an event type signal and a reset signal according to the event response signal Reply and the ON event signal.

[0070] (4.1) The bus sub - circuit transmits the event response signal Reply to the event type judgment module in the pixel circuit. This event judgment module performs a NOR operation on it and the ON event signal to generate an event type signal event:

[0071]

[0072] Among them, represents logical NOT operation, ∨ represents logical OR operation,

[0073] (4.2) The event type signal event in the event type judgment module generates an event type signal according to the input levels of its two signals, that is, if the input Reply signal and ON event signal are low - level - active, a high - level event signal is generated; otherwise, a low - level event signal is generated;

[0074] (4.3) The reset module in the pixel circuit makes a logical response to the event response signal and generates a reset signal.

[0075] Step 5, the pixel array circuit resets the pixel circuit according to the reset signal.

[0076] (5.1) Judge the reset signal:

[0077] If the reset signal is low - level, then execute (5.2);

[0078] Otherwise, execute (5.3);

[0079] (5.2) Control the MP2 transistor in the differential amplifier sub - circuit to conduct through a low - level reset signal, restoring the output voltage value of the operational amplifier Amp to the DC operating point potential at the left end of the feedback capacitor C2, so that the output terminals of the upper threshold comparator Amp1 and the lower threshold comparator Amp2 both output high levels, and the logic sub - circuit outputs a low - level event request signal to achieve the reset of the pixel circuit;

[0080] (5.3) Control the MP2 transistor in the differential amplifier sub - circuit to cut off through a high - level reset signal, so that the output voltage value of the operational amplifier Amp, the output signal of the upper threshold comparator Amp1, the output signal of the lower threshold comparator Amp2, and the output signal of the logic sub - circuit all remain unchanged, and the pixel circuit maintains its original state.

[0081] Step 6: The output circuit outputs the event signal event_out, the pixel activation signal Reply_out, and the row and column address encodings of the pixel.

[0082] (6.1) The wired - OR array performs a wired - OR operation on the event type signals event of all pixel circuits to generate the event signal event_out:

[0083]

[0084] Among them, represents a wired - OR operation on H inputs, event h represents the event type signal of the h - th pixel circuit; the level of the event signal event_out is determined according to the input levels of the event type signals event of all pixel circuits, that is, if h high - level event type signals event are input, a high - level event signal event_out is generated; if H low - level event type signals event are input, a low - level event signal event_out is generated;

[0085] (6.2) The wired - AND array performs a wired - AND operation on all event response signals Reply to generate the pixel activation signal Reply_out:

[0086]

[0087] Among them, represents a wired - AND operation on H inputs, Reply hIt represents the event response signal of the h-th pixel circuit; the level of the pixel activation signal Reply_out is determined according to the input levels of all event response signals Reply, that is, when h low-level event response signals Reply are input, a low-level event signal Reply_out is generated; when H high-level event response signals Reply are input, a high-level pixel activation signal Reply_out is generated.

[0088] (6.3) The output circuit outputs the generated event signal event_out, pixel activation signal Reply_out together with the row and column address encodings of the pixel to the outside of the detector.

[0089] It should be noted that: the infrared detector based on the event-driven mechanism of the present invention does not directly record the pixel light intensity, but uses the pixel to generate independent asynchronous events to reflect the dynamic changes of infrared radiation. When infrared light irradiates the infrared focal plane array, it causes a transient change in the light intensity, causing the photodiode operating under the clamping voltage to generate a photocurrent, and the photocurrent flows through the indium column to the pixel circuit of the pixel array; in the pixel circuit, the photocurrent generates an event after logarithmic conversion, differential amplification and threshold comparison, and is transmitted to the AER protocol event-driven circuit for response, arbitration, encoding, and output through the output circuit; each pixel generates an event only when the infrared light intensity changes, rather than continuously accumulating light intensity information. This photocurrent and its transmission method can ensure the low-power and ultra-high-speed output of pixel information of the infrared detector.

[0090] The above content is a further detailed description of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is only limited to these descriptions. For those of ordinary skill in the technical field to which the present invention belongs, without departing from the concept of the present invention, several simple deductions or substitutions can be made, but these changes based on the idea of the present invention should all be regarded as belonging to the protection scope of the present invention.

Claims

1. An event-driven infrared detector, comprising an infrared focal plane array and an event readout circuit coupled thereto, characterized in that: The event readout circuit includes a pixel array circuit, an AER protocol event-driven circuit, and an output circuit. The pixel array circuit includes a plurality of pixel circuits having the same dimension as the infrared focal plane array; each pixel circuit includes a cascaded IV conversion sub-circuit, a differential amplification sub-circuit, a threshold comparison sub-circuit, and a logic sub-circuit; each logic sub-circuit is provided with an input port and two output ports, and the input port is connected to the AER protocol event-driven circuit; the first output port is cascaded with the AER protocol event-driven circuit and the output circuit, and the second output port is connected to the output circuit.

2. The infrared detector according to claim 1, characterized in that: For the IV conversion sub-circuit, a PMOS transistor MP1 is used, whose source is connected to the power supply VDD, and the drain and gate are connected to the photodiode in the infrared focal plane array; The differential amplification sub-circuit includes an input capacitor C1, a feedback capacitor C2, an operational amplifier Amp, and a reset switch PMOS transistor MP2. Among them, the left plate of C1 is connected to the output end of the IV conversion sub-circuit, the right plate is connected to the negative input end of Amp, the left plate of C2, and the drain of MP2. The right plate of C2 is connected to the output end of Amp, the source of MP2, and the input end of the threshold comparison sub-circuit. The gate of MP2 is connected to the output end of the logic sub-circuit; The threshold comparison sub-circuit includes an upper threshold comparator Amp1 and a lower threshold comparator Amp2. The negative input end of Amp1 and the positive input end of Amp2 are both connected to the output end of Amp in the differential amplification sub-circuit. The output ends of Amp1 and Amp2 are both connected to the input end of the logic sub-circuit; The logic sub-circuit includes a preprocessing module, an event type judgment module, and a reset module. Among them, the input end of the preprocessing module is connected to the output ends of Amp1 and Amp2, and the output end is connected to the input end of the AER protocol event-driven circuit. The input end of the event type judgment module is connected to the output end of the AER protocol event-driven circuit and the output end of Amp1, and the output end is connected to the input end of the output circuit. The input end of the reset module is connected to the output end of the AER protocol event-driven circuit, and the output end is connected to the gate of MP2.

3. The infrared detector according to claim 1, characterized in that, The AER protocol event-driven circuit includes a bus sub-circuit, an arbitration module, and an encoding sub-circuit, where: The bus sub-circuit is used to issue an arbitration request after bus response to all event request signals, and is respectively connected to the arbitration sub-circuit, the encoding sub-circuit, and the logic sub-circuits of H = M×N pixel circuits, where M≥1, N≥1, and M and N respectively represent M rows and N columns; The arbitration sub-circuit is used to perform arbitration processing on valid event request signals. It is provided with H input ports and H output ports, and the h-th input port and the h-th output port are respectively connected to the h-th output port and the h-th input port of the bus sub-circuit, where h∈[1,H]; The encoding sub - circuit is used to encode the row and column addresses of the arbitrated pixels. It has H input ports and A = R + C output ports. The h - th input port is connected to the h - th output port of the bus sub - circuit. The R output ports and the C output ports respectively output the row - address encoding and the column - address encoding to the output circuit.

4. The infrared detector according to claim 1, characterized in that, The output circuit includes a wired - AND array and a wired - OR array. The input ends of the wired - AND array and the wired - OR array are both connected to the logic sub - circuits in all pixel circuits, and the output ends are both connected to the outside of the detector.

5. The infrared detector according to claim 1, characterized in that, The infrared focal plane array includes a photodiode with a dimension of H, which is connected by an indium column between the photodiode located at (m, n) and the IV conversion sub - circuit located at (m, n), where m ∈ [1, M], n ∈ [1, N], and M and N respectively represent M rows and N columns.

6. A method for infrared detection using the detector of claim 1, characterized in that, It includes: (1) Set a clamping voltage for each photodiode in the infrared focal plane array so that it converts the change in the intensity of the external infrared light it senses into a photocurrent I h ; (2) Each pixel circuit in the pixel array circuit converts the photocurrent I h successively through logarithmic conversion, differential amplification, and threshold comparison to generate an ON event signal or an OFF event signal, and then generates an event request signal through logical operations; (3) The AER - protocol event - driven circuit responds to and arbitrates all valid event - request signals, encodes the row and column addresses corresponding to the arbitrated event - request signals and the pixel positions, and transmits the encoded row and column addresses to the output circuit. At the same time, it generates an event - response signal for this pixel. (4) Each pixel circuit in the pixel - array circuit performs a NOR operation on the event - response signal and the ON - event signal to generate an event - type signal. At the same time, it makes a logical response to the event - response signal to generate a reset signal. (5) The pixel - array circuit resets the pixel circuit through the reset signal. (6) The output circuit performs a wired - OR operation on the event - type signals of all pixel circuits to generate an event signal, performs a wired - AND operation on all event - response signals to generate a pixel - activation signal, and outputs these two generated signals together with the row and column address encodings of the pixels.

7. The method according to claim 6, characterized in that: In step (2), for each pixel circuit in the pixel array circuit, the photocurrent I h is successively subjected to logarithmic conversion, differential amplification, and threshold comparison to generate an ON event signal or an OFF event signal, and its implementation includes the following: (2a) The IV conversion sub-circuit in each pixel circuit performs a logarithmic conversion on the photocurrent I generated by its corresponding photodiode h to obtain the change in optical voltage ΔV log : Among them, ΔV GS represents the change in the gate-source voltage of MP1, n represents the subthreshold slope factor, and V T represents the thermal voltage, and ΔI h represents the change in the photocurrent I h ; (2b) The differential amplification sub-circuit in each pixel circuit amplifies the converted change in optical voltage ΔV log to obtain the amplified change in optical voltage ΔV diff : (2c) The threshold comparison sub-circuit in each pixel circuit compares ΔV diff with a pre-set upper threshold voltage V high and a lower threshold voltage V low to determine whether an event occurs: If ΔV diff > V high then a low-level active ON event is generated and (2d) is executed; If ΔV diff < V low then a low-level active OFF event is generated and (2d) is executed; Otherwise, no event is generated, and it returns to step (2b). (2d) The logic sub - circuit of each pixel circuit performs a NAND operation on the ON - event signal and the OFF - event signal to generate an event - request signal Req: Among them, represents logical NOT operation, and ∧ represents logical AND operation; If the ON - event signal is at a low level, a high - level - effective event - request signal Req is generated. If the OFF - event signal is at a low level, a high - level - effective event - request signal Req is generated. If both the ON - event signal and the OFF - event signal are at a high level, a low - level - invalid event - request signal Req is generated.

8. The method according to claim 6, wherein: In step (3): The AER - protocol event - driven circuit responds to and arbitrates all valid event - request signals by the bus sub - circuit sending an arbitration request after bus - responding to the event - request signals. The arbitration sub - circuit selects the priority of multiple high - level - effective event - request signals, replies an event - response signal to the selected pixel, and returns it to the bus sub - circuit. The arbitration sub - circuit makes responses to all valid event - request signals in order of priority. The encoding of the row and column addresses corresponding to the arbitrated event - request signals and the pixel positions is to encode the row and column addresses corresponding to the pixels after determining the priority through the encoding circuit. The output mode is in binary form, where the row - address encoding is an R - bit row address r_addr, the column - address encoding is a C - bit column address c_addr, and the generated row - address signal and column - address signal are transmitted to the output circuit.

9. The method according to claim 6, characterized in that: In the pixel array circuit described in step (4), each pixel circuit performs a NOR operation on the event response signal Reply and the ON event signal to generate an event type signal event, and the formula is as follows: Among them, represents logical NOT operation, and ∨ represents logical OR operation; If both the Reply signal and the ON event signal are active low, a high-level event signal is generated; Otherwise, a low-level event signal is generated.

10. The method according to claim 6, characterized in that: In step (5), the pixel array circuit resets the pixel circuit through a reset signal, and its implementation includes the following: (5a) Judge the reset signal: If the reset signal is low, then execute (5b); Otherwise, execute (5c); (5b) Control the MP2 transistor in the differential amplification sub-circuit to conduct through the low-level reset signal, restore the output voltage value of the operational amplifier Amp to the DC operating point potential at the left end of the feedback capacitor C2, so that the output terminals of the upper threshold comparator Amp1 and the lower threshold comparator Amp2 both output high levels, and the logic sub-circuit outputs a low-level event request signal to realize the reset of the pixel circuit; (5c) Control the MP2 transistor in the differential amplification sub-circuit to cut off through the high-level reset signal, so that the output voltage value of the operational amplifier Amp, the output signal of the upper threshold comparator Amp1, the output signal of the lower threshold comparator Amp2, and the output signal of the logic sub-circuit all remain unchanged, and the pixel circuit maintains its original state.

11. The method according to claim 6, wherein: In step (6), the output circuit performs a wired-OR operation on the event type signals of all pixel circuits to generate an event signal event_out, and performs a wired-AND operation on all event response signals to generate a pixel activation signal Reply_out, and the formulas are as follows: Among them, represents an OR operation on H inputs, event h represents the event type signal of the h-th pixel circuit, represents an AND operation on H inputs, Reply h represents the event response signal of the h-th pixel circuit.

Images