Peak frequency detection circuit and peak frequency detection method

Abstract

The invention discloses a peak frequency detection circuit and a detection method, the peak frequency detection circuit comprises a signal processing module, a data comparison module and a processor, the signal processing module processes a to-be-detected signal to obtain a processed to-be-detected signal, and sends a digital signal of the processed to-be-detected signal to the processor; the processor calculates the peak value of the digital signal of the processed to-be-detected signal, generates a peak signal according to the peak value and outputs the peak signal to the data comparison module, and the data comparison module obtains the processed to-be-detected signal from the signal processing module, generates a square wave signal with the same frequency as the to-be-detected signal according to the processed to-be-detected signal and the peak signal and outputs the square wave signal to the signal processing module. The processor obtains a first measurement frequency through a frequency measurement algorithm according to the square wave signal, obtains a second measurement frequency through a cycle measurement algorithm, and outputs the measurement frequency of the signal to be measured according to the first measurement frequency and the second measurement frequency. The measurement precision is improved, and the cost of the detection circuit is reduced.

Description

Technical Field

[0001] The present invention relates to the field of electronic circuits or test and measurement, and particularly to a peak frequency detection circuit and a peak frequency detection method. Background Art

[0002] Peak frequency detection devices are widely used in fields such as electronic circuits or test and measurement. In the IC reliability burn-in test, certain test vectors need to be applied to the device under test, and the signal peak value and frequency after the response of the device under test need to be obtained quickly and accurately. By comparing with the theoretical values, the function or quality of the device under test can be judged. Most of the traditional devices for measuring peak frequency are designed using single-chip microcomputers, which have problems such as narrow frequency measurement range, low measurement accuracy, complex operation, and single function.

[0003] When processing the signal under test, an automatic gain control circuit (AGC) is used to amplify the signals under test with different amplitudes and frequencies to substantially the same amplitude, but it involves many components and has a high cost; when measuring the frequency, an equal-precision measurement method is used to eliminate the periodic error in the measurement, but the measurement accuracy of low-frequency signals is poor. Summary of the Invention

[0004] Embodiments of the present invention provide a peak frequency detection circuit and a peak frequency detection method to solve the problems of high cost and poor measurement accuracy of the measurement circuit when measuring peak frequency.

[0005] Based on the above object, in one embodiment, a peak frequency detection circuit is provided, including: a signal processing module, a data comparison module, and a processor. Among them, the input end of the signal processing module is used to obtain the signal under test, the first output end of the signal processing module is connected to the first input end of the processor, the second output end of the signal processing module is connected to the first input end of the data comparison module, the second input end of the data comparison module is connected to the output end of the processor, and the output end of the data comparison module is connected to the second input end of the processor; The signal processing module is used to process the signal to be measured to obtain the processed signal to be measured. The signal processing module is also used to send the digital signal of the processed signal to be measured to the processor through the first output end. The processor is used to calculate the peak value of the digital signal of the processed signal to be measured, generate a peak signal according to the peak value, and the output end of the processor outputs the peak signal to the second input end of the data comparison module. The data comparison module is used to obtain the processed signal to be measured from the second output end of the signal processing module, generate a square wave signal with the same frequency as the signal to be measured according to the processed signal to be measured and the peak signal, and the output end of the data comparison module outputs the square wave signal to the second input end of the processor. The processor is used to obtain a first measurement frequency through a frequency measurement algorithm and a second measurement frequency through a period measurement algorithm according to the square wave signal, and output the measurement frequency of the signal to be measured according to the first measurement frequency and the second measurement frequency.

[0006] In one embodiment, outputting the measurement frequency of the signal to be measured according to the first measurement frequency and the second measurement frequency specifically includes: Comparing the first measurement frequency with a preset critical frequency; Comparing the second measurement frequency with the preset critical frequency; If both the first measurement frequency and the second measurement frequency are less than the preset critical frequency, it is confirmed that the signal to be measured is a low-frequency signal, and the second measurement frequency is output as the measurement frequency of the signal to be measured.

[0007] In one embodiment, it further includes: If both the first measurement frequency and the second measurement frequency are greater than or equal to the preset critical frequency, it is confirmed that the signal to be measured is a high-frequency signal, and the first measurement frequency is output as the measurement frequency of the signal to be measured; If the first measurement frequency is less than the preset critical frequency and the second measurement frequency is greater than the preset critical frequency, it is confirmed that the signal to be measured is a high-frequency signal, and the first measurement frequency is output as the measurement frequency of the signal to be measured.

[0008] In one embodiment, the signal processing module includes: a first operational amplifier module, a second operational amplifier module, and an analog-to-digital conversion module. Among them, the input end of the first operational amplifier module is used to receive the signal to be measured, the output end of the first operational amplifier module is connected to the input end of the analog-to-digital conversion module, the output end of the analog-to-digital conversion module is connected to the first input end of the processor, the input end of the second operational amplifier module is used to receive the signal to be measured, and the output end of the second operational amplifier module is connected to the first input end of the data comparison module; The input ends of the first operational amplifier module and the second operational amplifier module serve as the input end of the signal processing module, the output end of the analog-to-digital conversion module serves as the first output end of the signal processing module, and the output end of the second operational amplifier module serves as the second output end of the signal processing module; Wherein, the first operational amplifier module is used to attenuate the voltage of the signal to be measured to a preset range and output it to the analog-to-digital conversion module, the second operational amplifier module is used to attenuate the voltage of the signal to be measured to a preset range and output it to the data comparison module, and the analog-to-digital conversion module is used to convert the signal to be measured attenuated to the preset range from an analog signal to a digital signal and output it to the processor.

[0009] In one embodiment, the first operational amplifier module includes: a first voltage-dividing resistor, a second voltage-dividing resistor, and a first operational amplifier chip. One end of the first voltage-dividing resistor receives the signal to be measured, the other end of the first voltage-dividing resistor is connected to the input end of the first operational amplifier chip, one end of the second voltage-dividing resistor is connected to the input end of the first operational amplifier chip, the other end of the second voltage-dividing resistor is grounded, and the output end of the first operational amplifier chip is connected to the input end of the analog-to-digital conversion module; Wherein, one end of the first voltage-dividing resistor serves as the input end of the first operational amplifier module, and the output end of the first operational amplifier chip serves as the output end of the first operational amplifier module.

[0010] In one embodiment, the second operational amplifier module includes: a third voltage-dividing resistor, a fourth voltage-dividing resistor, and a second operational amplifier chip. One end of the third voltage-dividing resistor receives the signal to be measured, the other end of the third voltage-dividing resistor is connected to the input end of the second operational amplifier chip, one end of the fourth voltage-dividing resistor is connected to the input end of the second operational amplifier chip, the other end of the fourth voltage-dividing resistor is grounded, and the output end of the second operational amplifier chip is connected to the first input end of the data comparison module; Wherein, one end of the third voltage-dividing resistor serves as the input end of the second operational amplifier module, and the output end of the second operational amplifier chip serves as the second output end of the signal processing module.

[0011] In one embodiment, the data comparison module includes: a comparator and a digital-to-analog conversion module. The first input end of the comparator is connected to the output end of the second operational amplifier module, the second input end of the comparator is connected to the output end of the digital-to-analog conversion module, the output end of the comparator is connected to the second input end of the processor, and the input end of the digital-to-analog conversion module is connected to the output end of the processor; The first input end of the comparator serves as the first input end of the data comparison module, the output end of the comparator serves as the output end of the data comparison module, and the input end of the digital-to-analog conversion module serves as the second input end of the data comparison module; Wherein, the digital-to-analog conversion module is configured to convert the peak signal from a digital signal into an analog signal and output it to the comparator, and the comparator is configured to generate a test signal having the same frequency as the test signal according to the peak signal converted into an analog signal and the test signal attenuated to a preset range.

[0012] In one embodiment, the processor uses a field programmable gate array chip.

[0013] In one embodiment, a peak frequency detection method is provided, including: Obtaining a digital signal of the processed test signal; Calculating the peak value of the digital signal of the processed test signal, generating a peak signal according to the peak value, and the peak signal is used to generate a square wave signal having the same frequency as the test signal after being compared with the processed test signal; Obtaining the square wave signal, and respectively outputting a first measurement frequency through a frequency measurement algorithm and a second measurement frequency through a period measurement algorithm according to the square wave signal, and outputting a measurement frequency of the test signal according to the first measurement frequency and the second measurement frequency.

[0014] In one embodiment, outputting the measurement frequency of the test signal according to the first measurement frequency and the second measurement frequency specifically includes: Comparing the first measurement frequency with a preset critical frequency; Comparing the second measurement frequency with the preset critical frequency; If both the first measurement frequency and the second measurement frequency are less than the preset critical frequency, it is confirmed that the test signal is a low-frequency signal, and the second measurement frequency is output as the measurement frequency of the test signal; If both the first measurement frequency and the second measurement frequency are greater than or equal to the preset critical frequency, it is confirmed that the test signal is a high-frequency signal, and the first measurement frequency is output as the measurement frequency of the test signal; If the first measurement frequency is less than the preset critical frequency and the second measurement frequency is greater than the preset critical frequency, it is confirmed that the test signal is a high-frequency signal, and the first measurement frequency is output as the measurement frequency of the test signal.

[0015] The above peak frequency detection circuit and peak frequency detection method process the signal to be measured through the signal processing module, no longer use the automatic gain control circuit, simplify the peak frequency detection circuit, save costs, the processed signal to be measured meets the input range of the processor, obtain the peak signal through the processor, and then compare the processed signal to be measured with the peak signal through the data comparison module to obtain a square wave signal. The processor acquires the square wave signal, obtains two sets of measured frequencies through the frequency measurement algorithm and the period measurement algorithm, and further obtains the measured frequency of the signal to be measured. Since the frequency measurement algorithm and the period measurement algorithm calculate two sets of data simultaneously, compared with only using one algorithm, the detection accuracy is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments of the present invention. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0017] Figure 1 is a schematic connection diagram of the data processing module, the data comparison module and the processor in an embodiment of the present invention; Figure 2 is a schematic connection diagram of each module in the data processing module, each module in the data comparison module and the processor in an embodiment of the present invention; Figure 3 is a circuit diagram of the first operational amplifier module in an embodiment of the present invention; Figure 4 is a circuit diagram of the second operational amplifier module in an embodiment of the present invention; Figure 5 is a circuit connection diagram of the data conversion module and the comparator in an embodiment of the present invention; Figure 6 is a schematic diagram of obtaining a square wave signal in an embodiment of the present invention; Figure 7 is a flowchart of the peak frequency detection method in an embodiment of the present invention; Figure 8 is a specific flowchart of outputting the measured frequency of the signal to be measured according to the first measured frequency and the second measured frequency in an embodiment of the present invention.

[0018] Reference numerals: 1, data processing module; 101, first operational amplifier module; 103, second operational amplifier module; 105, analog-to-digital conversion module; 2, data comparison module; 201, comparator; 203, digital-to-analog conversion module; 3, processor. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0019] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without making creative efforts belong to the scope of protection of the present invention.

[0020] It should be understood that the present invention can be implemented in different forms and should not be construed as limited to the embodiments set forth herein. On the contrary, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the present invention to those skilled in the art. In the drawings, for the sake of clarity, the dimensions and relative dimensions of layers and regions may be exaggerated. The same reference numerals throughout the drawings denote the same elements.

[0021] It should be understood that when an element or layer is referred to as being "on", "adjacent to", "connected to" or "coupled to" another element or layer, it can be directly on, adjacent to, connected or coupled to the other element or layer, or there may be intervening elements or layers. In contrast, when an element is referred to as being "directly on", "directly adjacent to", "directly connected to" or "directly coupled to" another element or layer, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Thus, a first element, component, region, layer or part discussed below may be denoted as a second element, component, region, layer or part without departing from the teachings of the present invention.

[0022] Spatial relationship terms such as "under", "below", "beneath", "underneath", "above", "over", etc. are used herein for convenience in describing the relationship of one element or feature shown in the figures to other elements or features. It should be understood that, in addition to the orientation shown in the figures, spatial relationship terms are intended to also include different orientations of the device in use and operation. For example, if the device in the figures is flipped, then an element or feature described as "under" or "beneath" or "underneath" another element or feature will be oriented "over" the other element or feature. Thus, the exemplary terms "under" and "beneath" can include both an orientation of above and below. The device may be otherwise oriented (rotated 90 degrees or other orientations) and the spatial descriptors used herein are to be interpreted accordingly.

[0023] The purpose of the terms used herein is only to describe specific embodiments and is not a limitation of the present invention. As used herein, the singular forms "a", "an" and "the" are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms "comprising" and / or "including", when used in this specification, identify the presence of the stated features, integers, steps, operations, elements and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups. As used herein, the term "and / or" includes any and all combinations of the related listed items.

[0024] To thoroughly understand the present invention, detailed structures and steps will be presented in the following description to illustrate the technical solutions proposed by the present invention. The preferred embodiments of the present invention are described in detail below. However, in addition to these detailed descriptions, the present invention may have other embodiments.

[0025] In one embodiment, as Figure 1 shown, a peak frequency detection circuit is provided, including: a signal processing module 1, a data comparison module 2, and a processor 3. Among them, the input end of the signal processing module 1 is used to obtain a signal to be measured. The first output end of the signal processing module 1 is connected to the first input end of the processor 3. The second output end of the signal processing module 1 is connected to the first input end of the data comparison module 2. The second input end of the data comparison module 2 is connected to the output end of the processor 3. The output end of the data comparison module 2 is connected to the second input end of the processor 3. The signal processing module 1 is used to process the signal to be measured to obtain a processed signal to be measured. The signal processing module 1 is also used to send the digital signal of the processed signal to be measured to the processor 3 through the first output end. The processor 3 is used to calculate the peak value of the digital signal of the processed signal to be measured, generate a peak signal according to the peak value. The output end of the processor 3 outputs the peak signal to the second input end of the data comparison module 2. The data comparison module 2 is used to obtain the processed signal to be measured from the second output end of the signal processing module 1, and generate a square wave signal with the same frequency as the signal to be measured according to the processed signal to be measured and the peak signal. The output end of the data comparison module 2 outputs the square wave signal to the second input end of the processor 3. The processor 3 is used to obtain a first measurement frequency through a frequency measurement algorithm and a second measurement frequency through a period measurement algorithm according to the square wave signal, and output the measurement frequency of the signal to be measured according to the first measurement frequency and the second measurement frequency.

[0026] Among them, the signal to be measured is usually an analog signal, such as a sine wave, a triangular wave, etc. The signal processing module 1 processes the signal to be measured to obtain two signals. One is the digital signal of the processed signal to be measured sent to the processor 3, and the other is the processed signal to be measured sent to the data comparison module 2. The processor 3 first calculates the peak value of the signal to be measured according to the digital signal of the processed signal to be measured sent by the signal processing module 1 and generates a peak signal. Among them, the peak signal is a digital signal. The data comparison module 2 receives the peak signal and the processed signal to be measured and generates a square wave signal with the same frequency as the signal to be measured. The processor 3 then receives the square wave signal, obtains the first measurement frequency through the frequency measurement algorithm, obtains the second measurement frequency through the period measurement algorithm, and outputs the measurement frequency of the signal to be measured according to the first measurement frequency and the second measurement frequency.

[0027] The period measurement algorithm measures the number of reference clocks within one period of the signal to be measured to obtain the period of the signal to be measured, and then takes the reciprocal to obtain the frequency of the signal to be measured. It is applicable to the measurement of low-frequency signals. The calculation formula is: , where f is the frequency of the signal to be measured obtained by the period measurement algorithm, is the frequency of the reference clock, and N is the number of reference clocks measured within one period of the signal to be measured.

[0028] For example: Set the frequency of the reference clock to 10 MHz, and measure that the number of reference clocks N within the signal to be measured is 200000. Substitute it into the calculation formula of the period measurement algorithm to obtain that the frequency of the signal to be measured is 50 Hz.

[0029] The frequency measurement algorithm is a method that directly obtains the frequency of the signal to be measured by counting the counting pulses of the signal to be measured within the duration of the fixed gating signal. The frequency range of the measured signal is very wide, but the error is large in the low-frequency band. The calculation formula is: , where f is the frequency of the signal to be measured obtained by the frequency measurement algorithm, t is the duration of the fixed gating signal, and N is the number of pulses of the signal to be measured.

[0030] For example: Set the gating time t to 1 second, and measure that the number of pulses n within the set gating time is 5000. Substitute it into the calculation formula of the frequency measurement algorithm to obtain that the frequency of the signal to be measured is 5000 Hz. The frequency measurement algorithm is applicable to high-frequency algorithms, and the maximum measurement error is measured signals. However, since the number of pulses of low-frequency signals is small, the error ratio is high.

[0031] In this embodiment, the signal processing module processes the signal to be measured, and the automatic gain control circuit is no longer used, simplifying the detection circuit of the peak frequency and reducing the cost. At the same time, the frequency measurement algorithm and the period measurement algorithm are used to calculate the same square wave signal to obtain two values, namely the first measurement frequency and the second measurement frequency, and the measurement frequency of the signal to be measured is obtained through these two values. Considering both the low-frequency band and the high-frequency band, using two algorithms improves the detection accuracy compared with only using the equal-precision measurement method.

[0032] In one embodiment, outputting the measurement frequency of the signal to be measured according to the first measurement frequency and the second measurement frequency specifically includes: Comparing the first measurement frequency with a preset critical frequency; Comparing the second measurement frequency with the preset critical frequency; If both the first measurement frequency and the second measurement frequency are less than the preset critical frequency, it is confirmed that the signal to be measured is a low-frequency signal, and the second measurement frequency is output as the measurement frequency of the signal to be measured.

[0033] Among them, the preset critical frequency is determined to be 50 after multiple measurements , obtaining two frequency values, namely the first measurement frequency of the frequency measurement algorithm and the second measurement frequency of the period measurement algorithm. The first measurement frequency is respectively compared with 50 , and the second measurement frequency is compared with 50 ; When both frequency values are less than 50 , the signal to be measured is confirmed as a low-frequency signal, and the second measurement frequency measured by the period measurement algorithm is output as the measurement frequency of the signal to be measured.

[0034] In this embodiment, the first measurement frequency and the second measurement frequency are simultaneously compared with the preset critical frequency 50 . When both frequency values are less than 50 , it is confirmed that the signal to be measured is a low-frequency signal, and the second measurement frequency measured by the period measurement algorithm is output as the measurement frequency of the signal to be measured, improving the measurement accuracy of the low-frequency signal.

[0035] In one embodiment, it further includes: If both the first measurement frequency and the second measurement frequency are greater than or equal to the preset critical frequency, it is confirmed that the signal to be measured is a high-frequency signal, and the first measurement frequency is output as the measurement frequency of the signal to be measured; If the first measurement frequency is less than the preset critical frequency and the second measurement frequency is greater than the preset critical frequency, it is confirmed that the signal to be measured is a high-frequency signal, and the first measurement frequency is output as the measurement frequency of the signal to be measured.

[0036] Among them, when the first measurement frequency and the second measurement frequency are not both less than the preset critical frequency 50 When, it can be specifically divided into: when the first measurement frequency and the second measurement frequency are both greater than or equal to the preset critical frequency 50 When; Or the first measurement frequency is less than the preset critical frequency 50 , and the second measurement frequency is greater than the preset critical frequency 50 When; Determine the signal to be measured as a high-frequency signal, and output the first measurement frequency obtained by the frequency measurement algorithm as the measurement frequency of the final signal to be measured.

[0037] In this embodiment, when the first measurement frequency and the second measurement frequency are not both less than the preset critical frequency 50 When, the signal to be measured is determined as a high-frequency signal, and the first measurement frequency obtained by the frequency measurement algorithm is output, improving the detection accuracy of the peak frequency.

[0038] In one embodiment, as Figure 2 shown, the signal processing module 1 includes: a first operational amplifier module 101, a second operational amplifier module 103, and an analog-to-digital conversion module 105. Among them, the input end of the first operational amplifier module 101 is used to receive the signal to be measured, the output end of the first operational amplifier module 101 is connected to the input end of the analog-to-digital conversion module 105, the output end of the analog-to-digital conversion module 105 is connected to the first input end of the processor 3, the input end of the second operational amplifier module 103 is used to receive the signal to be measured, and the output end of the second operational amplifier module 103 is connected to the first input end of the data comparison module 2; The input end of the first operational amplifier module 101 and the input end of the second operational amplifier module 103 serve as the input end of the signal processing module 1, the output end of the analog-to-digital conversion module 105 serves as the first output end of the signal processing module 1, and the output end of the second operational amplifier module 103 serves as the second output end of the signal processing module 1; Among them, the first operational amplifier module 101 is used to attenuate the voltage of the signal to be measured to a preset range and output it to the analog-to-digital conversion module 105, the second operational amplifier module 103 is used to attenuate the voltage of the signal to be measured to a preset range and output it to the data comparison module 2, and the analog-to-digital conversion module 105 is used to convert the signal to be measured attenuated to the preset range from an analog signal to a digital signal and output it to the processor 3.

[0039] Among them, as Figure 2As shown, the signal processing module 1 includes: a first operational amplifier module 101, a second operational amplifier module 103, and an analog-to-digital conversion module 105. Among them, the first operational amplifier module 101 receives the signal to be measured and attenuates the voltage of the signal to be measured to a preset range and outputs it to the analog-to-digital conversion module 105. The analog-to-digital conversion module converts the signal to be measured with the voltage attenuated to the preset range from an analog signal to a digital signal and outputs the digital signal to the processor 3; The second operational amplifier module 103 also receives the signal to be measured and attenuates the voltage of the signal to be measured to a preset range and outputs the processed signal to be measured to the data comparison module 2.

[0040] In this embodiment, by setting the first operational amplifier module and the second operational amplifier module to process the signal to be measured and attenuate it to a preset range so that the signals to be measured with different frequencies and amplitudes meet the normal comparison range of the data comparison module after processing. Compared with the traditional method of using an automatic gain control circuit to process the signal to be measured, using the operational amplifier module can simplify the circuit and reduce the cost of the peak detection circuit.

[0041] In one embodiment, as Figure 3 shown, the first operational amplifier module 101 includes: a first voltage-dividing resistor R1, a second voltage-dividing resistor R2, and a first operational amplifier chip U1. One end of the first voltage-dividing resistor R1 receives the signal to be measured, the other end of the first voltage-dividing resistor R1 is connected to the input end of the first operational amplifier chip U1, one end of the second voltage-dividing resistor R2 is connected to the input end of the first operational amplifier chip U1, the other end of the second voltage-dividing resistor R2 is grounded, and the output end of the first operational amplifier chip U1 is connected to the input end of the analog-to-digital conversion module 2; Among them, one end of the first voltage-dividing resistor R1 is used as the input end of the first operational amplifier module 101, and the output end of the first operational amplifier chip U1 is used as the output end of the first operational amplifier module 101.

[0042] Among them, the model of the first operational amplifier chip U1 is AD8065ARTZ-REEL7. The first operational amplifier module 101 attenuates the voltage of the signal to be measured to a preset range through the first operational amplifier chip U1, the first voltage-dividing resistor R1, and the second voltage-dividing resistor R2. The conversion formula is: , where is the output value of the first operational amplifier chip U1, R1 is the resistance value of the first voltage-dividing resistor, R2 is the resistance value of the second voltage-dividing resistor, and VIN is the signal to be measured.

[0043] Take R1 = 5.02 , R2 = 1 , VIN = , substituting into the above formula, the voltage value output by the first operational amplifier chip U1 can be attenuated to the preset range . When the signal to be measured is other values, the values of the first voltage-dividing resistor R1 and the second voltage-dividing resistor R2 can be changed so that the output value of the first operational amplifier chip U1 is still within the preset range .

[0044] In this embodiment, through the first voltage-dividing resistor, the second voltage-dividing resistor and the first operational amplifier chip, the voltage of the signal to be measured is attenuated to the preset range, and the signal to be measured is processed to meet the input range of the data comparison module. Compared with using an automatic gain control circuit to process the signal, the first operational amplifier module is simplified, and the cost of the peak frequency detection circuit is reduced.

[0045] In one embodiment, as Figure 4 shown, the second operational amplifier module 103 includes: a third voltage-dividing resistor R3, a fourth voltage-dividing resistor R4 and a second operational amplifier chip U2. One end of the third voltage-dividing resistor R3 receives the signal to be measured, the other end of the third voltage-dividing resistor R3 is connected to the input end of the second operational amplifier chip U2, one end of the fourth voltage-dividing resistor R4 is connected to the input end of the second operational amplifier chip U2, the other end of the fourth voltage-dividing resistor R4 is grounded, and the output end of the second operational amplifier chip U2 is connected to the first input end of the data comparison module 2; wherein, one end of the third voltage-dividing resistor R3 serves as the input end of the second operational amplifier module 103, and the output end of the second operational amplifier chip U2 serves as the second output end of the signal processing module 1.

[0046] Among them, the model of the second operational amplifier chip U2 is AD8065ARTZ-REEL7. The second operational amplifier module 103 attenuates the voltage of the signal to be measured to the preset range through the second operational amplifier chip U2, the third voltage-dividing resistor R3 and the fourth voltage-dividing resistor R4 . The conversion formula is: , wherein, is the output value of the second operational amplifier chip U2, R3 is the resistance value of the third voltage-dividing resistor, R4 is the resistance value of the fourth voltage-dividing resistor, and VIN is the signal to be measured.

[0047] Take R3 = 5.02 , R4 = 1 , VIN = , substituting into the above formula, the voltage value output by the first operational amplifier chip U1 can be attenuated to the preset range When the signal to be measured is other values, the resistance values of the third voltage-dividing resistor R3 and the fourth voltage-dividing resistor R4 can be changed so that the output value of the second operational amplifier chip U2 is still within the preset range. Inside.

[0048] In this embodiment, through the third voltage-dividing resistor, the fourth voltage-dividing resistor, and the second operational amplifier chip, the voltage of the signal to be measured is attenuated to within the preset range, and the signal to be measured is processed to meet the input range of the data comparison module. Compared with using an automatic gain control circuit to process the signal, the second operational amplifier module is simplified, and the cost of the peak frequency detection circuit is reduced.

[0049] In one embodiment, as Figure 2 shown, the data comparison module 2 includes: a comparator 201 and a digital-to-analog conversion module 203. The first input terminal of the comparator 201 is connected to the output terminal of the second operational amplifier module 103. The second input terminal of the comparator 201 is connected to the output terminal of the digital-to-analog conversion module 203. The output terminal of the comparator 201 is connected to the second input terminal of the processor 3. The input terminal of the digital-to-analog conversion module 203 is connected to the output terminal of the processor 3; The first input terminal of the comparator 201 serves as the first input terminal of the data comparison module 2. The output terminal of the comparator 201 serves as the output terminal of the data comparison module 2. The input terminal of the digital-to-analog conversion module 203 serves as the second input terminal of the data comparison module 2; Wherein, the digital-to-analog conversion module 203 is used to convert the peak signal from a digital signal into an analog signal and output it to the comparator 201. The comparator 201 is used to generate the signal to be measured with the same frequency as the signal to be measured according to the peak signal converted into an analog signal and the signal to be measured attenuated to within the preset range.

[0050] Wherein, as Figure 5 shown, the digital-to-analog conversion module 203 uses a digital-to-analog converter U3 with the model number DAC7311IDCKR. Its SCLK pin is connected to the processor 3 to receive the serial clock signal provided by the processor 3, and this clock signal is used to synchronize the data transmission of the DIN pin of the digital-to-analog converter U3. The DIN pin is the serial input port of the digital-to-analog converter U3, which receives the configuration data and commands of the processor 3. At the same time, the SYCN pin of the digital-to-analog converter U3 is connected to the CS port of the processor 3 to realize the synchronous control of the processor 3 over the digital-to-analog converter U3. The digital-to-analog converter U3 receives the peak signal of the processor 3, and this peak signal is a digital signal. The digital-to-analog converter U3 converts this peak signal from a digital signal into an analog signal and then outputs it to the comparator 201.

[0051] Comparator 201 uses a high-speed comparator U3 of the TLV3501AIDR model. Its -IN pin is connected to the output pin of the digital-to-analog converter U3 to receive the peak signal converted into an analog signal, and then receives the voltage attenuated by the second operational amplifier module 103 to the preset range through the +IN pin of the signal to be measured. The peak signal and the attenuated signal to be measured are compared, and a square wave signal with the same frequency as the signal to be measured is output to the processor 3.

[0052] As Figure 6 shown, the input signal CH1 is the signal to be measured with the voltage output by the second operational amplifier module 103 attenuated to the preset range The reference voltage CH3 is the peak signal converted into an analog signal. The high-speed comparator U3 compares the input signal CH1 and the reference voltage CH3 to obtain the output signal CH2, and the output signal CH2 is a square wave signal with the same frequency as the signal to be measured.

[0053] In this embodiment, the peak signal is first converted from a digital signal to an analog signal by the digital-to-analog conversion module and then output to the comparator. The comparator simultaneously receives the processed signal to be measured and compares the two signals to obtain a square wave signal with the same frequency as the signal to be measured, and transmits the square wave signal to the processor 3, simplifying the detection circuit of the peak frequency and saving costs.

[0054] In one embodiment, the processor uses a field programmable gate array chip.

[0055] Among them, the field programmable gate array FPGA is a reprogrammable semi-custom circuit. It is developed on the basis of traditional logic circuits such as PAL (programmable array logic: an early programmable logic device composed of a fixed "AND" array and a programmable "OR" array, which can only be programmed once), GAL (improved on the basis of PAL, supporting electric erasure and repeated editing, adding output logic macro cells, improving the flexibility and versatility of design), CPLD (larger scale and more complex structure, suitable for implementing more complex logic control) and gate arrays (semi-custom integrated circuit design technology, pre-forming the basic unit motherboard of logic gates on a silicon wafer, and wiring on the motherboard according to needs to form the required circuit), and is mainly applied to the ASIC (application-specific integrated circuit, an integrated circuit designed and manufactured according to specific user requirements and the needs of specific electronic systems) field, suitable for processing complex algorithms and high-speed data streams.

[0056] In this embodiment, the processor uses a field-programmable gate array (FPGA) chip. The calculation of the peak value of the signal to be measured, the frequency measurement algorithm, the period measurement algorithm, and the comparison of the first measurement frequency and the second measurement frequency are all integrated and edited into the FPGA chip, which improves the performance of the peak frequency detection circuit, simplifies the design of the peak frequency detection circuit, and reduces the cost.

[0057] In one embodiment, as Figure 7 shown, a peak frequency detection method is provided, including: S901, obtaining the digital signal of the signal to be measured after processing; wherein, as Figure 1 shown, the processor 3 obtains the digital signal of the signal to be measured after being processed by the signal processing module 1.

[0058] S902, calculating the peak value of the digital signal of the signal to be measured after processing, and generating a peak signal according to the peak value. The peak signal is used to generate a square wave signal with the same frequency as the signal to be measured after being compared with the signal to be measured after processing; wherein, the processor 3 calculates the digital signal of the signal to be measured obtained, obtains the peak value of the digital signal of the signal to be measured, and generates a peak signal according to the peak value. Wherein, as Figure 1 shown, the processor 3 transmits the generated peak signal to the data comparison module 2. At the same time, the data comparison module 2 obtains the signal to be measured after being processed by the signal processing module 1. The data comparison module 2 compares the signal to be measured after processing with the peak signal to generate a square wave signal with the same frequency as the signal to be measured.

[0059] S903, obtaining the square wave signal, and respectively outputting a first measurement frequency through a frequency measurement algorithm and a second measurement frequency through a period measurement algorithm according to the square wave signal, and outputting the measurement frequency of the signal to be measured according to the first measurement frequency and the second measurement frequency.

[0060] Wherein, the processor 3 obtains the square wave signal. The processor 3 respectively outputs a first measurement frequency through a frequency measurement algorithm and a second measurement frequency through a period measurement algorithm for the square wave signal, and outputs the measurement frequency of the signal to be measured according to the two.

[0061] In this embodiment, the processor obtains the square wave signal, and obtains two sets of measurement frequencies through the frequency measurement algorithm and the period measurement algorithm, and then obtains the measurement frequency of the signal to be measured. Since the frequency measurement algorithm and the period measurement algorithm calculate two sets of data at the same time, compared with only using one algorithm, the detection accuracy is improved.

[0062] In one embodiment, as Figure 8 shown, outputting the measurement frequency of the signal to be measured according to the first measurement frequency and the second measurement frequency specifically includes: S1001, Compare the first measured frequency with a preset critical frequency; Among them, the preset critical frequency is determined to be 50 through multiple experiments .

[0063] S1002, Compare the second measured frequency with the preset critical frequency; S1003, If both the first measured frequency and the second measured frequency are less than the preset critical frequency, confirm that the signal to be measured is a low-frequency signal, and output the second measured frequency as the measured frequency of the signal to be measured; Among them, when both measured frequencies are less than the preset critical frequency, it indicates that the signal to be measured is a low-frequency signal. At this time, the second measured frequency obtained by using the period measurement algorithm with better measurement accuracy at low frequencies is used as the final measured frequency for output.

[0064] S1004, If both the first measured frequency and the second measured frequency are greater than or equal to the preset critical frequency, confirm that the signal to be measured is a high-frequency signal, and output the first measured frequency as the measured frequency of the signal to be measured; Among them, when both measured frequencies are greater than the preset critical frequency, it indicates that the signal to be measured is a high-frequency signal. At this time, the first measured frequency obtained by using the frequency measurement algorithm with better measurement accuracy at high frequencies is used as the final measured frequency for output; When both measured frequencies are equal to the preset critical frequency, it indicates that the signal to be measured is a high-frequency signal. At this time, the first measured frequency obtained by using the frequency measurement algorithm with better measurement accuracy at high frequencies is used as the final measured frequency for output, that is, 50 , that is, the measured frequency of the signal to be measured is 50 .

[0065] S1005, If the first measured frequency is less than the preset critical frequency and the second measured frequency is greater than the preset critical frequency, confirm that the signal to be measured is a high-frequency signal, and output the first measured frequency as the measured frequency of the signal to be measured.

[0066] Among them, when the first measured frequency is greater than the preset critical frequency and the second measured frequency is less than the preset critical frequency, it indicates that the signal to be measured is a high-frequency signal. Since the period measurement algorithm has better measurement accuracy in the low-frequency band, the second measured frequency obtained by measuring the signal to be measured of a high-frequency signal is inaccurate. Therefore, the first measured frequency is output as the measured frequency of the signal to be measured.

[0067] In this embodiment, two sets of measured frequencies are obtained through the frequency measurement algorithm and the period measurement algorithm, and then the measured frequency of the signal to be measured is obtained. Since the frequency measurement algorithm and the period measurement algorithm calculate two sets of data simultaneously and compare the two sets of data with the preset critical frequency at the same time to obtain the measured frequency of the signal to be measured, the detection accuracy is improved.

[0068] The above-described embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the various embodiments of the present invention, and should all be included in the protection scope of the present invention.

Claims

1. A peak frequency detection circuit, characterized in that Including: A signal processing module, a data comparison module and a processor. Among them, the input end of the signal processing module is used to obtain the signal to be measured. The first output end of the signal processing module is connected to the first input end of the processor. The second output end of the signal processing module is connected to the first input end of the data comparison module. The second input end of the data comparison module is connected to the output end of the processor. The output end of the data comparison module is connected to the second input end of the processor; The signal processing module is used to process the signal to be measured to obtain the processed signal to be measured. The signal processing module is also used to send the digital signal of the processed signal to be measured to the processor through the first output end. The processor is used to calculate the peak value of the digital signal of the processed signal to be measured, generate a peak signal according to the peak value. The output end of the processor outputs the peak signal to the second input end of the data comparison module. The data comparison module is used to obtain the processed signal to be measured from the second output end of the signal processing module, and generate a square wave signal with the same frequency as the signal to be measured according to the processed signal to be measured and the peak signal. The output end of the data comparison module outputs the square wave signal to the second input end of the processor. The processor is used to obtain the first measurement frequency through the frequency measurement algorithm and the second measurement frequency through the period measurement algorithm according to the square wave signal, and output the measurement frequency of the signal to be measured according to the first measurement frequency and the second measurement frequency.

2. The detection circuit according to claim 1, wherein Outputting the measurement frequency of the signal to be measured according to the first measurement frequency and the second measurement frequency specifically includes: Comparing the first measurement frequency with a preset critical frequency; Comparing the second measurement frequency with the preset critical frequency; If both the first measurement frequency and the second measurement frequency are less than the preset critical frequency, it is confirmed that the signal to be measured is a low-frequency signal, and the second measurement frequency is output as the measurement frequency of the signal to be measured.

3. The detection circuit according to claim 2, characterized in that Also including: If both the first measurement frequency and the second measurement frequency are greater than or equal to the preset critical frequency, it is confirmed that the signal to be measured is a high-frequency signal, and the first measurement frequency is output as the measurement frequency of the signal to be measured; If the first measurement frequency is less than the preset critical frequency and the second measurement frequency is greater than the preset critical frequency, it is confirmed that the signal to be measured is a high-frequency signal, and the first measurement frequency is output as the measurement frequency of the signal to be measured.

4. The detection circuit according to claim 3, characterized in that, The signal processing module includes: a first operational amplifier module, a second operational amplifier module and an analog-to-digital conversion module. Among them, the input end of the first operational amplifier module is used to receive the signal to be measured. The output end of the first operational amplifier module is connected to the input end of the analog-to-digital conversion module. The output end of the analog-to-digital conversion module is connected to the first input end of the processor. The input end of the second operational amplifier module is used to receive the signal to be measured. The output end of the second operational amplifier module is connected to the first input end of the data comparison module; The input terminals of the first operational amplifier module and the second operational amplifier module serve as the input terminals of the signal processing module, the output terminal of the analog-to-digital conversion module serves as the first output terminal of the signal processing module, and the output terminal of the second operational amplifier module serves as the second output terminal of the signal processing module; Among them, the first operational amplifier module is used to attenuate the voltage of the signal to be measured to a preset range and output it to the analog-to-digital conversion module, the second operational amplifier module is used to attenuate the voltage of the signal to be measured to a preset range and output it to the data comparison module, and the analog-to-digital conversion module is used to convert the signal to be measured attenuated to the preset range from an analog signal to a digital signal and output it to the processor.

5. The detection circuit according to claim 4, wherein The first operational amplifier module includes: a first voltage-dividing resistor, a second voltage-dividing resistor, and a first operational amplifier chip. One end of the first voltage-dividing resistor receives the signal to be measured, the other end of the first voltage-dividing resistor is connected to the input terminal of the first operational amplifier chip, one end of the second voltage-dividing resistor is connected to the input terminal of the first operational amplifier chip, the other end of the second voltage-dividing resistor is grounded, and the output terminal of the first operational amplifier chip is connected to the input terminal of the analog-to-digital conversion module; Among them, one end of the first voltage-dividing resistor serves as the input terminal of the first operational amplifier module, and the output terminal of the first operational amplifier chip serves as the output terminal of the first operational amplifier module.

6. The detection circuit according to claim 5, wherein The second operational amplifier module includes: a third voltage-dividing resistor, a fourth voltage-dividing resistor, and a second operational amplifier chip. One end of the third voltage-dividing resistor receives the signal to be measured, the other end of the third voltage-dividing resistor is connected to the input terminal of the second operational amplifier chip, one end of the fourth voltage-dividing resistor is connected to the input terminal of the second operational amplifier chip, the other end of the fourth voltage-dividing resistor is grounded, and the output terminal of the second operational amplifier chip is connected to the first input terminal of the data comparison module; Among them, one end of the third voltage-dividing resistor serves as the input terminal of the second operational amplifier module, and the output terminal of the second operational amplifier chip serves as the second output terminal of the signal processing module.

7. The detection circuit according to claim 6, wherein The data comparison module includes: a comparator and a digital-to-analog conversion module. The first input terminal of the comparator is connected to the output terminal of the second operational amplifier module, the second input terminal of the comparator is connected to the output terminal of the digital-to-analog conversion module, the output terminal of the comparator is connected to the second input terminal of the processor, and the input terminal of the digital-to-analog conversion module is connected to the output terminal of the processor; The first input terminal of the comparator serves as the first input terminal of the data comparison module, the output terminal of the comparator serves as the output terminal of the data comparison module, and the input terminal of the digital-to-analog conversion module serves as the second input terminal of the data comparison module; Among them, the digital-to-analog conversion module is used to convert the peak signal from a digital signal to an analog signal and output it to the comparator, and the comparator is used to generate a signal to be measured with the same frequency as the signal to be measured according to the peak signal converted to an analog signal and the signal to be measured attenuated to the preset range.

8. The detection circuit according to claim 7, wherein The processor uses a field programmable gate array chip.

9. A peak frequency detection method, characterized in that, Including: Obtain the digital signal of the processed signal to be measured; Calculate the peak value of the digital signal of the processed signal to be measured, generate a peak signal according to the peak value, and the peak signal is used to generate a square wave signal with the same frequency as the signal to be measured after comparison with the processed signal to be measured; Obtain the square wave signal, and respectively output a first measurement frequency through a frequency measurement algorithm and a second measurement frequency through a period measurement algorithm according to the square wave signal, and output the measurement frequency of the signal to be measured according to the first measurement frequency and the second measurement frequency.

10. The detection method according to claim 9, characterized in that, Outputting the measurement frequency of the signal to be measured according to the first measurement frequency and the second measurement frequency specifically includes: Compare the first measurement frequency with a preset critical frequency; Compare the second measurement frequency with the preset critical frequency; If both the first measurement frequency and the second measurement frequency are less than the preset critical frequency, confirm that the signal to be measured is a low-frequency signal, and output the second measurement frequency as the measurement frequency of the signal to be measured; If both the first measurement frequency and the second measurement frequency are greater than or equal to the preset critical frequency, confirm that the signal to be measured is a high-frequency signal, and output the first measurement frequency as the measurement frequency of the signal to be measured; If the first measurement frequency is less than the preset critical frequency and the second measurement frequency is greater than the preset critical frequency, confirm that the signal to be measured is a high-frequency signal, and output the first measurement frequency as the measurement frequency of the signal to be measured.

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