Single-photon laser radar signal processing scheduling method based on heterogeneous processor

By allocating RAM to each channel in a digital logic device and utilizing FIFO storage, combined with the data frame processing of the microprocessor, the parallel processing problem of multi-channel single-photon lidar signals is solved, and efficient data processing and synchronous control is achieved.

CN120334945APending Publication Date: 2025-07-18CHINA ELECTRONIC TECH GRP CORP NO 38 RES INST
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Patent Information

Application Number
CN202510587150.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-05-08
Publication Date
2025-07-18

AI Technical Summary

Technical Problem

The prior art is difficult to efficiently process multi-channel single-photon lidar signals in parallel, resulting in large data volume, insufficient processing capacity and easy data loss.

Method used

Using a heterogeneous processor-based method, by allocating RAM to each channel in a digital logic device for photon counting and accumulation, and depositing it into FIFO after the accumulation reaches a set threshold, the microprocessor is used for data frame processing and flow control, and parallel processing and data filtering are realized.

Benefits of technology

It realizes efficient parallel processing of multi-channel single-photon lidar signals, reduces the computational burden of the microprocessor, avoids data loss, and maintains efficient synchronous operation when the data volume changes.

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Abstract

The invention provides a single-photon laser radar signal processing scheduling method based on a heterogeneous processor, and relates to the field of single-photon laser radar signal processing scheduling. Aiming at the characteristics of multi-channel single-photon laser radar signals, a digital logic device is used for accumulating signals of all acquisition channels at the same time to obtain preprocessed data, the preprocessed data are recombined into a data frame according to a measurement sequence, the data frame is input into a memory space of a microprocessor through a high-speed transmission bus, and then filtering and trace point condensation are carried out through the microprocessor; and obtaining the target distance, and controlling the data transmission flow of the digital logic device based on the number of the unprocessed data frames in the memory space. By using the method, the performance characteristics of the heterogeneous processor can be fully exerted, parallel processing of multichannel single-photon laser radar signals is realized, the running time proportion of the microprocessor is automatically kept at a relatively high level under the environment of data volume change, and the performance of the heterogeneous processor is fully utilized.
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Description

Technical Field

[0001] The present invention relates to the field of single-photon lidar signal processing and scheduling, and particularly to a single-photon lidar signal processing and scheduling method based on heterogeneous processors. Background Art

[0002] Single-photon lidar uses single-photon detection technology, has the ability to detect and identify signals with extremely weak power, and has a small beam divergence. Therefore, it has the characteristics of long detection distance and high spatial resolution. The multi-channel single-photon lidar that uses multi-beam simultaneous transceiver detection has doubled the original detection range and has been widely used in fields such as three-dimensional topographic mapping and detection of atmospheric components such as aerosols. However, high sensitivity to optical signals and a large number of receiving channels also mean that the data volume of multi-channel single-photon lidar is large, which poses requirements on the signal processing ability of the system in scenarios that require real-time processing.

[0003] In related technologies, using multiple high-performance processors for parallel computing can solve the problem of real-time processing of single-photon lidar signals. However, high-performance processors have high costs and high power consumption, which is not conducive to the low-cost integration of the system, and the design difficulty of parallel processing algorithms is large. Currently, a more common method is to use a combination of digital logic devices and microprocessors, and achieve high-speed data interconnection through a high-speed bus to perform collaborative processing on the original signal. This method utilizes the strong parallel processing ability of digital logic devices for simple logical operations. By performing photon number accumulation counting on the digital logic device, the computational burden on the microprocessor can be effectively reduced.

[0004] However, while the multi-channel single-photon lidar has doubled the detection range, the total data volume has also doubled. After photon number accumulation, the data volume still poses a high requirement on the computing power of the microprocessor. In addition, single-photon lasers are very sensitive to received optical signals, and the difference in the amount of original signals generated by different irradiances in the detection area is also large. Once the preprocessed data output by the digital logic device exceeds the processing capacity of the microprocessor, data loss will occur. Summary of the Invention

[0005] (1) Technical Problems to be Solved

[0006] Aiming at the deficiencies of the prior art, the present invention provides a single-photon lidar signal processing and scheduling method based on heterogeneous processors, which solves the technical problem of how to use a combination of digital logic devices and microprocessors to efficiently and parallelly process multi-channel single-photon lidar signals.

[0007] (2) Technical Solutions

[0008] To achieve the above object, the present invention is realized through the following technical solutions:

[0009] A single-photon lidar signal processing and scheduling method based on heterogeneous processors, comprising:

[0010] In a digital logic device, allocate RAM for each channel of the single-photon lidar to perform multi-channel parallel photon counting accumulation on the detection results of multi-channel single-photon signals collected;

[0011] After the accumulation reaches the set number of times, find the cells in the RAM where the photon count exceeds the preprocessing threshold, store the corresponding channel number, total channel photon count, RAM cell number, and cell count into the FIFO, and reset all the RAMs; wherein the preprocessing threshold includes multiple channel preprocessing thresholds equal to the number of system channels;

[0012] After the storage length of the FIFO reaches the set value, pack the stored data into a data frame and transfer it into the data cache of the microprocessor through a high-speed data bus;

[0013] After the microprocessor receives the data frame, put the lidar preprocessing data in the data frame into the memory space for channel data volume statistics, fine filtering, and track condensation processing to obtain the target track distance;

[0014] After the microprocessor processes a data frame, query the number of data frames to be processed, and adjust the preprocessing thresholds of each channel in real time based on the query result to control the current data transmission flow of the digital logic device.

[0015] Preferably, define the number of data frames to be processed as n dataframe , and the real-time adjustment of the preprocessing thresholds of each channel based on the query result includes:

[0016] If n dataframe is equal to 0, reduce the preprocessing threshold of the channel with the least data volume by 1 and set it in the digital logic device;

[0017] If n dataframe is equal to 1, do not change the preprocessing thresholds of all channels in the digital logic device;

[0018] If n dataframe is greater than 1, increase the preprocessing thresholds of the n dataframe -1 channels with the most data volume by 1 and set them in the digital logic device.

[0019] Preferably, the detection results of the multi-channel single-photon signals include a start signal and the single-photon signal of each channel, and both the start signal and the single-photon signal of each channel are LVTTL square wave levels; counting is performed based on the clock cycle of the digital logic device, and the clock cycle number when each single-photon signal arrives is allocated.

[0020] Preferably, the process of determining the width and depth of the RAM includes:

[0021] Determining the RAM width based on the maximum cumulative number of times of the system, and it is necessary to satisfy

[0022] 2 width >n maxacc

[0023] where width is the RAM width and n maxacc is the cumulative number of times;

[0024] and determining the RAM depth based on the system detection distance and the clock period of the digital logic device, and it is necessary to satisfy:

[0025]

[0026] where nlength is the RAM depth, L is the maximum system detection distance, c is the speed of light, and t is the clock period.

[0027] Preferably, the preprocessing threshold is represented by a one-dimensional array, and the length of the array is the same as the number of system channels. Each array element corresponds to a different channel preprocessing threshold th[i], and the values of all array elements are all initialized to where n maxacc is the maximum cumulative number of times of the system, and i is the channel index.

[0028] Preferably, the high-speed data bus includes:

[0029] If the digital logic device and the microprocessor are connected at the chip level, the high-speed data bus is the AXI bus; if the digital logic device and the microprocessor are connected at the board module level, the high-speed data bus is a 10 Gigabit Ethernet cable.

[0030] Preferably, the fine filtering includes:

[0031] Calculating the filtering threshold based on the real-time total photon count of the corresponding channel, and removing the units with counts lower than the threshold; where the filtering threshold is calculated by the following formula:

[0032]

[0033] where, th filt [i] is the filtering threshold of channel i, phsum i is the real-time total photon count of channel i, and nlength is the RAM depth.

[0034] Preferably, the channel data volume is represented by a one-dimensional array, and the length of the array is the same as the number of system channels. Each array element corresponds to the total number of data datanum[i] belonging to different channels in a data frame, where i is the channel index.

[0035] (III) Beneficial effects

[0036] The present invention provides a single-photon lidar signal processing and scheduling method based on a heterogeneous processor. Compared with the prior art, it has the following beneficial effects:

[0037] In view of the signal characteristics of a multi-channel single-photon lidar, the present invention uses digital logic devices to simultaneously accumulate the signals of all acquisition channels to obtain preprocessed data. After reorganizing them into data frames in the measurement order, they are input into the memory space of the microprocessor through a high-speed transmission bus, and then filtered and point clustering are performed through the microprocessor to obtain the target distance, and the data transmission flow of the digital logic device is controlled based on the number of unprocessed data frames in the memory space. By using this method, the performance characteristics of the heterogeneous processor can be fully utilized, parallel processing of multi-channel single-photon lidar signals can be achieved, and in an environment where the data volume changes, the running time ratio of the microprocessor can be automatically maintained at a relatively high level, making full use of the performance of the heterogeneous processor. Description of the drawings

[0038] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0039] Figure 1 It is a block diagram of a single-photon lidar signal processing and scheduling method based on a heterogeneous processor provided by an embodiment of the present invention;

[0040] Figure 2 It is a flowchart of a single-photon lidar signal processing and scheduling method based on a heterogeneous processor provided by an embodiment of the present invention. Specific implementation manners

[0041] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art without creative efforts based on the embodiments of the present invention belong to the scope of protection of the present invention.

[0042] Embodiments of this application provide a method for processing and scheduling single-photon lidar signals based on heterogeneous processors, which solves the technical problem of how to efficiently and parallelly process multi-channel single-photon lidar signals using a combination of digital logic devices and microprocessors.

[0043] Supplement relevant terms in the embodiments of the present invention:

[0044] 1) Random Access Memory (RAM) is an internal memory that directly exchanges data with the Central Processing Unit (CPU).

[0045] 2) FIFO (First-In-First-Out) is a data buffer that follows the first-in, first-out principle. In computer programming, first-in, first-out (FIFO) is a method for processing program work requests issued from a queue or stack, which ensures that the earliest requests are processed first.

[0046] 3) AXI (Advanced eXtensible Interface) is a bus protocol that is an important part of the Advanced Microcontroller Bus Architecture (AMBA) 3.0 protocol and is an on-chip bus oriented to high performance, high bandwidth, and low latency.

[0047] In addition, it should be noted that the embodiments of the present invention do not limit the specific selection of the digital logic devices and microprocessors in the solution. Those skilled in the art can select appropriate digital logic devices and microprocessors according to the actual situation to achieve efficient parallel processing of multi-channel single-photon lidar signals. For example, the digital logic device can be a Field Programmable Gate Array (FPGA), etc.; the microprocessor can be a digital signal processor (DSP), an Advanced RISC Machine (ARM), etc.

[0048] To better understand the above technical solution, the above technical solution will be described in detail below in conjunction with the accompanying drawings of the specification and specific embodiments.

[0049] Embodiment:

[0050] As Figure 1As shown in the figure, an embodiment of the present invention provides a single-photon lidar signal processing and scheduling method based on a heterogeneous processor, including:

[0051] S1. In a digital logic device, allocate RAM for each channel of the single-photon lidar to perform multi-channel parallel photon counting accumulation on the detection results of the multi-channel single-photon signals collected.

[0052] S2. After the accumulation reaches the set number of times, find the units in the RAM whose stored photon counts exceed the preprocessing threshold, store the corresponding channel numbers, total channel photon counts, RAM unit numbers, and unit counts in the FIFO, and reset all the RAMs; where the preprocessing threshold includes multiple channel preprocessing thresholds equal to the number of system channels.

[0053] S3. After the storage length of the FIFO reaches the set value, pack the stored data into a data frame and transmit it into the data cache of the microprocessor through a high-speed data bus.

[0054] S4. After the microprocessor receives the data frame, put the lidar preprocessing data in the data frame into the memory space for channel data volume statistics, fine filtering, and point clustering processing to obtain the target point distance.

[0055] S5. After the microprocessor finishes processing a data frame, query the number of data frames to be processed, and adjust the preprocessing thresholds of each channel in real time based on the query result to control the current data transmission flow of the digital logic device.

[0056] The embodiment of the present invention adopts a single-photon lidar signal processing method based on a heterogeneous processor to control the data transmission flow of the digital logic device according to the number of unprocessed data frames in the memory space of the microprocessor. By using this method, the performance characteristics of the heterogeneous processor can be fully utilized to achieve parallel processing of multi-channel single-photon lidar signals, and in an environment where the data volume changes, the heterogeneous processor can automatically maintain efficient synchronous operation.

[0057] As Figure 2 shown, Figure 2 discloses a flowchart of a single-photon lidar signal processing and scheduling method based on a heterogeneous processor. Next, each step of the above solution will be introduced in detail in combination with Figure 2 Details:

[0058] In step S1, in a digital logic device, allocate RAM for each channel of the single-photon lidar to perform multi-channel parallel photon counting accumulation on the detection results of the multi-channel single-photon signals collected.

[0059] In this step, in the digital logic device, for each channel of the single-photon lidar (such as Figure 2allocate RAM (corresponding to RAM1, …, RAMn) to channels 1, …, channel n, and the determination process of the width and depth of any one of the RAMs includes:

[0060] Determine the RAM width based on the maximum cumulative number of times of the system, and it is necessary to satisfy

[0061] 2 width >n maxacc

[0062] where width is the RAM width and n maxacc is the cumulative number of times.

[0063] And determine the RAM depth based on the system detection distance and the clock cycle of the digital logic device, and it is necessary to satisfy:

[0064]

[0065] where nlength is the RAM depth, L is the maximum system detection distance, c is the speed of light, and t is the clock cycle.

[0066] Furthermore, the multi-channel single-photon signal detection result includes a start signal and the single-photon signals of each channel, and both the start signal and the single-photon signals of each channel are LVTTL square wave levels.

[0067] On this basis, the specific implementation of multi-channel parallel photon counting accumulation for the detected results of multi-channel single-photon signals in this step is: counting based on the clock cycle of the digital logic device, allocating the clock cycle number when each single-photon signal arrives, and then realizing multi-channel parallel photon counting accumulation.

[0068] In step S2, after the accumulation reaches the set number of times, find the cells in the RAM where the stored photon count exceeds the preprocessing threshold, store the corresponding channel number, total channel photon count, RAM cell number, and cell count into the FIFO, and reset all the RAMs.

[0069] Exemplarily, the preprocessing threshold includes multiple channel preprocessing thresholds equal to the number of system channels. Specifically, the preprocessing threshold is represented by a one-dimensional array, the length of which is the same as the number of system channels, and each array element corresponds to a different channel preprocessing threshold th[i]. All the numerical values of the array elements are initialized to and then change continuously with the setting of the microprocessor, where n maxacc is the maximum cumulative number of times of the system, and i is the channel index.

[0070] In step S3, after the FIFO storage length reaches the set value, the stored data is packed into a data frame and transmitted into the data cache of the microprocessor through the high-speed data bus.

[0071] It should be noted that different schemes can be selected for the high-speed data bus according to different situations, including:

[0072] 1), If the digital logic device and the microprocessor are connected at the chip level, the high-speed data bus is the AXI bus.

[0073] 2), If the digital logic device and the microprocessor are connected at the board module level, the high-speed data bus is a 10 Gigabit Ethernet cable.

[0074] In step S4, after the microprocessor receives the data frame, the lidar preprocessed data in the data frame is placed in the memory space for channel data volume statistics, fine filtering, and point clustering processing to obtain the target point trace distance.

[0075] Exemplarily, the channel data volume is represented by a one-dimensional array. Specifically, the length of the array is the same as the number of system channels, and each array element corresponds to the total number of data datanum[i] belonging to different channels in a data frame.

[0076] Furthermore, the fine filtering includes:

[0077] Calculating the filtering threshold based on the real-time total photon count of the corresponding channel, and removing the units with counts lower than the threshold; where the filtering threshold is calculated by the following formula:

[0078]

[0079] where, th filt [i] is the filtering threshold of channel i, and phsum i is the real-time total photon count of channel i.

[0080] In step S5, after the microprocessor finishes processing a data frame, it queries the number of data frames to be processed and adjusts the preprocessing threshold of each channel in real time based on the query result to control the current data transmission flow of the digital logic device.

[0081] In this step, the data transmission flow of the digital logic device is controlled by the number of unprocessed data frames in the microprocessor memory space, realizing the automatic maintenance of the efficient synchronous operation of heterogeneous processors in an environment with changing data volumes.

[0082] Specifically, define the number of data frames to be processed as n dataframe , then a feasible real-time adjustment of the preprocessing threshold of each channel based on the query result may include:

[0083] 1), If ndataframe Equal to 0, reduce the preprocessing threshold of the channel with the least amount of data by 1 and set it in the digital logic device;

[0084] 2), If n dataframe Equal to 1, do not change the preprocessing thresholds of all channels in the digital logic device;

[0085] 3), If n dataframe Greater than 1, increase the preprocessing thresholds of the n dataframe -1 channels with the most data by 1 and set them in the digital logic device.

[0086] It can be understood that the above adjustment method is only for illustrative purposes, and those skilled in the art can make adaptive adjustments according to the actual situation.

[0087] So far, the embodiment of the present invention has completed all the processes of the single-photon lidar signal processing and scheduling method based on heterogeneous processors.

[0088] In summary, compared with the prior art, the following beneficial effects are achieved:

[0089] 1. For multi-channel single-photon lidars, due to the extremely high detector sensitivity and the large number of channels, the amount of data is often several times higher than that of other single-photon lidars, posing a challenge to real-time data processing. This method combines the characteristic of the short read / write operation cycle of the random access memory at the specified address in the digital logic device, allocates RAM to each channel of the lidar, uses the arrival time of each detection signal as the RAM address, and parallelly completes the photon number accumulation of all channels, avoiding the occupation of computing resources for photon number accumulation by using a microprocessor.

[0090] 2. For multi-channel single-photon lidars, after the photon number accumulation is completed, the amount of data becomes the product of the number of channels, the RAM depth per channel, and the RAM word width. Directly transmitting it to the microprocessor for processing will occupy a large amount of memory resources. This method performs threshold detection after photon number accumulation, and regards the data with a count lower than the preprocessing threshold as noise and removes it. Since single-photon lidars often work in scenarios with a low signal-to-noise ratio, removing noise can reduce the amount of data and reduce the subsequent filtering burden on the microprocessor.

[0091] 3. The method of the present invention uses the microprocessor to query the currently to-be-processed data frame and adjusts the preprocessing thresholds of each channel in real time, so that the microprocessor will not cause data loss due to the amount of data exceeding its processing capacity, and at the same time avoid filtering out valid signals due to too high a threshold. In this way, under the condition of continuously changing noise intensity, the occupancy ratio of the microprocessor operation can be automatically maintained at a relatively high level, and the performance of the heterogeneous processor can be efficiently utilized.

[0092] It should be noted that in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising an..." does not exclude the presence of additional identical elements in the process, method, article or device comprising said element.

[0093] The above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit them. Although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some of the technical features. These modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A single-photon lidar signal processing and scheduling method based on heterogeneous processors, characterized in that Including: In a digital logic device, a RAM is allocated for each channel of a single-photon lidar to perform multi-channel parallel photon counting accumulation on the detection results of multi-channel single-photon signals collected; After the accumulation reaches the set number of times, find the units in the RAM whose stored photon counts exceed the preprocessing threshold, store the corresponding channel number, total channel photon count, RAM unit number, and unit count in the FIFO, and reset all RAMs; Wherein the preprocessing threshold includes multiple channel preprocessing thresholds equal to the number of system channels; After the storage length of the FIFO reaches the set value, pack the stored data into a data frame and transmit it into the data cache of the microprocessor through a high-speed data bus; After the microprocessor receives the data frame, put the lidar preprocessing data in the data frame into the memory space for channel data volume statistics, fine filtering, and track condensation processing to obtain the target track distance; After the microprocessor processes a data frame, query the number of data frames to be processed, and based on the query result, adjust each channel preprocessing threshold in real time to control the current data transmission flow of the digital logic device.

2. The single-photon lidar signal processing and scheduling method according to claim 1, wherein Define the number of data frames to be processed as n dataframe , and the real-time adjustment of the preprocessing thresholds of each channel based on the query results includes: If n dataframe is equal to 0, reduce the preprocessing threshold of the channel with the least amount of data by 1 and set it in the digital logic device; If n dataframe is equal to 1, do not change all the channel preprocessing thresholds in the digital logic device; If n dataframe is greater than 1, increment by 1 the preprocessing thresholds of the n dataframe -1 channels with the largest data volume and set them in the digital logic device.

3. The single-photon lidar signal processing and scheduling method according to claim 1, wherein The multi-channel single-photon signal detection results include a start signal and single-photon signals of each channel, and both the start signal and the single-photon signals of each channel are LVTTL square wave levels; counting is performed based on the clock cycle of the digital logic device, and the clock cycle number at the arrival of each single-photon signal is allocated.

4. The single-photon lidar signal processing and scheduling method according to claim 1, characterized in that The determination process of the width and depth of the RAM includes: Determine the RAM width based on the maximum system accumulation times, and it is necessary to satisfy 2 width >n maxacc where width is the width of the RAM, and n maxacc is the maximum cumulative number of times; And determine the RAM depth based on the system detection distance and the clock cycle of the digital logic device, and it is necessary to satisfy: Where nlength is the RAM depth, L is the maximum system detection distance, c is the speed of light, and t is the clock cycle.

5. The single-photon lidar signal processing and scheduling method according to claim 1, wherein The preprocessing threshold is represented by a one-dimensional array, and the length of the array is the same as the number of system channels. Each array element corresponds to a different channel preprocessing threshold th[i], and the values of all array elements are all initialized to where n maxacc is the maximum cumulative number of times of the system, where i is the channel index.

6. The single-photon lidar signal processing and scheduling method according to claim 1, wherein The high-speed data bus includes: If the digital logic device and the microprocessor are connected at the chip level, the high-speed data bus is the AXI bus; if the digital logic device and the microprocessor are connected at the board module level, the high-speed data bus is a 10 Gigabit Ethernet cable.

7. The single-photon lidar signal processing and scheduling method according to claim 1, wherein, The fine filtering includes: Calculate the filtering threshold based on the real-time total photon count of the corresponding channel, and remove the units with counts lower than the threshold; wherein the filtering threshold is calculated by the following formula: Among them, th filt [i] is the filtering threshold of channel i, and phsum i is the total real-time photon count of channel i, and nlength is the RAM depth.

8. The single-photon lidar signal processing and scheduling method according to claim 1, characterized in that The channel data volume is represented by a one-dimensional array, the array length of which is the same as the number of system channels, and each array element corresponds to the total number of data datanum[i] belonging to different channels in a data frame, where i is the channel index.