Voltage stabilizer circuit
The working state of the bandgap voltage reference module is controlled through the current logic module, combined with the discharge speed of the capacitor module and the control signal switching, the working state of the power tube is optimized, and the shortcomings of the low-power LDO circuit in high precision and transient response are solved, and the balance between low power consumption and fast response is achieved.
Patent Information
- Application Number
- CN202510555874.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-29
- Publication Date
- 2025-07-18
AI Technical Summary
The existing low-power LDO circuits maintain high output accuracy and good transient response, and the response speed of the protection circuit is slow, which easily leads to chip damage.
By introducing a current logic module to control the working state of the bandgap voltage reference module, it can continue to work at high power and work during low power time. Combined with the different discharge speeds of the capacitor module and the switching of control signals, the working state of the power tube is optimized to achieve a balance between high precision and low power consumption.
It realizes that high output accuracy and good transient response are maintained under different power consumption states, while significantly reducing circuit power consumption and improving the response speed of the protection circuit to avoid chip damage.
Smart Images
Figure CN120335545A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the technical field of voltage regulators, and particularly to a voltage regulator circuit. Background Art
[0002] As an important voltage conversion chip in power management, the Low Dropout Regulator (LDO) is widely used in portable electronic devices. To improve the battery usage time and lifespan in electronic devices, the LDO requires a lower quiescent power consumption design.
[0003] The power consumption of current low-power LDO circuits is generally in the μA range, and the battery energy will still be consumed during standby. However, if the power consumption is further reduced, the circuit performance will significantly decline, such as the transient response and output accuracy will decrease, and the response speed of some protection circuits such as short-circuit protection and over-temperature protection will become slower, which is likely to cause chip damage.
[0004] How to achieve a lower power consumption effect under the conditions of high output accuracy and good transient response is the technical problem to be solved by this application. Summary of the Invention
[0005] The purpose of this application is to provide a voltage regulator circuit to achieve a lower power consumption effect under the conditions of high output accuracy and good transient response.
[0006] The voltage regulator circuit includes a power transistor, a bandgap voltage reference module, a gate voltage module, a current logic module, a first capacitor module, and a second capacitor module;
[0007] The source of the power transistor is used to connect to the input power supply;
[0008] The drain of the power transistor is used to connect to the load;
[0009] The gate of the power transistor is connected to the output terminal of the gate voltage module;
[0010] The current logic module is connected to the source or drain of the power transistor. The current logic module is used to collect the current of the power transistor, output a first control signal when determining that the current of the power transistor represents a first operating state, and alternately output a first control signal and a second control signal when determining that the current of the power transistor represents a second operating state;
[0011] When the current logic module outputs the first control signal, the reference voltage provided by the bandgap voltage reference module charges the first capacitor module, and the reference voltage provided by the bandgap voltage reference module charges the second capacitor module;
[0012] When the current logic module outputs a second control signal, the second capacitor module discharges faster than the first capacitor module;
[0013] The first capacitor module is connected to the gate voltage module, and the gate voltage module is configured to compare the voltage of the first capacitor module with the output voltage of the voltage regulator circuit to generate the gate voltage of the power transistor; the drain voltage of the power transistor is the output voltage of the voltage regulator circuit;
[0014] The second capacitor module is connected to the current logic module, and the current logic module is configured to output a first control signal when it detects that the second capacitor module has finished discharging and output a second control signal when it detects that the second capacitor module has finished charging when determining that the current of the power transistor represents the second operating state.
[0015] Compared with the prior art, the present application has the following beneficial effects:
[0016] Because when the current logic module determines that the current of the power transistor represents high power, the bandgap voltage reference module keeps working, and when it determines that the current of the power transistor represents low power, the bandgap voltage reference module works intermittently, which not only ensures the accuracy required in different power consumption operating states but also saves power consumption. Description of the Drawings
[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings required for use in the embodiments. It should be understood that the following drawings only show some embodiments of the present application, so they should not be regarded as limiting the scope. For those of ordinary skill in the art, without creative efforts, other related drawings can also be obtained based on these drawings.
[0018] Figure 1 Schematic diagram of the connection relationship of a power transistor, a gate voltage module, and a current logic module provided by an embodiment of the present application;
[0019] Figure 2 Schematic diagram of the connection relationship of a bandgap voltage reference module, a first transmission gate module, a second transmission gate module, a first capacitor module, and a second capacitor module provided by an embodiment of the present application;
[0020] Figure 3 For Figure 2 An alternative embodiment diagram of
[0021] Figure 4 Schematic diagram of the changes in different signals when the power transistor provided by the embodiment of the present application first operates at high power and then at low power;
[0022] Figure 5Schematic diagram of a voltage regulator circuit provided by an embodiment of the present application, which includes four transmission gates and a buffer;
[0023] Figure 6 Schematic diagram of a voltage regulator circuit provided by an embodiment of the present application. Detailed implementation manners
[0024] To make the objectives, technical solutions, and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. The described embodiments are some, but not all, of the embodiments of the present application. Usually, the components of the embodiments of the present application described herein can be arranged and designed in various different configurations.
[0025] Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the claimed present application, but merely represents selected embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present application without creative efforts shall fall within the protection scope of the present application. Without conflict, the following embodiments and the features in the embodiments can be combined with each other.
[0026] In the description of the present application, it should be noted that:
[0027] Relative terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations;
[0028] "Connection" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be directly connected, or indirectly connected through an intermediate medium.
[0029] As Figure 1 , the voltage regulator circuit includes a power transistor and a gate voltage module, and has the following connection relationships:
[0030] The source of the power transistor is used to connect to the input power supply IN;
[0031] The drain of the power transistor is used to connect to the load (the drain voltage of the power transistor is the output voltage Vout of the voltage regulator circuit);
[0032] The gate of the power transistor is connected to the output terminal of the gate voltage module;
[0033] The gate voltage module performs feedback on the gate of the power transistor according to the output voltage Vout. Figure 1 The voltage regulator circuit in also includes a current logic module, which will be introduced later.
[0034] The gate voltage module requires a high-precision voltage as a reference benchmark. A high-precision voltage requires a relatively high power to ensure the precision, and this voltage is generated by the bandgap voltage reference module. The English for bandgap voltage is bandgap, abbreviated as BG.
[0035] The voltage regulator circuit further includes a bandgap voltage reference module, a first capacitor module, and a second capacitor module. The first capacitor module and the second capacitor module are charged by the reference voltage provided by the bandgap voltage reference module. One implementation is to provide multiple reference voltage output terminals in the bandgap voltage reference module to charge the first capacitor module and the second capacitor module respectively.
[0036] One implementation is to control when the first capacitor module and the second capacitor module are charged by controlling the conduction or cutoff of the transmission gate. For example Figure 2 , the voltage regulator circuit may include a first transmission gate module and a second transmission gate module, and there are the following connection relationships:
[0037] The output terminal of the bandgap voltage reference module is connected to the first capacitor module through the first transmission gate module;
[0038] The output terminal of the bandgap voltage reference module is connected to the second capacitor module through the second transmission gate module.
[0039] Figure 3 An alternative implementation is given Figure 2 . The first capacitor module is connected to the second capacitor module through the second transmission gate module, which also belongs to a way that the output terminal of the bandgap voltage reference module is connected to the second capacitor module through the second transmission gate module.
[0040] For example Figure 1 , the current logic module is connected to the source or drain of the power transistor. The current logic module is used to collect the current of the power transistor, determine the power of the power transistor according to the current magnitude, output a first control signal when determining that the current of the power transistor represents the first working state, and alternately output the first control signal and the second control signal when determining that the current of the power transistor represents the second working state. The current logic module can judge according to the average current over a period of time. It is defined that the average current of the power transistor in the first working state is greater than the average current of the power transistor in the second working state. Therefore, the first working state represents that the voltage regulator circuit is in a high-power state, and the second working state represents that the voltage regulator circuit is in a low-power state; For example Figures 1 to 3 , the BG_EN terminal is used to transmit the first control signal and the second control signal:
[0041] The first control signal is used to enable the bandgap voltage reference module, the first transmission gate module, and the second transmission gate module;
[0042] The second control signal is used to place the bandgap voltage reference module, the first transmission gate module, and the second transmission gate module in a non-enabled state.
[0043] The enabled state of the first transmission gate module and the second transmission gate module refers to the state where the first transmission gate module and the second transmission gate module are conducting, and the non-enabled state of the first transmission gate module and the second transmission gate module refers to the state where the first transmission gate module and the second transmission gate module are cutoff. The first transmission gate module and the second transmission gate module can be implemented based on the principle of switching transistors.
[0044] The bandgap voltage reference module is used to: in the enabled state, output a reference voltage at the output terminal of the bandgap voltage reference module according to the input power supply; the non-enabled state of the bandgap voltage reference module is a low-power state, and it can output a high impedance state or not work at all, which is used to save power at this time.
[0045] When the current logic module outputs the first control signal, the output terminal of the bandgap voltage reference module charges the first capacitor module through the first transmission gate module, and the output terminal of the bandgap voltage reference module charges the second capacitor module through the second transmission gate module;
[0046] When the current logic module outputs the second control signal, the second capacitor module and the first capacitor module discharge, and the discharge speed of the second capacitor module is faster than that of the first capacitor module (the discharge speed can be set by setting different capacitor sizes, and the smaller capacitor discharges faster; or resistors or other devices for discharging can be added to the second capacitor module to make the second capacitor module discharge faster).
[0047] The first capacitor module is connected to the gate voltage module. The first capacitor module is used to provide the voltage VREF_SH, and the voltage VREF_SH serves as a high-precision reference for the gate voltage module. The gate voltage module is used to compare the voltage VREF_SH and the output voltage Vout of the voltage regulator circuit, and generate the gate voltage of the power transistor according to the voltage difference between the two voltages.
[0048] The second capacitor module is connected to the current logic module. The second capacitor module is used to provide the voltage VREF_FB.
[0049] The current logic module is used to output the first control signal when it detects that the second capacitor module has completed discharging, and output the second control signal when it detects that the second capacitor module has completed charging.
[0050] Regarding the method of detecting the completion of charging or discharging of the second capacitor module, the first control signal can be output when the voltage VREF_FB of the second capacitor module discharges below the first threshold, and the second control signal can be output when the voltage VREF_FB of the second capacitor module charges to the second threshold (the comparison between the voltage VREF_FB and the first threshold and the second threshold and the dynamic result output can be implemented based on the principle of a hysteresis comparator).
[0051] Regarding the method of detecting the completion of charging or discharging of the second capacitor module, it can also be detected by judging the difference between the voltage VREF_FB of the second capacitor module and the voltage at other positions, such as the difference from the voltage at the output terminal of the bandgap voltage reference module, and judging the completion of charging or discharging according to this voltage difference.
[0052] Such as Figure 4 , Figure 4 shows the process of signal changes when the power transistor first operates at high power and then at low power, where the voltage VREF1 is the voltage output by the bandgap voltage reference module:
[0053] First, when operating at high power, the bandgap voltage reference module keeps working, and the first capacitor module provides a constant voltage VREF_SH, so that the gate voltage module has a stable voltage VREF_SH as a reference benchmark, enabling the power transistor to maintain stable operation with high precision.
[0054] When operating at low power, it is not necessary for the bandgap voltage reference module to keep working. When the bandgap voltage reference module stops outputting voltage, the first capacitor module and the second capacitor module discharge. At this time, the first capacitor module discharges slowly and the voltage VREF_SH is still relatively stable. The second capacitor module discharges quickly. Therefore, when the voltage of the second capacitor module is low and reaches Vthn, the voltage of the first capacitor module still has sufficient voltage VREF_SH to maintain the good working accuracy of the power transistor. Moreover, when the voltage of the second capacitor module reaches Vthn, it will trigger the current logic module to re-output the first control signal, the bandgap voltage reference module starts to work, and the first capacitor module and the second capacitor module are charged, and the charging is quickly completed (Ton in Figure 4 ), and then the bandgap voltage reference module is turned off again (Toff in Figure 4 ), and the first capacitor module and the second capacitor module discharge, and so on in a cycle. During this cycle, the first capacitor module maintains a relatively high and stable enough voltage, and the second capacitor module reflects the situation of the first capacitor module and amplifies the amplitude to respond clearly and quickly.
[0055] In summary, when the current logic module determines that the current of the power transistor indicates high power, it makes the bandgap voltage reference module keep working, and at this time the load will not affect the accuracy; when it determines that the current of the power transistor indicates low power, it makes the bandgap voltage reference module enter the polling mode, making the bandgap voltage reference module work intermittently, which can not only ensure the accuracy required in the low-power working state but also save power consumption.
[0056] Figure 5 Gives Figure 2In an alternative embodiment, the voltage regulator circuit includes a first transmission gate module 1, a second transmission gate module 2, a third transmission gate module 3, a fourth transmission gate module 4, and a buffer; the first capacitor module includes a first capacitor C1, and the second capacitor module includes a second capacitor C2. The following connection relationships exist:
[0057] The output terminal of the bandgap voltage reference module is connected to a first point (i.e., at VREF2 in the figure) through the third transmission gate module 3, and the first point is connected to the first capacitor C1 through the first transmission gate module 1;
[0058] The first point is connected to the output terminal of the buffer through the fourth transmission gate module 4, and the output terminal of the buffer is connected to the first input terminal of the buffer;
[0059] The first input terminal of the buffer is connected to the second capacitor C2 through the second transmission gate module 2;
[0060] The second input terminal of the buffer is connected to the first capacitor C1.
[0061] The first control signal places the third transmission gate module 3 in the enabled state and places the fourth transmission gate module 4 in the disabled state;
[0062] The first control signal places the third transmission gate module 3 in the disabled state and places the fourth transmission gate module 4 in the enabled state.
[0063] As Figure 5 , the forward enable terminals of the third transmission gate module 3, the second transmission gate module 2, and the first transmission gate module 1 can be connected to the same point BG_EN, and the reverse enable terminals of the third transmission gate module 3, the second transmission gate module 2, and the first transmission gate module 1 can be connected to the same point BG_ENB, and BG_ENB and BG_EN are opposite signals. The forward enable terminal means that when there is a high-level signal at this terminal, the transmission gate is activated and the transmission gate conducts. The reverse enable terminal means that when there is a low-level signal at this terminal, the transmission gate is activated and the transmission gate conducts. If any enable terminal receives a signal that activates the transmission gate, the transmission gate conducts.
[0064] As Figure 5 , the fourth transmission gate module 4 has a switch opposite to that of the third transmission gate module 3, the second transmission gate module 2, and the first transmission gate module 1:
[0065] When the third transmission gate module 3, the second transmission gate module 2, and the first transmission gate module 1 conduct, the fourth transmission gate module 4 is cutoff;
[0066] When the third transmission gate module 3, the second transmission gate module 2, and the first transmission gate module 1 are cutoff, the fourth transmission gate module 4 conducts. The reverse enable terminal of the fourth transmission gate module 4 can be connected to the BG_EN terminal, and the forward enable terminal of the fourth transmission gate module 4 can be left floating.
[0067] Under Figure 5 the setting of four transmission gates and a buffer, better anti-interference performance can be achieved:
[0068] When operating at low power, the first transmission gate module 1 and the third transmission gate module 3 are turned off, so that the VREF2 is in a high-impedance state and is not affected by the bandgap voltage reference module. Without the fourth transmission gate module 4 and the buffer, the VREF2 may still be coupled by high-frequency signals, thereby affecting the first capacitor C1 and ultimately affecting the voltage VREF_SH. In the case of having the fourth transmission gate module 4 and the buffer, the fourth transmission gate module 4 is turned on, and the buffer can provide a potential for the VREF2 to avoid affecting the voltage VREF_SH.
[0069] In addition, when operating at high power, the fourth transmission gate module 4 is turned off, and the buffer charges the second capacitor C2 with the voltage VREF_SH. The buffer can be an operational amplifier.
[0070] Figure 6 An implementation manner of the current logic module and the gate voltage module is shown.
[0071] As Figure 6 , the current logic module may include a current acquisition unit, a bias current unit, a comparator, and a logic unit; there are the following connection relationships:
[0072] The current acquisition unit is connected to the source or drain of the power transistor. The current acquisition unit is used to collect the current Isns of the power transistor and transmit it to the first input terminal of the comparator;
[0073] The first output terminal of the bias current unit is connected to the second input terminal of the comparator;
[0074] The output terminal of the comparator is connected to the logic unit.
[0075] The comparator is used to use the current Ibias1 provided by the bias current unit as a reference to judge the current Isns of the power transistor, determine whether the current of the power transistor represents high power or determine whether the current of the power transistor represents low power, and output a high level or a low level. For example, when the current of the power transistor represents high power, the LP_EN is at a high level; when the current of the power transistor represents high power, the LP_EN is at a low level. (Or vice versa: when the current of the power transistor represents high power, the LP_EN is at a low level; when the current of the power transistor represents high power, the LP_EN is at a high level.)
[0076] The logic unit outputs a first control signal or alternately outputs a first control signal and a second control signal according to the signal at the LP_EN and the voltage of the second capacitor module. For example:
[0077] When LP_EN is at a high level, continuously output the first control signal;
[0078] When LP_EN is at a low level, if it is detected that the voltage VREF_FB of the second capacitor module discharges below the first threshold, output the first control signal; if it is detected that the voltage VREF_FB of the second capacitor module charges to the second threshold, output the second control signal.
[0079] Such as Figure 6 , the current acquisition unit may include a mirror transistor and a current sampling unit;
[0080] The mirror transistor is connected to the power transistor in the form of a current mirror;
[0081] The drain of the mirror transistor is connected to the first input terminal of the comparator through the current sampling unit.
[0082] The beneficial effect of obtaining current in the current mirror manner is that it has no impact on the loop where the power transistor and the load are located.
[0083] Such as Figure 6 , the gate voltage module may include a voltage acquisition unit and an operational amplifier; the voltage acquisition unit can be realized by the principle of resistor voltage division; the current logic module may also include an adder; there are the following connection relationships:
[0084] The first end of the voltage acquisition unit is connected to the drain of the power transistor, the second end of the voltage acquisition unit is connected to the first input terminal of the operational amplifier, and the first input terminal of the operational amplifier is connected to a voltage FB proportional to the output voltage Vout;
[0085] The second input terminal of the operational amplifier is connected to the first capacitor module to receive the voltage VREF_SH;
[0086] The operational amplifier is used to use the voltage of the first capacitor module as a reference to judge the voltage of the drain of the power transistor;
[0087] The output terminal of the operational amplifier is connected to the gate of the power transistor;
[0088] The bias current terminal of the operational amplifier is connected to the output terminal of the adder;
[0089] The first input terminal of the adder is connected to the current acquisition unit, the second input terminal of the adder is connected to the bias current unit, and the adder is used to add the current Ibias2 provided by the bias current unit and the current Isns provided by the current acquisition unit to obtain the current Ibias_EA, and the current Ibias_EA can be used as the bias current of the operational amplifier.
[0090] The beneficial effect of the adder is that when switching from low power to high power, Isns will rise rapidly, causing the current Ibias_EA to rise rapidly. At this time, the operational amplifier bias current is stronger, and the operational amplifier has a faster response speed. Without this addition operation, the speed of switching to high power may be slower in the low-power intermittent operating mode.
[0091] For example Figure 6 , the adder can also have two states: enabled and disabled. The enable terminal of the adder can be connected to the output terminal of the comparator;
[0092] When it is determined that the current of the power transistor represents high power, the adder is in the enabled state, and the adder is used to take the result of adding the current provided by the bias current unit and the current provided by the current acquisition unit as the bias current of the operational amplifier;
[0093] When it is determined that the current of the power transistor represents low power, the adder is in the disabled state, and only the current provided by the bias current unit is used as the bias current of the operational amplifier. The disabled state can save the power consumption of the adder.
[0094] For example Figure 6 , the voltage regulator circuit can also include a protection circuit. The function of the protection circuit can be over-temperature and short-circuit protection. Events such as over-temperature and short-circuit will quickly damage the chip in a short time. The protection circuit is implemented with high power consumption, trading power consumption for response speed to protect the chip; there are the following connection relationships:
[0095] The protection circuit is connected to the current logic module;
[0096] The bias current terminal of the operational amplifier can be connected to the protection circuit; when the protection circuit encounters a situation that needs protection, it can make the operational amplifier not work, thus turning off the power transistor.
[0097] The first control signal is used to enable the connection of the protection circuit; the second control signal is used to disable the connection of the protection circuit. That is, when operating at high power, the protection circuit works continuously; when operating at low power, the protection circuit is put into a polling mode, and the protection circuit works intermittently to save power consumption.
[0098] The bandgap voltage reference module and the protection circuit belong to high-power consumption modules, and other modules belong to low-power consumption modules. The overall current of the voltage regulator circuit can be expressed by the following formula:
[0099]
[0100] where T on is the turn-on time of the high-power consumption module, T off is the turn-off time of the high-power consumption module, IQ H is the IQ value of the high-power consumption module, IQ L is the IQ of the low-power consumption module.
[0101] If there is no on - off form, the current of the entire voltage regulator circuit will continuously be IQ H +IQ L , which shows that this solution effectively reduces the current.
[0102] Such as Figure 6 , the gate voltage module further includes a compensation unit; the output end of the operational amplifier is connected to the gate of the power transistor through the compensation unit. The compensation unit can improve the stability of the operational amplifier.
[0103] Such as Figure 6 , the current logic module may include a hysteresis comparator; there are the following connection relationships:
[0104] The first input end of the hysteresis comparator is connected to the second capacitor module to receive the voltage VREF_FB;
[0105] The second input end of the hysteresis comparator is used to access the threshold voltage Vthn;
[0106] The output end of the hysteresis comparator is connected to the logic unit;
[0107] The hysteresis comparator is used to compare the voltage of the second capacitor module with the threshold voltage, so as to feedback to the logic unit that the charging or discharging of the second capacitor module is completed, and output a high level or a low level at VREF_FB_OK to indicate. When the voltage VREF_FB of the second capacitor module discharges below the first threshold, it is considered that the discharging is completed, and when the voltage VREF_FB of the second capacitor module charges to the second threshold, it is considered that the charging is completed.
[0108] Such as Figure 6 , the current logic module may include a delay unit, and the output end of the logic unit returns to the logic unit through the delay unit;
[0109] When it is determined that the current of the power transistor represents low power and the logic unit issues a first control signal, the second capacitor module and the first capacitor module are charged, and after the delay of the delay unit, a signal indicating that the capacitor charging is completed is sent to the logic unit. The delay of the delay unit is the charging time of the second capacitor module and the first capacitor module.
[0110] In summary, the voltage regulator circuit of this solution realizes an ultra - low - power LDO design and ensures the transient response of the LDO, the output accuracy, and the response speed of the protection circuit.
[0111] The device and system embodiments described above are merely illustrative, and some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment. Those of ordinary skill in the art can understand and implement it without creative work.
[0112] The above are only the preferred specific embodiments of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present application should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.
Claims
1. A voltage regulator circuit, characterized in that, It includes a power transistor, a bandgap voltage reference module, a gate voltage module, a current logic module, a first capacitor module, and a second capacitor module; The source of the power transistor is used to connect to the input power supply; The drain of the power transistor is used to connect to the load; The gate of the power transistor is connected to the output terminal of the gate voltage module; The current logic module is connected to the source or drain of the power transistor. The current logic module is used to collect the current of the power transistor, output a first control signal when determining that the current of the power transistor represents a first working state, and alternately output a first control signal and a second control signal when determining that the current of the power transistor represents a second working state; When the current logic module outputs the first control signal, the reference voltage provided by the bandgap voltage reference module charges the first capacitor module, and the reference voltage provided by the bandgap voltage reference module charges the second capacitor module; When the current logic module outputs the second control signal, the second capacitor module discharges faster than the first capacitor module; The first capacitor module is connected to the gate voltage module. The gate voltage module is used to compare the voltage of the first capacitor module with the output voltage of the voltage regulator circuit to generate the gate voltage of the power transistor; the drain voltage of the power transistor is the output voltage of the voltage regulator circuit; The second capacitor module is connected to the current logic module. The current logic module is used to output a first control signal when detecting that the second capacitor module has completed discharging and output a second control signal when detecting that the second capacitor module has completed charging when determining that the current of the power transistor represents the second working state.
2. The voltage regulator circuit according to claim 1, wherein The voltage regulator circuit further includes a first transmission gate module and a second transmission gate module; The output power of the voltage regulator circuit in the first working state is greater than the output power of the voltage regulator circuit in the second working state; The first control signal is used to enable the bandgap voltage reference module, the first transmission gate module, and the second transmission gate module; The second control signal is used to disable the bandgap voltage reference module, the first transmission gate module, and the second transmission gate module; The bandgap voltage reference module is used to output a reference voltage at the output terminal of the bandgap voltage reference module according to the input power supply in the enabled state; When the current logic module outputs the first control signal, the reference voltage provided by the bandgap voltage reference module charges the first capacitor module through the first transmission gate module, and the reference voltage provided by the bandgap voltage reference module charges the second capacitor module through the second transmission gate module; The first capacitor module includes a first capacitor, the second capacitor module includes a second capacitor, and the capacitance value of the second capacitor is smaller than the capacitance value of the first capacitor.
3. The voltage regulator circuit according to claim 2, wherein The voltage regulator circuit further includes a third transmission gate module, a fourth transmission gate module, and a buffer; The output terminal of the bandgap voltage reference module is connected to a first point through the third transmission gate module, and the first point is connected to the first capacitor module through the first transmission gate module; The first point is connected to the output end of the buffer through the fourth transmission gate module, and the output end of the buffer is connected to the first input end of the buffer; The first input end of the buffer is connected to the second capacitor module through the second transmission gate module; The second input end of the buffer is connected to the first capacitor module; The first control signal places the third transmission gate module in an enabled state and places the fourth transmission gate module in a disabled state; The first control signal places the third transmission gate module in a disabled state and places the fourth transmission gate module in an enabled state.
4. The voltage regulator circuit according to claim 1, wherein The current logic module includes a current acquisition unit, a bias current unit, a comparator, and a logic unit; The current acquisition unit is connected to the source or drain of the power transistor, and the current acquisition unit is used to collect the current of the power transistor and transmit it to the first input end of the comparator; The first output end of the bias current unit is connected to the second input end of the comparator; The comparator is used to use the current provided by the bias current unit as a reference to detect the current of the power transistor, determine that the current of the power transistor represents high power, or determine that the current of the power transistor represents low power; The output end of the comparator is connected to the logic unit; The logic unit outputs a first control signal or alternately outputs a first control signal and a second control signal according to the signal at the output end of the comparator and the voltage of the second capacitor module.
5. The voltage regulator circuit according to claim 4, characterized in that, The current acquisition unit includes a mirror transistor and a current sampling unit; The mirror transistor is connected to the power transistor in the form of a current mirror; The drain of the mirror transistor is connected to the first input end of the comparator through the current sampling unit.
6. The voltage regulator circuit according to claim 4, wherein The gate voltage module includes a voltage acquisition unit and an operational amplifier; The current logic module further includes an adder; The first end of the voltage acquisition unit is connected to the drain of the power transistor, and the second end of the voltage acquisition unit is connected to the first input end of the operational amplifier; The second input end of the operational amplifier is connected to the first capacitor module; The operational amplifier is used to use the voltage of the first capacitor module as a reference to detect the voltage of the drain of the power transistor; The output end of the operational amplifier is connected to the gate of the power transistor; The bias current terminal of the operational amplifier is connected to the output end of the adder; The first input end of the adder is connected to the current acquisition unit, the second input end of the adder is connected to the bias current unit, and the adder is used to add the current provided by the bias current unit and the current provided by the current acquisition unit.
7. The voltage regulator circuit according to claim 6, wherein, The enable end of the adder is connected to the output end of the comparator; When it is determined that the current of the power transistor represents high power, the adder is in an enabled state, and the adder is used to use the result of adding the current provided by the bias current unit and the current provided by the current acquisition unit as the bias current of the operational amplifier; When it is determined that the current of the power transistor represents low power, the adder is in a disabled state, and only the current provided by the bias current unit is used as the bias current of the operational amplifier.
8. The voltage regulator circuit according to claim 1, wherein, The gate voltage module includes a voltage acquisition unit and an operational amplifier; The voltage regulator circuit further includes a protection circuit; The first end of the voltage acquisition unit is connected to the drain of the power transistor, and the second end of the voltage acquisition unit is connected to the first input terminal of the operational amplifier; The second input terminal of the operational amplifier is connected to the first capacitor module; The operational amplifier is configured to use the voltage of the first capacitor module as a reference to detect the voltage at the drain of the power transistor; The output terminal of the operational amplifier is connected to the gate of the power transistor; The bias current terminal of the operational amplifier is connected to the protection circuit; The protection circuit is connected to the current logic module; The first control signal is used to enable the connection of the protection circuit; The second control signal is used to disable the connection of the protection circuit.
9. The voltage regulator circuit according to claim 1, wherein The current logic module includes a hysteresis comparator and a logic unit; The first input terminal of the hysteresis comparator is connected to the second capacitor module; The second input terminal of the hysteresis comparator is used to receive a threshold voltage; The output terminal of the hysteresis comparator is connected to the logic unit; The hysteresis comparator is configured to compare the voltage of the second capacitor module with the threshold voltage to feedback to the logic unit that the charging or discharging of the second capacitor module is completed.
10. The voltage regulator circuit according to claim 1, wherein, The current logic module includes a delay unit and a logic unit; The output terminal of the logic unit is used to output a first control signal or alternately output a first control signal and a second control signal; The output terminal of the logic unit returns to the logic unit through the delay unit; When it is determined that the current of the power transistor represents low power and the logic unit issues a first control signal, the second capacitor module and the first capacitor module are charged, and the delay unit issues a signal indicating that the capacitor charging is completed to the logic unit after a delay.