Wireless transmission electrocardiogram detection circuit

By designing wireless transmission electrocardiogram detection circuits, the problems of bulky and inconvenient movement of the electrocardiogram monitoring equipment are solved, and remote electrocardiogram data monitoring of patients is realized, improving patient experience and hospital efficiency.

CN120340802APending Publication Date: 2025-07-18NORTHWEST UNIV
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Patent Information

Application Number
CN202510296946.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-03-13
Publication Date
2025-07-18

AI Technical Summary

Technical Problem

Existing electrocardiogram monitoring equipment is bulky, expensive and inconvenient to move, making it difficult to meet the needs of patients with long-term monitoring or mobility difficulties.

Method used

Design a wireless transmission electrocardiogram detection circuit, including preamplifier circuit, bandpass filter circuit, 50Hz notch circuit, main amplifier circuit, low-pass filter circuit and voltage lift circuit, combined with radio frequency communication circuit, realize wireless data transmission to equipment with analysis and processing capabilities.

Benefits of technology

Patients only need to wear sensors and electrocardiogram detection circuits to achieve remote monitoring, which improves patient experience and hospital efficiency. It is especially suitable for patients with long-term monitoring or mobility difficulties. It has a simple structure, convenient operation, safe and reliable operation.

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Abstract

The invention discloses a wireless transmission electrocardiogram detection circuit which comprises a pre-amplification circuit, a band-pass filter circuit, a 50Hz trap circuit, a main amplification circuit, a low-pass filter circuit, a voltage boosting circuit and a radio frequency communication circuit. The pre-amplification circuit is used for amplifying the collected weak electrocardiosignals; the band-pass filter circuit is used for enabling electrocardiosignals in a frequency range to pass through and isolating direct-current signals; the 50Hz trap circuit is used for removing power frequency 50Hz interference in the environment; the main amplifying circuit is used for further amplifying the processed electrocardiosignals; the low-pass filter circuit is used for removing low-frequency signal interference; the voltage lifting circuit is used for lifting the amplified electrocardiosignal to an input range; and the radio frequency communication circuit is used for transmitting the acquired data to equipment with analysis and processing capabilities. According to the invention, data collected by the electrocardiogram detection circuit is transmitted to equipment with analysis and processing capabilities by using radio frequency signals, and a patient only needs to wear the sensor and the electrocardiogram detection circuit, so that electrocardiogram data of multiple patients can be remotely monitored by one piece of equipment, the experience of the patient is greatly improved, and the efficiency of a hospital is also improved.
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Description

Technical Field

[0001] The present invention relates to the technical field of electrocardiogram signal detection, and particularly relates to a wireless transmission electrocardiogram detection circuit. Background Art

[0002] An electrocardiogram reflects the changes in bioelectricity during the generation, conduction, and recovery processes of cardiac excitation, and serves as a basis for judging various arrhythmias and myocardial ischemia. As an important method in the diagnosis of cardiovascular diseases, an electrocardiogram reflects to a certain extent the degree of myocardial damage, the development process, and the functional structure of the atria and ventricles. It can accurately reflect the changes in the heart and has been widely used clinically. Detecting electrocardiogram signals can provide information for doctors in a timely manner to assist doctors in treating and monitoring patients.

[0003] Conventional electrocardiogram monitoring devices have limitations such as being bulky, expensive, and inconvenient to move, which are very inconvenient for patients who need long-term monitoring or have limited mobility every time they are measured. Summary of the Invention

[0004] Aiming at the deficiencies of the existing technology, the purpose of the present invention is to provide a wireless transmission electrocardiogram detection circuit to solve the problems of the conventional electrocardiogram monitoring devices in the existing technology being bulky, expensive, and inconvenient to move.

[0005] To solve the above technical problems, the present invention is implemented by adopting the following technical solutions: A wireless transmission electrocardiogram detection circuit includes a preamplifier circuit, a band-pass filter circuit, a 50Hz notch filter circuit, a main amplifier circuit, a low-pass filter circuit, and a voltage boosting circuit connected in sequence.

[0006] The preamplifier circuit is used to amplify the collected weak electrocardiogram signals; the band-pass filter circuit is used to allow the electrocardiogram signals within the frequency range to pass through and isolate the DC signals; the 50Hz notch filter circuit is used to remove the power frequency 50Hz interference in the environment; the main amplifier circuit is used to further amplify the processed electrocardiogram signals; the low-pass filter circuit is used to remove the low-frequency signal interference; the voltage boosting circuit is used to boost the amplified electrocardiogram signals to the input range. The wireless transmission electrocardiogram detection circuit further includes a radio frequency communication circuit, and the radio frequency communication circuit is used to transmit the collected data to a device with analysis and processing capabilities.

[0007] The present invention also has the following technical features:

[0008] The preamplifier circuit includes an operational amplifier U1 and an instrumentation amplifier U2, and the operational amplifier U1 and the instrumentation amplifier U2 are connected through two terminals.

[0009] After the capacitor C1 and the resistor R1 are connected in series and then connected in parallel with the resistor R4, one end is connected to the 1 terminal of U1, and the other end is connected to the 0 terminal of U1. The resistor R2 and the resistor R3 are connected in parallel with the resistor R5, and one end is connected to the 9 terminal of U2, and the other end is connected to the 13 terminal of U2.

[0010] The preamplifier circuit further includes a signal input terminal J1. The 1 terminal of the signal input terminal J1 is used to receive the right wrist signal, the 2 terminal is used to receive the left wrist signal, and the 3 terminal is used to receive the right leg signal. The 1 terminal of the signal input terminal J1 is connected to the 0 terminal of U1, the 2 terminal of the signal input terminal J1 is connected to the 10 terminal of U2, and the 3 terminal of the signal input terminal J1 is connected to the 11 terminal of U1. Among them, the 3 terminal of U1 is grounded, the 4 terminal is supplied with -5V, the 2 terminal is supplied with +5V, the 14 terminal of U2 is grounded, the 4 terminal is supplied with -5V, and the 7 terminal is supplied with +5V. This method uses three electrodes to collect the electrocardiogram signal of the human body, and the right leg signal and the left and right wrist signals form a differential signal and are connected to the circuit.

[0011] The preamplifier circuit further includes a diode D1 whose positive electrode is connected to the 2 terminal of the signal input terminal J1 and a diode D2 connected to the 3 terminal of the signal input terminal J1. The negative electrodes of the diode D2 and the diode D3 are grounded respectively.

[0012] The 7 terminal of the operational amplifier U2 is connected to the band-pass filter circuit.

[0013] The band-pass filter circuit includes an operational amplifier U3 and an operational amplifier U4. The operational amplifier U3 and the operational amplifier U4 are connected through the 0 port.

[0014] The resistor R7 is grounded and connected in series with the capacitor C2, and is connected to U3 through the 2 terminal. The other end of the capacitor C2 is connected to the preamplifier circuit. Among them, the 3 terminal and the 4 terminal of U3 are grounded and +5V respectively.

[0015] The capacitor C3 is grounded and connected in series with the resistor R6, and is connected to U4 through the 2 terminal. The other end of the resistor R6 is connected to the operational amplifier U3. Among them, the 3 terminal and the 4 terminal of U4 are grounded and +5V respectively.

[0016] The 0 terminal of the operational amplifier U4 is connected to the 50Hz notch filter circuit.

[0017] The 50Hz notch filter circuit includes an operational amplifier U5, and also includes a series connection of a capacitor C4 and a capacitor C5 connected to the 1 terminal of the operational amplifier U5. The resistors R10, R11, R12 and R13 are connected in series and then connected in parallel with the capacitor C4 and the capacitor C5.

[0018] One end of capacitor C4 is connected to capacitor C5, and the other end is connected to the band-pass filter circuit. The end of capacitor C4 connected to capacitor C5 is also connected to the series-connected resistors R8 and R9. One end of resistor R9 is connected to resistor R8, and the other end is connected to the 0th and 4th terminals of U5.

[0019] The 0th terminal of the operational amplifier U5 is connected to the main amplification circuit.

[0020] The main amplification circuit includes operational amplifier U6. Resistors R15 and R16 are connected in parallel and connected to the 0th and 4th terminals of U6 through the pins. Capacitor C7 is connected in parallel with resistor R14, and resistor R14 is grounded. Capacitor C6 is connected in series with resistor R17 and is also connected in parallel with resistor R19 and is connected to the 2nd terminal of the slide rheostat RESVR1. One end of resistor R18 is externally connected to +5V and the other end is connected to the 2nd terminal of the slide rheostat RESVR1. Among them, the 2nd and 3rd terminals of the operational amplifier U5 are supplied with -5V and +5V respectively.

[0021] The 0th terminal of the operational amplifier U6 is connected to the low-pass filter circuit.

[0022] The low-pass filter circuit includes the series-connected resistors R21 and R22, and is connected in parallel with resistors R24 and R25 and then grounded after connecting to capacitor C9; one end of capacitor C8 is connected in series with resistor R22, and the other end is connected to the 0th and 4th terminals of U7. Among them, the 2nd and 3rd pins of U7 are supplied with -5V and +5V respectively.

[0023] The 0th terminal of the operational amplifier U7 is connected to the voltage boost circuit.

[0024] The voltage boost circuit includes the series-connected resistors R23 and R20, where R20 is connected to the 1st and 0th terminals of the operational amplifier U8; one end of R26 is connected to the 2nd terminal of U8, and the other end is connected to the 2nd terminal of the slide rheostat RESVR2. One end of the slide rheostat RESVR2 is connected to +5V, and the other end is grounded; the signal is output from the 0th pin of the operational amplifier U8.

[0025] The electrocardiogram signal detection circuit also includes a radio frequency communication circuit, and the single-chip microcomputer U2 in the radio frequency communication circuit is connected to the single-chip microcomputer U1.

[0026] The radio frequency communication circuit includes a radio frequency signal processing module, a power conversion circuit, and a radio frequency signal transceiver circuit.

[0027] The radio frequency signal processing module is used to process radio frequency signals, and after demodulation, the data to be sent is modulated onto the radio frequency signals.

[0028] The power conversion circuit is used to provide a higher voltage for the single-chip microcomputer U2 when transmitting radio frequency signals.

[0029] The described radio frequency signal transceiver circuit is used to connect to an antenna to transmit signals and, at the same time, preprocess the received radio frequency signals.

[0030] The radio frequency signal processing module consists of a single-chip microcomputer U2, which is an MSP430FR5994 chip, and its external circuit.

[0031] A crystal oscillator is connected between the 15th and 16th terminals of the single-chip microcomputer U2. The 20th and 21st terminals are respectively connected to the 30th and 31st terminals of the single-chip microcomputer U1. The 22nd terminal of the single-chip microcomputer U2 is connected to the 2nd terminal of the voltage regulator power supply chip U9 via the resistor R11. The 22nd and 23rd terminals of the single-chip microcomputer U2 are respectively connected to the 2nd and 3rd terminals of the reset interface U5. The 25th, 26th, 27th, 28th, 30th, and 31st terminals of the single-chip microcomputer U2 are respectively connected to the 7th, 6th, 5th, 4th, 3rd, and 2nd terminals of the pin header P1. The 8th terminal of the pin header P1 is connected to the 2nd terminal of the voltage regulator power supply chip U9.

[0032] The 1st terminal of the reset interface U5 is connected to the 2nd terminal of the voltage regulator power supply chip U9, and the 4th terminal is grounded.

[0033] The 48th and 37th terminals of the single-chip microcomputer U2 are connected to the 2nd terminal of the voltage regulator power supply chip U9. The 42nd terminal of the single-chip microcomputer U2 is connected to the resistor R15. The other end of the resistor R15 is connected to the positive electrode of the LED lamp bead LED1, and the negative electrode of the LED lamp bead LED1 is grounded.

[0034] The 0th, 41st, 44th, and 47th terminals of the single-chip microcomputer U2 are grounded.

[0035] The power conversion circuit mainly consists of a single-chip microcomputer U4, which is an SI1016X chip, and its peripheral circuit.

[0036] The 1st terminal of the single-chip microcomputer U4 is grounded. The 2nd terminal of the single-chip microcomputer U4 is grounded via the resistor R8. The 3rd terminal of the single-chip microcomputer U4 is grounded via the resistors R9 and R10. The 5th and 6th terminals of the single-chip microcomputer U4 are connected to the 18th terminal of the single-chip microcomputer U2 via the resistor R1. The 4th terminal of the single-chip microcomputer U4 is connected to the 18th terminal of the single-chip microcomputer U2.

[0037] The 2nd terminal of the single-chip microcomputer U4 is also connected to the 13th terminal of the single-chip microcomputer U2. The end where the resistors R9 and R10 are connected is also connected to the 17th terminal of the single-chip microcomputer U2.

[0038] The radio frequency signal transceiver circuit mainly consists of a single-chip microcomputer U6, which is an S-882Z24, a single-chip microcomputer U7, which is a TPS780, and a comparator U8, and their peripheral circuits.

[0039] Terminal 2 and terminal 3 of the single-chip microcomputer U6 are grounded, terminal 1 is connected to terminal 1 of the single-chip microcomputer U7, terminal 3 and terminal 4 of the single-chip microcomputer U7 are connected to the outgoing terminal of P1, terminal 3 and terminal 4 of the single-chip microcomputer U7 are connected to terminal 1 of P1, terminal 5 of the single-chip microcomputer U7 is grounded after passing through the capacitor C9, and terminal 5 of the single-chip microcomputer U7 is also connected to terminal 2 of the voltage regulator chip U9; D1 and D4 use HSMS285C, and there are two diodes in one component package.

[0040] Terminal 4 of the single-chip microcomputer U6 is respectively connected to terminal 1 of the diode D1, the positive electrode of the diode D2, the negative electrode of the diode D3, and the capacitor C8. Terminal 2 of the diode D1, the negative electrode of the diode D5, the positive electrode of the diode D3, and the other end of the capacitor C8 are grounded.

[0041] Terminal 5 of the single-chip microcomputer U6 is respectively connected to the capacitor C10 and the capacitor C11. The other ends of the capacitor C10 and the capacitor C11 are grounded, and the negative electrode of the diode D2 is grounded through the capacitor C10.

[0042] Terminal 3 of the diode D1 is also connected to one end of the capacitor C7. The other end of the capacitor C7 is connected to one end of the inductor L1. The other end of the inductor L1 is connected to the P1 terminal of the RF port SMA1. The P2 terminal of the RF port SMA1 is grounded; the P1 terminal of the RF port SMA1 is also connected to one end of the capacitor C12, and the other end of the capacitor C12 is grounded.

[0043] The P1 terminal of the RF port SMA1 is also connected to the drain of the RF switch Q1. The source of the RF switch Q1 is grounded, and the gate of the RF switch Q1 is connected to terminal 38 of the single-chip microcomputer U2.

[0044] One end of the inductor L1 connected to the capacitor C7 is also connected to the capacitor C15. The other end of the capacitor C15 is connected to terminal 3 of the diode D4. Terminal 1 of the diode D4 is connected to terminal 4 of the comparator U8 after passing through the resistors R12 and R13. Terminal 1 of the diode D4 is also connected to one end of the capacitor C14, and the other end of the capacitor C14 is grounded. Terminal 2 of the diode D4 is grounded.

[0045] A capacitor C8 is also connected in parallel across both ends of the resistor R12. One end where the resistor R12 is connected to the resistor R13 is also respectively connected to terminal 1 of the single-chip microcomputer U2 and terminal 3 of the comparator U8.

[0046] Terminal 4 of the comparator U8 is also respectively connected to one end of the capacitor C17 and the resistor R14, and the other ends of the capacitor C17 and the resistor R14 are grounded.

[0047] Terminal 3 of the comparator U8 is connected to terminal 1 of the single-chip microcomputer U2.

[0048] The 2 terminal of the comparator U8 is grounded, the 1 terminal is connected to the 39 terminal of the single-chip microcomputer U2, the 5 terminal of the comparator U8 is connected to one end of the capacitor C13, the other end of the capacitor C13 is grounded, and the 5 terminal of the comparator U8 is also connected to the 34 terminal of the single-chip microcomputer U2.

[0049] The electrocardiogram detection circuit with wireless transmission further includes a peripheral control circuit, and the peripheral control circuit is connected to the voltage boosting circuit.

[0050] The peripheral control circuit includes a single-chip microcomputer U1 and an external circuit.

[0051] The external circuit includes a voltage stabilizing circuit, a single-chip microcomputer power supply circuit, a TF card slot module, a crystal oscillator circuit, a switch circuit, a programming circuit, and a USB communication circuit connected to the single-chip microcomputer U1.

[0052] The voltage stabilizing circuit is used to keep the output voltage stable when the input voltage is unstable, and adjust the resistance value according to different access power values to obtain a variety of input voltages.

[0053] The single-chip microcomputer power supply circuit is used for voltage division and provides a stable 3.3V voltage for the single-chip microcomputer U1.

[0054] The TF card slot module is used to externally connect a TF memory card to perform local data backup.

[0055] The crystal oscillator circuit is used to provide a clock signal for the single-chip microcomputer.

[0056] The switch circuit is used to control the opening or closing of the TF data storage module.

[0057] The programming circuit is used to connect to the host computer to program the single-chip microcomputer U1.

[0058] The USB communication circuit is used to externally connect a PC or other devices for debugging.

[0059] The voltage stabilizing circuit includes a sliding rheostat RESVR1. The B terminal of the sliding rheostat RESVR1 is connected to the 10 terminal of the single-chip microcomputer U1, the A terminal of the sliding rheostat RESVR1 is grounded, and the P terminal of the sliding rheostat RESVR1 is connected to the pin 0 of the operational amplifier U8 through the resistor R2.

[0060] The single-chip microcomputer power supply circuit includes a voltage stabilizing power supply chip U9. The 1 terminal of the voltage stabilizing power supply chip U9 is grounded through the capacitor C1, the 2 terminal of the voltage stabilizing power supply chip U9 is connected to the 1, 9, 24, 36, and 48 terminals of the single-chip microcomputer U1, the 3 terminal of the voltage stabilizing power supply chip U9 is grounded through the resistor R3, and the single-chip microcomputer power supply circuit further includes a resistor R1. One end of the resistor R1 is connected to the 11 terminal of the single-chip microcomputer U1, and the other end...

[0061] The described crystal oscillator circuit includes a crystal oscillator Y1. One end of the crystal oscillator Y1 is connected to the 5th terminal of the single-chip microcomputer U1, and the other end is connected to the 6th terminal of the single-chip microcomputer U1. A section of the crystal oscillator Y1 connected to the 5th terminal of the single-chip microcomputer U1 is also grounded through a capacitor C3, and a section of the crystal oscillator Y1 connected to the 6th terminal of the single-chip microcomputer U1 is also grounded through a capacitor C4.

[0062] The described TF card slot module includes a TF card socket U10. The 1st, 2nd, 3rd, and 4th terminals of the TF card socket U10 are respectively connected to the 13th, 15th, 16th, and 17th terminals of the single-chip microcomputer U1, and a capacitor C2 is also connected between the 5th terminal and the 6th terminal of the TF card socket U10.

[0063] The described switch circuit includes switches S1 and S2. One end of the switch S1 is connected to a resistor R6, and the other end is connected to the 40th terminal of the single-chip microcomputer U1. One end of the switch S1 is connected to the resistor R6, and the other end is connected to the 41st terminal of the single-chip microcomputer U1. The other end of the resistor R6 is grounded.

[0064] The described programming circuit includes an SWD interface U11. The 1st terminal of the SWD interface U11 is grounded, the 2nd and 3rd terminals are respectively connected to the 34th and 37th terminals of the single-chip microcomputer U1, and the 4th terminal is connected to the 2nd terminal of a voltage regulator power supply chip U9.

[0065] The described USB communication circuit includes a USB to serial port chip U3. The 1st terminal of the USB to serial port chip U3 is grounded, the 2nd and 3rd terminals are respectively connected to the 31st and 30th terminals of the single-chip microcomputer U1, and the 4th terminal is connected to the 2nd terminal of the voltage regulator power supply chip U9.

[0066] The 5th and 6th terminals of the described USB to serial port chip U3 are respectively connected to the 3rd and 2nd terminals of a Micro_USB access terminal USB1. The 7th terminal of the USB to serial port chip U3 is connected to one end of a crystal oscillator Y2, the other end of the crystal oscillator Y2 is connected to the 8th terminal of the USB to serial port chip U3. The 7th terminal of the USB to serial port chip U3 is also connected to a capacitor C5, and the other end of the capacitor C5 is grounded. The 8th terminal of the USB to serial port chip U3 is also connected to a capacitor C6, and the other end of the capacitor C6 is grounded.

[0067] The 16th terminal of the described USB to serial port chip U3 is connected to the 1st terminal of the Micro_USB access terminal USB1, and the 4th terminal of the Micro_USB access terminal USB1 is grounded.

[0068] The 20th terminal of the described single-chip microcomputer U1 is grounded through a resistor R4, the 44th terminal of the single-chip microcomputer U1 is grounded through a resistor R5, and the 8th, 23rd, 35th, and 47th terminals of the single-chip microcomputer U1 are grounded.

[0069] Compared with the prior art, the present invention has the following technical effects:

[0070] (I) A wireless transmission electrocardiogram detection circuit provided by the present invention uses radio frequency signals to transmit the data collected by the electrocardiogram detection circuit to a device with analysis and processing capabilities. Then, the patient only needs to wear the sensor and the electrocardiogram detection circuit, and for the hospital, it can remotely monitor the electrocardiogram data of multiple patients with one device. This greatly improves the patient experience and also improves the hospital efficiency.

[0071] (II) A wireless transmission electrocardiogram detection circuit provided by the present invention uses radio frequency signals to wirelessly transmit data to the host computer. Patients no longer need to be restricted beside a fixed electrocardiogram examination device, which is particularly important for patients who need long-term monitoring or have limited mobility.

[0072] (III) A wireless transmission electrocardiogram detection circuit provided by the present invention is simple in structure, convenient to operate, safe and reliable, and has strong adaptability. BRIEF DESCRIPTION OF THE DRAWINGS

[0073] Figure 1 is a schematic diagram of the overall structure of the present invention.

[0074] Figure 2 is a schematic diagram of the radio frequency communication circuit of the present invention.

[0075] Figure 3 is a schematic diagram of the preamplification circuit of the present invention.

[0076] Figure 4 is a schematic diagram of the band-pass filter circuit in the present invention.

[0077] Figure 5 is a schematic diagram of the 50Hz notch filter circuit in the present invention.

[0078] Figure 6 is a schematic diagram of the main amplification circuit of the present invention.

[0079] Figure 7 is a schematic diagram of the low-pass filter circuit in the present invention.

[0080] Figure 8 is a schematic diagram of the voltage boosting circuit in the present invention.

[0081] Figure 9 is a schematic diagram of the radio frequency signal processing module of the present invention

[0082] Figure 10 is a schematic diagram of the power conversion circuit of the present invention.

[0083] Figure 11 is a schematic diagram of the radio frequency signal transceiver circuit of the present invention.

[0084] Figure 12 is a schematic diagram of the voltage stabilization circuit of the present invention.

[0085] Figure 13 It is a schematic diagram of the single-chip microcomputer power supply circuit in the present invention.

[0086] Figure 14 It is a schematic diagram of the TF card slot module in the present invention.

[0087] Figure 15 It is a schematic diagram of the crystal oscillator circuit in the present invention.

[0088] Figure 16 It is a schematic diagram of the switch circuit in the present invention.

[0089] Figure 17 It is a schematic diagram of the programming circuit in the present invention.

[0090] Figure 18 It is a schematic diagram of the USB communication circuit in the present invention.

[0091] Meanings of each label in the attached drawings:

[0092] 1 - preamplifier circuit, 2 - band-pass filter circuit, 3 - 50Hz notch filter circuit, 4 - main amplifier circuit, 5 - low-pass filter circuit, 6 - voltage boost circuit, 7 - radio frequency signal processing module, 8 - power conversion circuit, 9 - radio frequency signal transceiver circuit, 10 - voltage stabilization circuit, 11 - single-chip microcomputer power supply circuit, 12 - TF card slot module, 13 - crystal oscillator circuit, 14 - switch circuit, 15 - programming circuit, 16 - USB communication circuit.

[0093] The following further elaborates on the specific content of the present invention in conjunction with embodiments. Specific Embodiments

[0094] All components in the present invention, unless otherwise specified, are all components known in the prior art. The following gives specific embodiments of the present invention. It should be noted that the present invention is not limited to the following specific embodiments, and all equivalent transformations made on the basis of the technical solution of this application fall within the protection scope of the present invention.

[0095] Embodiment 1:

[0096] This embodiment provides a wireless transmission electrocardiogram detection circuit, as Figures 1 - 2 shown, including a preamplifier circuit 1, a band-pass filter circuit 2, a 50Hz notch filter circuit 3, a main amplifier circuit 4, a low-pass filter circuit 5, and a voltage boost circuit 6 connected in sequence.

[0097] The preamplifier circuit 1 is used to amplify the weak electrocardiogram (ECG) signals collected; the band-pass filter circuit 2 is used to allow the ECG signals within a frequency range to pass through and isolate DC signals; the 50Hz notch filter circuit 3 is used to remove the power frequency 50Hz interference in the environment; the main amplifier circuit 4 is used to further amplify the processed ECG signals; the low-pass filter circuit 5 is used to remove low-frequency signal interference; the voltage boosting circuit 6 is used to boost the amplified ECG signals to the input range. The wireless transmission ECG detection circuit further includes a radio frequency communication circuit, and the radio frequency communication circuit is used to transmit the collected data to a device with analysis and processing capabilities.

[0098] As a way of wirelessly transmitting information, radio frequency signals have characteristics such as a wide coverage range and strong anti-interference ability. By using radio frequency signals to transmit the data collected by the ECG detection circuit to a device with analysis and processing capabilities, then patients only need to wear sensors and the ECG detection circuit, and for hospitals, it is possible to remotely monitor the ECG data of multiple patients with one device. This greatly improves the patient experience and also enhances the hospital's efficiency.

[0099] Aiming at the deficiencies of the existing technology, the purpose of the present invention is to provide an ECG signal detection circuit, which simultaneously uses radio frequency signals to wirelessly transmit data to the host computer. Patients no longer need to be restricted beside fixed electrocardiogram examination equipment, which is particularly important for patients who need long-term monitoring or have limited mobility.

[0100] As a preference of this embodiment:

[0101] The preamplifier circuit 1 includes an operational amplifier U1 and an instrumentation amplifier U2, and the operational amplifier U1 and the instrumentation amplifier U2 are connected through terminal 2.

[0102] After capacitor C1 and resistor R1 are connected in series and then connected in parallel with resistor R4, one end is connected to terminal 1 of U1, and the other end is connected to terminal 0 of U1. Resistor R2 and resistor R3 are connected in parallel with resistor R5, and one end is connected to terminal 9 of U2, and the other end is connected to terminal 13 of U2.

[0103] The preamplifier circuit further includes a signal input terminal J1. Terminal 1 of the signal input terminal J1 is used to receive the right wrist signal, terminal 2 is used to receive the left wrist signal, and terminal 3 is used to receive the right leg signal. Terminal 1 of the signal input terminal J1 is connected to terminal 0 of U1, terminal 2 of the signal input terminal J1 is connected to terminal 10 of U2, and terminal 3 of the signal input terminal J1 is connected to terminal 11 of U1; among them, terminal 3 of U1 is grounded, terminal 4 is powered by -5V, terminal 2 is powered by +5V, terminal 14 of U2 is grounded, terminal 4 is powered by -5V, and terminal 7 is powered by +5V; this method uses three electrodes to collect the human ECG signals, and the right leg signal and the left and right wrist signals form a differential signal and are connected to the circuit.

[0104] The preamplifier circuit also includes a diode D1 with its positive electrode connected to terminal 2 of the signal input J1 and a diode D2 connected to terminal 3 of the signal input J1. The negative electrodes of the diode D2 and the diode D3 are grounded respectively.

[0105] Terminal 7 of the operational amplifier U2 is connected to the band-pass filter circuit.

[0106] The capacitor C1, the resistors R1 and R4 increase the input resistance and reduce the distortion of the electrocardiogram signal.

[0107] The resistors R2, R3 and R5 are used to control and adjust the amplification factor of the operational amplifier U2.

[0108] Terminal 1 of the signal input J1 is used to receive the right wrist signal, terminal 2 is used to receive the left wrist signal, and terminal 3 is used to receive the right leg signal. This method uses three electrodes to collect the electrocardiogram signal of the human body, and the right leg signal and the left and right wrist signals form a differential signal and are connected to the circuit.

[0109] The diodes D1 and D2 are mainly used to isolate alternating current.

[0110] The preamplifier circuit is the key of the hardware circuit. This part of the circuit is crucial in the whole acquisition circuit because the subsequent signal processing is based on it. To be able to collect the electrocardiogram signal stably and with high precision, the following points need to be considered in the design: (1) High common-mode rejection ratio. The interference during the operation of electrical equipment and the physiological signal interference other than the measured signal are generally common-mode interference. After passing through the amplifier circuit, the interference value is very likely to be much larger than the electrocardiogram signal, thus drowning out the weak signal. Therefore, it is required that the amplifier has a very high common-mode rejection ratio. Generally, it is required to reach more than 80 dB. (2) High gain. Since the electrocardiogram signal is very weak, with an average value of about 1 mV, a high gain of the amplifier is required, and the electrocardiogram amplification factor is about 1000 times. Generally, in order to suppress zero drift and improve the common-mode rejection ratio, the amplification should be achieved in multiple stages. (3) High input impedance. The electrocardiogram signal is weak and has the characteristic of high impedance. Only with a high input impedance is it possible to draw out the electrocardiogram signal without distortion. Generally, the input impedance of the amplifier should be greater than 1 MΩ. Otherwise, due to the voltage division factor, the electrocardiogram signal will be greatly attenuated, resulting in incorrect acquisition. (4) Low noise and low drift. When designing an electrocardiogram amplifier, low-noise components should be selected as much as possible to increase the input impedance and improve the ability to pick up signals. In addition, temperature drift will introduce a DC voltage and thus interfere with the electrocardiogram signal.

[0111] When measuring the electrocardiogram, due to the influence of stray distributed capacitance, a very high common-mode voltage will be generated on the patient's body. Therefore, the most ideal method is to design a circuit that can not only reduce common-mode interference but also eliminate the human body ground. The working principle of the right-leg drive is to feed back the common-mode voltage obtained from the human body surface to the human body through negative feedback amplification, so as to achieve the effect of canceling common-mode interference and fundamentally suppressing the common-mode voltage. The right-leg drive circuit consists of a self-designed stable circuit and an inverter (Op07) to reduce the interference of power frequency signals on the electrocardiogram signals without affecting the common-mode rejection ratio of the circuit. Among them, D2 and D3 are diodes to protect the stability of the input signal. R1, C1, and R4 form the right-leg drive circuit. The output of the right-leg drive circuit is used as the input of the preamplifier circuit, which is connected in series with the parallel circuit composed of R2 and R3 and then enters AD620 through R5 to amplify the signal. The output of the preamplifier circuit enters the next-stage circuit as the input of the band-pass filter.

[0112] As a preference of this embodiment:

[0113] The said band-pass filter circuit 2 includes operational amplifier U3 and operational amplifier U4. The operational amplifier U3 and operational amplifier U4 are connected through port 0.

[0114] Resistor R7 is grounded and connected in series with capacitor C2, and is connected to U3 through terminal 2. The other end of capacitor C2 is connected to the preamplifier circuit. Among them, the 3rd terminal and the 4th terminal of U3 are grounded and positive 5V respectively.

[0115] Capacitor C3 is grounded and connected in series with resistor R6, and is connected to U4 through terminal 2. The other end of resistor R6 is connected to operational amplifier U3. Among them, the 3rd terminal and the 4th terminal of U4 are grounded and positive 5V respectively.

[0116] The 0th terminal of the said operational amplifier U4 is connected to the 50Hz notch filter circuit.

[0117] Among them, the high-pass filter is composed of U3, C2, and R7, and the low-pass filter is composed of U4, R6, and C3. For the consideration of miniaturization and low power consumption, first-order filters are selected, with the lower cut-off frequency fL = 0.03Hz and the upper cut-off frequency f H = 110Hz.

[0118] The output of the preamplifier circuit is connected to the band-pass filter circuit. After being output by OP07, due to the low frequency and small signal, the 50Hz power frequency interference is particularly serious. The power frequency interference signal confuses the electrocardiogram signal through surrounding instruments and electrical wires and cables, affecting the measurement effect. In order to remove the 50Hz power frequency interference in the human body or the measurement system, a band-stop filter (i.e., notch filter) is needed to suppress it. At the same time, since the 50Hz power frequency interference is the main interference in the electrocardiogram signal and its frequency is exactly within the frequency band range of 0.03 - 110Hz, even if the preamplifier circuit has a good common-mode rejection effect, the remaining power frequency interference signal is still relatively strong, and corresponding circuits must be designed to filter them out.

[0119] As a preference of this embodiment:

[0120] The 50Hz notch circuit 3 includes an operational amplifier U5, and also includes a series connection of capacitor C4 and capacitor C5 connected to the 1 end of the operational amplifier U5. Resistors R10, R11, R12, and R13 are connected in series and then connected in parallel with capacitor C4 and capacitor C5.

[0121] One end of capacitor C4 is connected to capacitor C5, and the other end is connected to the band-pass filter circuit. The end where capacitor C4 and capacitor C5 are connected is also connected to a series connection of resistor R8 and resistor R9. One end of resistor R9 is connected to resistor R8, and the other end is connected to the 0 end and 4 end of the operational amplifier U5.

[0122] The 0 end of the operational amplifier U5 is connected to the main amplifier circuit.

[0123] Resistors R10, R11, R12, and R13 are connected in series and then connected in parallel with capacitor C4 and capacitor C5, which plays a role of band-stop filtering; one end of capacitor C4 is connected to capacitor C5, and the other end is connected to the band-pass filter circuit. The end where capacitor C4 and capacitor C5 are connected is also connected to a series connection of resistor R8 and resistor R9. One end of resistor R9 is connected to resistor R8, and the other end is connected to the 0 end and 4 end of U5.

[0124] In order to filter out the 50Hz power frequency interference signal within the electrocardiogram signal frequency band and ensure that other signals pass through without attenuation, a notch filter (i.e., band-stop filter) must be designed in this system. It is responsible for suppressing the 50Hz power frequency interference signal and allowing other frequencies to pass through. This method consists of C4, C5, R10, R11, R12, R13, and C8, has a frequency selection characteristic, stable circuit performance, and high adjustability. The signal after band-pass filtering flows into OP07 and is output from pin 0, and is input into the next-stage circuit as the output of the 50Hz notch circuit.

[0125] As a preference of this embodiment:

[0126] The described main amplifier circuit 4 includes an operational amplifier U6. Resistor R15 and resistor R16 are in parallel and connected through pins 0 and 4 of U6. Capacitor C7 is in parallel with resistor R14, and resistor R14 is grounded. Capacitor C6 is in series with resistor R17 and in parallel with resistor R19, and is connected to terminal 2 of the potentiometer RESVR1. One end of resistor R18 is externally connected to +5V and the other end is connected to terminal 2 of the potentiometer RESVR1. Among them, pins 2 and 3 of the operational amplifier U5 are powered by -5V and +5V respectively.

[0127] Terminal 0 of the described operational amplifier U6 is connected to the low-pass filter circuit.

[0128] The potentiometer RESVR1 is used to adjust the circuit amplification factor.

[0129] The amplitude of the electrocardiogram signal is usually very small, only about 1mV. The voltage input range of the analog-to-digital conversion chip in the system is 0 - 5V. Therefore, the 10-fold amplification achieved only by the preamplifier circuit is far from enough, and a main amplifier circuit needs to be added to increase the gain of the entire electrocardiogram amplifier circuit. Since the preamplifier has completed 10-fold amplification of the electrocardiogram signal, therefore, this system also needs a main amplifier circuit that can achieve 100-fold amplification, and finally achieve 1000-fold amplification of the electrocardiogram signal to meet the conversion requirement of amplifying a 1mV signal to 1V. The main amplifier circuit consists of C7, R14, R15, R16, R17, R18, R19, a 2k potentiometer RESVR1, and OP07. The signal is output from the 50Hz notch filter circuit, passes through the filter circuit composed of C7 and R14, flows into R15 and R16, and finally enters OP07 and is output from pin 0, serving as the output of the main amplifier circuit and entering the next-stage circuit. This circuit is an adjustable amplifier circuit, and the amplification factor of the signal can be adjusted to a certain extent by adjusting the size of the potentiometer.

[0130] As a preference of this embodiment:

[0131] The described low-pass filter circuit 5 includes resistors R21 and R22 connected in series, and is connected in parallel with resistors R24 and R25 and grounded after connecting to capacitor C9; one end of capacitor C8 is connected in series with resistor R22, and the other end is connected to pins 0 and 4 of U7. Among them, pins 2 and 3 of U7 are powered by -5V and +5V respectively.

[0132] Terminal 0 of the operational amplifier U7 is connected to the voltage boosting circuit.

[0133] After passing through multiple amplifier circuits, the electromagnetic interference becomes increasingly serious, generating severe interference with high-frequency harmonics above 100 Hz. It is necessary to design a low-pass filter circuit. It is composed of R21, R22, R24, R25, C8, C9, and OP07. Among them, R21, R22, R24, and R25 mainly play a role in voltage regulation, and C8 and C9 ensure the stability of the circuit. Finally, the signal is output via OP07.

[0134] As a preference of this embodiment:

[0135] The voltage boosting circuit 6 mentioned above includes a series-connected resistor R23 and R20, where R20 is connected to the 1st and 0th terminals of the operational amplifier U8; one end of R26 is connected to the 2nd terminal of U8, and the other end is connected to the 2nd terminal of the sliding rheostat RESVR2. One end of the sliding rheostat RESVR2 is connected to the positive 5V, and the other end is grounded; the signal is output from the pin 0 of the operational amplifier U8.

[0136] The collected electrocardiogram (ECG) signals are not all greater than the 0 level. There will be parts greater than 0 and less than 0. The voltage of the amplified ECG signals is approximately -0.5V to 1.5V, while the input range of the analog-to-digital converter is 0 to 3.3V. Therefore, it is necessary to boost the signal to ensure that all ECG signals can be collected. It is adjusted through the sliding rheostat RESVR2 to achieve the purpose of adjusting the level boost.

[0137] As a preference of this embodiment:

[0138] The ECG signal detection circuit mentioned above further includes a radio frequency communication circuit, and the single-chip microcomputer U2 in the radio frequency communication circuit is connected to the single-chip microcomputer U1.

[0139] The radio frequency communication circuit mentioned above includes a radio frequency signal processing module 7, a power conversion circuit 8, and a radio frequency signal transceiver circuit 9.

[0140] The radio frequency signal processing module 7 is used to process radio frequency signals and modulate the data to be sent onto the radio frequency signals after demodulation.

[0141] The power conversion circuit 8 is used to provide a higher voltage for the single-chip microcomputer U2 when transmitting radio frequency signals.

[0142] The radio frequency signal transceiver circuit 9 is used to connect to the antenna to transmit signals and preprocess the received radio frequency signals at the same time.

[0143] The radio frequency signal processing module 7 is composed of the single-chip microcomputer U2 which is an MSP430FR5994 chip and its external circuit.

[0144] A crystal oscillator is connected between the 15th and 16th terminals of the single-chip microcomputer U2. The 20th and 21st terminals are respectively connected to the 30th and 31st terminals of the single-chip microcomputer U1. The 22nd terminal of the single-chip microcomputer U2 is connected to the 2nd terminal of the voltage regulator power supply chip U9 via the resistor R11. The 22nd and 23rd terminals of the single-chip microcomputer U2 are respectively connected to the 2nd and 3rd terminals of the reset interface U5. The 25th, 26th, 27th, 28th, 30th and 31st terminals of the single-chip microcomputer U2 are respectively connected to the 7th, 6th, 5th, 4th, 3rd and 2nd terminals of the pin header P1. The 8th terminal of the pin header P1 is connected to the 2nd terminal of the voltage regulator power supply chip U9.

[0145] The 1st terminal of the reset interface U5 is connected to the 2nd terminal of the voltage regulator power supply chip U9, and the 4th terminal is grounded.

[0146] The 48th and 37th terminals of the single-chip microcomputer U2 are connected to the 2nd terminal of the voltage regulator power supply chip U9. The 42nd terminal of the single-chip microcomputer U2 is connected to the resistor R15. The other end of the resistor R15 is connected to the positive electrode of the LED lamp bead LED1, and the negative electrode of the LED lamp bead LED1 is grounded.

[0147] The 0th, 41st, 44th and 47th terminals of the single-chip microcomputer U2 are grounded.

[0148] Among them, the 17th and 18th pins of the single-chip microcomputer U2 are connected to the single-chip microcomputer U1 of the peripheral control circuit to transmit the processed electrocardiogram data; the crystal oscillator Y1 is connected to the 15th and 16th pins of the single-chip microcomputer U2; the resistor R15 is connected in series with the LED lamp bead LED1 and then one end is grounded and the other end is connected to the 42nd pin of the single-chip microcomputer U2; the 37th and 48th pins of the single-chip microcomputer U2 are connected to the 3.3V voltage, and the 0th, 36th, 41st, 44th and 47th pins are grounded.

[0149] The power conversion circuit 8 is mainly composed of the single-chip microcomputer U4 which is the SI1016X chip and its peripheral circuits.

[0150] The 1st terminal of the single-chip microcomputer U4 is grounded. The 2nd terminal of the single-chip microcomputer U4 is grounded via the resistor R8. The 3rd terminal of the single-chip microcomputer U4 is grounded via the resistors R9 and R10. The 5th and 6th terminals of the single-chip microcomputer U4 are connected to the 18th terminal of the single-chip microcomputer U2 via the resistor R1. The 4th terminal of the single-chip microcomputer U4 is connected to the 18th terminal of the single-chip microcomputer U2.

[0151] The 2nd terminal of the single-chip microcomputer U4 is also connected to the 13th terminal of the single-chip microcomputer U2. One end where the resistors R9 and R10 are connected is also connected to the 17th terminal of the single-chip microcomputer U2.

[0152] Among them, pin 2 of microcontroller U4 is connected to pin 13 of microcontroller U2; pin 3 of microcontroller U4 is connected to pin 17 of microcontroller U2; pins 4, 5, and 6 of microcontroller U4 are connected to pin 18 of microcontroller U2; resistor R7 is connected to pins 5 and 6 of microcontroller U4; one end of resistor R8 is connected to pin 2 of microcontroller U4; resistors R9 and R10 are connected in series, and one end is connected to pin 3 of microcontroller U4 and the other end is grounded.

[0153] The described radio frequency signal transceiver circuit 9 mainly consists of microcontroller U6 which is S-882Z24, microcontroller U7 TPS780 and comparator U8 and its peripheral circuits.

[0154] Pin 2 and pin 3 of the described microcontroller U6 are grounded, pin 1 is connected to pin 1 of microcontroller U7, pins 3 and 4 of microcontroller U7 are connected to the outgoing end of P1, pins 3 and 4 of microcontroller U7 are connected to pin 1 of P1, pin 5 of microcontroller U7 is grounded through capacitor C9, and pin 5 of microcontroller U7 is also connected to pin 2 of voltage regulator chip U9; D1 and D4 use HSMS285C, and there are two diodes in one component package.

[0155] Pin 4 of the described microcontroller U6 is respectively connected to pin 1 of diode D1, the positive electrode of diode D2, the negative electrode of diode D3, and capacitor C8. The other end of pin 2 of diode D1, the negative electrode of diode D5, the positive electrode of diode D3, and capacitor C8 is grounded.

[0156] Pin 5 of the described microcontroller U6 is respectively connected to capacitor C10 and capacitor C11. The other ends of capacitor C10 and capacitor C11 are grounded. The negative electrode of diode D2 is grounded through capacitor C10.

[0157] Pin 3 of diode D1 is also connected to one end of capacitor C7. The other end of capacitor C7 is connected to one end of inductor L1. The other end of inductor L1 is connected to pin P1 of RF port SMA1. Pin P2 of RF port SMA1 is grounded; pin P1 of RF port SMA1 is also connected to one end of capacitor C12. The other end of capacitor C12 is grounded.

[0158] Pin P1 of the described RF port SMA1 is also connected to the drain of RF switch Q1. The source of RF switch Q1 is grounded. The gate of RF switch Q1 is connected to pin 38 of microcontroller U2.

[0159] One end of inductor L1 connected to capacitor C7 is also connected to capacitor C15. The other end of capacitor C15 is connected to pin 3 of diode D4. Pin 1 of diode D4 is connected to pin 4 of comparator U8 through resistors R12 and R13. Pin 1 of diode D4 is also connected to one end of capacitor C14. The other end of capacitor C14 is grounded. The other end of pin 2 of diode D4 is grounded.

[0160] A capacitor C8 is also connected in parallel across both ends of the resistor R12, and one end of the connection between the resistor R12 and the resistor R13 is also connected to the 1st terminal of the single-chip microcomputer U2 and the 3rd terminal of the comparator U8 respectively.

[0161] One end of a capacitor C17 and one end of a resistor R14 are also respectively connected to the 4th terminal of the comparator U8, and the other ends of the capacitor C17 and the resistor R14 are grounded.

[0162] The 3rd terminal of the comparator U8 is connected to the 1st terminal of the single-chip microcomputer U2.

[0163] The 2nd terminal of the comparator U8 is grounded, the 1st terminal is connected to the 39th terminal of the single-chip microcomputer U2, the 5th terminal of the comparator U8 is connected to one end of a capacitor C13, the other end of the capacitor C13 is grounded, and the 5th terminal of the comparator U8 is also connected to the 34th terminal of the single-chip microcomputer U2.

[0164] Among them, the capacitor C12 and the inductor L1 form a front-end matching network to perform impedance matching with the antenna to be connected at the RF port SMA1; the capacitors C7 and C15 are used to isolate DC signals; the energy harvesting part is composed of the single-chip microcomputer U6, the single-chip microcomputer U7, the capacitor C8, the capacitor C9, the capacitor C10, the capacitor C11, the diode D1, the diode D2, and the diode D3, and is used to collect the energy of the RF signal and use it when transmitting the RF signal; the signal demodulation part is composed of the comparator U8, the resistor R12, the resistor R13, the resistor R14, the capacitor C14, the capacitor C16, the capacitor C17, and the diode D4. The resistor R12 is connected in parallel with the capacitor C14 to realize the envelope detection function. The comparator U8 and the peripheral circuit convert the analog signal into a digital signal of high and low levels and input it to the 39th pin of the single-chip microcomputer U2 through the 1st port of the comparator U8.

[0165] As a preference of this embodiment:

[0166] The electrocardiogram detection circuit for wireless transmission further includes a peripheral control circuit, and the peripheral control circuit is connected to the voltage boosting circuit 6.

[0167] The peripheral control circuit includes a single-chip microcomputer U1 and an external circuit.

[0168] The external circuit includes a voltage stabilizing circuit 10 connected to the single-chip microcomputer U1, a single-chip microcomputer power supply circuit 11, a TF card slot module 12, a crystal oscillator circuit 13, a switch circuit 14, a programming circuit 15, and a USB communication circuit 16.

[0169] The voltage stabilizing circuit 10 is used to keep the output voltage stable when the input voltage is unstable; the resistance value of the resistor is adjusted according to different access power values, so as to obtain a variety of input voltages.

[0170] The described single-chip microcomputer power supply circuit 11 is used for voltage division and providing a stable 3.3V voltage for the single-chip microcomputer U1.

[0171] The described TF card slot 12 module is used for externally connecting a TF memory card to perform local data backup.

[0172] The described crystal oscillator circuit 13 is used for providing a clock signal for the single-chip microcomputer.

[0173] The described switch circuit 14 is used for controlling the on or off of the TF data storage module.

[0174] The described programming circuit 15 is used for connecting to the host computer to program the single-chip microcomputer U1.

[0175] The described USB communication circuit 16 is used for externally connecting to a PC or other devices for debugging.

[0176] As a preference of this embodiment:

[0177] The described voltage stabilizing circuit 10 includes a sliding rheostat RESVR1. The B end of the sliding rheostat RESVR1 is connected to the 10th end of the single-chip microcomputer U1, the A end of the sliding rheostat RESVR1 is grounded, and the P end of the sliding rheostat RESVR1 is connected to the pin 0 of the operational amplifier U8 through the resistor R2.

[0178] The described single-chip microcomputer power supply circuit 11 includes a voltage stabilizing power supply chip U9. The 1st end of the voltage stabilizing power supply chip U9 is grounded through the capacitor C1, the 2nd end of the voltage stabilizing power supply chip U9 is connected to the 1st, 9th, 24th, 36th and 48th ends of the single-chip microcomputer U1, the 3rd end of the voltage stabilizing power supply chip U9 is grounded through the resistor R3. The described single-chip microcomputer power supply circuit also includes a resistor R1. One end of the resistor R1 is connected to the 11th end of the single-chip microcomputer U1, and the other end...

[0179] The described crystal oscillator circuit 12 includes a crystal oscillator Y1. One end of the crystal oscillator Y1 is connected to the 5th end of the single-chip microcomputer U1, and the other end is connected to the 6th end of the single-chip microcomputer U1. The section of the crystal oscillator Y1 connected to the 5th end of the single-chip microcomputer U1 is also grounded through the capacitor C3, and the section of the crystal oscillator Y1 connected to the 6th end of the single-chip microcomputer U1 is also grounded through the capacitor C4.

[0180] The described TF card slot module 13 includes a TF card socket U10. The 1st, 2nd, 3rd and 4th ends of the TF card socket U10 are respectively connected to the 13th, 15th, 16th and 17th ends of the single-chip microcomputer U1, and a capacitor C2 is also connected between the 5th end and the 6th end of the TF card socket U10.

[0181] The described switch circuit 141 includes switch S1 and switch S2. One end of switch S1 is connected to resistor R6, and the other end is connected to the 40th terminal of single-chip microcomputer U1. One end of switch S1 is connected to resistor R6, and the other end is connected to the 41st terminal of single-chip microcomputer U1. The other end of resistor R6 is grounded.

[0182] The described programming circuit 5 includes SWD interface U11. The 1st terminal of SWD interface U11 is grounded. The 2nd and 3rd terminals are respectively connected to the 34th and 37th terminals of single-chip microcomputer U1. The 4th terminal is connected to the 2nd terminal of voltage regulator power supply chip U9.

[0183] The described USB communication circuit 16 includes USB-to-serial port chip U3. The 1st terminal of USB-to-serial port chip U3 is grounded. The 2nd and 3rd terminals are respectively connected to the 31st and 30th terminals of single-chip microcomputer U1. The 4th terminal is connected to the 2nd terminal of voltage regulator power supply chip U9.

[0184] The 5th and 6th terminals of USB-to-serial port chip U3 are respectively connected to the 3rd and 2nd terminals of Micro_USB access terminal USB1. The 7th terminal of USB-to-serial port chip U3 is connected to one end of crystal oscillator Y2. The other end of crystal oscillator Y2 is connected to the 8th terminal of USB-to-serial port chip U3. The 7th terminal of USB-to-serial port chip U3 is also connected to capacitor C5. The other end of capacitor C5 is grounded. The 8th terminal of USB-to-serial port chip U3 is also connected to capacitor C6. The other end of capacitor C6 is grounded.

[0185] The 16th terminal of USB-to-serial port chip U3 is connected to the 1st terminal of Micro_USB access terminal USB1. The 4th terminal of Micro_USB access terminal USB1 is grounded.

[0186] The 20th terminal of single-chip microcomputer U1 is grounded through resistor R4. The 44th terminal of single-chip microcomputer U1 is grounded through resistor R5. The 8th, 23rd, 35th, and 47th terminals of single-chip microcomputer U1 are grounded.

[0187] The above technical solutions are only the relatively optimal specific implementation manners of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be thought of by those skilled in the art within the technical scope disclosed by the present invention without creative labor are covered by the protection scope of the present invention.

Claims

1. A wireless transmission electrocardiogram detection circuit, characterized in that It includes a preamplifier circuit (1), a band-pass filter circuit (2), a 50Hz notch filter circuit (3), a main amplifier circuit (4), a low-pass filter circuit (5) and a voltage boost circuit (6) connected in sequence; The preamplifier circuit (1) is used to amplify the collected weak ECG signals; The band-pass filter circuit (2) is used to allow ECG signals within a frequency range to pass through and isolate DC signals; The 50Hz notch filter circuit (3) is used to remove the 50Hz power frequency interference in the environment; The main amplifier circuit (4) is used to further amplify the processed ECG signals; The low-pass filter circuit (5) is used to remove low-frequency signal interference; The voltage boost circuit (6) is used to boost the amplified ECG signals to the input range; The wireless transmission ECG detection circuit further includes a radio frequency communication circuit, and the radio frequency communication circuit is used to transmit the collected data to a device with analysis and processing capabilities.

2. The electrocardiogram detection circuit for wireless transmission according to claim 1, characterized in that, The preamplifier circuit (1) includes an operational amplifier U1 and an instrumentation amplifier U2, and the operational amplifier U1 and the instrumentation amplifier U2 are connected through terminal 2; After capacitor C1 and resistor R1 are connected in series and then connected in parallel with resistor R4, one end is connected to terminal 1 of U1, and the other end is connected to terminal 0 of U1. Resistor R2, resistor R3 are connected in parallel with resistor R5, one end is connected to terminal 9 of U2, and the other end is connected to terminal 13 of U2; The preamplifier circuit further includes a signal input terminal J1. Terminal 1 of the signal input terminal J1 is used to receive the right wrist signal, terminal 2 is used to receive the left wrist signal, and terminal 3 is used to receive the right leg signal. Terminal 1 of the signal input terminal J1 is connected to terminal 0 of U1, terminal 2 of the signal input terminal J1 is connected to terminal 10 of U2, and terminal 3 of the signal input terminal J1 is connected to terminal 11 of U1; among which, terminal 3 of U1 is grounded, terminal 4 is supplied with -5V power, terminal 2 is supplied with +5V power, terminal 14 of U2 is grounded, terminal 4 is supplied with -5V power, and terminal 7 is supplied with +5V power; this method uses three electrodes to collect the human ECG signals, and the right leg signal and the left and right wrist signals form a differential signal and are connected into the circuit; The preamplifier circuit further includes a diode D1 whose positive electrode is connected to terminal 2 of the signal input terminal J1 and a diode D2 connected to terminal 3 of the signal input terminal J1. The negative electrodes of the diode D2 and the diode D3 are respectively grounded; Terminal 7 of the operational amplifier U2 is connected to the band-pass filter circuit.

3. The electrocardiogram detection circuit for wireless transmission according to claim 2, characterized in that, The band-pass filter circuit includes an operational amplifier U3 and an operational amplifier U4, and the operational amplifier U3 and the operational amplifier U4 are connected through port 0; Resistor R7 is grounded and connected in series with capacitor C2, and is connected to U3 through terminal 2. The other end of capacitor C2 is connected to the preamplifier circuit, where terminals 3 and 4 of U3 are respectively grounded and supplied with +5V; Capacitor C3 is grounded and connected in series with resistor R6, and is connected to U4 through terminal 2. The other end of resistor R6 is connected to the operational amplifier U3, where terminals 3 and 4 of U4 are respectively grounded and supplied with +5V; Terminal 0 of the operational amplifier U4 is connected to the 50Hz notch filter circuit.

4. The electrocardiogram detection circuit for wireless transmission according to claim 3, wherein The described 50Hz notch circuit includes an operational amplifier U5, and also includes a series connection of capacitor C4 and capacitor C5 connected to the 1st terminal of the operational amplifier U5. Resistors R10, R11, R12, and R13 are connected in series and then connected in parallel with capacitor C4 and capacitor C5. One end of capacitor C4 is connected to capacitor C5, and the other end is connected to the band-pass filter circuit. The end where capacitor C4 and capacitor C5 are connected is also connected to a series connection of resistor R8 and resistor R9. One end of resistor R9 is connected to resistor R8, and the other end is connected to the 0th terminal and the 4th terminal of the operational amplifier U5. The 0th terminal of the described operational amplifier U5 is connected to the main amplification circuit.

5. The electrocardiogram detection circuit for wireless transmission according to claim 4, characterized in that, The described main amplification circuit includes an operational amplifier U6. Resistors R15 and R16 are connected in parallel and connected through the 0th and 4th terminals of U6. Capacitor C7 is connected in parallel with resistor R14, and resistor R14 is grounded. Capacitor C6 and resistor R17 are connected in series and simultaneously connected in parallel, and are connected to the 2nd terminal of the sliding rheostat RESVR1. One end of resistor R18 is externally connected to +5V and the other end is connected to the 2nd terminal of the sliding rheostat RESVR1. Among them, the 2nd terminal and the 3rd terminal of the operational amplifier U5 are powered by -5V and +5V respectively. The 0th terminal of the described operational amplifier U6 is connected to the low-pass filter circuit.

6. The electrocardiogram detection circuit for wireless transmission according to claim 5, characterized in that, The described low-pass filter circuit includes a series connection of resistor R21 and resistor R22, and is connected in parallel with resistors R24 and R25 and then grounded after connecting to capacitor C9. One end of capacitor C8 is connected in series with resistor R22, and the other end is connected to the 0th terminal and the 4th terminal of U7. Among them, the 2nd pin and the 3rd pin of U7 are powered by -5V and +5V respectively. The 0th terminal of the described operational amplifier U7 is connected to the voltage boost circuit.

7. The electrocardiogram detection circuit for wireless transmission according to claim 6, wherein The described voltage boost circuit includes a series connection of resistor R23 and R20, where R20 is connected to the 1st terminal and the 0th terminal of the operational amplifier U8. One end of R26 is connected to the 2nd terminal of U8, and the other end is connected to the 2nd terminal of the sliding rheostat RESVR2. One end of the sliding rheostat RESVR2 is connected to +5V, and the other end is grounded. The signal is output from the 0th pin of the operational amplifier U8.

8. The electrocardiogram detection circuit for wireless transmission according to claim 7, wherein The single-chip microcomputer U2 in the described radio frequency communication circuit is connected to the single-chip microcomputer U1. The described radio frequency communication circuit includes a radio frequency signal processing module, a power conversion circuit, and a radio frequency signal transceiver circuit. The described radio frequency signal processing module is used to process radio frequency signals and modulate the data to be sent onto the radio frequency signals after demodulation. The described power conversion circuit is used to provide a higher voltage for the single-chip microcomputer U2 when transmitting radio frequency signals. The described radio frequency signal transceiver circuit is used to connect to the antenna to transmit signals and simultaneously preprocess the received radio frequency signals. The described radio frequency signal processing module is composed of the single-chip microcomputer U2 and its external circuit. A crystal oscillator is connected between the 15th and 16th terminals of the single-chip microcomputer U2. The 20th and 21st terminals are respectively connected to the 30th and 31st terminals of the single-chip microcomputer U1. The 22nd terminal of the single-chip microcomputer U2 is connected to the 2nd terminal of the voltage regulator power supply chip U9 via the resistor R11. The 22nd and 23rd terminals of the single-chip microcomputer U2 are respectively connected to the 2nd and 3rd terminals of the reset interface U5. The 25th, 26th, 27th, 28th, 30th and 31st terminals of the single-chip microcomputer U2 are respectively connected to the 7th, 6th, 5th, 4th, 3rd and 2nd terminals of the pin header P1. The 8th terminal of the pin header P1 is connected to the 2nd terminal of the voltage regulator power supply chip U9; The 1st terminal of the reset interface U5 is connected to the 2nd terminal of the voltage regulator power supply chip U9, and the 4th terminal is grounded; The 48th and 37th terminals of the single-chip microcomputer U2 are connected to the 2nd terminal of the voltage regulator power supply chip U9. The 42nd terminal of the single-chip microcomputer U2 is connected to the resistor R15. The other end of the resistor R15 is connected to the positive electrode of the LED lamp bead LED1, and the negative electrode of the LED lamp bead LED1 is grounded; The 0th, 41st, 44th and 47th terminals of the single-chip microcomputer U2 are grounded; The power conversion circuit is mainly composed of the single-chip microcomputer U4 which is a SI1016X chip and its peripheral circuits; The 1st terminal of the single-chip microcomputer U4 is grounded. The 2nd terminal of the single-chip microcomputer U4 is grounded via the resistor R8. The 3rd terminal of the single-chip microcomputer U4 is grounded via the resistors R9 and R10. The 5th and 6th terminals of the single-chip microcomputer U4 are connected to the 18th terminal of the single-chip microcomputer U2 via the resistor R1. The 4th terminal of the single-chip microcomputer U4 is connected to the 18th terminal of the single-chip microcomputer U2; The 2nd terminal of the single-chip microcomputer U4 is also connected to the 13th terminal of the single-chip microcomputer U2. The connected end of the resistors R9 and R10 is also connected to the 17th terminal of the single-chip microcomputer U2; The radio frequency signal transceiver circuit is mainly composed of the single-chip microcomputer U6, the single-chip microcomputer U7 and the comparator U8 and their peripheral circuits; The 2nd and 3rd terminals of the single-chip microcomputer U6 are grounded. The 1st terminal is connected to the 1st terminal of the single-chip microcomputer U7. The 3rd and 4th terminals of the single-chip microcomputer U7 are connected to the P1 end of the P1. The 3rd and 4th terminals of the single-chip microcomputer U7 are connected to the 1st terminal of the P1. The 5th terminal of the single-chip microcomputer U7 is grounded via the capacitor C9. The 5th terminal of the single-chip microcomputer U7 is also connected to the 2nd terminal of the voltage regulator power supply chip U9; The 4th terminal of the single-chip microcomputer U6 is respectively connected to the 1st terminal of the diode D1, the positive electrode of the diode D2, the negative electrode of the diode D3 and the capacitor C8. The 2nd terminal of the diode D1, the negative electrode of the diode D5, the positive electrode of the diode D3 and the other end of the capacitor C8 are grounded; The 5th terminal of the single-chip microcomputer U6 is respectively connected to the capacitor C10 and the capacitor C11. The other ends of the capacitor C10 and the capacitor C11 are grounded. The negative electrode of the diode D2 is grounded via the capacitor C10; The 3rd terminal of the diode D1 is also connected to one end of the capacitor C7. The other end of the capacitor C7 is connected to one end of the inductor L1. The other end of the inductor L1 is connected to the P1 end of the radio frequency port SMA1. The P2 end of the radio frequency port SMA1 is grounded; The P1 end of the radio frequency port SMA1 is also connected to one end of the capacitor C12. The other end of the capacitor C12 is grounded; The P1 terminal of the RF port SMA1 is also connected to the drain of the RF switch Q1. The source of the RF switch Q1 is grounded, and the gate of the RF switch Q1 is connected to the 38th terminal of the microcontroller U2. One end of the inductor L1 connected to the capacitor C7 is also connected to the capacitor C15. The other end of the capacitor C15 is connected to the 3rd terminal of the diode D4. The 1st terminal of the diode D4 is connected to the 4th terminal of the comparator U8 after passing through the resistors R12 and R13. The 1st terminal of the diode D4 is also connected to one end of the capacitor C14, and the other end of the capacitor C14 is grounded. The 2nd terminal of the diode D4 is grounded. A capacitor C8 is also connected in parallel across both ends of the resistor R12. One end where the resistor R12 is connected to the resistor R13 is also respectively connected to the 1st terminal of the microcontroller U2 and the 3rd terminal of the comparator U8. One end of a capacitor C17 and a resistor R14 are also respectively connected to the 4th terminal of the comparator U8, and the other ends of the capacitor C17 and the resistor R14 are grounded. The 3rd terminal of the comparator U8 is connected to the 1st terminal of the microcontroller U2. The 2nd terminal of the comparator U8 is grounded. The 1st terminal is connected to the 39th terminal of the microcontroller U2. The 5th terminal of the comparator U8 is connected to one end of the capacitor C13, and the other end of the capacitor C13 is grounded. The 5th terminal of the comparator U8 is also connected to the 34th terminal of the microcontroller U2.

9. The electrocardiogram detection circuit for wireless transmission according to claim 8, wherein The electrocardiogram detection circuit for wireless transmission further includes a peripheral control circuit, and the peripheral control circuit is connected to the voltage boosting circuit (6). The peripheral control circuit includes a microcontroller U1 and an external circuit. The external circuit includes a voltage stabilizing circuit, a microcontroller power supply circuit, a TF card slot module, a crystal oscillator circuit, a switch circuit, a programming circuit, and a USB communication circuit connected to the microcontroller U1. The voltage stabilizing circuit is used to keep the output voltage stable when the input voltage is unstable. The microcontroller power supply circuit is used for voltage division and provides a stable 3.3V voltage for the microcontroller U1. The TF card slot module is used to externally connect a TF memory card to perform local data backup. The crystal oscillator circuit is used to provide a clock signal for the microcontroller. The switch circuit is used to control the on or off of the TF data storage module. The programming circuit is used to connect to the host computer to program the microcontroller U1. The USB communication circuit is used to externally connect to a PC or other devices for debugging.

10. The electrocardiogram detection circuit for wireless transmission according to claim 9, characterized in that, The voltage stabilizing circuit includes a sliding rheostat RESVR1. The B terminal of the sliding rheostat RESVR1 is connected to the 10th terminal of the microcontroller U1. The A terminal of the sliding rheostat RESVR1 is grounded. The P terminal of the sliding rheostat RESVR1 is connected to the pin 0 of the operational amplifier U8 through the resistor R2. The microcontroller power supply circuit includes a voltage stabilizing power supply chip U9. The 1st terminal of the voltage stabilizing power supply chip U9 is grounded through the capacitor C1. The 2nd terminal of the voltage stabilizing power supply chip U9 is connected to the 1st, 9th, 24th, 36th, and 48th terminals of the microcontroller U1. The 3rd terminal of the voltage stabilizing power supply chip U9 is grounded through the resistor R3. The microcontroller power supply circuit further includes a resistor R1. One end of the resistor R1 is connected to the 11th terminal of the microcontroller U1, and the other end... The crystal oscillator circuit described above includes a crystal oscillator Y1. One end of the crystal oscillator Y1 is connected to pin 5 of the single-chip microcomputer U1, and the other end is connected to pin 6 of the single-chip microcomputer U1. A section of the crystal oscillator Y1 connected to pin 5 of the single-chip microcomputer U1 is also grounded through a capacitor C3. A section of the crystal oscillator Y1 connected to pin 6 of the single-chip microcomputer U1 is also grounded through a capacitor C4; The TF card slot module described above includes a TF card socket U10. The 1st, 2nd, 3rd, and 4th pins of the TF card socket U10 are respectively connected to pins 13, 15, 16, and 17 of the single-chip microcomputer U1. A capacitor C2 is also connected between the 5th and 6th pins of the TF card socket U10; The switch circuit described above includes switches S1 and S2. One end of the switch S1 is connected to a resistor R6, and the other end is connected to pin 40 of the single-chip microcomputer U1. One end of the switch S1 is connected to the resistor R6, and the other end is connected to pin 41 of the single-chip microcomputer U1. The other end of the resistor R6 is grounded; The programming circuit described above includes an SWD interface U11. The 1st pin of the SWD interface U11 is grounded. The 2nd and 3rd pins are respectively connected to pins 34 and 37 of the single-chip microcomputer U1. The 4th pin is connected to the 2nd pin of the voltage regulator power supply chip U9; The USB communication circuit described above includes a USB to serial port chip U3. The 1st pin of the USB to serial port chip U3 is grounded. The 2nd and 3rd pins are respectively connected to pins 31 and 30 of the single-chip microcomputer U1. The 4th pin is connected to the 2nd pin of the voltage regulator power supply chip U9; The 5th and 6th pins of the USB to serial port chip U3 are respectively connected to the 3rd and 2nd pins of the Micro_USB access terminal USB1. The 7th pin of the USB to serial port chip U3 is connected to one end of a crystal oscillator Y2. The other end of the crystal oscillator Y2 is connected to the 8th pin of the USB to serial port chip U3. The 7th pin of the USB to serial port chip U3 is also connected to a capacitor C5. The other end of the capacitor C5 is grounded. The 8th pin of the USB to serial port chip U3 is also connected to a capacitor C6. The other end of the capacitor C6 is grounded; The 16th pin of the USB to serial port chip U3 is connected to the 1st pin of the Micro_USB access terminal USB1. The 4th pin of the Micro_USB access terminal USB1 is grounded; The 20th pin of the single-chip microcomputer U1 is grounded through a resistor R4. The 44th pin of the single-chip microcomputer U1 is grounded through a resistor R5. The 8th, 23rd, 35th, and 47th pins of the single-chip microcomputer U1 are grounded.