Power panel assembly
Through the redundant switching and multi-stage filtering structure of parallel NMOS power switch and high-energy TVS tube, the problems of inadequate input power surge suppression and peak voltage protection of traditional power board components in complex electromagnetic environments are solved, and a power system with high reliability, high efficiency and high stability is achieved.
Patent Information
- Application Number
- CN202510368032.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-26
- Publication Date
- 2025-07-18
AI Technical Summary
The surge suppression, redundant switching, and peak voltage protection of traditional power supply components in complex electromagnetic environments are insufficient, making it difficult to meet the demands of modern industrial equipment for high reliability, high efficiency and high stability.
The parallel NMOS power switch and controller are used to achieve redundant switching, combined with high-energy TVS tubes and multi-stage filter structures for peak voltage suppression, and the input EMI electromagnetic compatibility and power supply characteristics, core power conversion, and power management module are integrated through modular design to optimize the EMI filter and power supply maintenance management.
It significantly improves the reliability and stability of the power system, improves the redundant switching efficiency, enhances the peak voltage suppression ability, meets the requirements of high-standard electromagnetic compatibility, extends the power outage maintenance time, simplifies the interface design, and improves the power conversion efficiency of the entire machine.
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Figure CN120342202A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of power board assemblies, and particularly relates to a power board assembly. Background Art
[0002] Currently, in modern industrial power systems, as the core power supply unit, the performance and reliability of power board assemblies are directly related to the stable operation of the entire system. However, with the increasing complexity of electronic devices and the increasingly harsh application environment, traditional power board assemblies face many challenges in design and performance. The input protection function of traditional power systems is relatively simple, usually only adopting basic filtering and overvoltage protection measures, and it is difficult to cope with various power anomalies in complex electromagnetic environments, such as input spike voltages, surge currents, reverse polarity connections, etc., resulting in insufficient system reliability.
[0003] In the prior art, diode OR-ing circuits are mostly used for input redundant switching, which has problems such as large conduction voltage drop (about 0.7V), high power consumption, and slow response speed. This not only reduces system efficiency but also increases the difficulty of thermal management. In addition, traditional spike voltage suppression technologies mostly use single TVS tubes or RC absorption circuits, with limited suppression capabilities and difficulty in coping with high-energy spike voltages (such as 600V / 10μs), which easily causes damage to components in the subsequent circuit. In terms of electromagnetic compatibility, EMI filters in the prior art usually adopt single-stage common-mode or differential-mode filtering, with limited filtering effects and difficulty in meeting high-standard electromagnetic compatibility requirements, especially in the frequency range of 250kHz to 500kHz, where the noise suppression ability is insufficient and electromagnetic interference problems are easily caused. In the power-off maintenance design, traditional solutions mostly use large-capacity capacitors for direct power supply, which has problems such as low energy utilization rate and short maintenance time, and cannot meet the system's requirement of maintaining long-term operation after power-off.
[0004] Existing power systems usually design the input protection, power conversion, and power management modules separately, resulting in complex interfaces, low efficiency, and insufficient reliability, increasing the difficulty of system integration and debugging. The efficiency of the core power conversion module is relatively low (usually ≤80%), and it is difficult to meet the application requirements of a wide input voltage range (9V to 36V), resulting in unstable system performance when the input voltage fluctuates.
[0005] Traditional power board assemblies have obvious deficiencies in input protection, redundant switching, spike voltage suppression, electromagnetic compatibility, power-off maintenance management, and overall architecture design, and it is difficult to meet the requirements of modern industrial equipment for high reliability, high efficiency, and high stability. There is an urgent need for an innovative design solution for power board assemblies to solve the above problems. Summary of the Invention
[0006] The present invention provides a power board assembly, which solves the problems of insufficient surge suppression, redundant switching, and spike voltage protection of the input power supply in a complex electromagnetic environment in the traditional power supply system, and improves the reliability and stability of the power supply system at the same time.
[0007] The technical solution of the present invention is implemented as follows: A power board assembly includes an input EMI electromagnetic compatibility and power supply characteristic design module, a core power conversion module, and a power management module. The input EMI electromagnetic compatibility and power supply characteristic design module is used for filtering, protecting, and suppressing surges of the input power supply; the core power conversion module is used to convert the input voltage into multiple output voltages, and the power management module is used to implement input / output voltage monitoring and power-off maintenance management;
[0008] Among them, the input EMI electromagnetic compatibility and power supply characteristic design module includes an LC filter unit, an input reverse polarity protection unit, an input spike voltage suppression unit, an input redundant OR-ing unit, an EMI filter unit, a startup surge current suppression unit, an input overvoltage surge suppression unit, an input overcurrent protection unit, a power-off maintenance unit, and an input undervoltage surge suppression unit;
[0009] The input redundant OR-ing unit includes an NMOS power switch and a controller arranged in parallel. The redundant switching of the dual-input power supply is performed through the NMOS power switch arranged in parallel; the reverse voltage between the drain and source of the NMOS power switch is detected by the controller, and when the detected reverse voltage exceeds 30 mV, the power supply path of the lower input voltage is turned off, and the higher input voltage supplies power alone;
[0010] The input spike voltage suppression unit suppresses the input spike voltage signal with a maximum of 600 V / 10 μs through a transient voltage suppression TVS tube. The clamping voltage of the transient voltage suppression TVS tube is 85 V, and the instantaneous peak power consumption is 1500 W.
[0011] In the prior art, diode OR-ing circuits are usually adopted for input redundant switching, which have problems such as large on-state voltage drop (about 0.7V), high power consumption, and slow response speed. This solution uses a parallel-set NMOS power switch and a controller to achieve redundant switching. By detecting the drain-source reverse voltage (threshold 30mV), the lower-voltage path is dynamically turned off, significantly reducing the on-state voltage drop (only I×RDS(on)), improving the switching efficiency and response speed (<1μs), and at the same time reducing power consumption and heat loss. For spike voltage suppression, a single TVS tube or RC absorption circuit is usually adopted, with limited suppression ability and difficulty in dealing with high-energy spike voltages (such as 600V / 10μs). This solution uses a TVS tube with a clamping voltage of 85V and an instantaneous peak power consumption of 1500W, combined with an LC filter and a damping network to form a multi-stage spike voltage suppression structure, significantly improving the spike voltage suppression ability and avoiding damage to the TVS tube due to overload.
[0012] EMI filters in the prior art usually adopt single-stage common-mode or differential-mode filtering, with limited filtering effect and difficulty in meeting the high-standard electromagnetic compatibility requirements of military equipment. This solution uses a composite structure of 2-stage common-mode filtering + 2-stage differential-mode filtering to achieve a maximum differential-mode noise suppression of ≥65dB and a maximum common-mode noise suppression of ≥40dB in the frequency range of 250kHz to 500kHz. At the same time, the oscillation impact of the input bus voltage is eliminated through an RC damping network, significantly improving the electromagnetic compatibility performance. Traditional power-off maintenance designs usually use a large-capacity capacitor for direct power supply, which has problems such as low energy utilization rate and short maintenance time. This solution realizes intermittent charging management of the energy storage capacitor through a Boost circuit, dynamically controls the capacitor charging voltage between 40V and 50V, and combines a power-off maintenance control module (SHUM-300-T) to achieve efficient energy management, significantly extending the power-off maintenance time (50ms@6800μF) and improving the energy utilization efficiency at the same time.
[0013] Existing power systems usually design the input protection, power conversion, and power management modules separately, resulting in complex interfaces, low efficiency, and insufficient reliability. This solution integrates the three major functions through modular design, simplifies the interface design (only 5V low-voltage transmission), improves the overall power conversion efficiency of the machine (≥85%), and at the same time reduces the design complexity and system failure rate. Traditional DC / DC converters have low efficiency (usually ≤80%) and are difficult to meet the application requirements of a wide input voltage range (9V to 36V). This solution uses 1 / 32 brick and 1 / 16 brick DC / DC power converters to achieve efficient conversion of 28V→5V (efficiency ≥90%), and further reduces the output voltage ripple through an output LC ripple attenuation unit, improving the power quality.
[0014] The technical solution of this application document is through the design of a highly reliable surge-resistant EMI filter: a highly reliable surge-resistant EMI filter is designed at the front end of the product, and the functions it covers mainly include EMI filtering, input spike voltage suppression, inrush current suppression during startup, input reverse polarity protection, input overvoltage surge suppression, input overcurrent protection, input over- and under-voltage protection, etc., to meet the product's design requirements for EMI electromagnetic compatibility and power supply characteristics. From three aspects of shielding, grounding, and EMI filter parameter optimization, the EMI electromagnetic compatibility design performance of the product is improved. According to the requirements of the technical quality agreement, the parameters of the surge-resistant MOS power switch are optimized, the startup timing is controlled, etc., and targeted design, debugging, and verification are carried out according to the requirements of the whole machine to ensure that the product has sufficient design margin.
[0015] Fine management design for power-off maintenance: It mainly includes two parts: power-off maintenance power output design and fine management control design. The overall power-off maintenance power output of the product reaches 180W. The design uses the SHUM-300-T core power-off maintenance controller (the maximum power-off maintenance output is 300W) to manage the charging and discharging processes of the energy storage capacitors in two groups respectively. On the basis of ensuring the overall reliability of the product, the utilization rate of the internal energy of the energy storage capacitors is fully improved to ensure the realization of the input over- and under-voltage surge suppression function and the power-off maintenance function of the product. At the same time, an independent monitoring controller monitors the input voltage status in real time and conducts fine management of the system power-off timing. The overall design is relatively complex. During the design process, it is necessary to take into account the design logics of many functions, match and coordinate with each other, and avoid the conflict and disorder of functions in different working states.
[0016] As a preferred embodiment, the EMI filtering unit realizes a maximum differential mode noise suppression of ≥65dB and a maximum common mode noise suppression of ≥40dB in the frequency range of 250kHz to 500kHz through a 2-stage common mode filtering and 2-stage differential mode filtering structure, and a damping and stabilizing network composed of RD and CD is used to avoid the oscillation impact on the input bus voltage in different working states.
[0017] As a preferred embodiment, the inrush current suppression unit during startup controls the establishment time of the gate-source voltage VGS of the NMOS power switch to suppress the inrush current at the startup moment. The establishment time constant of the gate-source voltage VGS is several hundred μs to several tens of ms, and the inrush current does not exceed the safe operating area of the power switch SOA.
[0018] As a preferred embodiment, the power-off maintenance unit includes an energy storage capacitor, a Boost circuit, and a power-off maintenance control module. The energy storage capacitor is used to maintain the energy supply of the backend power conversion module after the input power is cut off. The Boost circuit is used to charge the energy storage capacitor to a steady-state energy storage voltage of 40V to 50V. The power-off maintenance control module is used to manage the charging and discharging processes of the energy storage capacitor, and the maximum output power is 300W.
[0019] As a preferred embodiment, the energy management of the power-off maintenance unit is managed by the following formula:
[0020]
[0021] Wherein, U1 is the steady-state charging voltage of the capacitor (40V), U2 is the minimum operating voltage of the backend power conversion module (10V), the power-off maintenance time t = 50ms, and the energy storage capacitor capacity is not less than 6800 μF.
[0022] As a preferred embodiment, the core power conversion module includes: 1 / 32 brick and 1 / 16 brick DC / DC power converters, with an input voltage range of 9V to 36V and an output voltage of 5V; an output LC ripple attenuation unit for reducing the output voltage ripple.
[0023] As a preferred embodiment, the power management module includes a non-isolated point-of-load power module, an input / output voltage monitoring unit, and a power-off maintenance management unit. The non-isolated point-of-load power module is used for low-dropout DC / DC conversion from 5V to 3.3V / 2.5V / 1.8V; the input / output voltage monitoring unit is used for real-time monitoring of the power supply status; the power-off maintenance management unit is used for maintaining the power supply of the backend digital controller circuit after the input power is cut off.
[0024] After adopting the above technical solutions, the beneficial effects of the present invention are as follows: Through innovative designs such as input redundant OR-ing technology, spike voltage suppression technology, composite EMI filtering design, and intelligent power-off maintenance management, the power supply board assembly significantly improves the performance and reliability of the power supply system. First, the input redundant OR-ing technology realizes efficient and fast redundant switching by paralleling NMOS power switches and controllers, reduces the on-state voltage drop and power consumption, and improves the system reliability. Second, the spike voltage suppression technology uses high-energy TVS tubes and multi-stage filtering structures to effectively suppress the spike voltage of 600V / 10μs and protects the backend circuit from damage. Third, the composite EMI filtering design significantly improves the electromagnetic compatibility performance through a two-stage common-mode filtering + two-stage differential-mode filtering structure and meets the high standards of military equipment. Fourth, the intelligent power-off maintenance management realizes efficient energy utilization and long-time power-off maintenance through the dynamic control of the Boost circuit and energy storage capacitors, and significantly improves the emergency power supply capacity of the system. In addition, the modular design of the overall architecture simplifies the interface complexity, improves the overall machine power conversion efficiency (≥85%), reduces the design difficulty and system failure rate at the same time. The core power conversion module adopts an efficient DC / DC converter and an LC ripple attenuation unit to further improve the power quality and stability. In summary, the power supply board assembly has significant advantages in aspects such as input protection, power conversion, power management, and electromagnetic compatibility, and is suitable for high-reliability power supply systems in complex electromagnetic environments such as aircraft. BRIEF DESCRIPTION OF THE DRAWINGS
[0025] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present invention, and those of ordinary skill in the art can also obtain other drawings without creative efforts based on these drawings.
[0026] Figure 1 It is a functional principle block diagram of the present invention.
[0027] Figure 2 It is a power supply design scheme diagram on the monitoring board and control board in the embodiment of the present invention;
[0028] Figure 3 It is an internal functional principle diagram of the PoL point-of-load power supply in the embodiment of the present invention;
[0029] Figure 4 It is a partial schematic diagram of the input EMI electromagnetic compatibility and power supply characteristics design in the embodiment of the present invention;
[0030] Figure 5 It is a principle block diagram of the input redundant OR-ing design in the embodiment of the present invention;
[0031] Figure 6 For the power switch Q at the moment of power-on startup in the embodiment of the present invention SS Drain-source voltage V DS Schematic diagram;
[0032] Figure 7 For the power switch Q in the embodiment of the present invention SS Schematic diagram of the safe operating area SOA;
[0033] Figure 8 Schematic diagram of a surge suppressor with an ideal diode control function in the embodiment of the present invention;
[0034] Figure 9 Principle block diagram of the power-off maintenance design in the embodiment of the present invention. Specific implementation manners
[0035] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts belong to the scope of protection of the present invention.
[0036] Embodiment:
[0037] A power supply board assembly, the main function of which is to convert a DC input voltage of 18V to 32V (nominal input voltage is 28V) into 10 DC output voltages to supply power to the system backend devices, namely 24V / 40W (VO1, VO2), 24V / 3.8W (VO3), 28V / 9.4W (VO4), 15V / 9.585W (VO5), -15V / 4.5W (VO6), 15V / 18.5W (VO7), 5V / 15.5W (VO8, VO9), 5V / 26W (VO10), and the maximum output power is about 180W. The specific power output distribution is shown in Table 1.1:
[0038] Table 1.1 Product power output distribution
[0039]
[0040]
[0041] In addition, the product also needs to meet the electromagnetic compatibility requirements of GJB151(A) and the power characteristic design requirements of GJB181(A) in cooperation with the system. Its functions include input spike voltage suppression (600V / 10μs, 50Ω), EMI filtering, inrush current suppression at startup, input overvoltage surge suppression, input reverse polarity protection, input overcurrent protection, input undervoltage surge suppression, power-off maintenance, output overcurrent / short-circuit protection, input / output status detection, etc., to achieve the reliability design goal of the whole machine system.
[0042] As Figure 1 shown, the design intends to adopt the overall design scheme as Figure 1 shown. The overall scheme can be divided into three major parts: input EMI electromagnetic compatibility and power characteristic design, core power conversion design, and power management design;
[0043] The input EMI electromagnetic compatibility and power characteristic design include parts such as LC filtering, input reverse polarity protection, input spike voltage suppression, input redundant OR-ing, EMI filtering, inrush current suppression at startup, input overvoltage surge suppression, input overcurrent protection, power-off maintenance, input undervoltage surge suppression, etc.
[0044] The core power conversion design includes parts such as the core DC / DC power converter (covering multiple models of 9V to 36V input 1 / 32 brick and 1 / 16 brick) and output LC ripple attenuation;
[0045] The power management design includes parts such as input / output voltage monitoring and power-off maintenance management. It is particularly worth noting that from the perspective of the overall machine power supply design architecture, the above Figure 1 design scheme, V O8 , V O9 , V O10 are the power supply interfaces for the system's backend control boards (2 pieces) and monitoring board (1 piece). Figure 2 This is the power supply design scheme on the monitoring board and control board, mainly realizing low-dropout DC / DC conversion through non-isolated point-of-load power modules (PoL power: 10A, 5A) to supply power to digital controller circuits such as the backend FPGA and DSP. Therefore, the implementation path of the overall machine power supply design architecture is very clear. Whether it is FPGA power supply (realized by V O8 , V O9 ) or DSP power supply (realized by V O10 ), the inter-board interface voltage is a low voltage of 5V, and there will be no excessive interactive control terminal definitions, avoiding the occupation of interface resources.
[0046] Adopting the overall machine power supply architecture design as Figure 1 and Figure 2 The advantages of the overall machine power supply architecture design are:
[0047] (1) The power supply control and management of the whole machine system are all placed on the XCP106K power board assembly. The interface definitions between the power board and the monitoring board and the control board are very clear and simple, without additional communication interface interference, avoiding complex division of the design interface and mutual influence between the front-end and back-end designs, which is conducive to unified management and implementation.
[0048] (2) The power supply for the interfaces between the power board and the monitoring board and the control board is only 5V low voltage, avoiding high voltage. At the same time, the internal parts of the monitoring board and the control board are unified as non-isolated structures, without the problem of isolation interface division. Compared with isolated switching power supplies, the low-voltage high-current PoL (Point of Load) power conversion has higher quality, which is more suitable for the power supply design of digital circuits such as FPGA and DSP, greatly simplifying the design complexity.
[0049] (3) The power conversion efficiency of the power board interface from 28V to 5V / 8A is about 90%. The power conversion efficiency of the monitoring board and control board interfaces from 5V to 3.3V, 2.5V, and 1.8V is about 94%. After comprehensive conversion, the overall power conversion efficiency should not be lower than 80%, and can reach up to about 85%, avoiding the thermal design problems caused by too low power conversion efficiency.
[0050] After clearly defining the main design contents inside the product, the following will conduct a detailed analysis of the circuit design for the related contents involved, and briefly demonstrate the technical index situation that the design can achieve. It should be noted that the power supply design part of the monitoring board and the control board is independent of the power board assembly design, and is directly designed and implemented by the whole machine using standard PoL power products (such as 5A, 10A, etc.). The external shape structure and internal functional principle of the PoL (Point of Load) power supply are as Figure 3 shown.
[0051] The purpose of the input LC filter design is to reduce the power supply voltage ripple as much as possible and provide a matching impedance for the TVS tube for suppressing spike voltage at the back end. Its principle structure is as Figure 4 shown, where L DI and C DI form an LC filter structure.
[0052] The input reverse polarity protection is achieved by setting an NMOS power switch (Q RL ) on the IN- line. As shown in Figure 4 , the drain D of the power switch is connected to IN-, and the source S is connected to the back-end circuit.
[0053] When the input power supply polarity is connected correctly, the body diode of the power switch Q RL first conducts forward, and the circuit starts to work normally. At this time, the voltage between the drain D and the source S of Q RL is the forward conduction voltage of the body diode; as the V GS voltage (at steady state, VGS Equal to the regulated voltage value of the bias zener diode), the establishment of Q RL The drain D and source S of are fully conducting. At this time, Q RL The voltage between the drain D and source S of is the on-state voltage drop of the power switch (I×R DS(on) ), which is much smaller than the conduction voltage drop of the body diode (about 1V). Therefore, the conduction power consumption of the power switch Q RL can be significantly reduced;
[0054] When the input power supply polarity is reversely connected, the body diode of the power switch Q RL is reversely cut off. At this time, the gate G voltage is equal to the source S voltage, both of which are at the ground potential (V I -), the drain D and source S are cut off, and the power switch is turned off, avoiding damage to the subsequent circuit due to the reverse connection of the input voltage. The characteristics of the input spike voltage signal are described in detail in the national military standard GJB181(A). In order to suppress the input spike voltage signal (maximum 600V / 10μs) and avoid damage to the components of the subsequent circuit, the commonly used solution is to design a transient spike voltage suppression TVS tube at the front end of the circuit, such as Figure 4 shown by the TVS tube in
[0055] The maximum steady-state input voltage of the product is 32V, and the maximum transient input voltage surge is 80V / 50ms. Therefore, the front-end transient spike voltage suppression TVS tube can select a standard model with a clamping voltage of 85V and an instantaneous peak power consumption of 1500W. Input redundancy OR-ing is achieved by setting an NMOS power switch (Q ID ) on the IN+ line, as shown in Figure 4 . The source S of the NMOS power switch is connected to IN+, and the drain D is connected to the subsequent circuit. Under normal operating conditions, the internal parasitic diode of Q ID conducts first (the voltage between the source and drain is the conduction voltage of the parasitic diode). After the start-up surge current suppression, the gate-source voltage V ID of Q is established, realizing full conduction between the source and drain (the voltage between the source and drain is the product of the R GS on-resistance and the input current, I×R DS ), and reducing the power loss under normal operating conditions as much as possible. If one of the input voltages is higher than the other, the controller can detect the reverse voltage between the drain and source of the NMOS power switch (Q DS ). Once it exceeds 30mV, the GATE port of the controller will turn off the power supply path of the input voltage with the lower voltage, and the higher input voltage will supply power alone. Thus, the input dual-margin OR-ing design is realized, and the principle block diagram is as shown in ID Figure 5 shown in
[0056] Designing an EMI filter with high current and high insertion loss at the front end of the product input is one of the most effective ways to solve electromagnetic compatibility design problems. As Figure 4 shown, L C and C Y1 , C Y2 constitute common-mode filtering, and the parasitic differential-mode inductance of L C and C LC , L D and C LC constitute differential-mode filtering. Therefore, the product EMI filter adopts a combined design scheme of 2-stage common-mode filtering + 2-stage differential-mode filtering, with a maximum differential-mode noise suppression of ≥65 dB and a maximum common-mode noise suppression of ≥40 dB in the frequency range of 250 kHz to 500 kHz. The damping and stabilization network composed of R D and C D effectively avoids the oscillation impact on the input bus voltage under different working conditions of the product and ensures the stability of the product operation.
[0057] Special attention should be paid to the shielding treatment of the input power line (especially at the position of the input connector) and the selection of the position of the common-mode interference suppression grounding point in the design of the EMI filtering part, to avoid the complex electromagnetic interference signals inside the circuit from being superimposed on the input power line through the coupling path and reducing the performance of the EMI filter.
[0058] The inrush current suppression at startup is achieved by setting an NMOS power switch (Q SS ) on the IN+ line. As Figure 4 shown, the drain D of the power switch Q SS is connected to the IN+ side, and the source S is connected to the backend circuit. At the moment of power-on startup of the product, by controlling the gate-source voltage V SS establishment time of the power switch Q GS , the characteristic that the on-resistance R SS of the power switch Q GS gradually decreases during the establishment process of the gate-source voltage V DS is utilized to suppress the inrush current at startup and avoid the excessive inrush current from affecting the stability of the power supply bus voltage. As Figure 6 shown, the drain-source voltage V SS of the power switch Q DS gradually decreases as the V GS establishment process progresses, showing that the power switch Q SS transitions from the fully off state to the fully on state. The design of the gate-source voltage V SS establishment time constant of the power switch Q GS should be appropriate and not too large to avoid the inrush current exceeding the SOA safe operating area of the power switch and damaging the device, as Figure 7 shown. Usually, the gate-source voltage VGS The established time constant ranges from several hundred μs to several tens of ms.
[0059] Similar to the starting surge current suppression principle, the input overvoltage surge suppression is also achieved by setting an NMOS power switch (Q SS ) on the IN+ line, as Figure 4 shown. The drain D of the power switch Q SS is connected to the IN+ side, and the source S is connected to the backend circuit. When the input voltage V I exceeds the input overvoltage surge suppression clamping set value V OVC (maximum 50V), the gate-source voltage V SS of the power switch Q GS is rapidly reduced, causing the power switch Q SS to operate in the linear impedance adjustment state. Relying on the correlation characteristics between the on-resistance R SS of the power switch Q DS and the gate-source voltage V GS , the drain-source voltage V SS of the power switch Q DS is adjusted in a timely manner to ensure that the backend output voltage is stabilized at the input overvoltage surge suppression clamping set value V OVC . At this time, the power consumed by the power switch Q SS is V DS ×I = (V I - V OVC )×I. It should be ensured that the operating state of the power switch Q SS is within the SOA safe operating area; otherwise, the device is likely to be burned out, resulting in functional failure.
[0060] The reverse current suppression is achieved by setting an NMOS power switch (Q RH ) on the IN+ line, as Figure 4 shown. The source S of the power switch Q RH is connected to the IN+ side, and the drain D is connected to the backend circuit. The operating principle of the reverse current suppression is similar to the control principle of an ideal diode. When the input power supply is normally started and connected, the body diode of the power switch Q RH first conducts forward, and the circuit starts to operate normally. At this time, the source-drain voltage V RH of the power switch Q SD is the forward conduction voltage of the body diode. As the gate-source voltage V RH of the power switch Q GS is established, the source S and the drain D of Q RH are fully conducting. At this time, the source-drain voltage V RH of the power switch Q SD is the on-state voltage drop (I×R RH ) of the power switch Q DS(on)) is much smaller than the forward voltage drop of the body diode (about 1V), so when the circuit is working properly, the conduction power consumption of the power switch Q RH is very small, and the impact on the overall efficiency of the product can be ignored. When the input power supply loses power, due to the energy storage of the backend capacitor, the source-drain voltage V RH of Q SD shows a negative voltage, and the body diode of the power switch Q RH is reverse cutoff and in the off state, preventing the discharge current of the backend energy storage capacitor from flowing back to the input end, causing energy loss of the capacitor energy storage and even damaging other power supply devices on the input side.
[0061] Input overcurrent protection is achieved by setting an overcurrent detection resistor R CS on the IN+ line, as shown in Figure 4 . When the voltage drop (I×R CS ) on the detection resistor R CS exceeds the input overcurrent protection threshold voltage, the gate-source voltage V SS of the power switch Q GS is quickly reduced, making the power switch Q SS in the off state to protect the backend circuit from being damaged due to overcurrent faults. After a certain cycle time, the power switch Q SS is automatically restarted. If the overcurrent fault of the backend circuit has been eliminated at this time, the circuit starts to work normally; if the overcurrent fault of the backend circuit has not been eliminated at this time, the restart process of the power switch Q SS terminates, and this cycle repeats until the overcurrent fault of the backend circuit is eliminated.
[0062] As shown in Figure 8 . By adjusting the grounding capacitance value of the HGATE port, the startup surge current suppression time constant can be adjusted; by adjusting the grounding capacitance value of the TMR port, the delay cycle time of the input overvoltage surge suppression and the restart cycle time of the input overvoltage and overcurrent protection can be adjusted; the port is used for OC restart control; the FB port is used for setting the input overvoltage surge suppression clamping voltage threshold V OVC ; the SENSE port is used for input overcurrent protection detection.
[0063] According to the refined management design requirements for system power-off maintenance, the product needs to maintain a normal working state for a certain period of time after the input power is cut off and effectively manage and control the backend power conversion channel. As shown in Figure 4 , in the normal working state, the energy supply of the backend power conversion part is provided by the input bus voltage through Q HD . When Q HS is turned off, the energy storage capacitor C stg discharges through the discharge path, and the Boost Circuit charges the energy storage capacitor to the steady-state energy storage voltage (using an intermittent charging method to maintain the energy storage). During the power-off maintenance period, QHS Turn on, Q HD Reverse cut-off. At this time, the energy supply of the backend power conversion design part is provided by the internal energy storage capacitor. Therefore, in order to make the most effective use of the internal energy of the energy storage capacitor, the backend power conversion design uses a DC / DC converter module with a minimum operating voltage of 9V, a maximum steady-state input voltage of 40V, and a maximum transient (1s) input voltage of 50V. That is to say, in order to maximize the stored energy of the energy storage capacitor and extend the power-off maintenance time, the steady-state charging voltage of the energy storage capacitor can be controlled between 40V and 50V, and the design intends to use a steady-state charging voltage of about 40V. In addition, the design intends to use a standard power-off maintenance control module SHUM-300-T to manage the charging and discharging of the energy storage capacitor, with a maximum output power of 300W. Figure 9 Describes in detail the working principle of the power-off maintenance controller design;
[0064] According to the principle of energy balance, the energy required during power-off maintenance is:
[0065]
[0066] Among them, U1 is the steady-state charging voltage of the capacitor, taking the maximum charging voltage of 40V, and U2 is the minimum operating voltage of the backend power conversion design, taking the minimum operating voltage of 10V. A certain design margin is reserved, and the calculation is carried out according to the power-off maintenance time t = 50ms.
[0067] a. For V O1 、V O3 (V O1 and V O2 OR-ing implementation), V O5 、V O6 、V O7 power supply output (total about 80W), considering an 80% converter efficiency (the output voltage is relatively high, and the multi-channel output power is relatively small, affecting the overall conversion efficiency, and considering a certain design margin), the maximum maintenance power does not exceed 100W, then the capacity of the energy storage capacitor should not be less than 6800μF (the energy storage tantalum capacitor is greatly affected by low temperature changes, usually with a change of nearly 30% or so).
[0068] b. For V O2 、V O3 (V O1 and V O2 OR-ing implementation), V O8 、V O9 、V O10For the power supply output (about 100W in total), considering an 83% converter efficiency (with a certain design margin), the maximum sustained power is about 120W. Then, the capacitance of the energy storage capacitor should not be less than 8000 μF (the energy storage tantalum capacitor is greatly affected by low-temperature changes, usually with a variation of nearly 30%).
[0069] To improve the utilization rate of the energy storage capacitor inside the product, similar to the power-off maintenance design function, during the input under-voltage surge and input over-voltage surge of the product, the supply of energy in the backend power conversion part is achieved through the internal energy storage capacitor. Their working principles are the same, so no further elaboration will be made here.
[0070] No matter from which perspective, the design of the power-off maintenance function is one of the keys to the success of product design. Therefore, during the design, it is necessary to fully consider the deviation of the capacitance of the energy storage capacitor and the changes in the high and low temperature application environments, ensure sufficient design margins, and conduct sufficient verification through system tests.
[0071] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.
Claims
1. A power board assembly, characterized in that, It includes an input EMI electromagnetic compatibility and power supply characteristic design module, a core power conversion module, and a power management module. The input EMI electromagnetic compatibility and power supply characteristic design module is used for filtering, protection, and surge suppression of the input power supply. The core power conversion module is used to convert the input voltage into multiple output voltages. The power management module is used to implement input / output voltage monitoring and power-off maintenance management. Among them, the input EMI electromagnetic compatibility and power supply characteristic design module includes an LC filtering unit, an input reverse polarity protection unit, an input spike voltage suppression unit, an input redundant OR-ing unit, an EMI filtering unit, a startup surge current suppression unit, an input overvoltage surge suppression unit, an input overcurrent protection unit, a power-off maintenance unit, and an input undervoltage surge suppression unit. The input redundant OR-ing unit includes an NMOS power switch and a controller arranged in parallel. The redundant switching of the dual-input power supply is performed through the parallel NMOS power switches. The reverse voltage between the drain and source of the NMOS power switch is detected by the controller, and when the detected reverse voltage exceeds 30 mV, the power supply path of the lower input voltage is turned off, and the higher input voltage supplies power alone. The input spike voltage suppression unit suppresses the input spike voltage signal with a maximum of 600V / 10μs through a transient voltage suppression TVS tube. The clamping voltage of the transient voltage suppression TVS tube is 85V, and the instantaneous peak power consumption is 1500W.
2. The power board assembly according to claim 1, wherein: The EMI filtering unit achieves a maximum differential mode noise suppression of ≥65 dB and a maximum common mode noise suppression of ≥40 dB in the frequency range of 250 kHz to 500 kHz through a two-stage common mode filtering and two-stage differential mode filtering structure, and avoids the oscillation impact on the input bus voltage under different working conditions through a damping and stabilizing network composed of RD and CD.
3. The power supply board assembly according to claim 1, wherein: The startup surge current suppression unit controls the establishment time of the gate-source voltage VGS of the NMOS power switch to suppress the surge current at startup. The establishment time constant of the gate-source voltage VGS is several hundred μs to several tens of ms, and the surge current does not exceed the safe operating area of the power switch SOA.
4. A power board assembly according to claim 1, characterized in that: The power-off maintenance unit includes an energy storage capacitor, a Boost circuit, and a power-off maintenance control module. The energy storage capacitor is used to maintain the energy supply of the backend power conversion module after the input power is cut off. The Boost circuit is used to charge the energy storage capacitor to a steady-state energy storage voltage of 40V to 50V. The power-off maintenance control module is used to manage the charging and discharging process of the energy storage capacitor, and the maximum output power is 300W.
5. A power board assembly according to claim 4, characterized in that: The energy management of the power-off maintenance unit is managed through the following formula: Among them, U1 is the capacitor steady-state charging voltage (40V), U2 is the lowest operating voltage of the backend power conversion module (10V), the power-off maintenance time t = 50 ms, and the capacity of the energy storage capacitor is not less than 6800 μF.
6. A power board assembly as claimed in claim 1, wherein: The core power conversion module includes: 1 / 32 brick and 1 / 16 brick DC / DC power converters, with an input voltage range of 9V to 36V and an output voltage of 5V; an output LC ripple attenuation unit for reducing the output voltage ripple.
7. A power board assembly according to claim 1, characterized in that: The power management module includes a non-isolated point-of-load power module, an input / output voltage monitoring unit, and a power-off maintenance management unit. The non-isolated point-of-load power module is used for low-dropout DC / DC conversion from 5V to 3.3V / 2.5V / 1.8V; the input / output voltage monitoring unit is used for real-time monitoring of the power supply status; the power-off maintenance management unit is used for maintaining the power supply of the backend digital controller circuit after the input power is cut off.
Citation Information
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