Analog quantity output circuit

Abstract

The invention provides an analog quantity output circuit. The analog quantity output circuit comprises an analog output main circuit which comprises a first operational amplifier circuit, a second operational amplifier circuit and a first triode circuit; the input end of the first voltage following circuit is connected with the emitting electrode of the first triode circuit; the inverted input end of the third operational amplifier circuit is connected with the output end of the first voltage follower circuit; the positive electrode output end of the voltage conversion circuit is connected with the in-phase input end of the third operational amplifier circuit; the input end of the second voltage following circuit is connected with the output end of the third operational amplifier circuit, and the output end of the second voltage following circuit is connected with the negative electrode output end of the voltage conversion circuit. According to the analog quantity output circuit, the problem of serious heating of the triode in the analog quantity output circuit can be reduced.

Description

Technical Field

[0001] The present disclosure relates to the technical field of electronic circuits, and particularly to an analog output circuit. Background Art

[0002] Currently, the AO (Analog Output) circuits applied in industry are generally divided into two types: current output type AO circuits and voltage output type AO circuits. Among them, the current output type AO circuits are more commonly used. When implementing a current output type AO circuit, a subtractor can be directly implemented using discrete devices such as dual operational amplifiers, and the conversion from voltage to current can be achieved through the subtractor. Or an integrated device such as a DAC (Digital-to-Analog Converter) with dynamic power control can be used to achieve the conversion from voltage to current. However, the cost of the latter is relatively high, and the design of the peripheral BUCK buck circuit or BUCK-BOOST buck-boost circuit is complex, and circuit oscillation problems are likely to occur.

[0003] When using discrete devices such as dual operational amplifiers to implement a 4 mA to 20 mA AO circuit, with the input voltage determined, serious heating of the triode will occur when the load impedance is small.

[0004] In view of the above problems, how to reduce the heating of the triode under the condition of a determined input voltage is a problem that those skilled in the art strive to solve. Summary of the Invention

[0005] In view of this, embodiments of the present disclosure provide an analog output circuit to solve the technical problem of serious heating of the triode in the analog output circuit in the prior art.

[0006] To achieve the above object, the technical solution adopted by the present disclosure is:

[0007] The analog output circuit provided by the embodiments of the present disclosure is connected between an analog input end and an analog output end. The analog output circuit includes: an analog output main circuit, including a first operational amplifier circuit, a second operational amplifier circuit, and a first triode circuit. The non-inverting input end of the first operational amplifier circuit is connected to the analog input end, the output end of the first operational amplifier circuit is connected to the base of the first triode circuit, the output end of the second operational amplifier circuit is connected to the non-inverting input end of the first operational amplifier circuit and its own inverting input end to form a feedback circuit. The non-inverting input end of the second operational amplifier circuit is connected to the analog output end and is connected to the emitter of the first triode circuit through a reference resistor; a first voltage follower circuit, the input end of the first voltage follower circuit is connected to the emitter of the first triode circuit; a third operational amplifier circuit, the inverting input end of the third operational amplifier circuit is connected to the output end of the first voltage follower circuit; a voltage conversion circuit, the positive output end of the voltage conversion circuit is connected to the non-inverting input end of the third operational amplifier circuit; a second voltage follower circuit, the input end of the second voltage follower circuit is connected to the output end of the third operational amplifier circuit, and the output end of the second voltage follower circuit is connected to the negative output end of the voltage conversion circuit.

[0008] In some embodiments, the third operational amplifier circuit includes a differential amplifier circuit or a subtractor.

[0009] In some embodiments, the voltage conversion circuit includes a DC-DC converter chip, and the analog output circuit further includes a redundant switch circuit, and the redundant switch circuit is connected between the enable end of the DC-DC converter chip and the ground end.

[0010] In some embodiments, the redundant switch circuit includes a second triode circuit connected to a switch signal input end, an output resistor connected to the collector of the second triode circuit, a first output capacitor connected between the enable end of the DC-DC converter chip and the ground end, and a first resistor voltage dividing circuit connected between an external power supply and the ground end. The emitter of the second triode circuit is connected to the ground end. The first resistor voltage dividing circuit includes a first voltage dividing resistor and a second voltage dividing resistor, and the connection point of the first voltage dividing resistor and the second voltage dividing resistor is connected to the collector of the second triode circuit.

[0011] In some embodiments, a second output capacitor is provided between the negative output end of the voltage conversion circuit and the ground end.

[0012] In some embodiments, the inverting input end of the third operational amplifier circuit is connected to the output end of the first voltage follower circuit through a second resistor voltage dividing circuit. Among them, the second resistor voltage dividing circuit is connected between the output end of the first voltage follower circuit and the ground end, and includes a third voltage dividing resistor and a fourth voltage dividing resistor. The connection point of the third voltage dividing resistor and the second voltage dividing resistor is connected to the inverting input end of the third operational amplifier circuit.

[0013] In some embodiments, the input end of the second voltage follower circuit is connected to the output end of the third operational amplifier circuit through a third resistor voltage dividing circuit, wherein the third resistor voltage dividing circuit is connected between the output end of the third operational amplifier circuit and the ground end, and includes a fifth voltage dividing resistor and a sixth voltage dividing resistor. The connection point of the fifth voltage dividing resistor and the sixth voltage dividing resistor is connected to the input end of the second voltage follower circuit.

[0014] In some embodiments, a fourth resistor voltage dividing circuit is connected between the positive output end of the voltage conversion circuit and the ground end. The fourth resistor voltage dividing circuit includes a seventh voltage dividing resistor and an eighth voltage dividing resistor. The connection point of the seventh voltage dividing resistor and the eighth voltage dividing resistor is connected to the non-inverting input end of the third operational amplifier circuit.

[0015] In some embodiments, the non-inverting input end of the third operational amplifier circuit is connected to the connection point of the seventh voltage dividing resistor and the eighth voltage dividing resistor through a fifth resistor voltage dividing circuit. The fifth resistor voltage dividing circuit includes a ninth voltage dividing resistor and a tenth voltage dividing resistor. The connection point of the ninth voltage dividing resistor and the tenth voltage dividing resistor is connected to the non-inverting input end of the third operational amplifier circuit.

[0016] In some embodiments, the output end of the first voltage follower circuit is connected to the output end of the third operational amplifier circuit through a sixth resistor voltage dividing circuit. The sixth resistor voltage dividing circuit includes an eleventh voltage dividing resistor and a twelfth voltage dividing resistor. The connection point of the eleventh voltage dividing resistor and the twelfth voltage dividing resistor is connected to the inverting input end of the third operational amplifier circuit.

[0017] The beneficial effects of the embodiments of the present disclosure compared with the prior art are as follows: The analog quantity output circuit in the embodiments of the present disclosure forms an output analog quantity through an analog output main circuit, performs impedance matching through a first voltage follower circuit, and realizes a stable DC voltage output through a voltage conversion circuit and a second voltage follower circuit, so that the third operational amplifier circuit can perform deviation control of the output analog quantity according to the stable DC voltage, thereby ensuring that the voltage difference across the first triode circuit is controllable, and further reducing the heat generation of the first triode circuit under the condition that the input voltage is determined. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present disclosure. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0019] Figure 1 is a circuit diagram of an analog quantity output circuit in the prior art;

[0020] Figure 2 is a circuit diagram of another analog quantity output circuit in the prior art;

[0021] Figure 3 It is a schematic structural diagram of the analog quantity output circuit provided by an embodiment of the present disclosure;

[0022] Figure 4 It is a circuit diagram of the analog quantity output circuit provided by an embodiment of the present disclosure. Specific Embodiments

[0023] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present disclosure clearer, the present disclosure will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present disclosure and are not used to limit the present disclosure.

[0024] In the related art, when implementing analog quantity output, a subtractor can be directly implemented using a dual operational amplifier, and the conversion from voltage to current is achieved by applying the virtual short and virtual open of the operational amplifier in the subtractor.

[0025] The circuit for implementing the subtractor using a dual operational amplifier is as Figure 1 shown in the following equation can be derived from the circuit:

[0026]

[0027] V A =V B ,

[0028] V E =V D ,

[0029]

[0030] If R4, R3, R2, and R1 are equal and all precision resistors, then: V C =V D +V DAC V CD =V DAC , wherein, V DAC is the Vdac in Figure 1 .

[0031] As Figure 1 shown, the circuit design is simple, and a high-precision constant current source can be obtained relatively easily, and different constant current sources can be obtained according to different settings of the DAC. As Figure 1In the design process of the shown circuit, the triode Q1 is selected. The main function of this triode is to balance the circuit. When the external resistance is large, the voltage across the triode changes. In the extreme case, when the external resistance is 1Ω, even when the maximum current is output, the current actually consumed on the resistor is only 25mV / 1Ω. At this time, the voltage actually consumed on the triode is Vcc - 25mV, that is, 23.975V. The triode almost bears all the voltage drops of the circuit. The impedance of the triode is a definite value, which causes all the power of the circuit to be consumed on the triode, resulting in a sharp rise in the module temperature.

[0032] In addition, a DAC chip with DPC (Dynamic Power Management) function can be used to achieve the analog output. Currently, the chips with this function include AD5755 - 1, AD5753, DAC8775, etc. Among them, AD5755 - 1 has a BUCK circuit including the positive power supply. First, it raises the power supply to 35V inside, and then directly adjusts it to the required Vout plus 4V through the BUCK circuit. DAC8775 includes a BUCK - BOOST circuit. The BUCK - BOOST circuit adjusts the output of the final power supply according to the actual output to ensure that the actual output Vout is slightly greater than the required load voltage.

[0033] Due to the extremely high efficiency of the DPC circuit, the final power supply voltage is only about 2V to 4V higher than Vout, which can ensure that the effective power of the circuit is only consumed on the actual load, and the system power consumption is low. However, the cost of the DPC circuit is extremely high, the design of the peripheral BUCK circuit or BUCK - BOOST circuit is complex, and the DPC circuit has strict requirements for the selection and parameters of the inductor. If the design is slightly careless, the circuit will oscillate.

[0034] As Figure 2 shown, another scheme to achieve analog output realizes the purpose of controlling the feedback voltage across both ends of the power supply VCC by the parallel connection of the triode Q2 and the resistor R20. The core design of this scheme is to sample V D , adjust the impedance through a follower, and finally divide the voltage by R11 and R12 to control the impedance of the triode. By adjusting the impedance of the triode Q2, the feedback voltage of the DCDC (DC - to - DC converter) circuit can be further changed, and finally the purpose of dynamically adjusting the output load voltage is achieved. The cost of this analog output scheme is greatly reduced compared with the DPC circuit scheme, and the design is simple.

[0035] As Figure 2The analog output scheme shown adjusts the resistance of a triode through an external voltage, thereby enabling the triode to operate in the variable resistance region. Although the triode can operate in the variable resistance region, the range and linearity of the variable resistance region are very poor, resulting in a very narrow linear region for this circuit. In addition, the characteristics of the triode vary greatly with temperature, so this circuit does not have the characteristics for mass promotion.

[0036] To solve the technical problems of high power consumption of the triode and rapid rise in the temperature of the triode in the analog output circuit, an embodiment of the present disclosure provides an analog output circuit.

[0037] The analog output circuit according to the embodiment of the present disclosure will be described in detail below with reference to the drawings.

[0038] Figure 1 is a circuit diagram of an analog output circuit in the prior art; Figure 2 is a circuit diagram of another analog output circuit in the prior art; Figure 3 is a schematic structural diagram of the analog output circuit provided by the embodiment of the present disclosure; Figure 4 is the circuit diagram of the analog output circuit provided by the embodiment of the present disclosure. The following combines Figure 1 、 Figure 2 、 Figure 3 and Figure 4 to describe the analog output circuit provided by the embodiment of the present disclosure together.

[0039] As shown in Figure 3 and Figure 4 , the analog output circuit provided by the embodiment of the present disclosure is connected between the analog input end and the analog output end. The analog output circuit includes: an analog output main circuit 100, including a first operational amplifier circuit 101, a second operational amplifier circuit 102, and a first triode circuit 103. The non-inverting input terminal of the first operational amplifier circuit 101 is connected to the analog input end, the output terminal of the first operational amplifier circuit 101 is connected to the base of the first triode circuit 103, the output terminal of the second operational amplifier circuit 102 is connected to the non-inverting input terminal of the first operational amplifier circuit 101 and its own inverting input terminal to form a feedback circuit. The non-inverting input terminal of the second operational amplifier circuit 102 is connected to the analog output end and is connected to the emitter of the first triode circuit 103 through a reference resistor; a first voltage follower circuit 200, the input terminal of the first voltage follower circuit 200 is connected to the emitter of the first triode circuit; a third operational amplifier circuit 300, the inverting input terminal of the third operational amplifier circuit 300 is connected to the output terminal of the first voltage follower circuit 200; a voltage conversion circuit 400, the positive output terminal of the voltage conversion circuit 400 is connected to the non-inverting input terminal of the third operational amplifier circuit 300; a second voltage follower circuit 500, the input terminal of the second voltage follower circuit 500 is connected to the output terminal of the third operational amplifier circuit 300, and the output terminal of the second voltage follower circuit 500 is connected to the negative output terminal of the voltage conversion circuit 400.

[0040] Among them, the input voltage of the analog input terminal can be output by a digital-to-analog converter. The digital control signal generated by the MCU (Micro Controller Unit) is converted by the digital-to-analog converter and then input into the analog output main circuit.

[0041] As Figure 4 shown, in the analog output main circuit 100, the inverting input terminal of the operational amplifier U1 of the first operational amplifier circuit is connected to the second terminal of the resistor R3 and the first terminal of the resistor R4. The first terminal of the resistor R3 is grounded, and the second terminal of the resistor R4 is connected to the emitter of the triode Q1 of the first triode circuit. The non-inverting input terminal of the operational amplifier U1 is connected to the analog output terminal through the resistor R1, and the input voltage Vdac. The output terminal of the operational amplifier U1 is connected to the base of the triode Q1 through the resistor R5, and the collector of the triode Q1 is connected to the power supply VCC. The output terminal of the operational amplifier U2 of the first operational amplifier circuit is connected to the non-inverting input terminal of the operational amplifier U1 through the resistor R2.

[0042] The output terminal of the operational amplifier U2 is connected to the non-inverting input terminal of the operational amplifier U1 through the resistor R2. The non-inverting input terminal of the operational amplifier U2 is connected to the output terminal of the operational amplifier U2 through the resistor R6. The output terminal of the operational amplifier U1 is connected to the base of the triode Q1 through the resistor R5. The emitter of the triode Q1 is connected to the first terminal of the reference resistor Ref. The second terminal of the reference resistor Ref is connected to the load and the second terminal of the resistor R7. The first terminal of the resistor R7 is connected to the inverting input terminal of the operational amplifier U2. Among them, a diode D1 is connected between the load and the reference resistor Ref. The second terminal of the reference resistor Ref is the analog output terminal of the analog output circuit. A parallel-connected resistor R9 and capacitor C1 are also connected between the second terminal of the reference resistor Ref and the ground terminal. The value range of the resistance of the load can be from 1Ω to 1KΩ.

[0043] The voltage conversion circuit can be a DCDC circuit using a DCDC chip. The non-inverting input terminal of the operational amplifier U4 of the third operational amplifier circuit is connected to the positive output terminal of the DCDC chip, so that the voltage at the non-inverting input terminal of the third operational amplifier circuit can be fed back to the DCDC circuit to enable the DCDC circuit to adjust the output voltage. The input terminal of the DCDC circuit is connected to the power supply VCC_IN.

[0044] The input terminal of the operational amplifier U3 of the first voltage follower circuit is connected to the emitter of the triode Q1 through the resistor R10. Among them, the first terminal of the resistor R10 is connected to the input terminal of the operational amplifier U3, and the second terminal of the resistor R10 is connected to the non-inverting input terminal of the operational amplifier U3.

[0045] The input terminal of the operational amplifier U5 of the second voltage follower circuit is connected to the output terminal of the operational amplifier U4, and the output terminal of the operational amplifier U5 is connected to the negative output terminal of the DCDC circuit. Among them, the first end of the resistor R26 is connected to the negative output terminal of the DCDC circuit, and the second end of the resistor R26 is connected to the output terminal of the operational amplifier U5.

[0046] The inverting input terminal of the operational amplifier U4 is connected to the output terminal of the operational amplifier U3 through the eleventh resistor R13. The inverting input terminal of the operational amplifier U4 is connected to the first end of the twelfth resistor R16, and the second end of the twelfth resistor R16 is connected to the output terminal of the operational amplifier U4.

[0047] The technical solution of the embodiment of the present disclosure proposes a dynamic AO output solution with low cost, high reliability, and high linearity. Specifically, the technical solution of the embodiment of the present disclosure uses operational amplifiers and triodes to implement circuit functions, does not involve high-cost precision devices, and has a low cost; the operational amplifiers, resistors, and triodes in the technical solution of the embodiment of the present disclosure can all be replaced, and the selection is simple and there are no special requirements. The function of the technical solution of the embodiment of the present disclosure can replace integrated chips. In the case of high cost requirements, high stability requirements, and tight layout area, this solution has great advantages.

[0048] In the embodiment of the present disclosure, the voltage across the first triode circuit can be changed according to the target value, so as to ensure that the voltage difference across the first triode circuit is controllable. Specifically, the technical solution of the embodiment of the present disclosure performs impedance matching through the first voltage follower circuit; realizes the deviation between the target and the actual through the third operational amplifier circuit, and performs secondary follow-up attenuation feedback through the second voltage follower circuit, which can ensure the DCDC output closed loop. Among them, the first voltage follower circuit can reduce the influence of the resistance value of the post-stage sampling resistor on the voltage-to-current circuit.

[0049] As Figure 4 shown, the inverting input terminal of the operational amplifier U4 of the third operational amplifier circuit is connected to the output terminal of the operational amplifier U3 of the first voltage follower circuit through the second resistor voltage division circuit. Among them, the second resistor voltage division circuit is connected between the output terminal of the operational amplifier U3 and the ground terminal, and includes a third voltage division resistor R11 and a fourth voltage division resistor R12. The connection point of the third voltage division resistor R11 and the fourth voltage division resistor R12 is connected to the inverting input terminal of the operational amplifier U4.

[0050] The input terminal of the operational amplifier U5 of the second voltage follower circuit is connected to the output terminal of the operational amplifier U4 of the third operational amplifier circuit through a third resistor voltage dividing circuit. Among them, the third resistor voltage dividing circuit is connected between the output terminal of the operational amplifier U4 of the third operational amplifier circuit and the ground terminal, and includes a fifth voltage dividing resistor R17 and a sixth voltage dividing resistor R18. The connection point of the fifth voltage dividing resistor R17 and the sixth voltage dividing resistor R18 is connected to the input terminal of the operational amplifier U5 of the second voltage follower circuit.

[0051] A fourth resistor voltage dividing circuit is connected between the positive output terminal of the voltage conversion circuit and the ground terminal. The fourth resistor voltage dividing circuit includes a seventh voltage dividing resistor R19 and an eighth voltage dividing resistor R20. The connection point of the seventh voltage dividing resistor R19 and the eighth voltage dividing resistor R20 is connected to the non-inverting input terminal of the operational amplifier U4 of the third operational amplifier circuit. A diode D2 in parallel is also connected between the positive output terminal of the voltage conversion circuit and the ground terminal. A capacitor C4 and a capacitor C5 are connected between the power supply VCC and the ground terminal. An inductor L1 is also connected between the positive output terminal of the voltage conversion circuit and the seventh voltage dividing resistor R19.

[0052] The non-inverting input terminal of the operational amplifier U4 of the third operational amplifier circuit is connected to the connection point of the seventh voltage dividing resistor R19 and the eighth voltage dividing resistor R20 through a fifth resistor voltage dividing circuit. The fifth resistor voltage dividing circuit includes a ninth voltage dividing resistor R14 and a tenth voltage dividing resistor R15. The ninth voltage dividing resistor R14 and the tenth voltage dividing resistor R15 are connected to the non-inverting input terminal of the operational amplifier U4 of the third operational amplifier circuit.

[0053] The output terminal of the operational amplifier U3 of the first voltage follower circuit is connected to the output terminal of the operational amplifier U4 of the third operational amplifier circuit through a sixth resistor voltage dividing circuit. The sixth resistor voltage dividing circuit includes an eleventh voltage dividing resistor R13 and a twelfth voltage dividing resistor R16. The connection point of the eleventh voltage dividing resistor R13 and the twelfth voltage dividing resistor R16 is connected to the inverting input terminal of the operational amplifier U4 of the third operational amplifier circuit.

[0054] As Figure 4 shown, when the analog output circuit is normally started, the voltage difference across the triode Q1 is: V Q = V CC_IN - V CC .

[0055] The equations in the design derivation process of the subtractor are as follows:

[0056] V C = V D + V DAC , V F = V C , V I = V N ,

[0057] V J = V N 。

[0058] Let Then there is the following:

[0059] K1 × K4 × V H = K2 × V K + K3 × V G ,

[0060] K1 × K4 × V H - K3 × V G = K2 × V K ,

[0061] V M = V L ,

[0062]

[0063] Let Then there is the following:

[0064] V L = K5 × V K ,

[0065]

[0066] Also: V F = V C ,

[0067]

[0068] Let Then there is:

[0069] In the above formula, K1, K2, K3, K4, K5, and K6 are all resistor networks. Let R13, R14, R15, and R16 be equal, R20 = ∞, R18 = ∞, R12 = ∞; then there is: V L = K5 × (V H - V C ).

[0070] When V M That is, when V L is constant, only K5 needs to be modified, that is, R17 and R18 are modified, so as to control the voltage across the triode Q1, and the power consumption can be controlled by controlling the output differential pressure. For example, if it is necessary to control the triode voltage to be 4V, under the condition that the different voltages output by the DCDC are from 0.6V to 1V in V L the power consumption control can be achieved by modifying R17 and R18.

[0071] The power consumption control arithmetic formula V used in the embodiments of the present disclosure L = K5×(V H - V C ) has extremely high linearity. Its linearity depends on the proportional resistor and is not affected by factors such as ambient temperature, thus enabling the analog output circuit to have high stability.

[0072] In the embodiments of the present disclosure, a second output capacitor C6 is connected between the negative output terminal of the voltage conversion circuit and the ground terminal. The technical solution of the embodiments of the present disclosure can achieve different attenuation ratios and control effects according to different combinations of the resistor networks K1, K2, K3, K4, K5, and K6 and the second output capacitor C6, so it has a wide range of applications.

[0073] The third operational amplifier circuit in the embodiments of the present disclosure can be a subtractor or a differential amplifier. As Figure 4 shown, the third operational amplifier circuit in the analog output circuit is a subtractor. However, in actual applications, in order to meet the requirements of scenarios that pursue accuracy, the subtractor in the third operational amplifier circuit can be replaced with a differential amplifier. The subtractor uses inverting input and non-inverting input to generate an output signal, which is the difference between the inverting input signal and the non-inverting input signal, thus realizing the subtraction of one signal from another. The differential amplifier is a circuit that amplifies the difference between two input voltages and has the characteristics of suppressing common-mode signals and amplifying differential-mode signals. The differential amplifier is a direct-coupled amplifier with very small zero drift. It can not only effectively amplify AC signals but also effectively reduce the zero drift caused by power supply fluctuations and transistor temperature changes, thereby improving the accuracy of signal processing.

[0074] To prevent circuit failure, reliable redundant control logic is added in the technical solution of the embodiments of the present disclosure. In the embodiments of the present disclosure, the voltage conversion circuit includes a DC-DC converter chip, i.e., a DCDC chip, and the analog output circuit further includes a redundant switch circuit, which is connected between the enable terminal of the DC-DC converter chip and the ground terminal. The DCDC chip is a power conversion chip that can convert the input DC voltage into another DC voltage output. The DCDC chip realizes voltage conversion and stabilization through high-frequency switching operations and energy storage components such as inductors and capacitors.

[0075] As Figure 4The redundant switch circuit shown by the dashed box in includes a triode and resistors and capacitors, which can cut off the power supply of the standby machine during redundancy and prevent the operational amplifiers U1, U2, U3, U4, and U5 from having offset voltages. If the offset voltages of the operational amplifiers U1, U2, U3, U4, and U5 are positive, even if Vdac is measured to be 0, current will actually be output, thus affecting the actual output of the other path during redundancy. The above redundant switch circuit implements a simple redundant switch, and through this redundant switch, the EN (enable) signal of the DCDC can be controlled.

[0076] Specifically, as Figure 4 shown, the redundant switch circuit includes a second triode circuit connected to the switch signal input terminal to introduce the switch signal SW, an output resistor R25 connected to the collector of the triode Q2 of the second triode circuit, a first output capacitor C3 connected between the enable terminal receiving the EN signal of the DC-DC converter chip and the ground terminal, and a first resistor voltage division circuit connected between the external power supply VCC and the ground terminal. The emitter of the triode Q2 is connected to the ground terminal. The first resistor voltage division circuit includes a first voltage division resistor R23 and a second voltage division resistor R24, and the connection point of the first voltage division resistor R23 and the second voltage division resistor R24 is connected to the collector of the triode Q2.

[0077] The second voltage division resistor R24, the output resistor R25, and the first output capacitor C3 in the redundant switch circuit form a clamping circuit and a discharging circuit. The clamping circuit can shift the level of the input signal up or down as a whole, thereby realizing the adjustment of the signal level. By controlling the charging and discharging of the first output capacitor C3, the waveform amplitude of the output signal can be limited, protecting the circuit from overvoltage damage and ensuring the stability of the output voltage. The discharging circuit can safely release the charge or energy accumulated in the circuit. When the circuit is working normally, the discharging resistor of the discharging circuit basically does not work, but after the circuit is powered off, the discharging resistor will quickly discharge the residual charge in the first output capacitor C3 to ensure the safe, stable, and reliable operation of the circuit.

[0078] When selecting components for the redundant switch circuit, it is necessary to ensure that the DCDC chip can start reliably, and it is also necessary to ensure timely discharging after EN is turned off to prevent the secondary power-on enable circuit from failing.

[0079] As Figure 4 shown, the redundant switch circuit can increase the reliability of the module redundant design in the analog output circuit and can completely turn off the output of the standby machine to ensure that the redundant standby machine does not affect the host channel.

[0080] According to the analog output circuit provided by the embodiments of the present disclosure, an output analog quantity is formed through the analog output main circuit, impedance matching is performed through the first voltage follower circuit, and stable DC voltage output is achieved through the voltage conversion circuit and the second voltage follower circuit, so that the third operational amplifier circuit can perform deviation control of the output analog quantity according to the stable DC voltage, thereby ensuring that the voltage difference across the first triode circuit is controllable, and further reducing the heat generation of the first triode circuit under the condition of a determined input voltage.

[0081] The above are only the preferred embodiments of the present disclosure, and are not intended to limit the present disclosure. Any modifications, equivalent replacements, and improvements made within the spirit and principles of the present disclosure shall be included within the protection scope of the present disclosure.

Claims

1. An analog output circuit is connected between an analog input end and an analog output end, and is characterized in that, The analog output circuit includes: The analog output main circuit, including a first operational amplifier circuit, a second operational amplifier circuit, and a first triode circuit. The non-inverting input terminal of the first operational amplifier circuit is connected to the analog input terminal, the output terminal of the first operational amplifier circuit is connected to the base of the first triode circuit, the output terminal of the second operational amplifier circuit is connected to the non-inverting input terminal of the first operational amplifier circuit and its own inverting input terminal to form a feedback circuit. The non-inverting input terminal of the second operational amplifier circuit is connected to the analog output terminal and is connected to the emitter of the first triode circuit through a reference resistor; The first voltage follower circuit, whose input terminal is connected to the emitter of the first triode circuit; The third operational amplifier circuit, whose inverting input terminal is connected to the output terminal of the first voltage follower circuit; The voltage conversion circuit, whose positive output terminal is connected to the non-inverting input terminal of the third operational amplifier circuit; The second voltage follower circuit, whose input terminal is connected to the output terminal of the third operational amplifier circuit, and whose output terminal is connected to the negative output terminal of the voltage conversion circuit.

2. The analog output circuit according to claim 1, wherein The third operational amplifier circuit includes a differential amplifier circuit or a subtractor.

3. The analog output circuit according to claim 1, wherein The voltage conversion circuit includes a DC-DC converter chip. The analog output circuit further includes a redundant switch circuit, which is connected between the enable terminal of the DC-DC converter chip and the ground terminal.

4. The analog output circuit according to claim 3, wherein The redundant switch circuit includes a second triode circuit connected to the switch signal input terminal, an output resistor connected to the collector of the second triode circuit, a first output capacitor connected between the enable terminal of the DC-DC converter chip and the ground terminal, and a first resistor voltage division circuit connected between the external power supply and the ground terminal. The emitter of the second triode circuit is connected to the ground terminal. The first resistor voltage division circuit includes a first voltage division resistor and a second voltage division resistor, and the connection point of the first voltage division resistor and the second voltage division resistor is connected to the collector of the second triode circuit.

5. The analog output circuit according to claim 1, wherein A second output capacitor between the negative output terminal of the voltage conversion circuit and the ground terminal.

6. The analog output circuit according to claim 1, characterized in that, The inverting input terminal of the third operational amplifier circuit is connected to the output terminal of the first voltage follower circuit through a second resistor voltage division circuit. Among them, the second resistor voltage division circuit is connected between the output terminal of the first voltage follower circuit and the ground terminal, and includes a third voltage division resistor and a fourth voltage division resistor. The connection point of the third voltage division resistor and the second voltage division resistor is connected to the inverting input terminal of the third operational amplifier circuit.

7. The analog output circuit according to claim 1, wherein The input terminal of the second voltage follower circuit is connected to the output terminal of the third operational amplifier circuit through a third resistor voltage division circuit. Among them, the third resistor voltage division circuit is connected between the output terminal of the third operational amplifier circuit and the ground terminal, and includes a fifth voltage division resistor and a sixth voltage division resistor. The connection point of the fifth voltage division resistor and the sixth voltage division resistor is connected to the input terminal of the second voltage follower circuit.

8. The analog output circuit according to claim 1, wherein A fourth resistor voltage division circuit is connected between the positive output terminal and the ground terminal of the voltage conversion circuit. The fourth resistor voltage division circuit includes a seventh voltage division resistor and an eighth voltage division resistor, and the connection point of the seventh voltage division resistor and the eighth voltage division resistor is connected to the non-inverting input terminal of the third operational amplifier circuit.

9. The analog output circuit according to claim 1, characterized in that, The non-inverting input terminal of the third operational amplifier circuit is connected to the connection point of the seventh voltage division resistor and the eighth voltage division resistor through a fifth resistor voltage division circuit. The fifth resistor voltage division circuit includes a ninth voltage division resistor and a tenth voltage division resistor, and the connection point of the ninth voltage division resistor and the tenth voltage division resistor is connected to the non-inverting input terminal of the third operational amplifier circuit.

10. The analog output circuit according to claim 1, characterized in that, The output terminal of the first voltage follower circuit is connected to the output terminal of the third operational amplifier circuit through a sixth resistor voltage division circuit. The sixth resistor voltage division circuit includes an eleventh voltage division resistor and a twelfth voltage division resistor, and the connection point of the eleventh voltage division resistor and the twelfth voltage division resistor is connected to the inverting input terminal of the third operational amplifier circuit.

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