Multi-channel CameraLink signal optical fiber transmission method and system

Abstract

The invention discloses a multi-path CameraLink signal optical fiber transmission method and system. The method comprises the following steps: a data decoding module receives an original data stream through four differential data channels; the data decoding module switches a working mode and inserts a mark byte in the original data stream according to the auxiliary signal to obtain a target data stream; the data caching module dynamically adjusts the caching capacity so as to smooth the data flow of the decoded data; the data encapsulation module encapsulates the cached data into a target data packet according to a preset data encapsulation protocol; and the optical fiber transmission module outputs a target data packet through a single-path optical fiber. According to the scheme, long-distance transmission is realized by efficiently multiplexing multiple paths of signals and by means of optical fibers, and the length limitation of traditional cable transmission is broken through; the system adopts a modular architecture design, supports flexible configuration to adapt to different CameraLink standards and variable channel number requirements, and improves the universality and reliability of the system through software and hardware collaborative optimization.

Description

Technical Field

[0001] The present invention relates to the field of communication technologies, and particularly to a method and system for fiber-optic transmission of multi-channel CameraLink signals. Background Art

[0002] CameraLink is a high-speed serial video interface standard designed specifically for industrial cameras and image acquisition systems. It transmits image data and auxiliary signals through LVDS (Low-Voltage Differential Signaling), featuring high bandwidth, low latency, and strong anti-interference capabilities, and is widely used in fields such as machine vision, medical imaging, and aerospace remote sensing.

[0003] The existing CameraLink signal transmission has the following defects:

[0004] (1) Limited transmission distance: The transmission distance of CameraLink cables is short, usually not exceeding 10 meters, which cannot meet the requirements of long-distance data transmission, such as remote monitoring or cross-regional medical imaging.

[0005] (2) Complex multi-channel signal transmission: Existing fiber-optic extension solutions require independent fibers for each channel or use complex time-division multiplexing techniques, resulting in complex system design, high hardware costs, and poor scalability.

[0006] (3) Insufficient data integrity and real-time performance: In multi-channel high-data-rate transmission, existing technologies are difficult to ensure the integrity of data packets and the synchronization between channels, and packet loss or delay is likely to occur.

[0007] (4) Poor system flexibility: Existing systems are mostly designed for specific CameraLink configurations (such as Base or Full), and it is difficult to adapt to different modes or expand to more channels, restricting the scope of applications.

[0008] (5) Insufficient network transmission bandwidth: Traditional Ethernet (such as Gigabit Ethernet, 1Gbps) has limited bandwidth and cannot support the real-time transmission of multi-channel high-definition images, resulting in data congestion or frame loss. Summary of the Invention

[0009] The present invention aims to at least solve the technical problems existing in the prior art. To this end, in the first aspect of the present invention, a method for fiber-optic transmission of multi-channel CameraLink signals is proposed, which is applied to a CameraLink image fiber-optic transmission system. The system includes: a data decoding module, a data caching module, a data encapsulation module, and a fiber-optic transmission module. The method includes:

[0010] The data decoding module receives the original data stream of the CameraLink signal through four LVDS differential data channels. The CameraLink signal includes auxiliary signals and image data output by the CameraLink interface of the image sensor.

[0011] The data decoding module dynamically switches the working mode according to the original data stream and the auxiliary signals, and inserts marker bytes into the original data stream according to the auxiliary signals to obtain a target data stream.

[0012] The data caching module receives the target data stream, caches the target data stream, and dynamically adjusts the cache capacity to smooth the data stream of the decoded data.

[0013] The data encapsulation module receives the cached data of the data caching module and encapsulates the cached data into target data packets according to a preset data encapsulation protocol.

[0014] The optical fiber transmission module outputs the target data packets through a single optical fiber.

[0015] Optionally, the data decoding module includes a mode state machine and a synchronization state machine. The auxiliary signals include a synchronization signal and a mode configuration signal. The synchronization signal includes a frame valid signal and a line valid signal. The data decoding module dynamically switches the working mode according to the original data stream and the mode configuration signal, and inserts marker bytes into the original data stream according to the auxiliary signals to obtain a target data stream, including:

[0016] The mode state machine determines the current frame state according to the original data stream, and dynamically switches the working mode according to the current frame state and the mode configuration signal.

[0017] The synchronization state machine continuously monitors the frame valid signal and the line valid signal, and starts the transmission of the original data stream to the data caching module at the rising edge of the frame valid signal.

[0018] During the transmission of the original data stream, the synchronization state machine inserts marker bytes into the original data stream according to the frame valid signal and the line valid signal to obtain a target data stream.

[0019] Optionally, the mode state machine determines the current frame state according to the original data stream, including:

[0020] The mode state machine determines the image resolution, frame rate, and effective data bit width according to the pixel clock, frame valid signal, line valid signal, and image data in the original data stream.

[0021] Determine the current frame status according to the effective data bit width, the frame rate, and the image resolution.

[0022] Optionally, the mode state machine dynamically switches the working mode according to the current frame status and the mode configuration signal, including:

[0023] The mode state machine detects the current frame status and the mode configuration signal during the vertical blanking period of signal transmission;

[0024] When it is detected that the current frame status is the Base mode and the mode configuration signal is the Medium mode, the mode state machine verifies whether the most significant bits of the four LVDS differential data channels are valid. If so, the mode state machine converts the working mode from the Base mode to the Medium mode;

[0025] When it is detected that the current frame status is the Medium mode and the mode configuration signal is the Full mode, the mode state machine verifies whether the data ready signals of all data channels are valid. If so, the mode state machine converts the working mode from the Medium mode to the Full mode.

[0026] Optionally, the synchronization state machine inserts marker bytes into the original data stream according to the frame valid signal and the line valid signal to obtain a target data stream, including:

[0027] The synchronization state machine marks the start of a frame at the current position of the original data stream at the rising edge of the frame valid signal; marks the start of a line at the current position at the rising edge of the line valid signal; marks the end of a line at the current position at the falling edge of the line valid signal; and marks the end of a frame at the current position at the falling edge of the frame valid signal, to obtain a target data stream including the start-of-frame marker, the start-of-line marker, the end-of-line marker, and the end-of-frame marker.

[0028] Optionally, the data decoding module decodes the original data stream according to the auxiliary signal, and further includes:

[0029] During the frame active period, detect whether there are mode conflicts and synchronization signal anomalies; the mode conflict means that the current working mode does not match the data format of the actually detected input port or the data format suddenly changes, and the synchronization signal anomaly means that the synchronization signal is interrupted or the period is abnormal;

[0030] If there is the mode conflict or the synchronization signal anomaly, then pause marking the original data stream and pause the transmission of the original data stream to the data cache module;

[0031] Reset the synchronization state machine, re-monitor the edges of the frame valid signal and the line valid signal to identify the current signal period and data format, and determine the actual frame state according to the data format;

[0032] Adjust the data bandwidth of the original data stream according to the actual frame state, and dynamically adjust the generation rhythm of the frame valid signal and the line valid signal;

[0033] After determining that the data formats of two consecutive frames match the current frame state, re-label the original data stream and restart the transmission of the original data stream to the data cache module.

[0034] Optionally, the data decoding module further includes a mode selector. Before the mode state machine determines the current frame state according to the original data stream, it further includes:

[0035] The mode selector performs two-stage register synchronization on the mode configuration signal to convert the clock domain of the original data stream into the clock domain of the output end of the data decoding module.

[0036] A second aspect of the present invention proposes a multi-channel CameraLink signal optical fiber transmission system, which includes: a data decoding module, a data cache module, a data encapsulation module, and an optical fiber transmission module;

[0037] Wherein,

[0038] The data decoding module is used to: receive the original data stream of the CameraLink signal through four LVDS differential data channels, and the CameraLink signal includes an auxiliary signal and image data output by the CameraLink interface of the image sensor;

[0039] Dynamically switch the working mode according to the original data stream and the auxiliary signal, and insert marker bytes into the original data stream according to the auxiliary signal to obtain a target data stream;

[0040] The data cache module is used to:

[0041] Receive the target data stream, cache the target data stream, and dynamically adjust the cache capacity to smooth the data stream of the decoded data;

[0042] The data encapsulation module is used to:

[0043] Receive the cached data of the data cache module, and encapsulate the cached data into a target data packet according to a preset data encapsulation protocol;

[0044] The optical fiber transmission module is used to:

[0045] Output the target data packet through a single optical fiber.

[0046] Optionally, the data decoding module includes a mode state machine and a synchronization state machine, the auxiliary signals include a synchronization signal and a mode configuration signal, and the synchronization signal includes a frame valid signal and a line valid signal;

[0047] The mode state machine is used to determine the current frame state according to the original data stream, and dynamically switch the working mode according to the current frame state and the mode configuration signal;

[0048] The synchronization state machine is used to continuously monitor the frame valid signal and the line valid signal, and start the transmission of the original data stream to the data cache module at the rising edge of the frame valid signal;

[0049] During the transmission of the original data stream, the synchronization state machine is used to insert marker bytes into the original data stream according to the frame valid signal and the line valid signal to obtain a target data stream.

[0050] Optionally, the mode state machine is specifically used for:

[0051] Determine the image resolution, frame rate, and effective data bit width according to the pixel clock, frame valid signal, line valid signal, and image data in the original data stream;

[0052] Determine the current frame state according to the effective data bit width, the frame rate, and the image resolution.

[0053] The embodiments of the present invention have the following beneficial effects:

[0054] The multi-channel CameraLink signal optical fiber transmission method provided by the embodiments of the present invention. The data decoding module receives the original data stream of the CameraLink signal through four LVDS differential data channels. The CameraLink signal includes an auxiliary signal and image data output by the CameraLink interface of the image sensor. The data decoding module dynamically switches the working mode according to the original data stream and the auxiliary signal, and inserts marker bytes into the original data stream according to the auxiliary signal to obtain a target data stream. The data caching module receives the target data stream, caches the target data stream, and dynamically adjusts the cache capacity to smooth the data stream of the decoded data. The data encapsulation module receives the cached data of the data caching module, and encapsulates the cached data into a target data packet according to a preset data encapsulation protocol. The optical fiber transmission module outputs the target data packet through a single optical fiber. In the above solution, by efficiently multiplexing multi-channel CameraLink signals and realizing long-distance transmission with the help of optical fibers, the length limitation of traditional cable transmission is broken through. The system adopts a modular architecture design, supports flexible configuration to adapt to different CameraLink standards and variable channel number requirements, and improves the versatility and reliability of the system through software and hardware collaborative optimization. Brief Description of the Drawings

[0055] Figure 1 is a flowchart of the steps of a multi-channel CameraLink image optical fiber transmission method provided by the embodiments of the present invention;

[0056] Figure 2 is a schematic diagram of a data decoding module provided by the embodiments of the present invention;

[0057] Figure 3 is a structural block diagram of a multi-channel CameraLink image optical fiber transmission system provided by the embodiments of the present invention. Detailed Embodiments

[0058] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without making creative efforts belong to the scope of protection of the present invention.

[0059] Hereinafter, the terms "first" and "second" are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the embodiments of the present disclosure, unless otherwise specified, the meaning of "a plurality" is two or more. Additionally, the use of "based on" or "in accordance with" is meant to be open and inclusive, because a process, step, calculation, or other action "based on" or "in accordance with" one or more of the stated conditions or values may, in practice, be based on additional conditions or values beyond those stated.

[0060] Figure 1 is a step flowchart of a method for multi-channel CameraLink image optical fiber transmission provided by an embodiment of the present invention. This method is applied to a CameraLink image optical fiber transmission system, and the system includes: a data decoding module, a data caching module, a data encapsulation module, and an optical fiber transmission module. As Figure 1 shown, the method includes the following steps:

[0061] Step 101, the data decoding module receives the original data stream of the CameraLink signal through four LVDS differential data channels, and the CameraLink signal includes an auxiliary signal and image data output by the CameraLink interface of the image sensor.

[0062] The image optical fiber transmission system is integrated on an FPGA (Field-Programmable Gate Array), and includes a data decoding module, a data caching module, a data encapsulation module, and an optical fiber transmission module. The working process is as follows: the data decoding module receives 4-channel CameraLink input signals, caches the data after decoding, encapsulates it through a custom protocol, and outputs it to the receiving end through a single optical fiber.

[0063] Specifically, 4 LVDS (Low-Voltage Differential Signaling) differential channels are used to transmit the following two types of signals to the data decoding module: image data and auxiliary signals, such as RAW, RGB, YUV, etc. The auxiliary signals include control, synchronization, or handshake signals, such as frame valid signal, line valid signal, data ready signal, etc.

[0064] Each channel transmits 16-bit image data, which is sampled sequentially by a four-phase counter and finally combined into 64-bit pixels.

[0065] Step 102: The data decoding module dynamically switches the working mode according to the original data stream and the mode configuration signal, and inserts marker bytes into the original data stream according to the auxiliary signal to obtain a target data stream.

[0066] In the CameraLink protocol, Base, Medium, and Full are three different working modes, mainly used to define the data transmission bandwidth, channel utilization rate, and pixel bit width. Their core differences lie in: the supported image resolution, frame rate, and data throughput, which are achieved by allocating different numbers of LVDS channels and sampling techniques.

[0067] Among them, the Base mode directly splices the 8-bit data of 3 channels to form a 24-bit output. The Medium mode uses DDR (Double Data Rate) sampling to sample data once at both the rising edge and the falling edge of the clock. Combine the data of two cycles to form a 48-bit output. The Full mode: Use a four-phase counter to sequentially collect the 16-bit data of 4 channels, and finally splice them into a 64-bit output.

[0068] The data decoding module dynamically switches the working mode according to the current frame status and the mode configuration signal, where the current frame status is obtained by analyzing the original data stream.

[0069] The auxiliary signal specifically includes a frame valid signal, a line valid signal, etc. The data decoding module inserts marker bytes into the original data stream according to the frame valid signal and the line valid signal. The marker bytes include a frame start marker, a line start marker, a line end marker, a frame end marker, etc. The original data stream including the marker bytes is output as the decoded target data stream to the data caching module.

[0070] Step 103: The data caching module caches the target data stream and dynamically adjusts the cache capacity to smooth the data stream of the decoded data.

[0071] The data caching module caches the decoded image data to smooth the data stream and prevent data loss caused by transmission rate differences. Specifically, the data caching module uses the on-chip RAM (Random Access Memory) or FIFO (First-In, First-Out queue) of the FPGA to cache the decoded data and smooth the data rate differences of different cameras.

[0072] The cache capacity is designed according to the data rate of the CameraLink signal in different working modes (such as up to 680MB / s in the Full mode) and the fiber optic transmission bandwidth (usually 10Gbps) to ensure no data overflow. Allocate independent cache spaces for each signal to avoid data confusion between channels.

[0073] Step 104: The data encapsulation module receives the cached data from the data caching module and encapsulates the cached data into target data packets according to a preset data encapsulation protocol.

[0074] The data encapsulation module encapsulates the cached data into unified data packets for single-channel fiber optic transmission.

[0075] A custom data encapsulation protocol is designed in advance. Each data packet includes the following fields: 1. Channel Identification Field (Channel ID): 2-bit identification (00 - 11) to distinguish multiple channels; 2. Packet Sequence Number Field (Packet SequenceNumber): 32-bit integer to ensure the order of data packets; 3. Data Length Field (Data Length): 16-bit field indicating the number of valid data bytes; 4. Payload Field (Payload): carrying the original CameraLink pixel data and synchronization signals; 5. Checksum Field (Checksum): 32-bit CRC field (Cyclic Redundancy Check) to verify data integrity.

[0076] Each channel's cached data is segmented, for example, 1024 bytes per segment, and encapsulated sequentially in channel order to generate a continuous data stream.

[0077] Step 105: The fiber optic transmission module outputs the target data packets through a single-channel fiber optic.

[0078] The fiber optic transmission module outputs the encapsulated data packets through a single-channel fiber optic to achieve long-distance transmission. Using the high-speed serial transceiver of the FPGA, such as Xilinx GTX or Intel Transceiver, the encapsulated data is converted into a serial bit stream.

[0079] Through an optical module, such as a small form-factor pluggable optical module like SFP+, the electrical signal is converted into an optical signal, and the target data packets are output through a single fiber optic.

[0080] Outputting the target data packets through a single fiber optic optimizes the utilization rate of the fiber optic bandwidth and ensures the efficient multiplexed transmission of multiple channels.

[0081] As an optional embodiment, the CameraLink image optical fiber transmission system further includes a control module. The control module coordinates the work of each module to ensure the synchronization and real-time performance of the data stream. The control module monitors the FVAL (Frame Valid) and LVAL (Line Valid) of each input signal, adjusts the cache read and write timing, and ensures the synchronization of the four-channel data. The configuration parameters support dynamic adjustment, such as the number of channels (1-4 channels) or the CameraLink configuration. The control module provides an error detection mechanism (such as alarming when the cache overflows or the check fails), monitors the status of the data stream, processes abnormal situations (such as the camera going offline or the cache overflowing), and issues an alarm signal.

[0082] In summary, for the multi-channel CameraLink signal optical fiber transmission method provided by the embodiments of the present invention, the data decoding module receives the original data stream of the CameraLink signal through four LVDS differential data channels, and the CameraLink signal includes an auxiliary signal and image data output by the CameraLink interface of the image sensor; the data decoding module dynamically switches the working mode according to the original data stream and the auxiliary signal, and inserts a marker byte into the original data stream according to the auxiliary signal to obtain a target data stream; the data cache module receives the target data stream, caches the target data stream, and dynamically adjusts the cache capacity to smooth the data stream of the decoded data; the data encapsulation module receives the cached data of the data cache module, and encapsulates the cached data into a target data packet according to a preset data encapsulation protocol; the optical fiber transmission module outputs the target data packet through a single optical fiber. In the above solution, by efficiently multiplexing multi-channel CameraLink signals and realizing long-distance transmission with the help of optical fibers, the length limitation of traditional cable transmission is broken through; the system adopts a modular architecture design, supports flexible configuration to adapt to different CameraLink standards and variable channel number requirements, and improves the versatility and reliability of the system through software and hardware collaborative optimization.

[0083] As an optional embodiment, the data decoding module includes a mode state machine and a synchronization state machine, the auxiliary signal includes a synchronization signal and a mode configuration signal, and the synchronization signal includes a frame valid signal and a line valid signal; step 102 includes:

[0084] Step 1021, the mode state machine determines the current frame state according to the original data stream, and dynamically switches the working mode according to the current frame state and the mode configuration signal.

[0085] Step 1022, the synchronization state machine continuously monitors the frame valid signal and the line valid signal, and starts the transmission of the original data stream to the data cache module at the rising edge of the frame valid signal.

[0086] Step 1023: During the transmission of the original data stream, the synchronization state machine inserts marker bytes into the original data stream according to the frame valid signal and the line valid signal to obtain a target data stream.

[0087] In steps 1021 - 1023, the data decoding module is the core processing unit of image interfaces such as CameraLink, responsible for dynamic mode switching, data synchronization, and stream marker insertion. It mainly includes a mode state machine and a synchronization state machine. Among them, the mode state machine manages the Base / Medium / Full mode switching. The synchronization state machine controls the data stream timing and marker insertion.

[0088] Specifically, the mode state machine monitors the bit width and channel enable state of the original data stream to determine the current frame state, and then receives an external mode configuration signal to dynamically switch between the three operating modes of Base / Medium / Full according to the current frame state and the mode configuration signal.

[0089] The mode state machine controls the start, stop, and caching of the original data stream according to the FVAL and LVAL signals. At the rising edge of FVAL, the frame transmission process is started. At the rising edge of LVAL, the line transmission is started. At the falling edge of LVAL, the line transmission ends.

[0090] During the transmission of the original data stream, the mode state machine embeds markers such as SOF, SOL, EOL, and EOF in the original data stream to construct a standardized data packet.

[0091] Through the working mode switching, the data decoding module can adapt to multi - resolution and multi - bandwidth requirements; at the same time, based on the strict timing control of the frame valid signal and the line valid signal, high - precision synchronization is achieved; and by inserting marker bytes into the original data stream, the original data stream is standardized to obtain a target data stream.

[0092] As an optional embodiment, the mode state machine determining the current frame state according to the original data stream in step 1021 includes:

[0093] Step 10211: The mode state machine determines the image resolution, frame rate, and effective data bit width according to the pixel clock, frame valid signal, line valid signal, and image data in the original data stream.

[0094] Step 10212: Determine the current frame state according to the effective data bit width, the frame rate, and the image resolution.

[0095] In steps 10211 - 10212, the mode state machine dynamically identifies the key parameters of the current image transmission (such as resolution, frame rate, data bit width) by analyzing the timing and content of the original data stream, and determines the current frame state of the system accordingly.

[0096] Specifically, during the high level of the line valid signal (LVAL), the mode state machine counts the number of cycles of the pixel clock (CLK) to obtain the pixel width information; during the high level of the frame valid signal (FVAL), the mode state machine counts the number of rising edges of LVAL to obtain the pixel height information. The combination of the pixel width information and the pixel height information gives the image resolution.

[0097] The mode state machine measures the time interval between the rising edges of the frame valid signal (FVAL) to obtain the frame rate.

[0098] The mode state machine analyzes the activation state and sampling method of the data channel to obtain the effective data bit width.

[0099] The mode state machine further determines the current frame state according to the effective data bit width, frame rate, and image resolution. For example, when the data bit width = 24bit, the resolution ≤ 1280×720, and the frame rate ≤ 60fps, the current frame state is determined to be the Base mode; when the data bit width = 48bit, the resolution ≤ 1920×1080, and the frame rate ≤ 120fps, the current frame state is determined to be the Medium mode; when the data bit width = 64bit, the resolution ≥ 3840×2160, and the frame rate ≤ 30fps, the current frame state is determined to be the Full mode.

[0100] As an optional embodiment, the mode state machine dynamically switches the working mode according to the current frame state and the mode configuration signal, including:

[0101] Step 201, the mode state machine detects the current frame state and the mode configuration signal during the vertical blanking period of signal transmission;

[0102] Step 202, when it is detected that the current frame state is the Base mode and the mode configuration signal is the Medium mode, the mode state machine verifies whether the most significant bits of the four LVDS differential data channels are valid. If so, the mode state machine converts the working mode from the Base mode to the Medium mode;

[0103] Step 203, when it is detected that the current frame state is the Medium mode and the mode configuration signal is the Full mode, the mode state machine verifies whether the data ready signals of all data channels are valid. If so, the mode state machine converts the working mode from the Medium mode to the Full mode.

[0104] In steps 201 - 203, the Vertical Blanking Interval (VBI) is a short interval between video frames during which the Frame Valid signal (FVAL) is at a low level, and the electron beam returns from the bottom to the top of the screen, preparing to draw the next frame.

[0105] During the vertical blanking interval, no valid pixels are transmitted, and switching hardware parameters (such as channel enable, sampling mode) will not cause data misalignment. Therefore, switching the working mode will not corrupt the valid image data.

[0106] The four LVDS differential data channels are Channel 0, Channel 1, Channel 2, and Channel 3 respectively. When it is detected that the current frame state = Base and the mode configuration signal = Medium, the mode state machine checks the validity of the most significant bits of all channels (Channels 0 - 3). In the Base mode, the most significant bits of Channels 0 - 3 serve as handshake signals, and a high level indicates validity and allows switching. If the most significant bits are valid, the working mode is switched from the Base mode to the Medium mode. During the switch, the mode state machine enables Channel 3, configures the DDR dual-edge sampling logic, updates the data reorganization module, and switches from 24 bits (3 channels) to 48 bits (4 channels × DDR).

[0107] When it is detected that the current frame state = Medium and the mode configuration signal = Full, the mode state machine checks the data ready signals of all channels (Channels 0 - 3). When the data ready signal of each channel is at a high level, it is confirmed that the data ready signal is valid. At this time, all channels are stable, which can avoid data loss when switching the working mode.

[0108] When it is confirmed that the data ready signal is valid, the working mode is switched from the Medium mode to the Full mode. During the switch, the DDR sampling is disabled, and the four-phase counter (Full mode feature) is enabled. The data bit width is adjusted from 48 bits (DDR) to 64 bits (4 channels × 16 bits). The synchronization state machine is reset to prevent residual timing conflicts.

[0109] The above solution switches the working mode during the vertical blanking interval, which can avoid corrupting the valid image data. By verifying whether the most significant bits of the four LVDS differential data channels are valid and verifying whether the data ready signals of all data channels are valid, the switching security can be ensured and data loss can be avoided. By performing the switch of the working mode, the sampling mode, data bit width, and channel enable can be adjusted to achieve multi-mode adaptation, so as to flexibly adapt to different resolution, frame rate, and bandwidth requirements without interrupting the data stream.

[0110] As an optional embodiment, step 1023 includes:

[0111] The synchronization state machine marks a frame start marker at the current position of the original data stream at the rising edge of the frame valid signal; marks a line start marker at the current position at the rising edge of the line valid signal; marks a line end marker at the current position at the falling edge of the line valid signal; and marks a frame end marker at the current position at the falling edge of the frame valid signal, to obtain a target data stream including the frame start marker, the line start marker, the line end marker, and the frame end marker.

[0112] In an embodiment of the present invention, the synchronization state machine marks a frame start marker (SOF) at the rising edge of the FVAL signal to mark the start position of the frame, which may include information such as a frame number, a timestamp, etc. At the rising edge of the LVAL signal, a line start marker (SOL) is marked to mark the start position of the line, including a line number. At the falling edge of the LVAL signal, a line end marker (EOL) is marked to mark the end position of the line, and an additional line CRC or status word is optional. At the falling edge of the FVAL signal, a frame end marker (EOF) is marked to mark the end position of the frame.

[0113] Exemplarily, if the original data stream and the data stream structure are: [frame start][line 1 start][pixel 0][pixel 1][pixel 2]...[pixel n][line 1 end][line blanking][line 2 start][pixel 0][pixel 1][pixel 2]...[pixel n][line 2 end]…[line m end][frame end], then the target data stream after marking is: [SOF][SOL][pixel 0][pixel 1][pixel 2]...[pixel n][EOL][line blanking][SOL][pixel 0][pixel 1][pixel 2]...[pixel n][EOL]…(after m lines)[EOL][EOF].

[0114] The above solution strictly controls the timing based on the frame valid signal and the line valid signal, encapsulates semantic information through marker bytes, standardizes the data stream, and can ensure the reliability and maintainability of image transmission in a complex environment.

[0115] As an optional embodiment, before step 103, it further includes:

[0116] Step 301, during the frame active period, detect whether there are mode conflicts and synchronization signal abnormalities; the mode conflict means that the current working mode does not match the data format of the actually detected input port or the data format suddenly changes, and the synchronization signal abnormality means that the synchronization signal is interrupted or the period is abnormal;

[0117] Step 302, if there is the mode conflict or the synchronization signal abnormality, then pause marking the original data stream and pause the transmission of the original data stream to the data cache module;

[0118] Step 303: Reset the synchronization state machine, and re-monitor the edges of the frame valid signal and the line valid signal to identify the current signal period and data format, and determine the actual frame state according to the data format;

[0119] Step 304: Adjust the data bandwidth of the original data stream according to the actual frame state, and dynamically adjust the generation rhythm of the frame valid signal and the line valid signal;

[0120] Step 305: After determining that the data formats of two consecutive frames match the current frame state, re-label the original data stream and restart the transmission of the original data stream to the data cache module.

[0121] In Steps 301 - 305, the Vertical Blanking Interval (VBI) and the Active Frame Period are two key concepts in video signal transmission. The Active Frame Period is the part of the video signal that actually contains valid image data.

[0122] During the Active Frame Period, by comparing the configuration mode with the data bit width in real time, and by monitoring the FVAL / LVAL pulse interval with a timer, determine whether there are mode conflicts and synchronization signal anomalies. If the configuration mode does not match the data bit width, a mode conflict is determined. If the FVAL / LVAL pulse interval exceeds the preset range, a synchronization signal anomaly is determined.

[0123] A mode conflict means that the current working mode does not match the actual data format. For example, the mode configuration signal is Full, but the input data bit width is only 24bit.

[0124] A synchronization signal anomaly refers to the interruption or abnormal period of the synchronization signal. For example, the continuous low level of FVAL or LVAL is a synchronization signal interruption, and the high level time of LVAL not matching the resolution is a period anomaly, such as only 1000 CLKs being detected for 1920 pixel lines.

[0125] If there are mode conflicts or synchronization signal anomalies, stop inserting markers such as SOF / SOL / EOL / EOF into the original data stream to prevent subsequent modules from being contaminated by incorrect markers. And block the writing of the original data stream to the data cache module to avoid invalid data consuming bandwidth.

[0126] Then, reset the synchronization state machine to clear the old state and re-identify the current actual signal format. Specifically, re-capture the rising edge of FVAL (frame start) and the rising edge of LVAL (line start), measure the interval between the rising edges of FVAL to determine the frame rate, measure the high-level time of LVAL to determine the line width, and count the effective data bit width, such as detecting whether Channel 3 is active. Determine the actual frame state according to the data format.

[0127] Adjust the data bandwidth of the original data stream according to the actual frame state, and dynamically adjust the generation rhythm of the frame valid signal and the line valid signal. Re-configure the timing parameters of the FVAL / LVAL generator according to the new frame rate and line width. For example, if the actual bit width decreases from 64bit (Full) to 24bit (Base), then reduce the generation frequency of the frame valid signal and the line valid signal.

[0128] If the parameters of two consecutive frames are the same, it is determined that the safe recovery condition is met. At this time, re-enable the annotation module, perform the operation of inserting SOF / SOL / EOL / EOF into the original data stream, and open the data stream to write to the data cache module.

[0129] If the parameters of two consecutive frames are inconsistent, repeat steps 303 - 304 until stable.

[0130] The above solution prevents error diffusion through the anomaly detection and fusing of steps 301 - 302. Dynamically matches the actual output of the front end through the adaptive reconstruction of steps 303 - 304. Performs safe recovery through step 305, and uses two-frame verification to ensure stability. Thus, in the space environment without human intervention, fault self-healing and zero data loss are achieved.

[0131] As an alternative embodiment, the data decoding module further includes a mode selector. Before step 1021, it further includes:

[0132] The mode selector performs two-stage register synchronization on the mode configuration signal, converting the clock domain of the original data stream to the clock domain of the output end of the data decoding module.

[0133] In the embodiment of the present invention, the clock domain of the original data stream is the pixel clock of CameraLink (such as 85MHz), provided by the image sensor, while the clock domain of the output end of the data decoding module is the internal processing clock of the FPGA (such as 100MHz AXIStream clock).

[0134] If the mode configuration signal is directly used, it may cause the system state machine to crash or data confusion due to metastability. Therefore, the mode selector performs two-stage register synchronization on the mode configuration signal.

[0135] Specifically, the first - stage register initially samples the asynchronous input, and the output may be in a metastable state briefly. The second - stage register resamples the output of the first stage, significantly reducing the probability of metastable propagation.

[0136] The mode configuration signal is first synchronized to the clock domain of the original data stream to ensure that the decision of the mode state machine is strictly synchronized with the data stream. Then, the data decoding module transfers the processed data from the clock domain of the original data stream to the clock domain of the output end through an asynchronous FIFO or a double - buffer mechanism.

[0137] Through clock domain conversion, the data transmission process can take into account both reliability and real - time performance.

[0138] Figure 2 It is a schematic diagram of a data decoding module provided by an embodiment of the present invention.

[0139] As Figure 2 shown, the data decoding module includes a mode selector, a mode state machine, and a synchronization state machine.

[0140] First, the mode selector receives the original data stream and auxiliary signals of the CameraLink signals of 4 physical channels. The auxiliary signals include a mode configuration signal and a synchronization signal.

[0141] The mode selector synchronizes the input mode configuration signal through two - stage registers to eliminate the metastable risk. Subsequently, the mode state machine dynamically switches the working mode according to the current frame state: when a change in the mode configuration signal is detected during the vertical blanking period, the mode state machine dynamically switches the working mode according to the original data stream and the auxiliary signals, and inserts marker bytes into the original data stream according to the auxiliary signals to obtain the target data stream. Specifically, when a change in the mode configuration signal is detected during the vertical blanking period, the mode state machine verifies the validity of the channel handshake signal. If switching from the Base mode to the Medium mode, the highest bit of channel 0 needs to be valid. If switching from the Medium mode to the Full mode, all - channel data readiness is required. During mode switching, the internal phase counter is updated and the data stream is reorganized. In the Base mode, 24 - bit data is directly concatenated. In the Medium mode, 48 - bit data is combined through DDR double - edge sampling. In the Full mode, 16 - bit data of four channels is sequentially collected by a four - phase counter to form a 64 - bit output. The synchronization state machine continuously monitors the frame valid signal and the line valid signal at the same time, starts data transmission at the rising edge of the frame valid, and generates an end - of - line marker at the end of the line valid.

[0142] If a pattern conflict or abnormal synchronization signal is detected during the frame active period, an error state is triggered, and the generation rhythm of the data valid signal is dynamically adjusted through bandwidth adaptation logic. The finally reorganized pixel data is buffered by a cross-clock domain FIFO and output in the standard frame line structure through an AXI stream interface. The entire process ensures seamless multi-mode switching and data integrity through a phase counter and status feedback.

[0143] Figure 3 This is a structural block diagram of a multi-channel CameraLink signal optical fiber transmission system provided by an embodiment of the present invention. The system 400 includes: a data decoding module 401, a data caching module 402, a data encapsulation module 403, and an optical fiber transmission module 404;

[0144] Among them,

[0145] The data decoding module 401 is used to: receive the original data stream of the CameraLink signal through four LVDS differential data channels, and the CameraLink signal includes an auxiliary signal and image data output by the CameraLink interface of the image sensor;

[0146] Dynamically switch the working mode according to the original data stream and the auxiliary signal, and insert marker bytes into the original data stream according to the auxiliary signal to obtain a target data stream;

[0147] The data caching module 402 is used to:

[0148] Receive the target data stream, cache the target data stream, and dynamically adjust the cache capacity to smooth the data stream of the decoded data;

[0149] The data encapsulation module 403 is used to:

[0150] Receive the cached data of the data caching module, and encapsulate the cached data into a target data packet according to a preset data encapsulation protocol;

[0151] The optical fiber transmission module 404 is used to:

[0152] Output the target data packet through a single optical fiber.

[0153] Regarding the device in the above embodiments, the specific manner in which each module performs operations has been described in detail in the embodiments related to the method, and will not be elaborated here.

[0154] Those of ordinary skill in the art can understand that all or part of the processes in the methods of the above embodiments can be completed by instructing relevant hardware through a computer program. This computer program can be stored in a non-volatile computer-readable storage medium. When this computer program is executed, it can include the processes of the embodiments of the above various methods. Among them, any reference to a memory, storage, database, or other medium used in the various embodiments provided in this application can include non-volatile and / or volatile memories. Non-volatile memories can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memories can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), Rambus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and Rambus dynamic RAM (RDRAM), etc.

[0155] After considering the specification and practicing the invention disclosed herein, those skilled in the art will readily conceive of other embodiments of the present disclosure. This application is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include known common knowledge or conventional technical means in the technical field not disclosed in the present disclosure. The specification and examples are only regarded as exemplary, and the true scope and spirit of the present disclosure are pointed out by the following claims.

[0156] It should be understood that the present disclosure is not limited to the exact structures described above and shown in the drawings, and various modifications and changes can be made without departing from its scope. The scope of the present disclosure is only limited by the appended claims.

Claims

1. A method for optical fiber transmission of multi-channel CameraLink signals, characterized in that, Applied to a CameraLink image optical fiber transmission system, the system includes: a data decoding module, a data caching module, a data encapsulation module, and an optical fiber transmission module; the method includes: The data decoding module receives the original data stream of the CameraLink signal through four LVDS differential data channels, and the CameraLink signal includes an auxiliary signal and image data output by the CameraLink interface of the image sensor; The data decoding module dynamically switches the working mode according to the original data stream and the auxiliary signal, and inserts a marker byte into the original data stream according to the auxiliary signal to obtain a target data stream; The data caching module receives the target data stream, caches the target data stream, and dynamically adjusts the cache capacity to smooth the data stream of the decoded data; The data encapsulation module receives the cached data of the data caching module, and encapsulates the cached data into a target data packet according to a preset data encapsulation protocol; The optical fiber transmission module outputs the target data packet through a single optical fiber.

2. The method according to claim 1, characterized in that, The data decoding module includes a mode state machine and a synchronization state machine, the auxiliary signal includes a synchronization signal and a mode configuration signal, and the synchronization signal includes a frame valid signal and a line valid signal; the data decoding module dynamically switches the working mode according to the original data stream and the mode configuration signal, and inserts a marker byte into the original data stream according to the auxiliary signal to obtain a target data stream, including: The mode state machine determines the current frame state according to the original data stream, and dynamically switches the working mode according to the current frame state and the mode configuration signal; The synchronization state machine continuously monitors the frame valid signal and the line valid signal, and starts the transmission of the original data stream to the data caching module at the rising edge of the frame valid signal; During the transmission of the original data stream, the synchronization state machine inserts a marker byte into the original data stream according to the frame valid signal and the line valid signal to obtain a target data stream.

3. The method according to claim 2, wherein The mode state machine determines the current frame state according to the original data stream, including: The mode state machine determines the image resolution, frame rate, and effective data bit width according to the pixel clock, frame valid signal, line valid signal, and image data in the original data stream; According to the effective data bit width, the frame rate, and the image resolution, determine the current frame state.

4. The method according to claim 2, wherein The mode state machine dynamically switches the working mode according to the current frame state and the mode configuration signal, including: The mode state machine detects the current frame state and the mode configuration signal during the vertical blanking period of signal transmission; When it is detected that the current frame state is the Base mode and the mode configuration signal is the Medium mode, the mode state machine verifies whether the highest bit of the four LVDS differential data channels is valid. If so, the mode state machine converts the working mode from the Base mode to the Medium mode; When it is detected that the current frame state is the Medium mode and the mode configuration signal is the Full mode, the mode state machine verifies whether the data ready signals of all data channels are valid. If so, the mode state machine converts the working mode from the Medium mode to the Full mode.

5. The method according to claim 2, wherein The synchronization state machine inserts marker bytes into the original data stream according to the frame valid signal and the line valid signal to obtain a target data stream, including: At the rising edge of the frame valid signal, the synchronization state machine marks the start of the frame at the current position of the original data stream; at the rising edge of the line valid signal, it marks the start of the line at the current position; at the falling edge of the line valid signal, it marks the end of the line at the current position; at the falling edge of the frame valid signal, it marks the end of the frame at the current position, thereby obtaining a target data stream including the start-of-frame marker, the start-of-line marker, the end-of-line marker, and the end-of-frame marker.

6. The method according to claim 2, wherein The data decoding module decodes the original data stream according to the auxiliary signal, and further includes: During the frame active period, it detects whether there are mode conflicts and synchronization signal anomalies. The mode conflict means that the current working mode does not match the data format of the input port actually detected or the data format suddenly changes, and the synchronization signal anomaly means that the synchronization signal is interrupted or the period is abnormal; If there is the mode conflict or the synchronization signal anomaly, it pauses marking the original data stream and pauses the transmission of the original data stream to the data cache module; Resets the synchronization state machine, re-monitors the edges of the frame valid signal and the line valid signal to identify the current signal period and data format, and determines the actual frame state according to the data format; Adjusts the data bandwidth of the original data stream according to the actual frame state, and dynamically adjusts the generation rhythm of the frame valid signal and the line valid signal; After determining that the data formats of two consecutive frames match the current frame state, it resumes marking the original data stream and resumes the transmission of the original data stream to the data cache module.

7. The method according to claim 1, characterized in that, The data decoding module further includes a mode selector. Before the mode state machine determines the current frame state according to the original data stream, it further includes: The mode selector performs two-stage register synchronization on the mode configuration signal to convert the clock domain of the original data stream to the clock domain of the output end of the data decoding module.

8. A multi-channel CameraLink signal optical fiber transmission system, characterized in that The system includes: a data decoding module, a data cache module, a data encapsulation module, and an optical fiber transmission module; Among them, The data decoding module is used to: receive the original data stream of the CameraLink signal through four LVDS differential data channels, and the CameraLink signal includes an auxiliary signal and image data output by the CameraLink interface of the image sensor; Dynamically switch the working mode according to the original data stream and the auxiliary signal, and insert marker bytes into the original data stream according to the auxiliary signal to obtain a target data stream; The data cache module is used to: Receive the target data stream, cache the target data stream, and dynamically adjust the cache capacity to smooth the data stream of the decoded data; The data encapsulation module is configured to: Receive the cached data of the data cache module and encapsulate the cached data into target data packets according to a preset data encapsulation protocol; The optical fiber transmission module is configured to: Output the target data packets through a single optical fiber.

9. The system according to claim 8, wherein The data decoding module includes a mode state machine and a synchronization state machine. The auxiliary signals include a synchronization signal and a mode configuration signal. The synchronization signal includes a frame valid signal and a line valid signal; The mode state machine is configured to determine the current frame state according to the original data stream and dynamically switch the working mode according to the current frame state and the mode configuration signal; The synchronization state machine is configured to continuously monitor the frame valid signal and the line valid signal, and start the transmission of the original data stream to the data cache module at the rising edge of the frame valid signal; During the transmission of the original data stream, the synchronization state machine is configured to insert marker bytes into the original data stream according to the frame valid signal and the line valid signal to obtain a target data stream.

10. The system according to claim 9, characterized in that, Specifically, the mode state machine is configured to: Determine the image resolution, frame rate, and effective data bit width according to the pixel clock, frame valid signal, line valid signal, and image data in the original data stream; Determine the current frame state according to the effective data bit width, the frame rate, and the image resolution.

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