Vehicle four-direction synchronous direction lamp display method

Abstract

The invention relates to the technical field of synchronous steering display, in particular to a vehicle four-direction synchronous direction lamp display method, which comprises the following steps of acquiring a steering signal, setting a synchronous anchor point, matching a direction to generate a control protocol, allocating an address to adjust the output of a lamp group, detecting a response error, and controlling refreshing to obtain a four-direction synchronous direction lamp consistent display result. According to the invention, the unified reference time is set by identifying the digital jump in the steering signal, the consistency of control starting points is ensured, the timing sequence mapping relation is accurately established in combination with the periodic control and direction mapping mode, the dynamic response, address coding and duty ratio adjustment mechanism are realized, the light-emitting precision and phase consistency are improved, and the real-time performance of light output is enhanced; through error statistics and response comparison, a feedback closed loop is formed, when the deviation exceeds the limit, a synchronization protocol is reconstructed in time, the display state of a synchronization direction lamp is refreshed, coordination and consistency of signals in four directions are ensured, and the synchronization precision, the error recovery capability and the multidirectional consistency of steering prompt are effectively improved.

Description

Technical Field

[0001] The invention relates to the technical field of synchronous turn display, and in particular to a method for displaying four-way synchronous turn lights of a vehicle. Background Art

[0002] The field of synchronous steering display technology includes related devices and methods for indicating to surrounding traffic participants through light signals that the vehicle is about to change direction or status when the vehicle is driving. The core content is to achieve that when the vehicle changes its driving direction or status, the indicator lights in multiple directions of front, rear, left, and right synchronously or coordinately send out specific signals, thereby conveying the dynamic information that the vehicle is about to execute. It is widely used in the safety warning system of motor vehicles, especially focusing on multi-directional visual warning methods. Through control circuits, light arrangements, light control logic, etc., a multi-directional coordinated signal output mode is constructed to meet the steering warning needs under different road conditions and driving environments.

[0003] Among them, the vehicle's four-way synchronous turn signal display method refers to a method for making the turn indicator lights in the front, rear, left and right directions of the vehicle send out turn signals synchronously. It is aimed at the problem of unified control of multi-directional lights required for the driver to give turn prompts under complex road conditions, and covers the unified cooperation of the vehicle's forward turn signal, rear turn signal, left turn signal and right turn signal in electrical connection and control logic. The specific method includes identifying the state of the vehicle's steering control switch, linking and controlling the turn light units in the front, rear, left and right directions, and sending out flashing signals of a uniform frequency at a predetermined time interval to ensure that each direction indicator performs the light-emitting action synchronously, and realizing multi-channel parallel control in conjunction with the physical wiring method and time control circuit.

[0004] In the existing vehicle steering control process, the general steering control signal and static lighting linkage strategy are relied on. There is a lack of strict timing synchronization mechanism between the control starting point and each light-emitting unit. There is no unified reference time point for the light group response, resulting in drift space for the time point of each direction signal. The fixed logic circuit is used to achieve flashing output, lacking the ability to dynamically adjust the light-emitting behavior, and it is difficult to meet the control rhythm requirements under different driving conditions. There is no effective feedback mechanism for each light-emitting unit during the execution process, and it is impossible to record and evaluate the response accuracy. There is a lack of synchronous error identification means, and it is impossible to make corresponding corrections based on real-time operation results. Signal abnormalities or response lags make it difficult to trigger the active reconstruction mechanism, which can easily cause the system to continue to operate when it deviates from the expected control track, and the signal performance cannot adapt to environmental changes. In complex scenarios, the light group may appear in an asynchronous lighting state, hindering the transmission of vehicle intentions. For example, in a multi-lane lane change scenario in an urban area, the deviation of the light display will weaken the judgment accuracy of the following vehicle and increase the driving risk. The lack of error quantification standards and dynamic adjustment strategies is an important limitation of the current multi-directional prompt system. Summary of the invention

[0005] The object of the present invention is to solve the drawbacks existing in the prior art, and a method for displaying a vehicle four-way synchronous direction indicator light is proposed.

[0006] In order to achieve the above object, the present invention adopts the following technical solution: A method for displaying a vehicle four-way synchronous direction indicator light, including the following steps: S1: Obtain the first steering signal after the vehicle ignition of the steering lever, collect the digital level jump in the steering signal, determine whether it changes from the neutral position to an effective steering state, set the synchronous reference time, and generate a timing synchronous anchor point; S2: Based on the timing synchronous anchor point, combined with the preset control period, match the periodic timing control code with the current steering direction, set the phase control sequences of the front, rear, left, and right light groups, and generate a light group synchronous control protocol; S3: According to the light group synchronous control protocol, perform address coding allocation for the four-way light groups, write the LIN node addresses corresponding to the light groups into the light group control matrix, and control the LED duty cycle adjustment and extinction delay according to the current periodic timing code to generate a synchronous control instruction set; S4: Based on the synchronous control instruction set, detect and count the response time delays of each light group through the LIN bus response, calculate the value of the synchronous error counter, mark whether it exceeds the standard fault tolerance threshold, and generate a synchronous state diagnosis report; S5: According to the synchronous state diagnosis report, if the error is within the standard allowable range, continue the timing control; if it exceeds the limit, send a reset signal and initialize the timing synchronization protocol, perform dynamic direction indicator light refreshing, and generate a consistent display result of the four-way direction indicator lights.

[0007] As a further solution of the present invention, the timing synchronous anchor point includes a reference timestamp, a synchronous signal mark, and an anchor point identification code; the light group synchronous control protocol includes phase setting parameters, a period control code, and a direction matching matrix; the synchronous control instruction set includes an address mapping table, a duty cycle adjustment factor, and an extinction delay configuration; the synchronous state diagnosis report includes a synchronous error count value, a fault tolerance mark state, and a response time delay statistical table; the consistent display result of the four-way direction indicator lights includes a dynamic refreshing effect and a synchronous display state of the four-way synchronous direction indicator lights.

[0008] As a further solution of the present invention, the specific steps for obtaining the timing synchronous anchor point are as follows: S111: Obtain the first steering signal after the vehicle ignition of the steering lever, collect the digital level jump data in the CAN bus steering signal, determine whether the digital level in the continuous time period jumps from the neutral level stable state to the left and right steering levels, screen the time point of the first jump, obtain the corresponding CAN bus standard frame timestamp, and generate a steering signal jump timestamp; S112: According to the turning signal jump timestamp, detect whether the timestamp is within the allowed time window after the vehicle ignition signal is activated, obtain the CAN bus network synchronization beat record within the period from the ignition moment to the current time, analyze the corresponding position of the jump timestamp in the beat record, calculate the change amount of the synchronization period within the beat record and the period fitting residual of the jump time point, and generate the synchronization beat fitting difference amount; S113: According to the synchronization beat fitting difference amount, screen the time points where the time difference is within the network synchronization reference threshold range, combine the matching degree between the jump timestamp and the beat sequence, extract the anchor point index from the minimum value of the difference amount trend, count the corresponding network timestamps, and perform conversion encoding based on the standard network time format to establish a timing synchronization anchor point.

[0009] As a further solution of the present invention, the specific obtaining steps of the lamp group synchronization control protocol are as follows: S211: Based on the timing synchronization anchor point, obtain the vehicle PWM control period sequence and extract the period values, collect the duty cycle control sequences corresponding to each frequency value, align the synchronization anchor point time reference to the starting position of the current period, and perform corresponding calibration with the period frequency to generate a synchronization period starting time set; S212: According to the synchronization period starting time set, collect the preset timing control codes within each PWM period, perform matching verification on each control code sequence with the current steering direction field of the steering lever, calculate the phase offset amount of each lamp group channel, and perform time axis correction according to the offset amount and the starting position of the current period to establish a lamp group phase control sequence; S213: Based on the lamp group phase control sequence, generate a standard format control protocol frame in cycle order, fill in the control byte fields of the respective corresponding channels of the front lamp group, rear lamp group, left turn signal lamp group and right turn signal lamp group one by one, and attach a period identifier to all control information to establish a lamp group synchronization control protocol.

[0010] As a further solution of the present invention, the specific obtaining steps of the synchronization control instruction set are as follows: S311: According to the lamp group synchronization control protocol, identify the numbers of the four-way lamp groups, extract the corresponding control identification fields of the front lamp, rear lamp, left lamp and right lamp, read the pre-allocated LIN slave node addresses of each lamp group through the LIN bus protocol stack, and insert the four groups of codes into the control matrix positions in column order to obtain a LIN node address allocation matrix; S312: According to the LIN node address allocation matrix, identify the corresponding control groups within each period, read the duty cycle setting values of the period control channels and the response characteristic duration of the LED lamp groups, calculate the duty cycle adjustment duration of the lamp group channels within the current period, and combine the adjustment duration with the period reference time to determine the actual control on-off time period of the LED lamps, and generate an LED dimming adjustment value set; S313: Based on the set of LED dimming adjustment values, match the duty cycle adjustment value under each lamp group channel with the LIN slave node address, construct the control command group packet content according to the time series, record the cycle number, target address, control instruction content and execution delay for each command, and establish a synchronous control instruction set.

[0011] As a further solution of the present invention, the specific steps for obtaining the synchronous state diagnosis report are as follows: S411: Based on the synchronous control instruction set, obtain the instruction scheduling time series after the LIN master node schedules, record the sending time point of each instruction and the receiving time of the response message returned by the lamp group slave node, calculate the response delay value of each instruction, and obtain the response delay data set; S412: According to the response delay data set, use the cycle average time as the current cycle benchmark, judge the error difference between the response times of the four lamp groups and the mean value, and accumulate the absolute value of the error over the cycle to obtain the synchronous error count value; S413: Based on the synchronous error count value, conduct a comparative evaluation according to the lighting synchronization allowable deviation tolerance standard, mark the abnormal state of channel synchronization, extract the corresponding cycle number, deviation value and lamp group number of the abnormality, record the maximum response difference and the number of overlimit times for each lamp group respectively, and establish a synchronous state diagnosis report.

[0012] As a further solution of the present invention, the specific steps for obtaining the consistent display result of the four-way lights are as follows: S511: Based on the synchronous state diagnosis report, extract the synchronous error count values and overlimit flag bits of all lamp groups within consecutive cycles, compare with the synchronous error tolerance threshold of commercial vehicles, judge whether the abnormal frequency within consecutive cycles is within the allowable upper limit, mark the overlimit lamp groups, and obtain the synchronous error determination flag matrix; S512: According to the synchronous error determination flag matrix, screen the addresses of the lamp groups marked as overlimit, enter the hardware control interface channel, activate the reset instruction of the target node, read the reference control cycle, duty cycle template and initialization synchronization anchor time of each lamp group, reconstruct the cycle alignment sequence from scratch, reset the PWM dimming parameters and control step numbers, and generate a timing synchronization reconstruction parameter set; S513: According to the timing synchronization reconstruction parameter set, combined with the current steering hold signal value, control the flashing rhythm and duty cycle setting of the front, rear, left and right four groups of lights according to the unified dimming timing. The front lamp group and the rear lamp group adopt the main reference duty cycle. By adjusting the activation phase in the PWM cycle, they reach the same lit state at the main control starting point of each cycle uniformly, output a stable control beat, and establish the consistent display result of the four-way lights.

[0013] Compared with the prior art, the advantages and positive effects of the present invention are as follows: In the present invention, a unified reference time is set by identifying digital jumps in the steering signal to ensure consistent control starting points. Combining cycle control and direction mapping methods, a timing mapping relationship is accurately established to achieve dynamic response. The address coding and duty cycle adjustment mechanism improve the lighting accuracy and phase consistency, enhancing the real-time performance of the lighting output. Through error statistics and response comparison, a feedback closed-loop is formed. When the deviation exceeds the limit, the synchronization protocol is immediately reconstructed and the synchronous walking light display state is refreshed to ensure the coordination of the four-way signals, effectively improving the synchronization accuracy, error recovery ability, and multi-directional consistency of the steering prompt. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 is the main flowchart of the present invention; Figure 2 is the flowchart of the step for obtaining the timing synchronization anchor point of the present invention; Figure 3 is the flowchart of the step for obtaining the lamp group synchronization control protocol of the present invention; Figure 4 is the flowchart of the step for obtaining the synchronization control instruction set of the present invention; Figure 5 is the flowchart of the step for obtaining the synchronization status diagnostic report of the present invention; Figure 6 is the flowchart of the step for obtaining the consistent display result of the four-way walking lights of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0015] In order to make the objectives, technical solutions, and advantages of the present invention clearer and more understandable, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0016] In the description of the present invention, it should be understood that the orientation or positional relationships indicated by the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. are based on the orientation or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as limiting the present invention. In addition, in the description of the present invention, the meaning of "a plurality" is two or more, unless otherwise specifically defined.

[0017] Please refer to Figure 1 , a method for displaying four-way synchronous walking lights of a vehicle, including the following steps: S1: Obtain the first steering signal of the steering lever after the vehicle is ignited. By collecting the digital level jump in the CAN bus steering signal, determine whether it changes from the neutral gear to the effective steering state, and set the corresponding CAN bus timestamp (in-vehicle network time synchronization mechanism compliant with ISO11898 standard) as the synchronization reference time to generate a timing synchronization anchor point; S2: Based on the timing synchronization anchor point, combined with the preset PWM control period in the ECU clock source (LED dimming frequency set according to SAE J3068 standard (usually 100 - 500Hz)), match the timing control code in each period with the current steering direction, set the phase control sequences of the front, rear, left, and right lamp groups, and generate a lamp group synchronization control protocol; S3: According to the lamp group synchronization control protocol, perform address coding assignment for the four-way lamp groups, write the LIN node addresses corresponding to each direction lamp group (slave node address coding compliant with LIN2.0 protocol specification) into the lamp group control matrix, and control the duty cycle adjustment (following the PWM dimming standard) and extinction delay of the LEDs according to the current period timing code to generate a synchronization control instruction set; S4: Based on the synchronization control instruction set, detect and count the response delays of each lamp group through the LIN bus response, calculate the value of the synchronization error counter (time synchronization error measurement method based on ISO13218 standard), mark whether it exceeds the ISO2575 standard fault tolerance threshold (the maximum synchronization time difference allowed for the vehicle lighting system (≤50ms)), and generate a synchronization status diagnostic report; S5: According to the synchronization status diagnostic report, if the error is within the range allowed by the SAE J1939 - 73 standard (commercial vehicle lighting control synchronization error tolerance standard), continue the timing control. If it exceeds the limit, send a hardware reset signal and re-initialize the timing synchronization protocol, and perform dynamic direction lamp refreshing in combination with the steering hold signal to generate a consistent display result of the four-way direction lamps.

[0018] The timing synchronization anchor point includes a reference timestamp, a synchronization signal mark, and an anchor identification code. The lamp group synchronization control protocol includes phase setting parameters, a period control code, and a direction matching matrix. The synchronization control instruction set includes an address mapping table, a duty cycle adjustment factor, and an extinction delay configuration. The synchronization status diagnostic report includes a synchronization error count value, a fault tolerance mark status, and a response delay statistics table. The consistent display result of the four-way direction lamps includes a dynamic refreshing effect and a synchronous display status of the four-way synchronous direction lamps.

[0019] Please refer to Figure 2 , and the specific steps of S1 are as follows: S111: Obtain the first steering signal after vehicle ignition for the steering lever, collect the digital level jump data in the CAN bus steering signal, determine whether the digital level jumps from the neutral level stable state to the left or right steering level within a continuous time period, screen the time point of the first jump, obtain the corresponding CAN bus standard frame timestamp, and generate a steering signal jump timestamp; Obtain the first steering signal after vehicle ignition for the steering lever. First, extract the starting time point of the ignition trigger signal from the vehicle control system. This time point can be read through the internal status variable of the engine control unit ECU. If the ignition starting time recorded by the ECU is the system time base of 125 ms, then this time is used as the starting point for subsequent signal analysis. Subsequently, enter the CAN bus data acquisition process. Set the sampling interval to 10 ms in the sampling module, obtain the CAN message content in the corresponding channel of the steering lever through the bus physical interface, perform digital processing on the level field in the extracted message, and determine whether its voltage value meets the jump condition. Among them, the neutral state is defined as the level being lower than 0.5 V, the left turn is between 1.2 V and 2.0 V, and the right turn is above 2.5 V. For example, when the level value in a certain message is detected to be 1.5 V, it is defined as the left turn state according to this range. If the level in the previous cycle is 0.2 V, which belongs to the neutral state, so a state jump occurs at this time. The system marks this jump event, extracts the CAN standard frame time field of this message in combination with its timestamp. For example, if it is 125 ms, then this moment is the jump time point, and a steering signal jump timestamp is generated. To clarify the specific execution of this jump determination process, the following table lists the sampling results at different time serial numbers: Table 1 CAN signal jump detection data table

[0020] As shown in Table 1, the second item of data jumps from "neutral" to "left turn" in the level state, and its timestamp is 125 ms, which meets the determination condition of the first jump. This timestamp is extracted as the synchronization reference basis for subsequent subsystems, and a steering signal jump timestamp is obtained.

[0021] S112: According to the steering signal jump timestamp, detect whether the timestamp is within the allowed time window after the vehicle ignition signal is activated, obtain the CAN bus network synchronization beat record from the ignition moment to the current time period, analyze the corresponding position of the jump timestamp in the beat record, calculate the change amount of the synchronization period in the beat record and the period fitting residual of the jump time point, and generate a synchronization beat fitting difference amount; Based on the turning signal jump timestamp, determine whether it falls within the effective recognition time window specified after the vehicle ignition. In this embodiment, the time window is set to 0 to 500 ms. If the jump time is 125 ms, it meets the window condition and enters the synchronous beat data acquisition process. At this stage, read the beat sequence record in the CAN network from the start of ignition to the current moment, and count the time position and message reception frequency of each beat point. For example, the sampled beat records are 120 ms, 130 ms, 140 ms, 150 ms, etc. Calculate the period interval between each pair of adjacent beats. If they are 10 ms, 8 ms, 12 ms, calculate the period standard deviation for these three items. The steps are as follows: first, find the mean: (10 + 8 + 12) / 3 = 10 ms. Then, calculate the square of the difference between each item and the mean: (0^2 + 4 + 4) = 8. The variance is 8 / 3 ≈ 2.67, and taking the square root gives a standard deviation of approximately 1.63 ms. This value is used as the period stability index. At the same time, determine whether the position of the jump point at 125 ms is close to the period abnormal segment. By matching the difference between the jump time and the beat time series, obtain the corresponding difference index value and mark its period fitting ability, thereby generating the synchronous beat fitting difference amount.

[0022] S113: According to the synchronous beat fitting difference amount, screen out the time points where the time difference is within the network synchronization reference threshold range. Combining the matching degree between the jump timestamp and the beat sequence, extract the anchor point index from the minimum value of the difference amount trend, count the corresponding network timestamp, and perform conversion encoding based on the standard network time format to establish a timing synchronization anchor point. According to the synchronous beat fitting difference amount, determine whether the beat stability of the jump point meets the requirements for synchronization accuracy in the ISO11898 standard. In this standard, it is recommended that the period fitting fluctuation should not exceed ±3 ms. Therefore, compare the previously calculated period standard deviation of 1.63 ms with 3 ms. After confirming that it meets the requirements, then find the reference beat point closest to the jump time in the beat record. By taking the difference with 125 ms, the two adjacent beat points are 120 ms and 130 ms respectively, and the differences from the jump point are 5 ms and 5 ms respectively. Then, either the one with the smaller serial number can be selected as the anchoring reference. Select 120 ms as the system unified time point. Then, perform format conversion on the CAN frame time field of this time point, adjust it to the 8-byte timestamp format, and convert it to the microsecond-precision time format value of 120000 μs, and input it into the system synchronization management module to complete the anchoring and positioning of the cross-device unified network timing and establish a timing synchronization anchor point.

[0023] Please refer to Figure 3 , the specific steps of S2 are as follows: S211: Based on the timing synchronization anchor point, obtain the vehicle PWM control period sequence and extract the period value, collect the duty cycle control sequence corresponding to each frequency value, align the synchronization anchor point time reference to the starting position of the current period, and perform corresponding calibration with the period frequency to generate the synchronization period starting time set; Based on the timing synchronization anchor point, retrieve the preset PWM control period setting value from the vehicle ECU. The ECU provides options according to the SAE J3068 standard within the frequency setting range of 100 Hz to 500 Hz, and the corresponding period time is calculated to be between 10 ms and 2 ms. The system identifies the PWM frequency setting corresponding to each lamp group by calling the lamp group configuration table and calculates the period time accordingly. For example, if the front lamp group is set to a frequency of 100 Hz, the period time is 10 ms; if the right lamp group has a frequency of 400 Hz, the period is 2.5 ms. At the same time, obtain the duty cycle setting of each lamp group. The duty cycle is the ratio of the energized duration within the period to the total period time, with the unit of percentage. For example, the duty cycle of the right lamp group is 80%, that is, the effective energized time within the 2.5 ms period is 2.0 ms. Subsequently, the system uses the unified starting time set by the synchronization anchor point as the time base for the period control of each lamp group, expands the period setting values of different lamp groups into a starting time sequence and aligns them uniformly. For example, if the system unified starting point is 0 ms, the starting points of the front lamp group period are 0 ms, 10 ms, 20 ms...; if the left lamp group period is 3.33 ms, the starting points are 0 ms, 3.33 ms, 6.66 ms... This process simultaneously generates data such as the corresponding lamp group number, frequency value, period value, duty cycle, and enabled status. The results are summarized as follows: Table 2 Example Table of Lamp Group PWM Period Settings

[0024] As shown in Table 2, the system has completed the conversion from frequency to period according to the lamp group type and established a time alignment index structure for each lamp group in combination with the synchronization anchor point, and finally generated the synchronization period starting time set.

[0025] S212: According to the synchronization period starting time set, collect the preset timing control codes within each PWM period, perform matching verification on each control code sequence with the current steering direction field of the steering lever, using the formula: ; Calculate the phase offset of each lamp group channel , perform time axis correction according to the offset and the current period starting position, and establish the lamp group phase control sequence, where is the sequence index corresponding to the control code of the corresponding lamp group, is the delay time constant, is the PWM period time, is the number of signal switches of the corresponding lamp group channel within the current period, is the total number of lamp groups; According to the set of start times of the synchronization period, collect the timing control code content of each lamp group in the ECU within each period. This control code reflects the specific control actions within the current period, and use the time bits of this control code as the index and the corresponding delayed start time As key parameters, together with the PWM cycle time ΔT and the number of signal switches of the lamp group within the current period are used as the operation inputs. First, detect the current status field of the steering lever. If the status field is a left turn, retain the records in the control code whose target is the left lamp group. Assume that in the left turn state, the control code of the left lamp group is in the 2nd position in the sequence, that is , the corresponding delay time , PWM cycle ΔT = 3.33ms, number of signal switches . After the system calculates the normalized control time average of all lamp groups, then perform an absolute value operation on the difference from the control value of the left lamp group to obtain the offset.

[0026] Assume the input values of other lamp groups are: , , , and substitute them into the calculation respectively: The first item is: ; The second item is: ; The third item is: ; The average value is: (2.826 + 3.8295 + 2.691) / 3 ≈ 3.115, the current lamp group is: ; The obtained phase offset is: ; This value is the phase offset degree of the left lamp group within this period, indicating the time deviation of its control behavior relative to other lamp groups. Then, adjust the start activation time in the system control table according to this offset value to establish the lamp group phase control sequence.

[0027] The phase offset of each lamp group channel represents the degree of deviation between the start time of the control signal of each lamp group and the average control time of all lamp groups in the system during its corresponding PWM control period. This offset reflects, in terms of time, whether the control response of this lamp group is earlier or later than that of other lamp groups, and is a key indicator for measuring the timing coordination among lamp groups. The larger the value, the more obvious the time difference between the lighting time of this lamp group and that of other lamp groups, which may cause visual or functional asynchrony. The smaller the value, the more consistent this lamp group is with the overall control center time. This indicator comprehensively considers factors such as the start sequence of lamp groups, delay duration, and signal switching frequency, and can quantify the time consistency of control actions within the same period, used to subsequently correct the positions of the control commands of each lamp group on the time axis and improve the timing consistency of multi-lamp collaborative control.

[0028] The operation logic of the formula aims to quantify the phase offset degree of each lamp group within the PWM control period to identify the time coordination differences between it and other lamp groups. First, the sequential index of the control code is added to its corresponding delay time to represent the actual start reference position of this lamp group in the current period, and its physical meaning is the comprehensive time delay of the control action within the period. Then, this comprehensive start position is multiplied by the period time to convert the logical index value into the start time length under the real time scale. And the in the denominator represents the signal switching complexity of this lamp group in the current period. Taking the square root is used for non-linear compression to avoid excessive influence of high-frequency switching on the system. This item reflects the dynamic fluctuation characteristics of the control instructions, and overall forms a weighted time position value for each lamp group within one period. Subsequently, after performing the same operation on all lamp groups, the sum is calculated and averaged to form an average control center reference. Then, the weighted time value of the individual lamp group is subtracted from this average value, and the absolute value is taken to obtain the degree of deviation from the central behavior, reflecting the phase difference degree in time synchronization control. This method comprehensively considers three variables: the starting position of the control action, instruction delay, and switching times, and measures the time coordination of the behaviors of each lamp group under a unified time reference.

[0029] S213: Based on the lamp group phase control sequence, generate a standard format control protocol frame in cycle order, and fill in the control byte segments of the respective corresponding channels of the front lamp group, rear lamp group, left turn signal lamp group, and right turn signal lamp group one by one. Add a cycle identifier to all control information to establish a lamp group synchronization control protocol; Based on the lamp group phase control sequence, the system constructs the control frame in the output control module according to the offset values corresponding to each lamp group, and organizes the control commands of each lamp group in the current cycle using the CAN protocol frame structure. First, a channel control bitmap is generated according to the lamp group control sequence. For example, the left lamp group offset is 1.691 ms, and the set enabled segment in a 3.33 ms cycle is from 1.691 ms to 4.021 ms. The control byte is identified in binary as 11000000 and filled into the second byte of the frame. The corresponding channel number is read from the system configuration mapping table. The front lamp group corresponds to byte 1, the rear lamp group corresponds to byte 2, the left lamp group corresponds to byte 3, and the right lamp group corresponds to byte 4. The bitmaps of each byte are sequentially concatenated to form the control segment. At the same time, the cycle start number is written into the fifth byte of the frame, and the synchronization flag bit is set to 1 to indicate that the current is a synchronous control frame. Finally, it is encapsulated into a complete message by the frame splicer and broadcast to the in-vehicle bus system to establish the lamp group synchronization control protocol.

[0030] Please refer to Figure 4 , and the specific steps of S3 are as follows: S311: According to the lamp group synchronization control protocol, identify the numbers of the four-way lamp groups, extract the control identification fields corresponding to the front lamp, rear lamp, left lamp, and right lamp, read the pre-allocated LIN slave node addresses of each lamp group through the LIN bus protocol stack, and insert the four groups of codes into the control matrix position in column order to obtain the LIN node address allocation matrix; According to the lamp group synchronization control protocol, obtain the device identifications of the front lamp group, rear lamp group, left lamp group, and right lamp group, call the slave node configuration mapping table registered in the LIN network, and determine the 7-bit address code corresponding to each lamp group under the LIN2.0 protocol specification. This address code needs to be uniquely allocated within the range of 0 to 63. The valid addresses returned by the system through the configuration interface are 12 for the front lamp group, 29 for the rear lamp group, 18 for the left lamp group, and 22 for the right lamp group. Check whether each address is within the specification range and there is no duplicate conflict. Then construct the lamp group control matrix, and form one-to-one mapping entries according to the lamp group numbers and addresses. The system binds this structure to the cycle control reference time for subsequent cycle dimming allocation operations. At the same time, synchronously extract the LED duty cycle and extinguishing delay setting values for subsequent PWM control requirements. For example, the left lamp group is set to 70% and the extinguishing delay is 0.8 ms, and the right lamp group is 80% and the delay is 1.1 ms, forming the following data: Table 3 Example Table of LIN Address and LED Parameters

[0031] As shown in Table 3, the address allocation of the four-way lamp groups is completed, and the LED drive control parameters are synchronously bound. The system establishes the LIN node address allocation matrix.

[0032] S312: Identify the corresponding control group in each cycle according to the LIN node address allocation matrix, read the duty ratio setting value of the cycle control channel and the response characteristic duration of the LED light group, and use the formula: ; Calculate the duty ratio adjustment duration of the light group channel in the current cycle , and combine the adjustment duration with the cycle reference time to determine the actual control opening and closing time period of the LED light, and generate an LED dimming adjustment value set, where is the duty ratio percentage value of the channel, is the cycle time, is the turn-off delay time of the channel, is the number of signal fluctuations of other channels in the current cycle, is the total number of channels; Extract the duty ratio , cycle time , turn-off delay time of each light group according to the LIN node address allocation matrix, and combine the current cycle control index. The system adjusts the control opening duration of each light group in the current cycle according to the PWM cycle modulation mechanism, and defines this duration as the duty ratio adjustment duration , and its calculation needs to consider both the duty cycle time of this channel itself and the differential contribution of other channels.

[0033] Suppose the left light group in this cycle is , take , , , and the parameters of the other three light groups are the front light group , the rear light group , and the right light group , and substitute them into the formula for a specific example: The self-duty cycle term is: ; Calculate the difference term with other light groups: The difference term of the front light group: ; The difference term of the rear light group: ; The difference term of the right light group: ; The average value of the difference terms is: ; Substitute into the calculation: ; This value is the duty cycle adjustment duration that should be set for the left lamp group in the current cycle, and is used to generate the LED dimming adjustment value set in the subsequent cycle dimming control logic.

[0034] The duty cycle adjustment duration refers to the time length that the lamp group should actually maintain the powered-on state in the PWM control cycle of the LED lamp group, which is jointly determined by the duty cycle setting of the lamp group itself, the cycle time, the extinguishing delay, and the dimming difference with other lamp groups. This duration not only reflects the basic lighting time required by the lamp group in the current cycle, but also balances the duty cycle difference with other lamp groups, enabling the lamp group to maintain the original brightness output in coordinated control while avoiding obvious deviations from other lamp groups. At the same time, the response delay required during the extinguishing stage is also deducted to ensure that the control signal is consistent with the physical response process of the lamp group. Therefore, the duty cycle adjustment duration is a periodic control time reference obtained by integrating the three factors of dimming ratio, synchronization consistency, and response time.

[0035] The operation logic of the formula aims to comprehensively calculate the duty cycle adjustment duration required for the current lamp group channel in a certain cycle through multiple parameters. The first term in the formula represents the basic turn-on time corresponding to the lamp group g itself according to the duty cycle and the cycle time ; the summation part in the second term is used to measure the duty cycle behavior difference of this lamp group relative to other lamp groups in the current cycle, that is, all lamp groups are traversed, the difference between the turn-on duration of each group and the turn-on duration of the current lamp group is compared, and the absolute value is taken through operation to eliminate the direction influence. The denominator is the harmonic of the signal change frequency of each lamp group in this cycle, which is used to balance the influence of frequently switching lamp groups on the result and prevent the amplification of fluctuation interference; after summation, the average is taken by the number of channels to obtain the average influence of the duty cycle difference between this lamp group and all lamp groups; finally, the extinguishing delay time is subtracted from the overall result to ensure that the control duration can reflect the actual response characteristics and delay characteristics of the lamp group. This structure comprehensively considers the characteristics of the current lamp group itself and its deviation degree in the entire cycle control environment, so as to output a consistent control duration with coordination and practicality.

[0036] S313: Based on the LED dimming adjustment value set, match the duty cycle adjustment value under each lamp group channel with the LIN slave node address, construct the control command group packet content according to the time sequence, record the cycle number, target address, control instruction content and execution delay for each command, and establish a synchronous control instruction set; Based on the LED dimming adjustment value set, the system constructs the control command for the lamp group in each cycle in the output instruction module. First, it calls to match the current cycle number with the LIN address of the lamp group, and combines the duty cycle adjustment duration and the extinguishing delay value into the control instruction data field. For example, the content of the left lamp group control frame includes: cycle number 5, address 18, turn-on duration 45.096 ms, delay 0.8 ms, control bit identifier 0xA5. This control information is encapsulated in the standard LIN data frame format, using an 8-byte format. The first byte stores the cycle number, the second byte stores the LIN address, the third to sixth bytes correspond to the turn-on time, delay time, and status bit respectively, the seventh byte is the control byte, and the eighth byte is the check code. After generating the frame structure for each four-way lamp group one by one and merging them into a cycle control packet, it is synchronously injected into the time trigger and activated when the cycle drive module starts, completing the instruction set transmission process and establishing a synchronous control instruction set.

[0037] Please refer to Figure 5 , the specific steps of S4 are as follows: S411: Based on the synchronous control instruction set, obtain the instruction scheduling moment sequence scheduled by the LIN master node, record the sending time point of each instruction and the receiving time of the response message returned by the lamp group slave node, calculate the response delay value of each instruction, and obtain the response delay data set; Based on the synchronous control instruction set, the system records the time when all control instructions are issued in the LIN master node scheduling task as the scheduling reference time, and listens for the response data frames returned by the four-way lamp group slave node in the LIN bus receive buffer, marks the receiving time of each response frame, and forms the response delay from the difference between the scheduling time and the receiving time. Response delay sequences are established for the front lamp group, rear lamp group, left lamp group, and right lamp group respectively. The system pairs the response time of each lamp group in each cycle with the scheduling reference time to form a response delay detail list, records the data entries indexed by the cycle number, where each cycle's data includes the scheduling time and the response times of the four groups of lamps. For example, if the scheduling time in the first cycle is 105 ms and the response time of the front lamp group is 152 ms, the response delay is 47 ms, and the response time of the right lamp group is 158 ms, the response delay is 53 ms. The complete data is shown in Table 4: Table 4 Lamp Group Synchronous Response Data Table

[0038] As shown in Table 4, the difference between the response time of the four lamp groups and the scheduling time in each cycle is the response delay. All response delay data is summarized by cycle to construct a response record structure body, generating a response delay data set.

[0039] S412: Based on the response delay data set, use the cycle average time as the current cycle benchmark to judge the error difference between the response times of the four lamp groups and the mean value, and accumulate the absolute values of the errors cyclically to obtain the synchronous error count value; Based on the response delay data set, the system subtracts the scheduling reference time from the response time of each lamp group in each cycle to obtain the response delays of the four lamp groups, calculates the average value of the delay values in each cycle as the cycle reference response mean value, and compares the difference with the corresponding values of each lamp group to form a synchronous offset. The absolute values of the deviations between the delays of each lamp group and this mean value are respectively extracted and processed, and the accumulated sum of the synchronous errors in this cycle is obtained. For example, in cycle 1, the response delay of the front lamp group is 47 ms, the rear lamp group is 50 ms, the left lamp group is 48 ms, and the right lamp group is 53 ms. The average value is (47 + 50 + 48 + 53) / 4 = 49.5 ms. The deviations are 2.5 ms, 0.5 ms, 1.5 ms, and 3.5 ms respectively, and the cumulative deviation is 8 ms. The system records this value as the total synchronous deviation amount in the current cycle, and repeats the same operation for cycles 2 to 5. It judges whether there is a lamp group with a response deviation exceeding the tolerance baseline of 50 ms within the cycle. If so, it marks it, and at the same time records the cycle number and lamp group identifier where this abnormal data appears, adds up all the abnormal cumulative times and records the full-cycle offset performance of the synchronous system. Finally, the synchronous error count value is statistically obtained.

[0040] S413: Based on the synchronous error count value, conduct a comparative evaluation according to the tolerance standard of the allowable deviation for lamp synchronization, mark the abnormal state of channel synchronization, extract the corresponding cycle number, deviation value, and lamp group number of the abnormality, record the maximum response difference and the number of overlimit times for each lamp group respectively, and establish a synchronous state diagnosis report; Based on the synchronous error count value, the system compares the deviation marks of each lamp group within the range of 5 cycles with the tolerance strategy threshold. According to the upper tolerance value set by ISO2575 being 50 ms, it judges whether there is a record event where a lamp group has more than 3 synchronous offsets greater than 50 ms in 5 consecutive cycles. If this condition is met, the system marks the corresponding lamp group as an abnormal state in the synchronous control unit, and writes the maximum offset value, consecutive abnormal cycle numbers, and whether the alarm condition is met of this lamp group into the diagnosis structure. In cycles 3 to 5, if the response delays of the right lamp group are 56 ms, 58 ms, and 53 ms in sequence, all exceeding the fault tolerance threshold, the system marks the "right lamp group", records the maximum offset value as 58 ms, writes the cycle numbers as 3, 4, and 5 at the same time, and sets the alarm flag to 1. This record is encapsulated into a diagnostic dictionary structure, and the fields include lamp group ID, number of overlimit times, maximum deviation value, abnormal cycle number, and alarm status. All records are centrally stored in the diagnostic main table and written into the system output buffer to establish a synchronous state diagnosis report.

[0041] Please refer to Figure 6 , the specific steps of S5 are as follows: S511: Based on the synchronization status diagnosis report, extract the synchronization error count values and the out-of-tolerance flag bits of all lamp groups in the continuous cycle, compare them with the commercial vehicle synchronization error tolerance threshold, determine whether the abnormal frequency in the continuous cycle is within the allowable upper limit, mark the out-of-limit lamp group, and obtain the synchronization error judgment flag matrix; According to the synchronous status diagnostic report, the system extracts the maximum response deviation and the number of times the limit is exceeded for each lamp group cycle by cycle, and judges it item by item in combination with the 50ms tolerance benchmark set in the SAE J1939-73 standard. First, the lamp group number is extracted as the index item, and the corresponding maximum deviation field and the cumulative number of times the limit is exceeded in the cycle are read. Then the tolerance judgment module is called to judge each data. If the maximum deviation is not greater than 50ms and the number of times the limit is exceeded does not exceed 2 times, the status is judged to be "normal", otherwise it is "abnormal". For example, the maximum deviation of the front lamp group is 42ms, and the limit is exceeded once, the status is "normal". The maximum deviation of the right lamp group is 58ms, and it exceeds the limit for 3 consecutive times, and the status is judged to be "abnormal". The judgment result is written into the status flag matrix by field, and the reset request bit is constructed, which is subsequently used to call the hardware control device to issue a reset command. All data fields are listed in Table 5 as follows: Table 5 Synchronous error and reset control parameters

[0042] As shown in Table 5, the system has completed the flag matrix judgment and reset bit generation based on the error tolerance standard, and obtained the synchronization error judgment flag matrix.

[0043] S512: According to the synchronization error determination flag matrix, filter the light group addresses marked as out of limit, enter the hardware control interface channel, activate the reset instruction of the target node, read the reference control cycle, duty cycle template and initialization synchronization anchor time of each light group, rebuild the cycle alignment sequence from scratch, reset the PWM dimming parameters and control step number, and generate a timing synchronization reconstruction parameter set; According to the synchronization error judgment flag matrix, the system screens out the status of the rear light group and the right light group as "abnormal", and the corresponding "Reset" field is "yes". The system sends a reset command from the bus control scheduler. After receiving the reset command, the LIN slave node briefly loses power and completes the software and hardware initialization. The system detects whether the flag bit is cleared in the receiving module. If the reset is successful, the preset timing synchronization protocol template is immediately called. The template defines an initial cycle time of 10ms, a default duty cycle of 50%, and an LED duty delay of 0ms. The system writes the parameter into the PWM control table, regenerates the step timing index, and sets the node status code to "initialized". It synchronously enters the main control scheduling sequence, completes the recovery process of the cycle, duty cycle, anchor time, etc., and lists all the restored light group parameters in the synchronization table to establish a timing synchronization reconstruction parameter set.

[0044] S513: According to the timing synchronization reconstruction parameter set, combined with the current steering hold signal value, control the flashing rhythm and duty cycle setting of the front, rear, left, and right four groups of lights according to the unified dimming timing. The front light group and the rear light group adopt the main reference duty cycle. By adjusting the activation phase in the PWM cycle, the lighting states are unified to be consistent at the main control starting point of each cycle, outputting a stable control beat to establish a consistent display result for the four-way direction lights. According to the timing synchronization reconstruction parameter set, the system reads the "steering hold status" field of the light group in Table 14. When it is found that the recorded status of the left light group is "left turn", the left light group is set as the starting activation channel, and the phase arrangement control is performed on the remaining channels in sequence. The scheduling module writes the PWM point appearance phase of the left light group 5 ms earlier into the PWM register. The front light group and the rear light group are set as the main reference synchronization time of 0 ms, and the right light group is activated 5 ms later, forming a four-group phase control layout of 0 ms, -5 ms, 0 ms, and +5 ms. The system periodically writes this configuration into the LIN control packet under the control of the main clock signal, starts the full-channel refresh of the direction lights, and simultaneously synchronously collects the response times of each light group to verify whether they are all lit consistently within the same reference cycle. If the response deviation of each light group is ≤2 ms, the status flag "synchronization completed" is written, and this judgment value is synchronously stored in the control diagnosis buffer, finally generating a consistent display result for the four-way direction lights.

[0045] The above is only a preferred embodiment of the present invention and does not limit the present invention in other forms. Any person skilled in the art may use the disclosed technical content to make changes or modifications into equivalent embodiments with equivalent changes and apply them to other fields. However, as long as it does not depart from the technical solution content of the present invention, any simple modification, equivalent change, and modification made to the above embodiments based on the technical essence of the present invention still fall within the protection scope of the technical solution of the present invention.

Claims

1. A method for displaying four-way synchronous direction lights of a vehicle, characterized in that, The steps include the following: S1: Obtain the first steering signal of the steering lever after the vehicle is ignited, collect the digital level transitions in the steering signal, determine whether it changes from the neutral position to an effective steering state, set the synchronous reference time, and generate a timing synchronization anchor point; S2: Based on the timing synchronization anchor point, in combination with the preset control period, match the periodic timing control code with the current steering direction, set the phase control sequences for the front, rear, left, and right lamp groups, and generate a lamp group synchronization control protocol; S3: According to the lamp group synchronization control protocol, perform address coding allocation for the four-way lamp groups, write the LIN node addresses corresponding to the lamp groups into the lamp group control matrix, and control the LED duty cycle adjustment and extinction delay according to the current periodic timing code to generate a synchronization control instruction set; S4: Based on the synchronization control instruction set, detect and count the response delays of each lamp group through the LIN bus, calculate the value of the synchronization error counter, mark whether it exceeds the standard fault tolerance threshold, and generate a synchronization status diagnosis report; S5: According to the synchronization status diagnosis report, if the error is within the standard allowable range, continue with the timing control; if it exceeds the limit, send a reset signal and initialize the timing synchronization protocol, execute the dynamic direction lamp refresh, and generate a consistent display result for the four-way direction lamps.

2. The vehicle four-way synchronous turn signal display method according to claim 1, wherein The timing synchronization anchor point includes a reference timestamp, a synchronization signal marker, and an anchor point identification code. The lamp group synchronization control protocol includes phase setting parameters, a periodic control code, and a direction matching matrix. The synchronization control instruction set includes an address mapping table, a duty cycle adjustment factor, and an extinction delay configuration. The synchronization status diagnosis report includes a synchronization error count value, a fault tolerance marker status, and a response delay statistics table. The consistent display result for the four-way direction lamps includes a dynamic refresh effect and a synchronous display status of the four-way synchronous direction lamps.

3. The vehicle four-way synchronous turn signal display method according to claim 1, wherein The specific steps for obtaining the timing synchronization anchor point are as follows: S111: Obtain the first steering signal of the steering lever after the vehicle is ignited, collect the digital level transition data in the CAN bus steering signal, determine whether the digital level in a continuous time period changes from the neutral level stable state to the left or right steering level, filter the time point of the first occurrence of the transition, obtain the corresponding CAN bus standard frame timestamp, and generate a steering signal transition timestamp; S112: According to the steering signal transition timestamp, detect whether the timestamp is within the allowed time window after the vehicle ignition signal is activated, obtain the CAN bus network synchronization beat record from the ignition moment to the current time period, analyze the corresponding position of the transition timestamp in the beat record, calculate the synchronization period change amount and the period fitting residual of the transition time point in the beat record, and generate a synchronization beat fitting difference amount; S113: According to the synchronization beat fitting difference amount, filter the time points where the time difference is within the network synchronization reference threshold range, combine the matching degree of the transition timestamp and the beat sequence, extract the anchor point index from the minimum value of the difference amount trend, count the corresponding network timestamp, and perform conversion coding based on the standard network time format to establish a timing synchronization anchor point.

4. The vehicle four-way synchronous direction indicator display method according to claim 1, characterized in that, The specific steps for obtaining the lamp group synchronization control protocol are as follows: S211: Based on the timing synchronization anchor points, obtain the vehicle PWM control cycle sequence, extract the cycle values, collect the duty cycle control sequences corresponding to each frequency value, align the synchronization anchor point time reference to the starting position of the current cycle, and perform corresponding calibration with the cycle frequency to generate a set of synchronization cycle starting times; S212: According to the set of synchronization cycle starting times, collect the preset timing control codes within each PWM cycle, perform matching verification on each control code sequence with the current steering direction field of the steering lever, calculate the phase offset of each lamp group channel, perform time axis correction based on the offset and the current cycle starting position, and establish a lamp group phase control sequence; S213: Based on the lamp group phase control sequence, generate control protocol frames in standard format in cycle order, fill in the control byte fields of the respective channels of the front lamp group, rear lamp group, left turn signal lamp group, and right turn signal lamp group one by one, attach cycle identifiers to all control information, and establish a lamp group synchronization control protocol.

5. The vehicle four-way synchronous turn signal display method according to claim 1, characterized in that The specific steps for obtaining the synchronization control instruction set are as follows: S311: According to the lamp group synchronization control protocol, identify the numbers of the four-way lamp groups, extract the control identifier fields corresponding to the front lamp, rear lamp, left lamp, and right lamp, read the pre-allocated LIN slave node addresses of each lamp group through the LIN bus protocol stack, insert the four groups of codes into the control matrix positions in column order, and obtain the LIN node address allocation matrix; S312: According to the LIN node address allocation matrix, identify the corresponding control groups within each cycle, read the duty cycle setting values of the cycle control channels and the response characteristic time lengths of the LED lamp groups, calculate the duty cycle adjustment time lengths of the lamp group channels within the current cycle, combine the adjustment time lengths with the cycle reference time, determine the actual control on-off time periods of the LEDs, and generate a set of LED dimming adjustment values; S313: Based on the set of LED dimming adjustment values, match the duty cycle adjustment values under each lamp group channel with the LIN slave node addresses correspondingly, construct the content of the control command group packet in time series, record the cycle number, target address, control instruction content, and execution delay for each command, and establish a synchronization control instruction set.

6. The vehicle four-way synchronous direction indicator display method according to claim 1, characterized in that The specific steps for obtaining the synchronization status diagnosis report are as follows: S411: Based on the synchronization control instruction set, obtain the sequence of instruction scheduling times after the LIN master node scheduling, record the sending time points of each instruction and the receiving times of the response messages returned by the lamp group slave nodes, calculate the response delay values of each instruction, and obtain a response delay data set; S412: According to the response delay data set, use the cycle average time as the current cycle reference, judge the error difference between the response times of the four lamp groups and the mean value, and accumulate the absolute values of the errors over the cycle to obtain a synchronization error count value; S413: Based on the synchronization error count value, perform comparative evaluation according to the lighting synchronization allowable deviation tolerance standard, mark the abnormal status of channel synchronization, extract the corresponding cycle numbers, deviation values, and lamp group numbers of the abnormalities, record the maximum response difference and the number of overlimit times for each lamp group respectively, and establish a synchronization status diagnosis report.

7. The vehicle four-way synchronous direction indicator display method according to claim 1, wherein The specific steps for obtaining the consistent display result of the four-way walking lights are as follows: S511: Based on the synchronous status diagnostic report, extract the synchronous error count values and out-of-tolerance flag bits of all lamp groups within consecutive cycles, compare with the synchronous error tolerance threshold of commercial vehicles, determine whether the abnormal frequency within consecutive cycles is within the allowable upper limit, mark the over-limit lamp groups, and obtain the synchronous error determination flag matrix; S512: According to the synchronous error determination flag matrix, filter the lamp group addresses marked as over-limit, enter the hardware control interface channel, activate the reset instruction of the target node, read the reference control period, duty cycle template, and initialization synchronous anchor time of each lamp group, reconstruct the cycle alignment sequence from scratch, reset the PWM dimming parameters and control step numbers, and generate the timing synchronization reconstruction parameter set; S513: According to the timing synchronization reconstruction parameter set, combined with the current steering hold signal value, control the flashing rhythm and duty cycle setting of the front, rear, left, and right four groups of lamps according to the unified dimming timing. The front lamp group and the rear lamp group adopt the main reference duty cycle. By adjusting the activation phase in the PWM cycle, the lighting states are unified to be consistent at the main control starting point of each cycle, output a stable control beat, and establish a consistent display result for the four-way lamps.

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