IGBT (Insulated Gate Bipolar Translator) chip integrated with diamond heat dissipation layer and preparation method thereof

Abstract

The invention belongs to the field of semiconductor chip heat dissipation, and particularly discloses an IGBT chip integrated with a diamond heat dissipation layer and a preparation method of the IGBT chip. According to the invention, the high-thermal-conductivity material diamond is directly embedded into the collector metal, the diamond heat dissipation layer is closer to the chip, the heat transfer path is shorter, and the heat dissipation efficiency of the chip is further improved; according to the invention, the diamond heat dissipation layer and the IGBT chip collector metal are tightly combined, so that the total thermal resistance is reduced; because the heat dissipation path is short and the thermal resistance is low, the transient response is fast. The invention further provides a layout mode of the diamond heat dissipation layer, the heat dissipation uniformity is ensured, and meanwhile the preparation difficulty is reduced. In the aspect of the preparation process, the preparation method is realized through high-temperature deposition, laser processing embedding or low-temperature bonding, so that tight combination of the diamond heat dissipation layer and the IGBT chip is ensured, the interface thermal resistance is reduced, and the heat transfer efficiency is improved.

Description

Technical Field

[0001] This application belongs to the technical field of semiconductor chip heat dissipation, and more specifically, relates to an IGBT chip integrated with a diamond heat dissipation layer and a preparation method thereof. Background Art

[0002] Since the early 1980s, the insulated gate bipolar transistor (IGBT) has been invented and put into use, which has quickly attracted extensive research. With the development of the manufacturing industry, this technology has promoted the rapid progress of power electronics technology. The IGBT is composed of a metal-oxide-semiconductor field-effect transistor (MOSFET) and a bipolar junction transistor (BJT), and has the advantages of easy driving and fast switching speed of the MOSFET, as well as the advantages of small on-state voltage drop and large current-carrying capacity of the BJT. It is a composite fully-controlled voltage-driven power semiconductor device. With its excellent characteristics, the IGBT has gradually gained market recognition and has been widely used in many fields such as new energy vehicles and intelligent power transmission, making important contributions to improving power management efficiency and energy utilization rate. It is the core device for realizing the switching of power transmission, the conversion and control of electric energy, and is the heart of the power electronics industry.

[0003] When the IGBT works under extreme conditions of high voltage and large current for a long time, with its high power density and fast switching frequency, a large amount of heat will be generated during operation. Since there are conduction resistance and switching losses when the current flows through the IGBT device, these energies will ultimately accumulate in the IGBT chip in the form of heat. If the heat cannot be effectively dissipated, the junction temperature of the IGBT will continue to rise, thus triggering a series of serious problems. High temperature will cause the conduction resistance of the IGBT to increase and the switching losses to rise, leading to thermal runaway or latch-up effect, and permanently damaging the device in severe cases. At the same time, temperature fluctuations will accelerate material aging due to thermal stress, such as cracking of the solder layer or detachment of the bonding points in the IGBT module, significantly shortening the device life. Research shows that for every 10 °C increase in the chip junction temperature, the life of the IGBT may decrease by more than 50%, which is particularly crucial in high-power applications. In high-power application scenarios such as new energy power generation (such as photovoltaic inverters, wind power converters), electric drive systems for electric vehicles, and industrial frequency converters, the heat dissipation ability of the IGBT device directly affects the stability and safety of the entire system. If the heat dissipation ability is insufficient, local overheating may cause the chip to burn out and even trigger system-level failures. Therefore, efficient heat dissipation management is one of the core technologies to ensure the long-term reliable operation of the IGBT. In the design and application of the IGBT module, heat dissipation management must be highly emphasized. By comprehensively optimizing the chip structure, materials, and cooling strategies, efficient heat dissipation can be achieved, thereby improving the overall performance of the system and extending the service life.

[0004] Existing IGBT chip heat dissipation solutions transfer the heat of the chip to a metal radiator (such as aluminum or copper) through a high-thermal-conductivity substrate, and then dissipate heat through natural convection or forced air cooling. By preparing a diamond-like carbon composite film (DLC) on the surface of the copper substrate, the thermal conductivity of the substrate can be improved, and thus the heat dissipation performance can be enhanced. This composite film consists of a metal base layer (chromium, titanium, or aluminum), a metal carbide gradient transition layer, and a nitrogen-silver co-doped diamond-like carbon film layer, and is prepared by DC sputtering and RF sputtering technologies. This structural design improves the bonding force between the diamond-like carbon film and the metal base layer, can significantly enhance the heat conduction efficiency of the copper substrate, thereby effectively reducing the temperature of the IGBT chip and improving the performance and reliability of the entire IGBT module.

[0005] However, the existing technologies have the following defects and deficiencies: First, IGBT chips usually use DBC ceramic substrates or other materials to connect with the radiator, with low heat dissipation efficiency and difficult to meet the requirements of high-power density application scenarios; Second, the interfacial thermal resistance between the heat dissipation layer and the chip is large, resulting in low heat transfer efficiency and affecting the chip performance; Third, in high-power and high-frequency application scenarios of IGBT chips, due to the long heat dissipation path and high thermal resistance, heat cannot be quickly conducted to the radiator, causing the temperature of the IGBT chip to rise rapidly during the transient process, with a lag in the response speed, affecting the performance and reliability of the device. Summary of the Invention

[0006] Aiming at the defects of the existing technology, the purpose of this application is to provide an IGBT chip integrated with a diamond heat dissipation layer and a preparation method thereof, aiming to solve the problems of low heat dissipation efficiency, high thermal resistance, and slow transient response of traditional IGBT chips.

[0007] To achieve the above object, in the first aspect, this application provides an IGBT chip integrated with a diamond heat dissipation layer, where the diamond heat dissipation layer is embedded in the collector metal of the IGBT chip, and the two have equal thicknesses.

[0008] Preferably, the thickness of the diamond heat dissipation layer ranges from [100μm, 200μm], and both the length and width are in the order of mm.

[0009] Preferably, after the diamond heat dissipation layer is embedded in the collector metal, the whole forms a symmetric structure.

[0010] Preferably, the diamond heat dissipation layer and the collector metal are nested with each other or distributed at intervals.

[0011] Preferably, the middle position of the symmetric structure is the diamond heat dissipation layer.

[0012] Preferably, in the case of mutual nesting, the cross-sections of the diamond heat dissipation layer and the collector metal are geometrically similar.

[0013] Preferably, the embedding is achieved by high-temperature deposition, laser processing and inlaying, or low-temperature bonding.

[0014] To achieve the above object, in the second aspect, this application provides a preparation method of an IGBT chip integrated with a diamond heat dissipation layer as described in the first aspect, including: S1. Substrate preparation: Grow a single-crystal silicon rod by the Czochralski method or the zone melting method, cut the single-crystal silicon rod into thin wafers, and make the surface flat by chemical mechanical polishing technology; S2. Front process: Form an N+ emitter region, a P-Well region, and an N-drift region of the IGBT chip on the surface of the silicon wafer by ion implantation, and fabricate a trench gate; S3. Back process: Thin the back of the wafer to reduce the chip thickness, and form an N-FS field stop region and a P+ collector region by ion implantation; S4. Front metallization treatment: Deposit tungsten on the front of the IGBT chip, and then electroless plate a metal with a melting point above 1000°C as the emitter; S5. Wafer dicing: Cut the wafer into individual IGBT chips; S6. Diamond growth: Grow a diamond heat dissipation layer on the back of the IGBT chip by using microwave plasma chemical vapor deposition technology under the condition of 900~1100°C; S7. Laser cutting of diamond: Use laser to process the diamond heat dissipation layer, cut out the positions for subsequent deposition of collector metal, and ensure that its size matches the chip. S8. Backside metallization: Deposit metal on the surface of the diamond heat dissipation layer to form the collector.

[0015] To achieve the above object, in a third aspect, the present application provides a method for preparing an IGBT chip integrated with a diamond heat dissipation layer as described in the first aspect, including: Step 1. Substrate preparation: Grow a single crystal silicon rod by the Czochralski method or the zone melting method, cut the single crystal silicon rod into thin wafers, and make the surface flat by chemical mechanical polishing technology. Step 2. Front process: Form the N+ emitter region, P-Well region, and N-drift region of the IGBT chip on the silicon wafer surface by ion implantation, fabricate trench gates, and deposit a metal layer to form the emitter. Step 3. Back process: Thin the backside of the wafer to reduce the chip thickness, ion implant to form the N-FS field stop region and P+ collector region, and deposit metal on the backside to form the collector. Step 4. Wafer dicing: Cut the wafer into individual IGBT chips. Step 5. Laser processing of collector metal: Use laser processing technology to further process the collector metal layer on the backside, precisely remove the excess metal, and form the positions for subsequent inlaying of diamond. Step 6. Inlaying diamond: Grind and polish the grown diamond thin film, cut it into corresponding sizes, inlay it into the collector metal, and tightly bond it with structural adhesive on the side.

[0016] To achieve the above object, in a fourth aspect, the present application provides a method for preparing an IGBT chip integrated with a diamond heat dissipation layer as described in the first aspect, including: Step 1. Substrate preparation: Grow a single crystal silicon rod by the Czochralski method or the zone melting method, cut the single crystal silicon rod into thin wafers, and make the surface flat by chemical mechanical polishing technology. Step 2. Front process: Form the N+ emitter region, P-Well region, and N-drift region of the IGBT chip on the silicon wafer surface by ion implantation, fabricate trench gates, and deposit a metal layer to form the emitter. Step 3. Back process: Thin the backside of the wafer to reduce the chip thickness, ion implant to form the N-FS field stop region and P+ collector region. Step 4. Wafer dicing: Cut the wafer into individual IGBT chips. Step 5. Bonding the diamond: Clean and activate the back surface of the IGBT chip and the surface of the diamond heat dissipation layer respectively to ensure the surface is clean and has good bonding activity. Use eutectic bonding or low-temperature polymer bonding to tightly bond the diamond heat dissipation layer to the back surface of the IGBT chip, and anneal the bonded chip. Step 6. Backside metallization: Deposit metal on the surface of the diamond heat dissipation layer to form the collector.

[0017] Generally speaking, compared with the prior art, the above technical solutions conceived by this application have the following beneficial effects: (1) This application provides an IGBT chip integrated with a diamond heat dissipation layer. Compared with the prior art of preparing a diamond-like composite film (DLC) on the surface of a copper substrate to improve the thermal conductivity of the substrate, in this application, the high-thermal-conductivity material diamond is directly embedded in the collector metal and then connected to the copper substrate through a conductive solder. The diamond heat dissipation layer is closer to the chip, and the heat transfer path is shorter, further improving the chip heat dissipation efficiency; since the diamond heat dissipation layer and the IGBT chip collector metal are tightly combined in this application, the total thermal resistance is reduced; due to the short heat dissipation path and low thermal resistance, the transient response is fast. In the layout method of the diamond heat dissipation layer, this application proposes various schemes, including strip block distribution, central distribution, etc., to ensure heat dissipation uniformity and reduce the preparation difficulty at the same time.

[0018] (2) This application provides a preparation method for an IGBT chip integrated with a diamond heat dissipation layer, and proposes various preparation processes, including high-temperature deposition, laser processing and inlaying, low-temperature bonding and other technologies, to ensure the tight combination of the diamond heat dissipation layer and the IGBT chip, reduce the interfacial thermal resistance, and improve the heat transfer efficiency. The closer the diamond heat dissipation layer is combined with the IGBT chip, the better the heat dissipation effect. Description of the Drawings

[0019] Figure 1 is a schematic structural diagram of an IGBT chip integrated with a diamond heat dissipation layer provided by an embodiment of this application.

[0020] Figure 2 is a schematic diagram of a half-cell of an IGBT chip without a diamond structure and with a diamond heat dissipation layer structure provided by an embodiment of this application.

[0021] Figure 3 is a simulation maximum temperature curve graph of an IGBT chip without a diamond structure and with a diamond heat dissipation layer structure provided by an embodiment of this application.

[0022] Figure 4 is a top view of a diamond structure provided by an embodiment of this application.

[0023] Figure 5It is the second top view of the diamond structure provided by the embodiment of the present application.

[0024] Figure 6 It is the simulated temperature distribution diagram of the IGBT chip without diamond structure provided by the embodiment of the present application.

[0025] Figure 7 It is the simulated temperature distribution diagram of the IGBT chip with diamond structure I provided by the embodiment of the present application.

[0026] Figure 8 It is the simulated temperature distribution diagram of the IGBT chip with diamond structure II provided by the embodiment of the present application.

[0027] Figure 9 It is the second top view of the spaced distribution structure provided by the embodiment of the present application.

[0028] Figure 10 It is the third top view of the spaced distribution structure provided by the embodiment of the present application.

[0029] Figure 11 It is the second top view of the mutually nested structure provided by the embodiment of the present application.

[0030] Figure 12 It is the third top view of the mutually nested structure provided by the embodiment of the present application.

[0031] Figure 13 It is the top view of other diamond structures provided by the embodiment of the present application.

[0032] In all the drawings, the same reference numerals are used to represent the same elements or structures, where: 1 is the diamond heat dissipation layer, 2 is the collector metal, 3 is the P+ collector region, 4 is the N-FS field stop region, 5 is the N-drift drift region, 6 is the trench gate, 7 is the oxide layer, 8 is the BPSG layer, 9 is the P-Well region, 10 is the N+ emitter region, and 11 is the emitter metal. Detailed implementation manners

[0033] In order to make the objectives, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0034] For the convenience of understanding, the following first explains and describes the English abbreviations and related technical terms involved in the embodiments of the present application.

[0035] In the IGBT chip, the emitter side is called the front side, and the collector side is called the back side.

[0036] The following describes the embodiments of the present application with reference to the drawings in the embodiments of the present application.

[0037] This application provides an IGBT chip integrated with a diamond heat dissipation layer. The diamond heat dissipation layer is embedded in the collector metal of the IGBT chip, and the two have the same thickness.

[0038] Preferably, the thickness of the diamond heat dissipation layer ranges from [100 μm, 200 μm], and both the length and width are on the order of millimeters.

[0039] It should be noted that in this application, the above dimensions are preferred. The diamond heat dissipation layer and the collector metal have the same thickness. Since the thermal conductivity of diamond is higher than that of the collector metal, on the premise that the total thickness remains unchanged, the thicker the diamond layer, the smaller the thermal resistance of the entire heat dissipation layer.

[0040] Preferably, after the diamond heat dissipation layer is embedded in the collector metal, the whole forms a symmetric structure.

[0041] It should be noted that the symmetric structure can further ensure the heat dissipation uniformity and reduce the manufacturing difficulty at the same time.

[0042] Preferably, the diamond heat dissipation layer and the collector metal are nested with each other or distributed at intervals.

[0043] It should be noted that in this application, the above nesting method is preferred. Since the heat dissipation path and the contact area are increased, the heat dissipation efficiency is further improved.

[0044] Preferably, the middle position of the symmetric structure is the diamond heat dissipation layer.

[0045] It should be noted that the temperature in the middle position of the chip is higher. Setting the diamond heat dissipation layer in the middle position can further improve the heat dissipation effect.

[0046] Preferably, in the case of mutual nesting, the cross-sections of the diamond heat dissipation layer and the collector metal are geometrically similar.

[0047] It should be noted that when the cross-sections are geometrically similar, the heat dissipation paths from the diamond heat dissipation layer to the collector metal are equidistant, and the heat dissipation is more uniform.

[0048] Preferably, the embedding is achieved by high-temperature deposition, laser processing and inlaying, or low-temperature bonding.

[0049] It should be noted that in this application, the above embedding processes are preferred. The three processes ensure the tight combination of the diamond heat dissipation layer and the IGBT chip through chemical bond force, the adhesive force and cohesive force of structural glue, and chemical bond force respectively, reduce the interfacial thermal resistance, and improve the heat conduction efficiency.

[0050] Example 1 The IGBT chip in this embodiment is a trench-type IGBT chip, and this application is also applicable to other types of IGBT chips. The emitter metal is commonly aluminum, or it can be copper or the like. The collector metal can be aluminum or a multi-layer metal film, such as Al-Ti-Ni-Ag or Ti-Ni-Ag.

[0051] As Figure 1 shown, this embodiment proposes an IGBT chip integrated with a diamond heat dissipation layer, including: a diamond heat dissipation layer 1, a collector metal 2, a P+ collector region 3, an N-FS field stop region 4, an N-drift region 5, a trench gate 6, an oxide layer 7, a BPSG layer 8, a P-Well region 9, an N+ emitter region 10, and an emitter metal 11; wherein, the diamond heat dissipation layer 1 is embedded in the collector metal 2, and the two have equal thicknesses to form a symmetric structure; the symmetric structure, the P+ collector region 3, the N-FS field stop region 4, and the N-drift region 5 are arranged in sequence from bottom to top, and the left and right end faces are flush; the trench gate 6 is composed of a cuboid and a cuboid with a chamfer on the lower side, and its longitudinal section is T-shaped; the BPSG layer 8 wraps the cuboid (upper) in the trench gate 6; the oxide layer 7 wraps the cuboid with a chamfer on the lower side (lower) in the trench gate 6; the left and right end faces of the BPSG layer 8 and the oxide layer 7 are flush to form a second structure with a T-shaped longitudinal section; the N+ emitter regions 10 are symmetrically distributed on both sides under the armpits of the second structure and are in surface contact with the oxide layer 7, the emitter metal 11, and the surface of the P-Well region 9; the P-Well regions 9 are symmetrically located on both side parts of the surface of the N-drift region 5; the lower part of the second structure passes through the P-Well region 9 and enters the N-drift region 5; the emitter metal 11 is located at the top layer and is in surface contact with the P-Well region 9, the N+ emitter region 10, and the BPSG layer 8. The structure of the above trench-type IGBT chip is only schematic, and this application is also applicable to other structures.

[0052] Next, the schematic diagrams of half cells of IGBT chips with and without a diamond heat dissipation layer are given respectively to compare their heat dissipation performances.

[0053] As Figure 2 shown in (a) of Figure 2 is the schematic diagram of a half cell of an IGBT chip without a diamond heat dissipation layer, that is, structure ①,

[0054] As Figure 3As shown, when the same magnitude of current flows through both ends of the IGBT collector - emitter, after the highest temperature in the two - structure IGBT chips rises and reaches a steady state, the rising speed of Structure ① is faster than that of Structure ②. After reaching the steady state, the maximum temperature in the IGBT chip of Structure ① is 114.567 °C, and the maximum temperature in the IGBT chip of Structure ② is 95.822 °C. It can be seen that the diamond heat - dissipation layer significantly reduces the rising speed of the chip temperature and decreases the chip temperature.

[0055] Next, a schematic structure of spaced - apart distribution and mutual nesting is given respectively, and its heat - dissipation performance is compared with that of the structure without a diamond heat - dissipation layer.

[0056] As Figure 4 shown, the diamond heat - dissipation layer is distributed in blocks. Specifically, the diamond heat - dissipation layer and the collector metal are rectangles with equal thickness and length, and the diamond heat - dissipation layer and the collector metal are arranged alternately.

[0057] The lower surface of the symmetric structure is connected to the substrate through conductive solder to form an IGBT module. At this time, the conductive solder makes an electrical connection between the collector metals. Since diamond has an extremely high thermal conductivity, it can quickly conduct heat from the inside of the IGBT chip to the outside, thereby effectively reducing the temperature of the IGBT chip during operation.

[0058] Preferably, the thickness of the diamond heat - dissipation layer satisfies 100 μm ≤ Hight ≤ 200 μm.

[0059] Preferably, the width of a single diamond block in the diamond heat - dissipation layer satisfies 1 mm ≤ Width ≤ 4 mm.

[0060] As Figure 5 shown, the diamond heat - dissipation layer is in a nested structure. Specifically, the diamond heat - dissipation layer is surrounded by the collector metal. Since diamond has an extremely high thermal conductivity, it can quickly conduct heat from the inside of the IGBT chip to the outside, thereby effectively reducing the temperature of the device during operation.

[0061] Preferably, the thickness of the diamond heat - dissipation layer satisfies 100 μm ≤ Hight ≤ 200 μm.

[0062] Preferably, the diamond heat - dissipation layer is a cuboid, a cube, a cylinder or a hexagonal prism.

[0063] Preferably, when the diamond heat - dissipation layer is a cuboid or a cube, the value range of both the length and the width is 5 mm ≤ Length ≤ 10 mm.

[0064] Compare Figure 6 and Figure 7Findings: For the structure without a diamond heat dissipation layer and the structure with diamonds distributed in blocks, when the chip heating power and heat dissipation conditions are the same, the highest temperature inside the former chip reaches 576.97 K, while that of the latter is 562.28 K. When the diamonds are distributed in blocks, compared with the structure without diamonds, the chip temperature is reduced by 14.69 °C, and the heat dissipation effect is somewhat improved.

[0065] Comparison Figure 6 and Figure 8 Findings: For the structure without a diamond heat dissipation layer and the structure with diamonds in a nested structure, when the chip heating power and heat dissipation conditions are the same, the highest temperature inside the former chip reaches 576.97 K, while that of the latter is 520.5 K. When the diamonds are in a nested structure, compared with the structure without diamonds, the chip temperature is reduced by 56.47 °C, and the heat dissipation effect is significantly improved.

[0066] Comparison Figure 7 and Figure 8 Findings: For the structure with diamonds distributed in strip blocks and the structure with diamonds in a nested structure, when the chip heating power and heat dissipation conditions are the same, the highest temperature inside the former chip reaches 562.28 K, while that of the latter is 520.5 K. On the premise that the diamond area and thickness are the same, the chip temperature of the structure with diamonds in a nested structure is lower and the heat dissipation effect is better.

[0067] The spaced distribution structure can also be replaced with other structures, including but not limited to as Figure 9 , Figure 10 shown. The number of diamond blocks can be 1 or more.

[0068] Such as Figure 9 shown, the number of diamond blocks is 2, spaced from the collector metal, with equal width and length.

[0069] Such as Figure 10 shown, the number of diamond blocks is 3, the width of the diamond block in the middle position is greater than that of the diamonds on both sides, spaced from the collector metal, with equal length.

[0070] The mutually nested structure can also be replaced with other structures, including but not limited to as Figure 11 , Figure 12 shown. The number of nested layers can be 2 or more.

[0071] Such as Figure 11 shown, the diamond is a cylinder, with a quantity of 1, and is located in the middle of the inlay.

[0072] Such as Figure 12 shown, the number of nested layers is 3, in the order of diamond - collector metal - diamond, and the cross-sections of the three are geometrically similar.

[0073] Some simple deformations of these structures, as long as they are symmetric, also fall within the protection scope of this application. For example, Figure 13 As shown, the collector metal is a cuboid, and the diamond is nested in the collector metal.

[0074] Example 2 This embodiment provides a preparation method of an IGBT chip integrated with a diamond heat dissipation layer. The diamond film is grown on a silicon substrate by processes such as microwave plasma chemical vapor deposition (MPCVD). The temperature is 900 - 1100°C, the pressure is 10 - 250 Torr, and the microwave power is 0.6 - 6 kW. And the diamond is processed by laser etching technology. The temperature is about 1000°C, the laser power is dozens to hundreds of W, and the cutting speed is dozens to hundreds of mm / s. The bonding process between the diamond heat dissipation layer and the IGBT chip is improved, further reducing the interface thermal resistance, improving the heat conduction efficiency, and enhancing the heat dissipation effect of the chip.

[0075] 1. Substrate preparation: A high-purity single-crystal silicon rod is grown by the Czochralski method or the zone melting method. The single-crystal silicon rod is cut into thin wafers, and then the surface is flattened by chemical mechanical polishing (CMP) technology. A high-quality silicon wafer is selected as the base material for the IGBT chip.

[0076] 2. Front process: The N+ emitter region, P-Well region, and N-drift region of the IGBT chip are formed on the surface of the silicon wafer by ion implantation, and a trench gate is fabricated.

[0077] 3. Back process: The back of the wafer is thinned to reduce the chip thickness, and the N-FS field stop region and P+ collector region are formed by ion implantation.

[0078] 4. Front metallization: Tungsten is deposited on the front of the IGBT chip, and then a metal with a melting point above 1000°C, such as copper, is electroless plated as the emitter to prevent the front metal from melting during the subsequent high-temperature deposition of diamond.

[0079] 5. Wafer dicing: The wafer is diced into individual chips using high-precision dicing equipment. During the dicing process, it is necessary to ensure the cleanliness of the wafer surface, and it is confirmed by optical inspection that the diced chips have no cracks or corners missing.

[0080] 6. Diamond growth: Under the condition of 900 - 1100°C, the diamond heat dissipation layer is grown on the back of the IGBT chip by microwave plasma chemical vapor deposition (MPCVD) technology. The diamond layer should be tightly bonded to the chip surface to improve the heat dissipation efficiency.

[0081] 7. Laser cutting of diamond: The diamond heat dissipation layer is processed by laser to cut out the position for subsequent deposition of the collector metal, ensuring that its size matches the chip.

[0082] 8. Back metallization: Deposit metal on the surface of the diamond heat dissipation layer to form the collector, and repair the implantation damage through the laser annealing process.

[0083] Example 3 This embodiment provides a method for fabricating an IGBT chip integrated with a diamond heat dissipation layer, mainly processing the collector metal layer on the back through laser processing technology to precisely remove the excess metal and form the position for subsequent diamond inlay. Then, grind and polish the grown diamond thin film, cut it into corresponding sizes, inlay it into the collector metal, and tightly bond it on the side with structural adhesive.

[0084] 1. Substrate preparation: Grow high-purity single-crystal silicon rods by the Czochralski method or the zone melting method. Cut the single-crystal silicon rods into thin wafers, and then make the surface flat through chemical mechanical polishing (CMP) technology. Select high-quality silicon wafers as the base materials for IGBT chips.

[0085] 2. Front process: Form the N+ emitter region, P-Well region, and N-drift region of the IGBT chip on the surface of the silicon wafer by ion implantation, fabricate structures such as trench gates, and deposit a metal layer to form the emitter.

[0086] 3. Back process: Thinning the back of the wafer to reduce the chip thickness, ion implantation to form the N-FS field stop region and P+ collector region, and deposit metal on the back to form the collector.

[0087] 4. Wafer dicing: Use high-precision dicing equipment to cut the wafer into individual chips. During the dicing process, ensure the cleanliness of the wafer surface, and confirm through optical inspection that the diced chips have no cracks or missing corners.

[0088] 5. Laser processing of the collector metal: Use laser processing technology to further process the collector metal layer on the back to precisely remove the excess metal and form the position for subsequent diamond inlay. The surface of the collector metal layer after laser processing should be flat and undamaged.

[0089] 6. Diamond inlay: Grind and polish the grown diamond thin film, cut it into corresponding sizes, inlay it into the collector metal, and tightly bond it on the side with structural adhesive to ensure the heat conduction efficiency.

[0090] Example 4 This embodiment provides a method for fabricating an IGBT chip integrated with a diamond heat dissipation layer. The diamond heat dissipation layer is mainly tightly bonded to the back of the IGBT chip through low-temperature bonding techniques (such as eutectic bonding or low-temperature polymer bonding). The bonding is carried out in a high-vacuum environment. During the process, the temperature needs to be controlled at 200 - 300 °C and the pressure is about 4.4 MPa to ensure the bonding strength and thermal conductivity. The bonded chip is annealed at a temperature of 200 - 400 °C to further enhance the bonding strength and reduce interface defects.

[0091] 1. Substrate preparation: Grow a high-purity single-crystalline silicon rod by the Czochralski method or the zone melting method. Cut the single-crystalline silicon rod into thin wafers, and then make the surface flat through chemical mechanical polishing (CMP) technology. Select high-quality silicon wafers as the base material for IGBT chips.

[0092] 2. Front-side process: Form the N+ emitter region, P-Well region, and N-drift region of the IGBT chip on the surface of the silicon wafer by ion implantation, fabricate structures such as trench gates, and deposit a metal layer to form the emitter.

[0093] 3. Back-side process: Thin the back side of the wafer to reduce the chip thickness, and form the N-FS field stop region and P+ collector region by ion implantation.

[0094] 4. Wafer dicing: Use high-precision dicing equipment to dice the wafer into individual chips. During the dicing process, it is necessary to ensure the cleanliness of the wafer surface, and confirm through optical inspection that the diced chips have no cracks or corners missing.

[0095] 5. Bonding diamond: Clean and activate the back of the IGBT chip and the surface of the diamond heat dissipation layer respectively to ensure that the surface is clean and has good bonding activity. Use low-temperature bonding techniques (such as eutectic bonding or low-temperature polymer bonding) to tightly bond the diamond heat dissipation layer to the back of the IGBT chip. The temperature and pressure need to be controlled during the bonding process to ensure the bonding strength and thermal conductivity. The bonded chip is annealed to further enhance the bonding strength and reduce interface defects.

[0096] 6. Back-side metallization: Deposit a metal on the surface of the diamond heat dissipation layer to form the collector.

[0097] It should be understood that expressions such as "including" and "may include" that can be used in this application indicate the existence of the disclosed functions, operations, or constituent elements, and do not limit one or more additional functions, operations, and constituent elements. In this application, terms such as "including" and / or "having" can be interpreted as indicating a specific characteristic, number, operation, constituent element, component, or a combination thereof, but cannot be interpreted as excluding the existence or the possibility of adding one or more other characteristics, numbers, operations, constituent elements, components, or a combination thereof.

[0098] In addition, in the present application, the expression "and / or" includes any and all combinations of the associated listed terms. For example, the expression "A and / or B" may include A, may include B, or may include both A and B.

[0099] In the description of the embodiments of the present application, it should be noted that unless otherwise clearly specified and limited, the term "connection" should be understood in a broad sense. For example, "connection" can be a detachable connection or a non-detachable connection; it can be a direct connection or an indirect connection through an intermediate medium. Among them, "fixed connection" means that the two are connected and the relative positional relationship after connection remains unchanged. "Rotational connection" means that the two are connected and can rotate relative to each other after connection. "Sliding connection" means that the two are connected and can slide relative to each other after connection. The orientation terms mentioned in the embodiments of the present application, such as "top", "bottom", "inner", "outer", "left", "right", etc., are only with reference to the direction of the accompanying drawings. Therefore, the orientation terms used are for better and clearer description and understanding of the embodiments of the present application, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation on the embodiments of the present application.

[0100] In addition, in the embodiments of the present application, mathematical concepts such as symmetry, equality, parallelism, and perpendicularity are mentioned. These limitations are all in view of the current technological level, rather than absolute strict definitions in the mathematical sense, and allow for a small amount of deviation. Approximations to symmetry, equality, parallelism, perpendicularity, etc. are all acceptable. For example, when A is parallel to B, it means that A is parallel to B or approximately parallel to B, and the included angle between A and B can be between 0 degrees and 10 degrees. When A is perpendicular to B, it means that A is perpendicular to B or approximately perpendicular to B, and the included angle between A and B can be between 80 degrees and 100 degrees.

[0101] As described above, the above are only the specific embodiments of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application can easily think of changes or substitutions, which should all be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claimed rights.

Claims

1. An IGBT chip integrated with a diamond heat dissipation layer, characterized in that, The diamond heat dissipation layer is embedded in the collector metal of the IGBT chip, and their thicknesses are equal.

2. The IGBT chip according to claim 1, wherein The thickness of the diamond heat dissipation layer ranges from [100μm, 200μm], and both the length and width are in the order of millimeters.

3. The IGBT chip according to claim 1, characterized in that, After the diamond heat dissipation layer is embedded in the collector metal, the whole forms a symmetric structure.

4. The IGBT chip according to claim 3, wherein, The diamond heat dissipation layer and the collector metal are nested with each other or distributed at intervals.

5. The IGBT chip according to claim 4, wherein The middle position of the symmetric structure is the diamond heat dissipation layer.

6. The IGBT chip according to claim 4, wherein In the case of mutual nesting, the cross-sections of the diamond heat dissipation layer and the collector metal are geometrically similar.

7. The IGBT chip according to any one of claims 1 to 6, characterized in that, The embedding is achieved by high-temperature deposition, laser processing and inlaying or low-temperature bonding.

8. A method for preparing an IGBT chip with an integrated diamond heat dissipation layer according to any one of claims 1 to 7, characterized in that, Including: S1. Substrate preparation: Grow a single-crystal silicon rod by the Czochralski method or the zone melting method, cut the single-crystal silicon rod into thin slices, and make the surface flat by chemical mechanical polishing technology; S2. Front process: The N+ emitter region, P-Well region, and N-drift region of the IGBT chip are formed on the surface of the silicon wafer by ion implantation, and a trench gate is fabricated; S3. Back process: Thinning the back of the wafer to reduce the chip thickness, and ion implantation to form the N-FS field stop region and P+ collector region; S4. Front metallization treatment: Deposit tungsten on the front of the IGBT chip, and then electrolessly plate a metal with a melting point above 1000°C as the emitter; S5. Wafer dicing: Cut the wafer into individual IGBT chips; S6. Grow diamond: Under the condition of 900~1100°C, use microwave plasma chemical vapor deposition technology to grow a diamond heat dissipation layer on the back of the IGBT chip; S7. Laser cut diamond: Use laser to process the diamond heat dissipation layer, cut out the position for subsequent deposition of the collector metal, and ensure its size matches the chip; S8. Back metallization treatment: Deposit metal on the surface of the diamond heat dissipation layer to form the collector.

9. A method for preparing an IGBT chip with an integrated diamond heat dissipation layer according to any one of claims 1 to 7, characterized in that, Including: step1. Substrate preparation: Grow a single-crystal silicon rod by the Czochralski method or the zone melting method, cut the single-crystal silicon rod into thin slices, and make the surface flat by chemical mechanical polishing technology; step2. Front process: On the surface of the silicon wafer, form the N+ emitter region, P-Well region, and N-drift region of the IGBT chip by ion implantation, fabricate a trench gate, and deposit a metal layer to form the emitter; step3. Back process: Thinning the back of the wafer to reduce the chip thickness, ion implantation to form the N-FS field stop region and P+ collector region, and deposit metal on the back to form the collector; step4. Wafer dicing: Cut the wafer into individual IGBT chips; step5. Laser process the collector metal: Use laser processing technology to further process the collector metal on the back, precisely remove the excess metal, and form the position for subsequent inlaying of diamond; step6. Inlay diamond: Grind and polish the grown diamond thin film, cut it into corresponding sizes, inlay it into the collector metal, and tightly bond it with structural adhesive on the side; 10. A method for manufacturing an IGBT chip integrated with a diamond heat dissipation layer according to any one of claims 1 to 7, characterized in that, Including: Step 1. Substrate preparation: Grow a single-crystal silicon rod by the Czochralski method or the zone melting method, cut the single-crystal silicon rod into thin slices, and make the surface flat by chemical mechanical polishing technology; Step 2. Front-side process: On the surface of the silicon wafer, form the N+ emitter region, P-Well region, and N-drift region of the IGBT chip by ion implantation, fabricate the trench gate, and deposit a metal layer to form the emitter; Step 3. Back-side process: Thin the back side of the wafer to reduce the chip thickness, and form the N-FS field stop region and P+ collector region by ion implantation; Step 4. Wafer dicing: Cut the wafer into individual IGBT chips; Step 5. Bonding with diamond: Clean and activate the back side of the IGBT chip and the surface of the diamond heat dissipation layer respectively to ensure that the surfaces are clean and have good bonding activity. Use eutectic bonding or low-temperature polymer bonding to tightly bond the diamond heat dissipation layer with the back side of the IGBT chip, and anneal the bonded chip; Step 6. Back-side metallization: Deposit metal on the surface of the diamond heat dissipation layer to form the collector.

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