Dynamic double-partition cache mapping method and system based on multi-dimensional feature classification

Abstract

The invention discloses a dynamic double-partition cache mapping method and system based on multi-dimensional feature classification, and the method comprises the steps: enabling cache partitions to comprise a group association main region SAMR, a direct mapping region DMR and a full association region FAR, and setting the initial capacity of each partition in the cache partitions; collecting multi-dimensional feature data of the data blocks in real time, wherein the multi-dimensional feature data comprises access frequency f, spatial locality s, prefetching benefit p and time fluctuation t; inputting the multi-dimensional feature data into a weighted classifier module, and calculating a comprehensive score Fscore of a data block; and generating a migration trigger instruction according to the comprehensive score Fscore, and migrating the data block to a direct mapping region DMR or a full association region FAR in the dynamic region. According to the invention, the cache hit rate is improved; the hardware overhead of full associative mapping is reduced; and the caching efficiency is optimized by dynamically adjusting the rule, so that the accuracy of data migration decision is improved.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular, to a dynamic dual - partition cache mapping method and system based on multi - dimensional feature classification. Background Art

[0002] Traditional implementation methods of cache physical mapping mechanisms have significant technical limitations. Although the direct mapping method has the advantages of simple structure and low hardware cost, its fixed - position storage strategy may lead to different main memory blocks competing for the same cache position, resulting in conflict misses. The fully - associative mapping reduces the conflict probability by allowing data blocks to be placed arbitrarily, but it requires parallel comparison of all cache - line tags, causing a significant increase in hardware implementation complexity and cost. The set - associative mapping combines the advantages of the first two methods to a certain extent, but it is still difficult to optimize the hardware efficiency in practical applications. Existing dynamic matching mode designs use a partitioned architecture to divide the cache into a set - associative main area, a direct - mapping area, and a fully - associative mapping area. The fixed - ratio design of the set - associative main area limits the system's adaptability to dynamic workloads, and the fixed - ratio setting of the direct - mapping area may not effectively match the actual cold - data storage requirements. Although the fully - associative mapping area is optimized for hot data, its adjustment mechanism has a problem of response lag when facing sudden changes in access characteristics. The unified tag memory and reconfigurable address mapping table in hardware co - design provide flexibility, but they bring additional hardware overhead and system complexity. The multi - dimensional feature scoring mechanism on which the data migration strategy depends has a problem of insufficient accuracy in threshold setting, which may lead to inaccurate evaluation of data - block value and migration decision deviation, affecting the overall utilization efficiency of cache resources. These technical defects seriously restrict the performance of the cache system in complex application scenarios. Summary of the Invention

[0003] To solve the technical problems in the background art, the present invention proposes a dynamic dual - partition cache mapping method and system based on multi - dimensional feature classification.

[0004] A dynamic dual - partition cache mapping method based on multi - dimensional feature classification proposed by the present invention includes: Establishing a cache partition, the cache partition including a set - associative main region SAMR, a direct - mapping region DMR, and a fully - associative region FAR, and setting the initial capacity of each partition in the cache partition; Real - time collecting multi - dimensional feature data of data blocks, the multi - dimensional feature data including but not limited to access frequency f, spatial locality s, prefetch benefit p, and time volatility t; Inputting the multi - dimensional feature data into a weighted classifier module to calculate the comprehensive score Fscore of the data block; Generate a migration trigger instruction according to the comprehensive score Fscore, and migrate the data block to the direct mapped region DMR or the fully associative region FAR within the dynamic regions.

[0005] Preferably, the generating of the migration trigger instruction according to the comprehensive score Fscore specifically includes: If the comprehensive score Fscore > 0.7, migrate to the fully associative mapped region FAR; If the comprehensive score Fscore < the mean value of the comprehensive scores Fscore corresponding to all data blocks within the current window minus the standard deviation, migrate to the direct mapped region DMR.

[0006] Preferably, the inputting of the multi-dimensional feature data into the weighted classifier module to calculate the comprehensive score Fscore of the data block specifically includes: Perform weighted summation on the multi-dimensional feature data according to the preset weight coefficients to obtain the comprehensive score Fscore of the data block. The specific calculation formula is: Fscore = w1×f + w2×g + w3×p + w4×s + w5×t; Wherein, w1 - w5 are weight coefficients, which are optimized and determined by the grid search method under typical loads; f is the access frequency; s is the spatial locality; p is the prefetch benefit; t is the time volatility.

[0007] Preferably, the initial capacity of the set-associative main region SAMR is 70% - 90% of the system memory, and the initial capacities of the direct mapped region DMR and the fully associative region FAR are 5% - 15% of the system memory respectively.

[0008] Preferably, it further includes: Real-time monitor the conflict rate C of the set-associative main region SAMR, the miss rate M of the direct mapped region DMR, and the hit rate H of the fully associative mapped region FAR, and dynamically adjust the corresponding capacities of each partition in the cache partition according to the conflict rate C, the miss rate M, the hit rate H, and the preset dynamic adjustment strategy.

[0009] Preferably, the preset dynamic adjustment strategy specifically includes: When the conflict rate C > 25%, increase the capacity of the fully associative mapped region FAR by 1% and reduce the capacity of the direct mapped region DMR by 1%, with the highest priority; When the miss rate M > 40%, increase the capacity of the direct mapped region DMR by 1% and reduce the capacity of the fully associative mapped region FAR by 1%, with the second highest priority; When the hit rate H < 70%, reduce the capacity of the fully associative mapped region FAR by 1% and increase the capacity of the set-associative main region SAMR by 1%, with the lowest priority.

[0010] Preferably, when the adjustment conditions of both the conflict rate C > 25% and the miss rate M > 40% are triggered simultaneously, the adjustment operation corresponding to the conflict rate C > 25% is preferentially executed.

[0011] Preferably, the dynamic region ratio adjustment of the preset dynamic adjustment strategy is limited by an upper limit and a lower limit, and the ratio ranges of the fully associative mapping area FAR and the direct mapping area DMR are 5% - 15% respectively.

[0012] Preferably, it further includes: When the cache space is insufficient, determine to evict one or more data blocks in the dynamic region through a replacement strategy, and the replacement strategy is specifically: P = α * LRU_order - β * fnorm; Where α is the weight of the LRU order, controlling the importance of recent accesses; β is the weight of the normalized access frequency, controlling the contribution of long-term popularity; LRU_order represents the "freshness" of the data block, 0 means the most recently accessed, and the larger the value, the longer it has not been accessed; fnorm is the normalized access frequency, fnorm = f / fmax, where f is the access count of a certain data block and fmax is the maximum access count of all data blocks within the current window.

[0013] A dynamic dual - partition cache mapping system based on multi - dimensional feature classification proposed by the present invention includes: A cache partition module, used to establish cache partitions, where the cache partitions include a set - associative main area SAMR, a direct mapping area DMR, and a fully associative area FAR, and set the initial capacity of each partition in the cache partition; A multi - dimensional feature acquisition module, used to collect multi - dimensional feature data of data blocks in real time, and the multi - dimensional feature data includes but is not limited to access frequency f, spatial locality s, prefetch benefit p, and time volatility t; A weighted classification module, used to input the multi - dimensional feature data into a weighted classifier module and calculate the comprehensive score Fscore of the data block; A dynamic partition control module, used to generate a migration trigger instruction according to the comprehensive score Fscore, and migrate the data block between the dynamic regions to the direct mapping area DMR or the fully associative area FAR.

[0014] In the present invention, the proposed dynamic dual - partition cache mapping method and system based on multi - dimensional feature classification establish a set - associative main region SAMR, a direct - mapped region DMR, and a fully - associative region FAR, and collect the memory access characteristics of data blocks in real - time, including access frequency, spatial locality, prefetch benefit, and time volatility. A weighted classifier is used to calculate the comprehensive score Fscore of each data block, and the capacities of the DMR and FAR are dynamically adjusted. It can effectively solve the conflict miss problem caused by the fixed - position storage strategy of direct mapping, optimize the partition ratio through the dynamic adjustment mechanism, and improve the cache hit rate; overcome the defects that the fully - associative mapping is complex to implement and has a high hardware cost, achieve intelligent scheduling through multi - dimensional feature acquisition and weighted classifier, and reduce the hardware overhead; improve the deficiency that the set - associative mapping does not achieve the optimal match, respond to the workload change in real - time through the dynamic partition control module, and enhance the system adaptability; optimize the fixed - ratio setting of the direct - mapped region and the fully - associative mapped region, respond to the sudden change of access characteristics in time through the dynamic adjustment rule, and improve the cache efficiency; reduce the additional overhead and complexity problems in hardware co - design, and achieve efficient management through a unified tag memory and a reconfigurable address mapping table; improve the accuracy of the data migration strategy, accurately reflect the actual value change of data blocks through multi - dimensional feature scoring and weighted strategy, and optimize the migration decision. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 FIG. is a schematic diagram of the working process of a dynamic dual - partition cache mapping method based on multi - dimensional feature classification proposed by the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0016] Referring to Figure 1 , a dynamic dual - partition cache mapping method based on multi - dimensional feature classification proposed by the present invention includes the following steps: S1: Establish a cache partition, which includes a set - associative main region SAMR, a direct - mapped region DMR, and a fully - associative region FAR, and set the initial capacities of each partition in the cache partition.

[0017] In this embodiment, the initial capacity of the set - associative main region SAMR is 70% - 90% of the system memory, and the initial capacities of the direct - mapped region DMR and the fully - associative region FAR are 5% - 15% of the system memory respectively.

[0018] Collect multi - dimensional feature data of data blocks in real - time. The multi - dimensional feature data includes but is not limited to access frequency f, spatial locality s, prefetch benefit p, and time volatility t.

[0019] In this embodiment, the specific attributes of the multi - dimensional feature data are as follows: (1) Access frequency f: Definition: The number of times a data block is accessed within a unit time window Twindows.

[0020] Formula: f = number of accesses / Twindows; Hardware implementation: Each cache line is built with a 4-bit sliding window counter that is automatically updated every cycle.

[0021] (2) Spatial locality s: Definition: Reflects the access correlation between data blocks and neighboring addresses.

[0022] Formula: s = number of accesses to neighboring blocks / total number of accesses; Hardware implementation: An address comparator detects accesses within the range of ±k addresses, and a counter accumulates the number of hits.

[0023] (3) Prefetch benefit p: Definition: The proportion of data blocks loaded by the prefetch mechanism that are subsequently accessed.

[0024] Formula: p = number of prefetch-triggered hits / total number of prefetches Hardware implementation: The prefetch operation marks the prefetch bit, and the prefetch counter is triggered when a hit occurs.

[0025] (4) Temporal volatility t: Definition: The stability of the access time interval. The smaller the standard deviation, the more regular the access pattern.

[0026] Formula:

[0027] The time difference (in cycles) between the i-th and (i - 1)-th accesses to data block X; σ interval is the standard deviation of the access intervals: ≈ . Example: For intervals [5, 3], then σ ≈ (5 - 3) / 2 = 1. μ interval is the average access interval: , example: for intervals [5, 3], then μ interval = 4; Δt is the time interval between adjacent accesses within the window; ε (e.g., 1e-5): a very small constant to prevent division by zero, which is obtained and stored by a register. Numerical source: max(Δt), min(Δt) are recorded by extreme value registers for the maximum / minimum intervals, and the difference approximates the standard deviation. For example: t = 1 - 1 / (4 + 1e−5) ≈ 0.75.

[0028] S2: Input the multi-dimensional feature data into the weighted classifier module to calculate the comprehensive score Fscore of the data block.

[0029] In this embodiment, inputting the multi-dimensional feature data into the weighted classifier module to calculate the comprehensive score Fscore of the data block specifically includes: S3: Weight-sum the multi-dimensional feature data according to the preset weight coefficients to obtain the comprehensive score Fscore of the data block. The specific calculation formula is: Fscore = w1×f + w2×g + w3×p + w4×s + w5×t; Among them, w1 - w5 are weight coefficients, which are optimized and determined by the grid search method under typical loads; f is the access frequency; s is the spatial locality; p is the prefetch benefit; t is the time volatility.

[0030] For example: w1 = 0.4, w2 = 0.2, w3 = 0.1, w4 = 0.2, w5 = 0.1; If f = 0.12, g = 0.5, p = 0.25, s = 0.4, t = 0.5, then: Fscore = 0.4×0.12 + 0.2×0.5 + 0.1×0.25 + 0.2×0.4 + 0.1×0.5 = 0.048 + 0.1 + 0.025 + 0.08 + 0.05 = 0.303; Since Fscore = 0.303 < 0.5, map it to the DMR.

[0031] S4: Generate a migration trigger instruction according to the comprehensive score Fscore, and migrate the data block to the direct mapped area DMR or the fully associative area FAR within the dynamic regions.

[0032] In this embodiment, generating a migration trigger instruction according to the comprehensive score Fscore specifically includes: If the comprehensive score Fscore > 0.7, migrate to the fully associative mapped area FAR; If the comprehensive score Fscore < the mean of the comprehensive scores Fscore corresponding to all data blocks within the current window minus the standard deviation, migrate to the direct mapped area DMR.

[0033] In this embodiment, it further includes: S5: Real-time monitor the conflict rate C of the set-associative main area SAMR, the miss rate M of the direct mapped area DMR, and the hit rate H of the fully associative mapped area FAR, and dynamically adjust the corresponding capacities of each partition in the cache partition according to the conflict rate C, the miss rate M, the hit rate H, and the preset dynamic adjustment strategy.

[0034] Specifically, the preset dynamic adjustment strategy specifically includes: When the conflict rate C > 25%, increase the capacity of the fully associative mapped area FAR by 1% and reduce the capacity of the direct mapped area DMR by 1%, with the highest priority; When the miss rate M > 40%, increase the capacity of the direct mapped area DMR by 1% and reduce the capacity of the fully associative mapped area FAR by 1%, with the second highest priority; When the hit rate H < 70%, reduce the capacity of the fully associative mapping area FAR by 1% and increase the capacity of the set associative main area SAMR by 1%. This has the lowest priority.

[0035] It should be noted that when the adjustment conditions of the conflict rate C > 25% and the miss rate M > 40% are triggered simultaneously, the adjustment operation corresponding to the conflict rate C > 25% is preferentially executed.

[0036] In this embodiment, the dynamic region ratio adjustment of the preset dynamic adjustment strategy is limited by the upper and lower limits. The ratio ranges of the fully associative mapping area FAR and the direct mapping area DMR are 5% - 15% respectively.

[0037] Specifically, the priority of the trigger condition and the execution limit need to be considered in this process. Priority rule: C > M > H: When the conflict rate is too high, it is preferentially processed to avoid performance avalanche. The execution limit is controlled by a single cycle and single action. Only one adjustment action is executed per clock cycle to avoid the ratio getting out of control due to multiple triggers. A bounded protection mechanism and a processing mechanism when reaching the upper and lower limits are also required. If FAR has reached 15%, even if C > 25%, further expansion is prohibited, and only the replacement strategy is optimized (such as increasing the FAR elimination priority). Processing when reaching the lower limit: If FAR has reached 5%, even if H < 70%, further reduction is prohibited, and only the prefetch strategy is optimized.

[0038] It should be noted that the boundary constraint: FAR ratio range: 5% - 15%; DMR ratio range: 5% - 15%; SAMR ratio: 70% - 90%; If C > 25% and M > 40% are triggered simultaneously, give priority to processing C > 25% (increase FAR by 1% and reduce DMR by 1%) The hardware implementation scheme is that each cache line is associated with a 2-bit flag (00 = SAMR, 01 = DMR, 10 = FAR). When adjusting, migrate the low-heat data (the row with the lowest F-score). Determine which partition the data block belongs to by adjusting the flag. The partition does not change the physical characteristics of the cache. The essence of the partition is the change of the mapping method. Therefore, according to the change of the data block flag, the partition logic can be realized.

[0039] In this embodiment, the following data collection is realized through a multi-dimensional feature acquisition circuit: Access frequency counter: A 4-bit saturated counter to prevent overflow.

[0040] Adjacent block detector: Parallelly compare the block access signals of addresses ±1.

[0041] Extreme value register: Record the maximum / minimum access interval within the window.

[0042] Dynamic partition adjustment circuit: a reconfigurable address mapping table, with a 2-bit flag bit encoding the belonging area for each cache line. The dedicated state machine circuit generates a new ratio value according to the trigger condition, thereby adjusting the ratio logic.

[0043] Specifically, for the reconfigurable address mapping table, the 2-bit flag bit encoding is adopted: 00: SAMR (set associative); 01: DMR (direct mapped); 10: FAR (fully associative); Migration process: Select the target line from the downscaling area, modify the flag bit and update the tag.

[0044] In this embodiment, it further includes: S6: When the cache space is insufficient, determine to eliminate one or more data blocks in the dynamic area through the replacement policy. The replacement policy is specifically: P = α * LRU_order - β * fnorm; Where α is the weight of the LRU order, controlling the importance of recent access; β is the weight of the normalized access frequency, controlling the contribution of long-term popularity; LRU_order represents the "freshness" of the data block, 0 means the most recently accessed, and the larger the value, the longer it has not been accessed; fnorm is the normalized access frequency, fnorm = f / fmax, where f is the access count of a certain data block and fmax is the maximum access count of all data blocks within the current window.

[0045] In this embodiment, the SAMR set associative mapping index: ; Example: If the block size is 64B, 2 6 = 64, 6 address bits are required, that is, address bits 5 - 0. The number of SAMR sets Nsets = 1024 = 2 10 , 10 address bits are required. Therefore, address bits 15 - 6 are used for the set index.

[0046] In this embodiment, the DMR direct mapped index: ; Example: If the DMR capacity is 64KB (1024 lines), then Ndirect = 1024.

[0047] In this embodiment, the FAR fully associative mapping index: Compare the 32-bit Tag fields of all lines in parallel.

[0048] Refer to Figure 1 , A dynamic dual-partition cache mapping system based on multi-dimensional feature classification proposed by the present invention includes: A cache partition module for establishing cache partitions, where the cache partitions include a set-associative main region SAMR, a direct mapped region DMR, and a fully associative region FAR, and setting the initial capacities of the respective partitions in the cache partitions; A multi-dimensional feature acquisition module for real-time acquisition of multi-dimensional feature data of data blocks, where the multi-dimensional feature data includes, but is not limited to, access frequency f, spatial locality s, prefetch benefit p, and temporal volatility t; A weighted classification module for inputting the multi-dimensional feature data into a weighted classifier module to calculate the comprehensive score Fscore of the data block; A dynamic partition control module for generating a migration trigger instruction according to the comprehensive score Fscore to migrate the data block to the direct mapped region DMR or the fully associative region FAR within the dynamic regions.

[0049] As described above, only the preferred specific embodiments of the present invention are provided, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention, according to the technical solution and inventive concept of the present invention, making equivalent replacements or changes, should be covered by the protection scope of the present invention.

Claims

1. A dynamic dual - partition cache mapping method based on multi - dimensional feature classification, characterized in that including: establish a cache partition, the cache partition includes a set-associative main region SAMR, a direct mapped region DMR, and a fully associative region FAR, and set the initial capacity of each partition in the cache partition; collect the multi-dimensional feature data of the data block in real time, the multi-dimensional feature data includes but is not limited to access frequency f, spatial locality s, prefetch benefit p, and temporal volatility t; input the multi-dimensional feature data into a weighted classifier module to calculate the comprehensive score Fscore of the data block; generate a migration trigger instruction according to the comprehensive score Fscore, and migrate the data block to the direct mapped region DMR or the fully associative region FAR within the dynamic region.

2. The dynamic dual-partition cache mapping method based on multi-dimensional feature classification according to claim 1, wherein The generating a migration trigger instruction according to the comprehensive score Fscore specifically includes: if the comprehensive score Fscore > 0.7, migrate to the fully associative mapped region FAR; if the comprehensive score Fscore < the mean of the comprehensive scores Fscore corresponding to all data blocks within the current window minus the standard deviation, migrate to the direct mapped region DMR.

3. The dynamic dual-partition cache mapping method based on multi-dimensional feature classification according to claim 1, wherein The inputting the multi-dimensional feature data into a weighted classifier module to calculate the comprehensive score Fscore of the data block specifically includes: perform weighted summation on the multi-dimensional feature data according to preset weight coefficients to obtain the comprehensive score Fscore of the data block, and the specific calculation formula is: Fscore = w1×f + w2×g + w3×p + w4×s + w5×t; wherein, w1-w5 are weight coefficients, which are optimized and determined under typical loads by the grid search method; f is the access frequency; s is the spatial locality; p is the prefetch benefit; t is the temporal volatility.

4. The dynamic dual-partition cache mapping method based on multi-dimensional feature classification according to claim 1, wherein The initial capacity of the set-associative main region SAMR is 70% - 90% of the system memory, and the initial capacities of the direct mapped region DMR and the fully associative region FAR are 5% - 15% of the system memory respectively.

5. The dynamic dual-partition cache mapping method based on multi-dimensional feature classification according to claim 1, wherein also including: monitor the conflict rate C of the set-associative main region SAMR, the miss rate M of the direct mapped region DMR, and the hit rate H of the fully associative mapped region FAR in real time, and dynamically adjust the corresponding capacities of each partition in the cache partition according to the conflict rate C, the miss rate M, the hit rate H, and a preset dynamic adjustment strategy.

6. The dynamic dual-partition cache mapping method based on multi-dimensional feature classification according to claim 5, characterized in that, The preset dynamic adjustment strategy specifically includes: when the conflict rate C > 25%, increase the capacity of the fully associative mapped region FAR by 1% and reduce the capacity of the direct mapped region DMR by 1%, with the highest priority; when the miss rate M > 40%, increase the capacity of the direct mapped region DMR by 1% and reduce the capacity of the fully associative mapped region FAR by 1%, with the second highest priority; when the hit rate H < 70%, reduce the capacity of the fully associative mapped region FAR by 1% and increase the capacity of the set-associative main region SAMR by 1%, with the lowest priority.

7. The dynamic dual - partition cache mapping method based on multi - dimensional feature classification according to claim 6, wherein, when the adjustment conditions of the conflict rate C > 25% and the miss rate M > 40% are triggered simultaneously, preferentially execute the adjustment operation corresponding to the conflict rate C > 25%.

8. The dynamic dual - partition cache mapping method based on multi - dimensional feature classification according to claim 6, wherein, The dynamic region ratio adjustment of the preset dynamic adjustment strategy is limited by the upper and lower limits, and the ratio ranges of the fully associative mapped region FAR and the direct mapped region DMR are both 5% - 15%.

9. The dynamic dual - partition cache mapping method based on multi - dimensional feature classification according to claim 1, characterized in that, also including: when the cache space is insufficient, determine to eliminate one or more data blocks in the dynamic region through a replacement strategy, and the replacement strategy is specifically: P = α * LRU_order - β * fnorm; Where, α is the weight of the LRU order, controlling the importance of recent accesses; β is the weight of the normalized access frequency, controlling the contribution of long-term popularity; LRU_order represents the "freshness" of the data block, with 0 being the most recently accessed, and the larger the value, the longer it has not been accessed; fnorm is the normalized access frequency, fnorm = f / fmax, where f is the number of accesses to a certain data block and fmax is the maximum number of accesses to all data blocks within the current window.

10. A dynamic dual-partition cache mapping system based on multi-dimensional feature classification, characterized in that, It includes: A cache partitioning module, used to establish cache partitions, the cache partitions include a set-associative main region SAMR, a direct mapped region DMR, and a fully associative region FAR, and set the initial capacity of each partition in the cache partition; A multi-dimensional feature acquisition module, used to collect multi-dimensional feature data of data blocks in real time, the multi-dimensional feature data includes but is not limited to access frequency f, spatial locality s, prefetch benefit p, and temporal volatility t; A weighted classification module, used to input the multi-dimensional feature data into a weighted classifier module to calculate the comprehensive score Fscore of the data block; A dynamic partitioning control module, used to generate a migration trigger instruction according to the comprehensive score Fscore, and migrate the data block to the direct mapped region DMR or the fully associative region FAR within the dynamic region.

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