Repair method and repair system of storage device
By optimizing the signal line address sorting of failed memory units in DRAM chips and using redundant memory arrays for repair, the problem of long-term and low-efficiency sorting in the prior art is solved, and a more efficient repair process is achieved.
Patent Information
- Application Number
- CN202510845803.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-23
- Publication Date
- 2025-07-22
- Estimated Expiration
- 2045-06-23
AI Technical Summary
In the prior art, when repairing failed storage units in DRAM chips, row address sorting takes a long time and is inefficient, it is impossible to efficiently use redundant storage arrays for repair.
By determining the first signal line of the failed memory unit in the memory array and its number, setting the arrangement order of the signal line addresses, and replacing the failed signal line with the redundant signal line in the redundant memory array, the sorting process is optimized by using the quick sorting method.
The sorting rate and efficiency of signal line addresses are improved, the cycle of repairing failed storage units is shortened, and the repair efficiency and pass rate of the storage device are improved.
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Figure CN120356506A_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present application relate to the field of storage technologies, and particularly to a repair method for a storage device and a repair system for a storage device. Background Art
[0002] As a storage device, a Dynamic Random Access Memory (DRAM) chip has been widely used in devices such as mobile phones, computers, and servers due to its advantages of simple structure, high integration, and low power consumption, and has played an important role in the field of consumer electronics. In the manufacturing process of DRAM chips, there may be defective memory cells in the memory array of DRAM chips. To address this situation, a part of redundant memory arrays are reserved during the design of DRAM chips. The redundant memory cells in the redundant memory arrays are used to replace the defective memory cells in the memory array to ensure the normal use of DRAM chips.
[0003] Typically, during the process of using redundant memory cells to repair defective memory cells, the row addresses of all word lines in the memory array are sorted according to the number of defective memory cells on each word line in the memory array. The sorting of row addresses takes a long time and has low efficiency. Summary of the Invention
[0004] The embodiments of the present application provide a repair method and a repair system for a storage device, which can optimize the sorting of row addresses, reduce the sorting time of row addresses, and improve the sorting efficiency of row addresses.
[0005] A repair method for a storage device, the storage device includes a memory array and a redundant memory array, and the repair method includes:
[0006] Determine a plurality of first signal lines in the memory array and corresponding first quantities; the first quantity is the number of defective memory cells on the first signal line, and the first quantity of defective memory cells on the first signal line is not 0; the first signal lines extend along a first direction, and the plurality of first signal lines are arranged at intervals;
[0007] Set the arrangement order of the signal line addresses of the plurality of first signal lines according to the first quantity of defective memory cells on each first signal line;
[0008] According to the arrangement order of the signal line addresses of the plurality of first signal lines and a preset repair rule, use a first redundant signal line in the redundant memory array to replace each first signal line to achieve repair.
[0009] In one embodiment, the setting the arrangement order of the signal line addresses of the plurality of first signal lines according to the first quantity of defective memory cells on each first signal line includes:
[0010] Based on a preset sorting method, sort the signal line addresses of the multiple first signal lines according to the first quantity of failed storage units on each of the first signal lines.
[0011] In one embodiment, sorting the signal line addresses of the multiple first signal lines according to the first quantity of failed storage units on each of the first signal lines based on a preset sorting method includes:
[0012] Based on a quicksort method, a mergesort method, or a bubble sort method, sort the signal line addresses of the multiple first signal lines according to the first quantity of failed storage units on each of the first signal lines.
[0013] In one embodiment, sorting the signal line addresses of the multiple first signal lines according to the first quantity of failed storage units on each of the first signal lines based on a quicksort method includes:
[0014] Adopt a method of randomly selecting to select a target signal line from the multiple first signal lines;
[0015] Use the first quantity corresponding to the target signal line as a reference number;
[0016] According to the reference number and the first quantity of failed storage units on each of the first signal lines, obtain a first signal line group and a second signal line group, and arrange the signal line addresses of the first signal lines in the first signal line group to the left of the signal line addresses of the first signal lines in the second signal line group; the first signal line group includes several first signal lines whose first quantity of failed storage units is less than or equal to the reference number, and the second signal line group includes several first signal lines whose first quantity of failed storage units is greater than the reference number;
[0017] Repeat the steps of randomly selecting a target signal line and obtaining a first signal line group and a second signal line group for the two signal line groups until the number of first signal lines in the new signal line group is less than or equal to a preset value, or the first quantity of each first signal line in the new signal line group is the same; and take the sorting of the signal line addresses of the first signal lines in each signal line group as the sorting of the signal line addresses of the multiple first signal lines.
[0018] In one embodiment, the first quantity of failed storage units on each first signal line is different, and the step of repeating the steps of randomly selecting a target signal line and obtaining a first signal line group and a second signal line group for the two signal line groups includes:
[0019] Sort the signal line addresses corresponding to the first signal lines in the new signal line group on the left until the number of first signal lines in the new signal line group is equal to 1.
[0020] In one embodiment, the first quantities of the failed storage units on at least two of the first signal lines are the same, and the steps of repeatedly randomly selecting a target signal line and obtaining the first signal line group and the second signal line group for the two signal line groups include:
[0021] Sort the signal line addresses corresponding to the first signal lines in the new signal line group on the left until the number of the first signal lines in the new signal line group is equal to 1, or the first quantities of the first signal lines in the new signal line group are the same.
[0022] In one embodiment, the repair method of the storage device further includes:
[0023] Determine that the number of failed storage units on a plurality of second signal lines in the storage array is 0; the second signal lines are parallel to the first signal lines;
[0024] Before setting the arrangement order of the signal line addresses of the plurality of first signal lines, arrange the signal line addresses of the plurality of second signal lines as a whole on one side of the signal line addresses of the plurality of first signal lines.
[0025] In one embodiment, the first signal lines are word lines.
[0026] A repair system for a storage device, the storage device includes a storage array and a redundant storage array, and the repair system includes:
[0027] An acquisition module, configured to determine a plurality of first signal lines in the storage array and corresponding first quantities; the first quantity is the number of failed storage units on the first signal line, and the first quantity of the failed storage units on the first signal line is not 0; the first signal lines extend along a first direction, and the plurality of first signal lines are arranged at intervals;
[0028] A sorting module, connected to the acquisition module, configured to set the sorting order of the signal line addresses of the plurality of first signal lines according to the first quantities of the failed storage units on each of the first signal lines;
[0029] A repair module, connected to the sorting module, configured to replace each first signal line with a first redundant signal line in the redundant storage array according to the sorting order of the signal line addresses of the plurality of first signal lines and a preset repair rule to implement repair.
[0030] A repair system for a storage device, including:
[0031] A main control device;
[0032] A storage device, connected to the main control device, and the storage device includes:
[0033] A storage die includes at least one storage module, and the storage module includes a storage array and a redundant storage array;
[0034] Wherein, the main control device is connected to the storage die, and is configured to obtain failure storage information of failed storage units in the storage array, and execute the repair method of the storage device as described above according to the failure storage information to generate repair information, where the repair information includes corresponding information of a first redundant signal line and each first signal line in the redundant storage array.
[0035] In one embodiment, the storage device further includes:
[0036] A control die, which is respectively connected to the main control device and the storage die, and is configured to generate a repair signal according to the repair information; the storage die is configured to replace each first signal line with the first redundant signal line according to the repair signal to achieve repair.
[0037] In one embodiment, the storage die includes a plurality of storage groups, and each storage group includes a plurality of storage modules; the control die includes: a redundant loading device and a plurality of controller devices, the redundant loading device is respectively connected to the main control device and the plurality of controller devices, and the plurality of controller devices are respectively connected to the plurality of storage groups correspondingly;
[0038] The redundant loading device is configured to generate a plurality of repair control signals according to the repair information; the plurality of repair control signals respectively correspond to the plurality of controller devices;
[0039] The controller device is configured to output corresponding repair signals to a plurality of storage modules of the connected storage group according to the repair control signal output by the connected redundant loading device.
[0040] In the repair method of the above storage device, a plurality of first signal lines and corresponding first quantities in the storage array are determined, the first quantity is the number of failed storage units on the first signal line, the first quantity of failed storage units on the first signal line is not 0, and according to the first quantity of failed storage units on each first signal line, the arrangement order of the signal line addresses of the plurality of first signal lines is set, so as to improve the sorting rate and sorting efficiency of the signal line addresses of the first signal lines, reduce the sorting time of the signal line addresses of the first signal lines, and shorten the cycle of repairing failed storage units.
[0041] In the repair system of the above storage device, the acquisition module determines a plurality of first signal lines and corresponding first quantities of failed storage units in the storage array, and the sorting module sets the arrangement order of the signal line addresses of the plurality of first signal lines according to the first quantities of the failed storage units on each first signal line, improving the sorting rate and efficiency of the signal line addresses of the first signal lines, reducing the sorting time of the signal line addresses of the first signal lines, and shortening the cycle for the repair module to repair the failed storage units.
[0042] In the repair system of the above storage device, during the process of the main control device generating repair information, first, according to the failed storage information, a plurality of first signal lines and corresponding first quantities of failed storage units in the storage array are acquired, and the arrangement order of the signal line addresses of the plurality of first signal lines is set according to the first quantities of the failed storage units on each first signal line. Since only the signal line addresses of the first signal lines with non-zero first quantities of failed storage units are sorted, the sorting rate and efficiency of the signal line addresses of the first signal lines are improved, the sorting time of the signal line addresses of the first signal lines is reduced, and the time for the main control device to generate repair information is shortened. BRIEF DESCRIPTION OF THE DRAWINGS
[0043] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the following will briefly introduce the drawings required for use in the description of the embodiments or related technologies. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.
[0044] Figure 1 FIG. 1 is a schematic structural diagram of a storage device in an embodiment of the present application;
[0045] Figure 2 FIG. 2 is a schematic flowchart of a method for repairing a storage device in an embodiment of the present disclosure;
[0046] Figure 3 FIG. 3 is a schematic diagram of sorting the signal line addresses of a plurality of first signal lines according to the first quantities of failed storage units on each first signal line in an embodiment of the present application;
[0047] Figure 4 FIG. 4 is a schematic diagram of sorting the signal line addresses of a plurality of first signal lines according to the first quantities of failed storage units on each first signal line in an embodiment of the present application;
[0048] Figure 5 FIG. 5 is a schematic structural diagram of a repair system of a storage device in an embodiment of the present disclosure;
[0049] Figure 6 FIG. 6 is a schematic structural diagram of a repair system of a storage device in an embodiment of the present disclosure;
[0050] Figure 7 This is the third structural schematic diagram of the repair system of the storage device in the embodiments of the present disclosure;
[0051] Figure 8 This is the fourth structural schematic diagram of the repair system of the storage device in the embodiments of the present disclosure;
[0052] Figure 9 This is the fifth structural schematic diagram of the repair system of the storage device in the embodiments of the present disclosure;
[0053] Figure 10 This is the sixth structural schematic diagram of the repair system of the storage device in the embodiments of the present disclosure.
[0054] Explanation of reference numerals:
[0055] Acquisition module 102; sorting module 104; repair module 106; main control device 202; storage device 204; storage die 302; control die 304; storage group 400; storage module 402; redundant loading device 404; control device 406. Detailed implementation manners
[0056] To facilitate the understanding of the embodiments of the present application, the embodiments of the present application will be described more comprehensively below with reference to the relevant drawings. The preferred embodiments of the embodiments of the present application are given in the drawings. However, the embodiments of the present application can be implemented in many different forms and are not limited to the embodiments described herein. On the contrary, these embodiments are provided to make the disclosure of the embodiments of the present application more thorough and comprehensive.
[0057] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which the embodiments of the present application belong. The terms used in the description of the embodiments of the present application herein are only for the purpose of describing specific embodiments and are not intended to limit the embodiments of the present application. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.
[0058] In the description of the embodiments of the present application, it should be understood that the orientation or positional relationship indicated by the terms "upper", "lower", "vertical", "horizontal", "inner", "outer", etc. is the orientation or positional relationship based on the methods or positions shown in the drawings, and is only for the convenience of describing the embodiments of the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation to the embodiments of the present application.
[0059] It can be understood that the terms "first", "second", etc. used in this application may be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish the first element from another element. For example, without departing from the scope of this application, the first signal line may be referred to as the second signal line, and similarly, the second signal line may be referred to as the first signal line. Both the first signal line and the second signal line are signal lines, but they are not the same signal line.
[0060] In addition, the terms "first" and "second" are only used for descriptive purposes and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include at least one of such features. In the description of this application, the meaning of "a plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined. In the description of this application, the meaning of "several" is at least one, such as one, two, etc., unless otherwise clearly and specifically defined.
[0061] Figure 1 FIG. is one of the structural schematic diagrams of the storage device in the embodiments of this application. Refer to Figure 1 , the storage device includes a storage array and a redundant storage array; wherein, the storage array includes word lines (WL) and bit lines (BL), one of the word lines and the bit lines extends along the first direction X, and the other extends along the second direction Y intersecting the first direction X. The storage units are located at the intersection positions of the word lines and the bit lines on the plane (for the sake of illustration, Figure 1 are shown by black dots in, and this intersection position is a virtual position), and the failed storage units in the storage array are shown by " " in the figure; the redundant storage array includes redundant word lines (YWL) and redundant bit lines (YBL), the extension directions of the redundant word lines and the word lines are the same, and the extension directions of the redundant bit lines and the bit lines are the same, Figure 1 the redundant storage units in are located at the intersection positions of the redundant word lines and the bit lines on the plane ( Figure 1 are shown by black dots in, and this intersection position is a virtual position), and the intersection positions of the redundant bit lines and the word lines on the plane. The redundant storage units in the redundant storage array are used to repair the failed storage units in the storage array. As an example, the word lines extend along the first direction X, a plurality of word lines are arranged at intervals along the second direction Y, the bit lines extend along the second direction Y, and a plurality of bit lines are arranged at intervals along the first direction X. As an example, Figure 1 it is exemplified that the storage array includes n word lines WL0 to WL(n-1) and a bit lines BL0 to BL(a-1), and the redundant storage array includes m redundant word lines YWL0 to YWL(m-1) and b redundant bit lines YBL0 to YBL(b-1).
[0062] It can be understood that when redundant storage units in a redundant storage array repair failed storage units in the storage array, the signal line addresses of word lines and / or bit lines are mapped to the redundant signal line addresses of redundant word lines and / or redundant word lines, so as to realize the repair of the failed storage units in the storage array by the redundant storage units in the redundant storage array.
[0063] Figure 2 This is one of the flow diagrams of the repair method of the storage device in the embodiments of the present disclosure. Refer to Figure 2 In this embodiment, a repair method of a storage device is provided. The repair method includes:
[0064] S102, determining a plurality of first signal lines and corresponding first quantities in the storage array.
[0065] The storage array includes storage units. When writing data and reading data to each storage unit of the storage array, if the read data is consistent with the written data, the storage unit is considered a normal storage unit, that is, a normal storage unit; if the read data is inconsistent with the written data, the storage unit is considered a failed storage unit, that is, a failed storage unit. It can be understood that the failed storage unit is an abnormal storage unit to be repaired.
[0066] Performing writing and reading of data on all storage units of the storage array to obtain failed storage units. According to the failed storage units, a plurality of first signal lines connected to the failed storage units and the first quantity ebit cnt corresponding to each first signal line are obtained, that is, determining a plurality of first signal lines in the storage array where there are failed storage units, and the first quantity of failed storage units on each first signal line. Among them, the first signal lines extend along a first direction, and the plurality of first signal lines are arranged at intervals. Further, the plurality of first signal lines are arranged at intervals in a second direction, and the second direction intersects the first direction.
[0067] It can be understood that the first signal lines are word lines or bit lines in the storage array, and the first redundant signal lines are redundant bit lines and / or redundant word lines. Further, the first signal lines are word lines, and the first redundant signal lines are redundant word lines.
[0068] Taking the first signal lines as word lines and the first direction as the extension direction of the word lines, an example is given to illustrate the repair method of the storage device of the present application. Determining the number of failed storage units on the word lines. When the number of failed storage units on the word lines is not 0, marking the word lines as the first signal lines, and taking the number of failed storage units on the word lines as the first quantity ebit cnt corresponding to the first signal lines. Further, when the number of failed storage units on the word lines is 0, it is considered that there are no failed storage units on the word lines, and marking the word lines as the second signal lines.
[0069] Specifically, after writing data to multiple memory cells on a word line, the data in the multiple memory cells on the word line are read respectively, and the memory cells with inconsistent read data and written data are counted. The counted value is the number of failed memory cells on the word line. When the number of failed memory cells on the word line is not 0, the word line is marked as a first signal line, and the number of failed memory cells on the word line is used as the first quantity ebitcnt corresponding to the first signal line. According to the above method, the number of failed memory cells on each word line in the memory array is determined respectively, and multiple first signal lines in the memory array and the first quantity corresponding to each first signal line are obtained. Refer to Figure 1 , after writing data to a memory cells on word line WL0, the data in the a memory cells on word line WL0 are read respectively, and the memory cells with inconsistent read data and written data are counted. The counted value is the number of failed memory cells on word line WL0. When the number of failed memory cells on word line WL0 is not 0, word line WL0 is marked as a first signal line, and the number of failed memory cells on word line WL0 is used as the first quantity ebit cnt corresponding to the first signal line. According to the above method, the number of failed memory cells on word lines WL1 to WLn-1 are determined respectively, and multiple first signal lines with failed memory cells in the memory array and the first quantity ebit cnt corresponding to each first signal line are obtained.
[0070] With Figure 1For example, the number of failed memory cells on word line WL0 is 2. Since the number of failed memory cells on word line WL0, which is 2, is greater than 0, word line WL0 is determined to be the first signal line, and the corresponding first quantity ebit cnt of the first signal line is 2. The number of failed memory cells on word line WL1 is 4. Since the number of failed memory cells on word line WL1, which is 4, is greater than 0, word line WL1 is determined to be the first signal line, and the corresponding first quantity ebit cnt of the first signal line is 4. The number of failed memory cells on word line WL2 is 3. Since the number of failed memory cells on word line WL2, which is 3, is greater than 0, word line WL2 is determined to be the first signal line, and the corresponding first quantity ebit cnt of the first signal line is 3. The number of failed memory cells on word line WL3 is 2. Since the number of failed memory cells on word line WL3, which is 2, is greater than 0, word line WL3 is determined to be the first signal line, and the corresponding first quantity ebit cnt of the first signal line is 2. The number of failed memory cells on word line WL4 is 0, so word line WL4 is determined to be the second signal line,... The number of failed memory cells on word line WLn-1 is 1. Since the number of failed memory cells on word line WLn-1, which is 1, is greater than 0, word line WLn-1 is also determined to be the first signal line, and the corresponding first quantity ebit cnt of the first signal line is 1. Assume that the number of failed memory cells on word lines WL5 to WLn-2 is 0, then word lines WL5 to WLn-2 are determined to be the second signal lines; 5 first signal lines (word lines WL0, WL1, WL2, WL3, and WLn-1) among the n word lines are obtained, as well as the corresponding first quantity ebit cnt of each first signal line (the first quantity ebit cnt corresponding to word line WL0 is 2, the first quantity ebit cnt corresponding to word line WL1 is 4, the first quantity ebit cnt corresponding to word line WL2 is 3, the first quantity ebit cnt corresponding to word line WL3 is 2, and the first quantity ebit cnt corresponding to word line WLn-1 is 1).
[0071] S104. Set the arrangement order of the signal line addresses of multiple first signal lines according to the first quantity of failed memory cells on each first signal line.
[0072] According to the first quantity of failed memory cells on each first signal line, sort the signal line addresses of multiple first signal lines. The signal line address represents the position of the first signal line in the memory array. After forming the memory array, the signal line address of the first signal line remains fixed.
[0073] Compared with the process of sorting the signal line addresses of all word lines according to the number of failed memory cells on all word lines of the storage array and screening out the first signal line with failed memory cells in the word lines, the number of signal line addresses of word lines that need to be sorted is reduced. Subsequently, according to the first number of failed memory cells on each first signal line, the amount of data for sorting the signal line addresses of multiple first signal lines is small, the sorting time is short, and the sorting efficiency of the signal line addresses is improved.
[0074] It can be understood that the signal line addresses of the first signal lines can be sorted in ascending order according to the first number of failed memory cells on each first signal line, or can be sorted in descending order according to the first number of failed memory cells on each first signal line. In the case where the first number of failed memory cells on two first signal lines is the same, the arrangement order of the signal line addresses of the two first signal lines can be interchanged.
[0075] Take Figure 3 as an example. According to the first number ebit cnt(2) corresponding to the word line WL0, the first number ebit cnt(4) corresponding to the word line WL1, the first number ebit cnt(3) corresponding to the word line WL2, the first number ebit cnt(2) corresponding to the word line WL3, and the first number ebit cnt(1) corresponding to the word line WLn-1, set the arrangement order of the signal line addresses of the word lines WL0, WL1, WL2, WL3, and WLn-1. Taking WL to represent the signal line address of the word line WL, and taking the ascending order arrangement of the first numbers corresponding to the signal line addresses of the word lines WL0, WL1, WL2, WL3, and WLn-1 as the first signal lines as an example, set the arrangement order of the signal line addresses of multiple first signal lines (word lines WL0, WL1, WL2, WL3, and WLn-1) as: WLn-1, WL0, WL3, WL2, WL1; among them, the first numbers ebit cnt corresponding to the word lines WL0 and WL3 are both 2. Therefore, the sorting of the signal line addresses of the word lines WL0 and WL3 can be interchanged. That is, the arrangement order of the signal line addresses of the word lines WL0, WL1, WL2, WL3, and WLn-1 is: WLn-1, WL0, WL3, WL2, WL1, or the arrangement order of the signal line addresses of the word lines WL0, WL1, WL2, WL3, and WLn-1 is: WLn-1, WL3, WL0, WL2, WL1.
[0076] S106. According to the arrangement order of the signal line addresses of multiple first signal lines and the preset repair rule, use the first redundant signal lines in the redundant storage array to replace each first signal line to achieve repair.
[0077] After sorting the signal line addresses of multiple first signal lines, according to the sorting of the signal line addresses and a preset repair rule, the first redundant signal lines in the redundant storage array are used to replace each first signal line, so as to enable the redundant storage units in the redundant storage array to repair the failed storage units on the first signal line.
[0078] Take Figure 1 as an example. According to the sorting of the signal line addresses of word lines WL0, WL1, WL2, WL3, and WLn-1, which is WLn-1, WL3, WL0, WL2, WL1, and a preset repair rule, the first redundant signal lines (redundant word lines YWL0 to redundant word lines YWLm-1, and / or redundant bit lines YBL0 to redundant bit lines YBLb-1) in the redundant storage array are used to replace each first signal line, so as to enable the redundant storage units in the redundant storage array to repair the failed storage units on the first signal line. It can be understood that the first redundant signal line can be a redundant word line or a redundant bit line. Further, the first redundant signal line is a redundant word line.
[0079] It can be understood that the preset repair rule refers to the rule of using the redundant signal lines in the redundant storage array to replace the first signal line. The failed storage units on the first signal line can be repaired sequentially according to the magnitude of the first quantity corresponding to the signal line address of the first signal line, or the failed storage units on multiple first signal lines can be repaired simultaneously according to the magnitude of the first quantity corresponding to the signal line address of the first signal line. This application does not make any limitations in this regard.
[0080] As an example, the preset repair rule is: according to the order from largest to smallest of the first quantity of the failed storage units corresponding to the first signal line, the signal line addresses of the first signal line are sequentially mapped to the redundant signal line addresses of the redundant word lines in the redundant storage array, and all the storage units on the first signal line are replaced by the redundant storage units on the redundant word lines, so as to repair the failed storage units on the first signal line.
[0081] The repair of the failed storage units of the storage device enables the storage device to be used normally. For example, if the repair method of the storage device provided in this application is applied to the pre-production test of the storage device, the qualified rate of mass production of the storage device and the test rate can be improved; if the repair method of the storage device provided in this application is applied to the repair during the normal operation of the storage device, the time for each power-on repair can be shortened.
[0082] In the repair method of the above storage device, a plurality of first signal lines in the storage array and corresponding first quantities are determined. The first quantity is the quantity of failed storage units on the first signal line, and the first quantity ebit cnt of the failed storage units on the first signal line is not 0. According to the first quantities of the failed storage units on each first signal line, the arrangement order of the signal line addresses of the plurality of first signal lines is set, so as to improve the sorting rate and sorting efficiency of the signal line addresses of the first signal lines, reduce the sorting time of the signal line addresses of the first signal lines, and shorten the cycle for repairing the failed storage units.
[0083] In some embodiments, determining a plurality of first signal lines in the storage array and corresponding first quantity ebitcnt includes: traversing the storage units on each word line of the storage array to obtain a plurality of word lines (first signal lines) where there are failed storage units and the corresponding first quantity ebit cnt for each word line. After screening the word lines in the storage array where there are failed storage units and using them as the first signal lines, sorting the word line addresses of the word lines where there are failed storage units can reduce the sorting time of the word line addresses of the word lines in the storage array and improve the sorting efficiency of the word line addresses of the word lines.
[0084] In some embodiments, determining a plurality of first signal lines in the storage array and corresponding first quantity ebitcnt includes: traversing the storage units on each bit line of the storage array to obtain a plurality of bit lines (first signal lines) where there are failed storage units and the corresponding first quantity ebit cnt for each bit line. After screening the bit lines in the storage array where there are failed storage units and using them as the first signal lines, sorting the bit line addresses of the bit lines where there are failed storage units can reduce the sorting time of the bit line addresses of the bit lines in the storage array and improve the sorting efficiency of the bit line addresses of the bit lines.
[0085] In some embodiments, setting the arrangement order of the signal line addresses of the plurality of first signal lines according to the first quantity ebit cnt of the failed storage units on each first signal line includes: based on a preset sorting method, sorting the signal line addresses of the plurality of first signal lines according to the first quantity ebit cnt of the failed storage units on each first signal line. The preset sorting method refers to a method that can sort the magnitudes of the plurality of first quantities ebit cnt corresponding to the plurality of first signal lines. Through the preset sorting method, the sorting of the plurality of first quantities ebit cnt corresponding to the plurality of first signal lines is realized. The signal line addresses of the plurality of first signal lines correspond one-to-one with the plurality of first quantities ebit cnt, and the signal line addresses corresponding to the first signal lines can be sorted according to the sorting of the first quantity ebit cnt corresponding to the first signal lines.
[0086] See Figure 1, sorted in ascending order according to the first quantity ebit cnt corresponding to the signal line address. Taking the first signal line as the word line as an example, obtain the first quantity ebit cnt of 2 corresponding to the word line WL0, the first quantity ebit cnt of 4 corresponding to the word line WL1, the first quantity ebit cnt of 3 corresponding to the word line WL2, the first quantity ebit cnt of 2 corresponding to the word line WL3, and the first quantity ebit cnt of 1 corresponding to the word line WLn-1; Based on a preset sorting method, respectively sort the first quantity ebit cnt of 2, 4, 3, 2, and 1 corresponding to the word line WL0, the word line WL1, the word line WL2, the word line WL3, and the word line WLn-1 in ascending order, and obtain the first quantity ebit cnt with the sorting of 1 2 2 3 4; According to the first quantity ebit cnt with the sorting of 1 2 2 3 4, sort the signal line addresses of the word lines corresponding to the first quantity ebit cnt, and obtain the signal line addresses sorted as WLn-1 WL0 WL3 WL2 WL1 or sorted as WLn-1 WL3 WL0 WL2 WL1. In some embodiments, based on a preset sorting method, according to the first quantity ebit cnt of the failed storage units on each of the first signal lines, perform sorting of the signal line addresses of the multiple first signal lines, including: Based on the quicksort method, the merge sort method, or the bubble sort method, according to the first quantity ebit cnt of the failed storage units on each first signal line, perform sorting of the signal line addresses of the multiple first signal lines. Sort the first quantity ebit cnt of the failed storage units on each first signal line according to different sorting methods, so as to diversify the sorting method of the signal line addresses and eliminate the influence of a single sorting on the accuracy and efficiency of the sorting of the signal line addresses.
[0087] See Figure 3, sorted in descending order according to the first quantity ebit cnt corresponding to the signal line address. Taking the first signal line as the word line as an example, obtain the first quantity ebit cnt = 2 corresponding to the word line WL0, the first quantity ebit cnt = 4 corresponding to the word line WL1, the first quantity ebit cnt = 3 corresponding to the word line WL2, the first quantity ebit cnt = 2 corresponding to the word line WL3, and the first quantity ebit cnt = 1 corresponding to the word line WLn-1; based on the quicksort method, the mergesort method, or the bubble sort method, respectively perform a descending sort on the first quantities ebit cnt of 2, 4, 3, 2, and 1 corresponding to the word lines WL0, WL1, WL2, WL3, and WLn-1, and obtain the first quantity ebit cnt with the sort of 4 3 2 2 1; according to the first quantity ebit cnt with the sort of 4 3 2 2 1, sort the signal line addresses of the word lines corresponding to the first quantity ebit cnt, and obtain the signal line addresses sorted as WL1 WL2WL0 WL3 WLn-1 or sorted as WL1 WL2 WL3 WL0 WLn-1.
[0088] In some embodiments, based on a preset sorting method, according to the first quantity ebit cnt of the failed storage units on each first signal line, perform a sorting of the signal line addresses of multiple first signal lines, including: based on the quicksort method, according to the first quantity ebit cnt of the failed storage units on each first signal line, perform a sorting of the signal line addresses of multiple first signal lines. By the quicksort method, the sorting efficiency of the signal line addresses of multiple first signal lines in the storage array can be further improved, and the sorting time of the signal line addresses of multiple first signal lines in the storage array can be increased by more than 20 times.
[0089] See Figure 3, sorted in descending order according to the first quantity ebit cnt corresponding to the signal line address. Taking the first signal line as the word line as an example, obtain the first quantity ebit cnt = 2 corresponding to the word line WL0, the first quantity ebit cnt = 4 corresponding to the word line WL1, the first quantity ebit cnt = 3 corresponding to the word line WL2, the first quantity ebit cnt = 2 corresponding to the word line WL3, and the first quantity ebit cnt = 1 corresponding to the word line WLn-1; Based on the quicksort method, respectively perform a descending sort on the first quantity ebit cnt corresponding to the word lines WL0, WL1, WL2, WL3, and WLn-1, which are 2, 4, 3, 2, and 1 respectively, to obtain the first quantity ebit cnt with the sort of 4 3 2 2 1; According to the first quantity ebit cnt with the sort of 4 3 2 2 1, sort the signal line addresses of the word lines corresponding to the first quantity ebit cnt, to obtain the signal line addresses sorted as WL1 WL2 WL0 WL3 WLn-1 or sorted as WL1 WL2 WL3 WL0 WLn-1.
[0090] In some embodiments, based on a preset sorting method, according to the first quantity ebit cnt of the failed storage units on each first signal line, perform sorting of the signal line addresses of multiple first signal lines, including: Select the first signal line corresponding to the signal line address at the first, last, or middle position in the sorting of the signal line addresses of multiple first signal lines as the target signal line; Using the first quantity ebit cnt corresponding to the target signal line as the pivot number of the quicksort method, according to the first quantity ebit cnt of the failed storage units on each first signal line, perform sorting of the signal line addresses of multiple first signal lines, which simplifies the selection of the pivot number in the quicksort method.
[0091] The preset sorting includes ascending sorting. From the sorting of the signal line addresses of multiple first signal lines, the first signal line corresponding to the signal line address ranked first is selected as the target signal line; the first quantity ebitcnt corresponding to the target signal line is used as the reference number for the quick sorting method; according to the reference number and the first quantity ebit cnt corresponding to multiple first signal lines, a first signal line group and a second signal line group are obtained, and the signal line addresses of the first signal lines in the first signal line group are arranged to the left of the signal line addresses of the first signal lines in the second signal line group; wherein, the first signal line group includes several first signal lines corresponding to the first quantity ebit cnt less than or equal to the reference number, and the second signal line group includes several first signal lines corresponding to the first quantity greater than the reference number; the first signal line group and the second signal line group are used as the new multiple first signal lines, and the steps of selecting the first signal line corresponding to the signal line address ranked first as the target signal line and obtaining the first signal line group and the second signal line group are repeatedly executed until the number of first signal lines in the new signal line group is less than or equal to the preset value, or the first quantity ebit cnt corresponding to the first signal lines in the new signal line group is the same, and the sorting of the signal line addresses of the first signal lines in each signal line group is used as the sorting of the signal line addresses of the multiple first signal lines.
[0092] Figure 3 FIG. is one of the schematic diagrams for sorting the signal line addresses of multiple first signal lines according to the first quantity of failed storage units on each first signal line in the embodiment of the present application. In the figure, it is exemplified that the signal line addresses corresponding to the first new signal line group on the left are preferentially sorted until the number of first signal lines in the new signal line group is less than or equal to 1; see Figure 1 and Figure 3, sorted in ascending order according to the first quantity ebit cnt corresponding to the signal line address. Taking the first signal line as the word line as an example, the 5 first signal lines are the word lines WL0, WL1, WL2, WL3, and WLn-1 respectively. The initial sorting of the signal line addresses of the word lines WL0, WL1, WL2, WL3, and WLn-1 is WL0(2) WL1(4) WL2(3) WL3(2) WLn-1(1). First step, select the word line WL0 corresponding to the signal line address WL0 with the first sorting as the target signal line; use the first quantity ebit cnt of 2 corresponding to the word line WL0 as the reference number for the quick sorting method. Second step, according to the reference number 2, starting from the first quantity ebit cnt of 4 corresponding to the signal line address WL1 with the second sorting in the initial sorting, find the first first quantity ebit cnt greater than the reference number 2 from left to right, that is, the first quantity ebit cnt of 4 corresponding to WL1, and find the first first quantity ebit cnt less than or equal to the reference number 2 from right to left, that is, the first quantity ebit cnt of 1 corresponding to WLn-1. Then, exchange the positions of the signal line addresses of the word lines WL1 and WLn-1 corresponding to 4 and 1 in the initial sorting until the first quantity ebit cnts pointed to from left to right and from right to left are the same, or there are no more first quantity ebit cnts that have not been compared with the reference number 2, to obtain the first signal line group and the second signal line group. The first signal line group includes several first signal lines corresponding to the first quantity less than or equal to the reference number, and the second signal line group includes several first signal lines corresponding to the first quantity greater than the reference number. That is, the first signal line group includes the word lines WLn-1, WL3, and WL0, and the second signal line group includes the word lines WL2 and WL1. And arrange the signal line address WL0 of the word line WL0 corresponding to the reference number at the end of the signal line addresses corresponding to several first signal lines in the first signal line group. At this time, the sorting of the signal line addresses of the 5 first signal lines in the first signal line group and the second signal line group is WLn-1(1) WL3(2) WL0(2) WL2(3) WL1(4). Third step, respectively take the word lines WLn-1, WL3, and WL0 in the first signal line group, and the word lines WL2 and WL1 in the second signal line group as the new multiple first signal lines, repeat the first step and the second step, and perform recursive sorting until the number of first signal lines in the signal line group is less than or equal to 1, or the first quantity ebit cnts corresponding to the first signal lines in the signal line group are the same, and take the sorting of the signal line addresses of the first signal lines in each signal line group as the sorting of the signal line addresses of the multiple first signal lines, that is, obtain the sorting WLn-1 WL3 WL0 WL2 WL1 of the signal line addresses of the word lines WL0, WL1, WL2, WL3, and WLn-1.In some embodiments, based on a preset sorting method, the signal line addresses of multiple first signal lines are sorted according to the first quantity ebit cnt of failed storage units on each first signal line, including: randomly selecting a target signal line from the multiple first signal lines by using a randomly selected method; using the first quantity corresponding to the target signal line as the reference number of the quicksort method, and sorting the signal line addresses of the multiple first signal lines according to the first quantity of failed storage units on each first signal line. In this way, the sorting efficiency of the signal line addresses of multiple first signal lines in the storage array is further improved. As an example, the srand random function is used to select the target signal line.
[0093] In some embodiments, the preset sorting includes ascending sorting. Based on the preset sorting method, the signal line addresses of multiple first signal lines are sorted according to the first quantity of failed storage units on each first signal line, including: randomly selecting a target signal line from each first signal line; using the first quantity corresponding to the target signal line as the reference number; obtaining a first signal line group and a second signal line group according to the reference number and the first quantity ebit cnt of failed storage units on each first signal line, and arranging the signal line addresses of the first signal lines in the first signal line group to the left of the signal line addresses of the first signal lines in the second signal line group; repeating the steps of randomly selecting a target signal line and obtaining a first signal line group and a second signal line group for the two signal line groups until the number of first signal lines in the signal line group is less than or equal to a preset value, or the first quantities of the first signal lines in the signal line group are the same, and taking the sorting of the signal line addresses of the first signal lines in each signal line group as the sorting of the signal line addresses of the multiple first signal lines; wherein, the first signal line group includes several first signal lines with the first quantity ebitcnt of failed storage units less than or equal to the reference number, and the second signal line group includes several first signal lines with the first quantity ebit cnt of failed storage units greater than the reference number.
[0094] Figure 4 This is the second schematic diagram of sorting the signal line addresses of multiple first signal lines according to the first quantity of failed storage units on each first signal line in the embodiments of the present application; Figure 4 In the figure, ax on the left as the target signal line means randomly selecting the first signal line ax as the target signal line from the first new signal line group on the left. The random selection can be to generate a random number x through, for example, the random function srand. x is any integer between 0 and n, and n is the total number of first signal lines included in the new signal line group. It can be understood that x is Figure 4The label of the array element of the new signal line group shown instead of the signal line address of the first signal line (for example, the row address caddr of the word line WL). It should be noted that since the signal lines with 0 failed storage cells account for most of all the signal lines in the storage array, the signal line address of the first signal line is only a part of the signal line addresses of all the signal lines extending in the first direction. In the figure, the signal line addresses corresponding to the first signal line in the new signal line group on the left are sorted preferentially until the number of the first signal lines in the new signal line group is equal to 1 for illustration; it can be understood that when the first quantities of each first signal line are the same, the signal line addresses corresponding to the first signal line in the new signal line group on the left are sorted preferentially until the number of the first signal lines in the new signal line group is equal to 1, or the first quantities of each first signal line in the new signal line group are the same. See Figure 4 , taking the signal line address corresponding to the first signal line as an example with the first signal line identifier, there are 10 first signal lines in the multiple first signal lines, and each first signal line is represented by a0~a9. The corresponding relationship between the multiple first signal lines and the multiple first quantities is: a0 is 3, a1 is 1, a2 is 2, a3 is 7, a4 is 9, a5 is 6, a6 is 4, a7 is 5, a8 is 10, a9 is 8. It should be noted that Figure 4Taking the example that the first quantities of the first signal lines are different from each other, but the present invention is not limited thereto, and there may also be a situation where the first quantities of the first signal lines are the same. For example, the first quantities of a0 and a2 are both 3; the initial sorting of the signal line addresses of the multiple first signal lines is a0(3) a1(1) a2(2) a3(7) a4(9) a5(6) a6(4) a7(5) a8(10) a9(8); in the first step, randomly select the first signal line a5 as the target signal line, and the first quantity 6 corresponding to the first signal line a5 is the reference number for the quick sorting method. In the second step, according to the reference number 6, find a first quantity greater than 6 from the left to the right of the first quantities corresponding to the first signal lines in the initial sorting, and find a first quantity less than or equal to 6 from the right to the left of the first quantities corresponding to the first signal lines in the initial sorting; then, exchange the positions of the signal line addresses of the corresponding first signal lines in the initial sorting; until the first quantities corresponding to the first signal lines pointed to from the left to the right and from the right to the left are the same. At this time, the sorting of the signal line addresses of the first signal lines is a0(3) a1(1) a2(2) a7(5) a6(4) a5(6) a4(9) a3(7) a8(10) a9(8), obtaining the initial sorting of the signal line addresses of the first signal lines in the first signal line group as a0(3) a1(1) a2(2) a7(5) a6(4) a5(6), and the initial sorting of the signal line addresses of the first signal lines in the second signal line group as a4(9) a3(7) a8(10) a9(8), and the signal line addresses of the first signal lines in the first signal line group are arranged to the left of the signal line addresses of the first signal lines in the second signal line group. In the third step, respectively take the first signal line group and the second signal line group as the new multiple signal lines, and repeat the first step and the second step; among them, without exchanging the signal line addresses corresponding to the first signal lines, the sorting of the signal line addresses corresponding to the first signal lines remains unchanged; until the number of first signal lines in the obtained signal line group is equal to 1, take the sorting of the signal line addresses of the first signal lines in each signal line group as the sorting of the signal line addresses of the multiple first signal lines, that is, obtain the sorting of the signal line addresses of the multiple first signal lines as a1(1) a2(2) a0(3) a6(4) a7(5) a5(6) a3(7) a9(8) a4(9) a8(10).
[0095] In some embodiments, the repair method of the storage device further includes: determining that the number of failed storage units on a plurality of second signal lines in the storage array is 0, the second signal lines being parallel to the first signal lines; before setting the arrangement order of the signal line addresses of the plurality of first signal lines, arranging the signal line addresses of the plurality of second signal lines as a whole on one side of the signal line addresses of the plurality of first signal lines, thereby completing the sorting of the signal line addresses of the first signal lines and the second signal lines extending along the first direction in the storage array.
[0096] It should be understood that although Figure 2 the steps in the flowchart are shown sequentially in the direction of the arrows, these steps are not necessarily executed sequentially in the order indicated by the arrows. Unless otherwise clearly stated in this article, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover, Figure 2 at least a part of the steps in
[0097] Based on the same inventive concept, the present application also provides a repair system for a storage device. The same or corresponding parts as those in the embodiments of the above-mentioned repair method of the storage device will not be elaborated below. Figure 5 FIG. Figure 5 is a schematic structural diagram of a repair system for a storage device in an embodiment of the present disclosure. Referring to
[0098] In this embodiment, a repair system for a storage device is provided. The storage device includes a storage array and a redundant storage array. The repair system includes: an acquisition module 102, a sorting module 104, and a repair module 106.
[0099] The acquisition module 102 is configured to determine a plurality of first signal lines in the storage array and the corresponding first number ebitcnt; the first number ebit cnt is the number of failed storage units on the first signal line, and the first number ebit cnt of the failed storage units on the first signal line is not 0; the first signal lines extend along the first direction, and the plurality of first signal lines are arranged at intervals.
[0100] The repair module 106 is connected to the sorting module 104 and is configured to replace each first signal line with a first redundant signal line in the redundant storage array according to the sorting order of the signal line addresses of the multiple first signal lines and a preset repair rule to achieve repair.
[0101] In the repair system of the above storage device, the acquisition module 102 determines multiple first signal lines of failed storage units in the storage array, and the sorting module 104 sets the arrangement order of the signal line addresses of the multiple first signal lines according to the first quantity of the failed storage units on each first signal line, improves the sorting rate and sorting efficiency of the signal line addresses of the first signal lines, reduces the sorting time of the signal line addresses of the first signal lines, and shortens the cycle for the repair module 106 to repair the failed storage units.
[0102] Based on the same inventive concept, the present application further provides a repair system for a storage device. Parts that are the same as or corresponding to those in the embodiments of the above storage device repair method will not be described in detail below. Figure 6 This is the second structural schematic diagram of the repair system for the storage device in the embodiments of the present disclosure. Refer to Figure 6 In this embodiment, a repair system for a storage device is provided, including: a main control device 202 and a storage device 204.
[0103] The storage device 204 is connected to the main control device 202. The storage device 204 includes: a storage die 302; the storage die 302 includes at least one storage module 402, and the storage module 402 includes a storage array and a redundant storage array; wherein, the main control device 202 is connected to the storage die 302 and is configured to obtain the failure storage information of the failed storage units in the storage array and execute the above storage device repair method according to the failure storage information to generate repair information, and the failure storage information represents the position information of the failed storage units in the storage array; the repair information includes the first redundant signal lines in the redundant storage array and the corresponding information of each first signal line. Exemplarily, the main control device 202 may be the upper computer of a test machine or may be packaged together with the storage device 204 to form a memory, and the main control device 202 serves as the main chip in the memory.
[0104] In the repair system of the above storage device, when the main control device 202 generates repair information, first, according to the failed storage information, it obtains a plurality of first signal lines in the storage array where there are failed storage units and the corresponding first number ebitcnt, and sets the arrangement order of the signal line addresses of the plurality of first signal lines according to the first number ebit cnt of the failed storage units on each first signal line. Since only the signal line addresses of the first signal lines with a non-zero first number of failed storage units are sorted, the sorting rate and efficiency of the signal line addresses of the first signal lines are improved, the sorting time of the signal line addresses of the first signal lines is reduced, and the time for the main control device 202 to generate repair information is shortened.
[0105] Figure 7 FIG. 3 is a schematic structural diagram of the repair system of the storage device in an embodiment of the present disclosure. Refer to Figure 7 , in some embodiments, the storage device 204 further includes: a control die 304; the control die 304 is respectively connected to the main control device 202 and the storage die 302, and is configured to generate a repair signal according to the repair information; the storage die 302 is configured to replace each first signal line with a first redundant signal line of the redundant storage array according to the repair signal to implement repair. It can be understood that the storage die 302 maps the signal line address of the first signal line to the redundant signal line address corresponding to the redundant storage unit according to the repair signal.
[0106] Figure 8 FIG. 4 is a schematic structural diagram of the repair system of the storage device in an embodiment of the present disclosure. Refer to Figure 8 , in some embodiments, the control die 304 includes: a redundancy loader 404 and a control device (RTL IP) 406. The redundancy loader 404 is respectively connected to the main control device 202 and the control device 406, and the control device 406 is connected to the storage module 402; the redundancy loader 404 is configured to generate a repair control signal according to the repair information, and the control device 406 is configured to output a corresponding repair signal to the connected storage module 402 according to the repair control signal output by the connected redundancy loader 404.
[0107] Figure 9 FIG. 5 is a schematic structural diagram of the repair system of the storage device in an embodiment of the present disclosure. Refer to Figure 9, in some embodiments, the storage die 302 includes a storage bank 400, and the storage bank 400 includes a plurality of storage modules 402; the control die 304 includes: a redundant loading device 404 and a control device 406; the redundant loading device 404 is respectively connected to the main control device 202 and the control device 406, and the control device 406 is correspondingly connected to the storage bank 400; the redundant loading device 404 is configured to generate a repair control signal according to repair information, and the control device 406 is configured to output a corresponding repair signal to the plurality of storage modules 402 of the connected storage bank 400 according to the repair control signal output by the connected redundant loading device 404.
[0108] Figure 10 FIG. 6 is a schematic structural diagram of a repair system of a storage device according to an embodiment of the present disclosure. Refer to Figure 10 In some embodiments, the storage die 302 includes a plurality of storage banks 400, and each storage bank 400 includes a plurality of storage modules 402; the control die 304 includes: a redundant loading device 404 and a plurality of control devices 406.
[0109] The redundant loading device 404 is respectively connected to the main control device 202 and the plurality of control devices 406, and the plurality of control devices 406 are respectively correspondingly connected to the plurality of storage banks 400; the redundant loading device 404 is configured to generate a plurality of repair control signals according to repair information; the plurality of repair control signals respectively correspond to the plurality of control devices 406; the control device 406 is configured to output a corresponding repair signal to the plurality of storage modules 402 of the connected storage bank 400 according to the repair control signal output by the connected redundant loading device 404.
[0110] The redundant loading device 404 generates a plurality of repair control signals according to the repair information output by the main control device 202; and transmits the plurality of repair control signals to a redundant latch (RDN LATCH) of a corresponding control device (RTL IP) 406 according to first control information; wherein, the first control information includes first address information RTL_IP_ID representing the address of the control device 406, first switch information RDN_LDEN for controlling the turn-on and turn-off of the redundant loading device 404, and second switch information for controlling the storage and stop of the repair control signal; the redundant loading device 404 is configured to transmit the repair control signal to the control device 406 corresponding to the first address information RTL_IP_ID according to the first address information RTL_IP_ID when the first switch information RDN_LDEN and the second switch information are both valid; exemplarily, the first switch information is valid when it is at a high level 1, and the second switch information is valid when it is at a high level 1.
[0111] As an example, the second switch information includes row switch information RDN_ROWEN and column switch information RDN_COLEN; the redundancy loading device 404 is used to store the row repair information into the redundancy latch (RDN LATCH) of the controller device (RTL IP) 406 corresponding to the first address information RTL_IP_ID when the first switch information RDN_LDEN and the row switch information RDN_ROWEN are both valid; the redundancy loading device 404 is also used to store the column repair information into the redundancy latch (RDN LATCH) of the controller device (RTL IP) 406 corresponding to the first address information RTL_IP_ID when the first switch information RDN_LDEN and the column switch information RDN_COLEN are both valid; wherein, the repair information includes row repair information and column repair information, the row repair information includes the mapping relationship between the redundant word line address corresponding to the redundant storage unit for repairing the failed storage unit in the redundant storage array and the word line address corresponding to the failed storage unit on each first signal line, the redundant word line address is the address of the redundant word line corresponding to the redundant storage unit, and the word line address is the address of the word line corresponding to the failed storage unit; the column repair information includes the mapping relationship between the redundant bit line address corresponding to the redundant storage unit for repairing the failed storage unit in the redundant storage array and the bit line address corresponding to the failed storage unit on each first signal line, the redundant bit line address is the address of the redundant bit line corresponding to the redundant storage unit, and the bit line address is the address of the bit line corresponding to the failed storage unit.
[0112] The controller device (RTL IP) 406 outputs a repair signal according to the control instruction and the repair control signal; wherein, the control instruction includes at least one of a read instruction, a write instruction, and a refresh instruction; the controller device 406 outputs a repair signal according to the control instruction and the repair control signal when the bit line address and / or the word line address of the storage unit corresponding to the control instruction match (are the same) as the bit line address and / or the word line address of the failed storage unit.
[0113] Exemplarily, multiple memory banks 400 in the memory die 302 are located on the same wafer. Further, multiple memory modules 402 of the memory bank 400 in the memory die 302 are located on multiple wafers arranged in a stacked manner. In some embodiments, the control die 304 further includes: a test module; the test module is respectively connected to the main control device 202 and the memory die 302, and the test module is used to receive the test information output by the main control device 202; the main control device 202 is used to receive the failed storage information generated by the memory module 402 in the memory die 302 according to the test information.
[0114] Further, the test module has a BIST circuit, and the test module and the controller device are packaged together to form a buffer die in the control die 304.
[0115] Those of ordinary skill in the art can understand that all or part of the processes in the methods of the above embodiments can be completed by instructing relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above methods. Among them, any reference to a memory, storage, database, or other medium used in the embodiments provided in the present application can include at least one of non-volatile and volatile memories. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, or optical memory, etc. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM), etc.
[0116] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope recorded in this specification.
[0117] The above embodiments only represent several implementation manners of the embodiments of the present application. The description is relatively specific and detailed, but it should not be construed as a limitation on the scope of the invention patent. It should be noted that for those of ordinary skill in the art, without departing from the concept of the embodiments of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the embodiments of the present application.
Claims
1. A repair method for a storage device, characterized in that, The storage device includes a storage array and a redundant storage array, and the repair method includes: Determine a plurality of first signal lines and corresponding first quantities in the storage array; the first quantity is the number of failed storage units on the first signal line, and the first quantity of the failed storage units on the first signal line is not 0; the first signal line extends in a first direction, and the plurality of first signal lines are arranged at intervals; Set the arrangement order of the signal line addresses of the plurality of first signal lines according to the first quantities of the failed storage units on each of the first signal lines; According to the arrangement order of the signal line addresses of the plurality of first signal lines and a preset repair rule, use the first redundant signal lines in the redundant storage array to replace each first signal line to achieve repair.
2. The repair method according to claim 1, wherein The setting of the arrangement order of the signal line addresses of the plurality of first signal lines according to the first quantities of the failed storage units on each of the first signal lines includes: Based on a preset sorting method, sort the signal line addresses of the plurality of first signal lines according to the first quantities of the failed storage units on each of the first signal lines.
3. The repair method according to claim 2, characterized in that The sorting of the signal line addresses of the plurality of first signal lines based on a preset sorting method according to the first quantities of the failed storage units on each of the first signal lines includes: Based on a quick sorting method, a merge sorting method or a bubble sorting method, sort the signal line addresses of the plurality of first signal lines according to the first quantities of the failed storage units on each of the first signal lines.
4. The repair method according to claim 2, characterized in that The sorting of the signal line addresses of the plurality of first signal lines based on a preset sorting method according to the first quantities of the failed storage units on each of the first signal lines includes: Adopt a randomly selected method to select a target signal line from the plurality of first signal lines; Use the first quantity corresponding to the target signal line as the reference number of the quick sorting method; According to the reference number and the first quantities of the failed storage units on each of the first signal lines, obtain a first signal line group and a second signal line group, and arrange the signal line addresses of the first signal lines in the first signal line group to the left of the signal line addresses of the first signal lines in the second signal line group; the first signal line group includes several first signal lines with the first quantity of the failed storage units less than or equal to the reference number, and the second signal line group includes several first signal lines with the first quantity of the failed storage units greater than the reference number; Repeat the steps of randomly selecting a target signal line and obtaining a first signal line group and a second signal line group for the two signal line groups until the number of first signal lines in the new signal line group is less than or equal to a preset value, or the first quantities of the first signal lines in the new signal line group are the same; and use the sorting of the signal line addresses of the first signal lines in each signal line group as the sorting of the signal line addresses of the plurality of first signal lines.
5. The repair method according to claim 4, characterized in that, The first quantities of the failed storage units on each of the first signal lines are different, and the repeating the steps of randomly selecting a target signal line and obtaining a first signal line group and a second signal line group for the two signal line groups includes: Sort the signal line addresses corresponding to the first signal lines in the new signal line group on the left until the number of the first signal lines in the new signal line group is equal to 1.
6. The repair method according to claim 4, characterized in that At least two of the first numbers of the failed storage units on the first signal lines are the same. The steps of repeatedly randomly selecting target signal lines and obtaining the first signal line group and the second signal line group for the two signal line groups include: Sort the signal line addresses corresponding to the first signal lines in the new signal line group on the left until the number of the first signal lines in the new signal line group is equal to 1, or the first numbers of the first signal lines in the new signal line group are the same.
7. The repair method according to claim 1, wherein It further includes: Determine a plurality of second signal lines in the storage array, and the number of the failed storage units on the second signal lines is 0; The second signal lines are parallel to the first signal lines; Before setting the arrangement order of the signal line addresses of the plurality of first signal lines, arrange the signal line addresses of the plurality of second signal lines as a whole on one side of the signal line addresses of the plurality of first signal lines.
8. The repair method according to claim 1, characterized in that The first signal lines are word lines.
9. A repair system for a storage device, characterized in that, The storage device includes a storage array and a redundant storage array. The repair system includes: An acquisition module, configured to determine a plurality of first signal lines and corresponding first numbers in the storage array; the first number is the number of failed storage units on the first signal line, and the first number of the failed storage units on the first signal line is not 0; the first signal lines extend along a first direction, and the plurality of first signal lines are arranged at intervals; A sorting module, connected to the acquisition module, configured to set the sorting order of the signal line addresses of the plurality of first signal lines according to the first numbers of the failed storage units on the respective first signal lines; A repair module, connected to the sorting module, configured to replace each of the first signal lines with a first redundant signal line in the redundant storage array according to the sorting order of the signal line addresses of the plurality of first signal lines and a preset repair rule to achieve repair.
10. A repair system for a storage device, characterized in that, It includes: A main control device; A storage device, connected to the main control device. The storage device includes: A storage die, including at least one storage module, and the storage module includes a storage array and a redundant storage array; Wherein, the main control device is connected to the storage die, configured to obtain the failure storage information of the failed storage units in the storage array, and execute the repair method of the storage device according to any one of claims 1-6 based on the failure storage information to generate repair information, and the repair information includes the first redundant signal lines in the redundant storage array and the corresponding information of each first signal line.
11. The repair system according to claim 10, wherein The storage device further includes: A control die, respectively connected to the main control device and the storage die, configured to generate a repair signal according to the repair information; The storage die is configured to replace each of the first signal lines with a first redundant signal line according to the repair signal to achieve repair.
12. The repair system according to claim 11, wherein The storage die includes a plurality of storage groups, and each storage group includes a plurality of storage modules; the control die includes: a redundant loading device and a plurality of control devices, the redundant loading device is respectively connected to the main control device and the plurality of control devices, and the plurality of control devices are respectively connected to the plurality of storage groups correspondingly; The redundant loading device is configured to generate a plurality of repair control signals according to the repair information; the plurality of repair control signals respectively correspond to the plurality of control devices; The control device is configured to output corresponding repair signals to the plurality of storage modules of the connected storage group according to the repair control signals output by the connected redundant loading device.
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