A P-NiO / N-Ga2O3 heterojunction diode with a NiO field limiting ring and a floating field plate composite terminal structure and a preparation method thereof

Abstract

The present invention provides a P-NiO / N-Ga2O3 heterojunction diode with a composite terminal structure of NiO field-limiting rings and floating field plates, and a method for preparing the same. The diode comprises a cathode metal layer, a highly doped N-type Ga2O3 substrate, a low-doped N-type Ga2O3 epitaxial layer, an oxide dielectric layer, a P-type NiO layer, several NiO field-limiting rings, an anode metal and anode field plates, several floating metal field plates, and a passivation layer, stacked in order from bottom to top. This technical solution aims to provide a terminal structure suitable for Ga2O3 power devices, thereby enabling them to have a high breakdown voltage. The core of the invention lies in significantly improving the device breakdown voltage while reducing dependence on processing technology by utilizing the composite terminal structure of NiO field-limiting rings and floating field plates.

Description

Technical Field

[0001] The present invention relates to the technical field of power semiconductors, and in particular to a P-NiO / N-Ga2O3 heterojunction diode having a composite terminal structure of a NiO field limiting ring and a floating field plate, and a preparation method thereof. Background Art

[0002] The emergence of new technologies such as electric vehicles, high-voltage smart grids, and 5G communications has placed higher demands on the performance of power devices. As an emerging ultra-wide bandgap semiconductor material, Ga2O3's greatest advantages are its ultra-wide bandgap width and critical breakdown field strength of up to 8 MV / cm. Compared to third-generation semiconductors, Ga2O3's Baliga figure of merit is 10 times that of SiC and 4 times that of GaN. This means that under the same withstand voltage, Ga2O3 power devices can achieve lower on-resistance and lower switching losses. In addition, it is easy to grow low-cost, large-size single crystal substrates and has good stability in extremely harsh environments such as high temperature and high radiation. Ga2O3 materials have become a research focus and hotspot for new power electronic devices.

[0003] Despite significant research progress in Ga2O3 materials and power devices, several challenges remain. First, Ga2O3 diodes suffer from curvature effects and edge electric field concentration, preventing them from leveraging the material's high critical breakdown field strength. Second, Ga2O3 diodes are highly dependent on processing technology (i.e., even small changes in terminal structural parameters can significantly impact device performance. For example, in field-limiting ring structures, the optimal ring spacing is typically less than 1 μm), placing high demands on the process. Summary of the Invention

[0004] In light of this, the present invention aims to provide a P-NiO / N-Ga2O3 heterojunction diode with a composite termination structure of NiO field-limiting rings and floating field plates, and a method for fabricating the same. This approach aims to provide a termination structure suitable for Ga2O3 power devices, thereby enabling them to achieve a higher breakdown voltage. The core of this invention lies in significantly improving the device's breakdown voltage while reducing its dependence on processing technology through the composite termination structure of NiO field-limiting rings and floating field plates.

[0005] To achieve the above objectives, the present invention adopts the following technical solution: a P-NiO / N-Ga2O3 heterojunction diode with a composite terminal structure of NiO field limiting rings and floating field plates, comprising a cathode metal layer, a highly doped N-type Ga2O3 substrate, a low-doped N-type Ga2O3 epitaxial layer, an oxide dielectric layer, a P-type NiO layer, several NiO field limiting rings, an anode metal and an anode field plate, several floating metal field plates, and a passivation layer stacked in sequence from bottom to top;

[0006] The cathode metal layer is deposited on the lower surface of the highly doped N-type Ga2O3 substrate to form an ohmic contact; the oxide dielectric layer is evenly distributed on a portion of the surface of the low-doped N-type Ga2O3 epitaxial layer (the portion of the surface mentioned in the present invention refers to not the entire surface) to form a dielectric with a field plate structure; the P-type NiO layer and several NiO field limiting rings constitute a first combination part; the first combination part is evenly distributed on a portion of the surface of the low-doped N-type Ga2O3 epitaxial layer and forms an alternating distribution structure with the oxide dielectric layer; the anode metal and the anode field plate cover the entire surface of the P-type NiO layer and the portion of the surface of the oxide dielectric layer to form a field plate structure; several floating metal field plates are evenly distributed on the portion of the surface of the oxide dielectric layer and the entire surface of the NiO field limiting rings to form a second combination part to form a floating field plate structure; the passivation layer covers the entire surface of the oxide dielectric layer and several floating metal field plates and the portion of the surface of the anode metal and the anode field plate to protect the terminal structure.

[0007] In a preferred embodiment, the first combination part and the oxide dielectric layer present a periodic distribution of ABAB... on the low-doped N-type Ga2O3 epitaxial layer, where A represents the first combination part and B represents the oxide dielectric layer, and the sidewalls of the first combination part and the oxide dielectric layer are tightly fitted to form a P-NiO / N-Ga2O3 heterojunction and a NiO field limiting ring.

[0008] In a preferred embodiment, the material for preparing the cathode metal layer includes at least one of Ti, Ni, Ag, and Au, and the total thickness of the cathode metal layer is 200-500 nm.

[0009] In a preferred embodiment, the thickness of the highly doped N-type Ga2O3 substrate is 50-650 μm, and the doping concentration is 10 18 -10 20 cm -3 , the doping element is at least one of Si and Sn; the thickness of the low-doped N-type Ga2O3 epitaxial layer is 10-20μm, and the doping concentration is 10 16 -10 17 cm -3 , the doping element is at least one of Si and Sn.

[0010] In a preferred embodiment, the material for preparing the oxide dielectric layer includes at least one of SiO2, Al2O3, and Si3N4, the thickness of the oxide dielectric layer is 600-800 nm, the length W1 of the oxide dielectric layer is 6-10 μm, and the spacing between the oxide dielectric layers is 5-10 μm.

[0011] In a preferred embodiment, the thickness of the first combination portion is 400-600 nm, and the P-type carrier concentration is 10 17 -10 18 cm -3 ; The length of the P-type NiO layer is 100-500 μm, the length of the NiO field limiting ring is 5-10 μm, the spacing W1 is 6-10 μm, and the number is 4-8, forming an alternating distribution structure with the oxide dielectric layer.

[0012] It should be noted that the length range of the NiO field limiting rings is the same as the spacing range of the oxide dielectric layers, and the spacing range of the NiO field limiting rings is the same as the length range of the oxide dielectric layers. This is because the NiO field limiting rings and the oxide dielectric layers are alternately distributed, the length of the NiO is also the spacing between the dielectric layers, and the spacing of the NiO is also the length of the dielectric layers. In the same embodiment, the length of the selected NiO field limiting rings should be equal to the spacing between the oxide dielectric layers, and the spacing between the selected NiO field limiting rings should be equal to the length of the dielectric layers.

[0013] In a preferred embodiment, the material for preparing the anode metal and the anode field plate includes at least one of Ni, Mo, W, Pt, Al, Au and Ag, the length of the anode metal is 100-500 μm, and the length of the anode field plate is L fp 4-8 μm.

[0014] It should be noted that the length of the anode metal is in the same range as the length of the P-type NiO layer. In the same embodiment, the selected anode metal length should be equal to the length of the P-type NiO dielectric layer.

[0015] In a preferred embodiment, the material for preparing the floating metal field plate includes at least one of Ni, Mo, W, Pt, Al, Au and Ag, the length of the floating metal field plate is 4-8 μm, and the number of the floating metal field plates is 4-8.

[0016] It should be noted that, since the NiO field limiting rings and the floating metal field plates are structurally arranged in groups, in the same embodiment, the number of the selected NiO field limiting rings should be the same as the number of the floating metal field plates.

[0017] In a preferred embodiment, the materials used to prepare the passivation layer include polyimide (PI), Si3N4, SiO2 and SU-8 glue, and the thickness of the passivation layer is 5-10 μm.

[0018] The present invention also provides a method for preparing a P-NiO / N-Ga2O3 heterojunction diode having a composite terminal structure of a NiO field limiting ring and a floating field plate. The method comprises the following steps:

[0019] Step 1: Pre-treat the highly doped N-type Ga2O3 substrate to remove surface particles and stains;

[0020] Step 2: Depositing a low-doped N-type Ga2O3 epitaxial layer on the pre-treated high-doped N-type Ga2O3 substrate;

[0021] Step 3: depositing a layer of oxide on the upper surface of the low-doped N-type Ga2O3 epitaxial layer;

[0022] Step 4: Etching the oxide deposited in step 3 by a standard photolithography process to form an oxide dielectric layer;

[0023] Step 5: Deposit a layer of P-type NiO on the upper surface of the etched sample, wherein a portion of the NiO is deposited on the oxide dielectric layer and another portion of the NiO is deposited on the low-doped N-type Ga2O3 epitaxial layer;

[0024] Step 6: Etch the NiO deposited in step 5 by a standard photolithography process until the NiO on the oxide dielectric layer is completely removed, forming a P-type NiO layer and several NiO field limiting rings;

[0025] Step 7: Deposit a layer of metal on the sample surface and form the anode metal, anode field plate and several floating metal field plates through a standard lift-off process;

[0026] Step 8: depositing a cathode metal layer on the lower surface of the highly doped N-type Ga2O3 substrate;

[0027] Step 9: Deposit a layer of oxide on the sample surface to form a passivation layer using standard photolithography.

[0028] More specifically, in step 2, a low-doped N-type Ga2O3 epitaxial layer can be grown on the surface of the pretreated high-doped N-type Ga2O3 substrate by hydride vapor phase epitaxy or metal organic chemical vapor deposition (MOCVD) process, but is not limited thereto.

[0029] More specifically, in steps 7 and 8, the metal layer may be deposited by using one or more sputtering processes including magnetron sputtering, thermal evaporation, and electron beam evaporation, but is not limited thereto.

[0030] More specifically, when the passivation layer material in step 9 is PI, a standard PI photolithography process can be used to form the passivation layer.

[0031] Compared with the prior art, the present invention has the following beneficial effects: a floating field plate field limiting ring composite terminal structure is introduced into the Ga2O3 power device. With the help of several NiO field limiting ring terminals, the depletion region of the device is extended to the ends of each field limiting ring during reverse breakdown, and the electric field distribution is more uniform. With the help of the field plate structure (including the anode field plate and several floating field plates), a low potential is introduced to attract the electric field lines to extend to the area covered by the field plate, thereby alleviating the electric field concentration effect at the main junction and the end of the NiO field limiting ring, further optimizing the electric field distribution, and improving the device withstand voltage. In particular, several floating field plates are laid on the oxide dielectric layer between adjacent NiO field limiting rings, so that the device obtains a higher withstand voltage when the NiO field limiting rings are spaced relatively large, reducing the device's dependence on process size. In other words, combining the NiO field limiting ring structure with the floating field plate structure can enable the Ga2O3 power device provided by the present invention to still have a high breakdown voltage when the field limiting ring spacing is wide, thereby simplifying the device process. Compared with other P-NiO / N-Ga2O3 heterojunction diodes, the device preparation process is simple. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 2. It is a schematic structural diagram of a P-NiO / N-Ga2O3 heterojunction diode having a NiO field limiting ring and a floating field plate composite terminal structure according to a preferred embodiment;

[0033] Figure 2 This is a specific process diagram of a P-NiO / N-Ga2O3 heterojunction diode with a NiO field limiting ring and floating field plate composite terminal structure according to a preferred embodiment;

[0034] Figure 3 This is a comparison diagram of the surface electric field distribution of a P-NiO / N-Ga2O3 heterojunction diode with a NiO field limiting ring and floating field plate composite terminal structure and a P-NiO / N-Ga2O3 heterojunction diode with only a NiO field limiting ring structure at a reverse voltage of 3000 V in a preferred embodiment;

[0035] Figure 4 This is a schematic diagram of the variation of the withstand voltage of a P-NiO / N-Ga2O3 heterojunction diode with a NiO field limiting ring and floating field plate composite terminal structure and a P-NiO / N-Ga2O3 heterojunction diode with only a NiO field limiting ring structure as the spacing between the field limiting rings changes. DETAILED DESCRIPTION

[0036] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0037] The present invention provides a Ga2O3 power device with a composite termination structure of a NiO field-limiting ring and a floating field plate, and a method for preparing the same. To clarify the objectives, technical solutions, and advantages of the present invention, the present invention is described in further detail below. It should be understood that the specific embodiments described herein are intended only to illustrate the present invention and are not intended to limit the present invention.

[0038] It should be noted that the following detailed description is illustrative and is intended to provide further explanation of the present application. Unless otherwise specified, all technical and scientific terms used herein have the same meanings as those commonly understood by those of ordinary skill in the art to which this application belongs. The terms used in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention.

[0039] Terms such as “vertical,” “horizontal,” “up,” “down,” “left,” “right,” and similar expressions used herein are for illustrative purposes only and do not represent the only implementation methods.

[0040] In the present invention, unless otherwise expressly specified or limited, when a first feature is “above,” “above,” or “above” a second feature, it may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. When a first feature is “below,” “below,” or “below” a second feature, it may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0041] If there are descriptions involving "first", "second", etc. in the embodiments of the present invention, the descriptions of "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features.

[0042] A P-NiO / N-Ga2O3 heterojunction diode with a NiO field limiting ring and a floating field plate composite terminal structure, reference Figure 1-4, comprising a cathode metal layer 1, a highly doped N-type Ga2O3 substrate 2, a low-doped N-type Ga2O3 epitaxial layer 3, an oxide dielectric layer 4, a P-type NiO layer 51, a plurality of NiO field limiting rings 52, an anode metal and anode field plate 61, a plurality of floating metal field plates 62, and a passivation layer 7 stacked in sequence from bottom to top. The P-type NiO layer 51 and the plurality of NiO field limiting rings 52 constitute a first assembly 5; the first assembly 5 is evenly spaced on a portion of the surface of the low-doped N-type Ga2O3 epitaxial layer 3 and forms an alternating distribution structure with the oxide dielectric layer 4; the anode metal and anode field plate 61 cover the entire surface of the P-type NiO layer 51 and a portion of the surface of the oxide dielectric layer 4; the plurality of floating metal field plates 62 are evenly spaced on a portion of the surface of the oxide dielectric layer 4 and the entire surface of the NiO field limiting rings 52; the anode metal and anode field plate 61 and the floating metal field plate 62 constitute a second assembly 6;

[0043] Reference Figure 2 The present invention prepares a P-NiO / N-Ga2O3 heterojunction diode having a NiO field limiting ring and a floating field plate composite terminal structure, and provides the following examples:

[0044] In this embodiment, the cathode metal layer 1 is made of Ni / Au with a thickness of 50 / 250 nm (the Ni metal layer is on the bottom with a thickness of 20 nm, and the Au metal layer is on the top with a thickness of 250 nm).

[0045] In this embodiment, the thickness of the highly doped N-type Ga2O3 substrate 2 is 500 μm, and the doping concentration is 1×10 18 cm -3 .

[0046] In this embodiment, the thickness of the low-doped N-type Ga2O3 substrate 3 is 10 μm, and the doping concentration is 1.2×10 16 cm -3 .

[0047] In this embodiment, the material of the oxide dielectric layer 4 is SiO2, with a thickness of 600 nm, a length W1 of 6 μm, and a spacing of 5 μm.

[0048] In this embodiment, the thickness of the P-type NiO layer 51 and the plurality of NiO field limiting rings 52 is 400 nm, and the P-type carrier concentration is 7.6×10 17 cm -3 ; The length of the P-type NiO layer 51 is 180 μm, the length of the NiO field limiting ring 52 is 5 μm, the spacing W1 is 6 μm, and the number is 4.

[0049] In this embodiment, the anode metal and the anode field plate 61 are made of Ni / Au with a thickness of 50 / 250 nm (where the Ni metal layer is at the bottom and has a thickness of 20 nm, and the Au metal layer is at the top and has a thickness of 250 nm). The anode metal length is 180 μm, and the anode field plate length L is 180 μm. fp 5 μm.

[0050] In this embodiment, the material of the floating metal field plates 62 is Ni / Au, with a thickness of 50 / 250 nm (where the Ni metal layer is at the bottom and has a thickness of 20 nm, and the Au metal layer is at the top and has a thickness of 250 nm), a length of 5 μm, and four floating field plates.

[0051] In this embodiment, the material of the passivation layer 7 is Si3N4, and the thickness is 5 μm.

[0052] The preparation method is as follows:

[0053] Step 1: Place a 500 μm thick N-type doping concentration of 1×10 18 cm -3 The Sn-doped Ga2O3 substrate was pretreated to remove surface particles and stains.

[0054] Step 2: Use MOCVD process to grow epitaxially on the cleaned Sn-doped Ga2O3 substrate with a thickness of 10 μm and an N-type doping concentration of 1.2×10 16 cm -3 low-doped N-type Ga2O3 epitaxial layer 3.

[0055] Step 3: SiO2 with a thickness of 600 nm is deposited on the upper surface of the low-doped N-type Ga2O3 epitaxial layer 3 using a PECVD process.

[0056] Step 4: Etch the oxide deposited in step 3 by a standard photolithography process to form a SiO2 dielectric layer 4.

[0057] Step 5: Use magnetron sputtering to deposit a 400 nm thick, 7.6×10- 17 cm -3 A P-type NiO layer (part of which is deposited on the SiO2 dielectric layer and the other part of which is deposited on the low-doped N-type Ga2O3 epitaxial layer 3).

[0058] Step 6: Etch the NiO deposited in step 5 by a standard photolithography process until the NiO on the SiO 2 dielectric layer 4 is completely removed, thereby forming a P-type NiO layer 51 and a plurality of NiO field limiting rings 52 .

[0059] Step 7: Ni / Au metal with a thickness of 50 / 250 nm is deposited on the upper surface of the sample using an electron beam evaporation process, and then a standard lift-off process is used to form an anode metal and an anode field plate 61 with good ohmic contact and several floating metal field plates 62.

[0060] Step 8: Ni / Au with a thickness of 50 / 250 nm is deposited on the lower surface of the N-type Ga2O3 substrate 2 using an electron beam evaporation process to form a cathode metal layer 1 with ohmic contact.

[0061] Step 9: Use PECVD process to deposit SiO2 with a thickness of 3 μm on the upper surface of the sample, and form a SiO2 passivation layer 7 through a standard lift-off process.

[0062] The above is a further detailed description of the present invention in conjunction with specific preferred embodiments, and the specific implementation of the present invention should not be considered to be limited to these descriptions. For those skilled in the art of the present invention, without departing from the concept of the present invention, several simple deductions or substitutions can be made, which should be considered to fall within the scope of protection of the present invention.

[0063] The working principle of the present invention is as follows: First, a number of NiO field limiting rings are used to extend the depletion region of the device to each field limiting ring in sequence during reverse breakdown, and a new peak electric field is introduced at the end of the NiO field limiting ring, forming a step-down potential distribution (i.e., the peak electric field at the main junction is still the highest, and the peak electric field at the end of the NiO field limiting ring gradually decreases as the distance from the main junction increases). Each NiO field limiting ring will share part of the voltage, making the electric field distribution uniform and alleviating the curvature effect of the Ga2O3 diode. Secondly, by extending the anode metal to form anode field plates on both sides of the main junction, the electric field lines are attracted to extend to the area covered by the anode field plates, further alleviating the peak electric field at the main junction. Finally, a floating field plate is introduced above each NiO field limiting ring (i.e., the floating field plate corresponds to the NiO field limiting ring one-to-one and is suspended above the dielectric layer), forming a potential transition zone between adjacent NiO field limiting rings, improving the continuity of the electric field distribution, and making the electric field distribution more uniform. In particular, extending the length of the field plate can increase the optimal spacing of the NiO field limiting rings, reducing the device's dependence on processing size. That is to say, by combining the NiO field limiting ring structure with the floating field plate structure, the Ga2O3-based device provided by the present invention can still have a high breakdown voltage when the field limiting ring spacing is wide, thereby simplifying the device process.

[0064] Figure 2The specific process flow for the P-NiO / N-Ga2O3 heterojunction diodes with NiO field-limiting ring structures and floating field-plate field-limiting ring structures of the present invention is presented. The process flow for this structure is simple, and the feasibility of the process is demonstrated by the following: In step 5, the P-type NiO layer deposited by magnetron sputtering completely covers the upper surface of the low-doped N-type Ga2O3 epitaxial layer 3, preventing damage to the low-doped N-type Ga2O3 epitaxial layer 3 during subsequent etching processes. In step 8, the anode metal layer deposited by electron beam evaporation completely covers the upper surface of the P-type NiO layer 51 and several NiO field-limiting rings 52, preventing damage to the P-type NiO layer 51 during subsequent stripping processes.

[0065] Figure 3 The comparison of the surface electric field distribution of the P-NiO / N-Ga2O3 heterojunction diode with a NiO field limiting ring structure and a floating field plate field limiting ring structure at a reverse voltage of 3000 V is given. It should be noted that due to the bilateral symmetry of the terminal structure of the device, in order to improve the computational efficiency and optimize the allocation of finite element mesh resources, this simulation adopts a semi-symmetric model (i.e., only the right half of the structure is retained) for analysis. Figure 3 As can be seen in the figure, a new peak electric field is introduced at the end of the heterojunction diode ring with a field-limiting ring structure, but the peak electric field at the main junction is still high (the peak electric field is as high as 10 MV, exceeding the critical breakdown electric field of the Ga2O3 material), and the surface electric field distribution is uneven. After the field plate structure (including the anode field plate and the floating field plate) is introduced, the peak electric field at the main junction is greatly reduced, and a new peak electric field appears at the end of the field plate, which is almost the same as the peak electric field at the end of the field-limiting ring. The surface electric field distribution is uniform, greatly improving the withstand voltage of the heterojunction diode.

[0066] Figure 4 A schematic diagram of the variation of the withstand voltage of the P-NiO / N-Ga2O3 heterojunction diode with the field limiting ring structure and the field limiting ring structure with floating field plate in the present invention is given. Figure 4 It can be seen from the figure that the withstand voltage of the heterojunction diode device with only NiO field limiting ring structure decreases with the increase of the ring spacing. The optimal ring spacing is 0.5 μm, at which time the reverse breakdown voltage is 3300 V. When the ring spacing is greater than 3 μm (corresponding to the point in the gray area), the device withstand voltage will be lower than the maximum breakdown voltage (V brThe maximum reverse breakdown voltage of a heterojunction diode with a floating field plate field-limiting ring structure is 5400 V, a 134% increase compared to a heterojunction diode without a terminal structure. Furthermore, when the ring spacing is greater than 2 μm, the device's withstand voltage is always greater than 80% of the maximum breakdown voltage, with a lower dependence on processing dimensions and more flexibility in the selection of process parameters.

Claims

1. A P-NiO / N-Ga2O3 heterojunction diode having a NiO field limiting ring and a floating field plate composite terminal structure, characterized in that: The invention comprises a cathode metal layer (1), a highly doped N-type Ga2O3 substrate (2), a low-doped N-type Ga2O3 epitaxial layer (3), an oxide dielectric layer (4), a P-type NiO layer (51), a plurality of NiO field limiting rings (52), an anode metal and an anode field plate (61), a plurality of floating metal field plates (62), and a passivation layer (7) stacked in sequence from bottom to top; The cathode metal layer (1) is deposited on the lower surface of the highly doped N-type Ga2O3 substrate (2); the oxide dielectric layer (4) is evenly distributed on a portion of the surface of the low-doped N-type Ga2O3 epitaxial layer (3); the P-type NiO layer (51) and a plurality of NiO field limiting rings (52) constitute a first combination part (5); the first combination part (5) is evenly distributed on a portion of the surface of the low-doped N-type Ga2O3 epitaxial layer (3) and forms an alternating distribution structure with the oxide dielectric layer (4); the anode metal and the anode field plate (61) cover the entire surface of the P-type NiO layer (51) and a portion of the surface of the oxide dielectric layer (4); a plurality of floating metal field plates (62) are evenly distributed on a portion of the surface of the oxide dielectric layer (4) and the entire surface of the NiO field limiting rings (52), forming a second combination part (6); the passivation layer (7) covers the entire surface of the oxide dielectric layer (4) and the plurality of floating metal field plates (62) and a portion of the surface of the anode metal and the anode field plate (61).

2. A P-NiO / N-Ga2O3 heterojunction diode having a NiO field limiting ring and a floating field plate composite terminal structure according to claim 1, characterized in that: The first combination part (5) and the oxide dielectric layer (4) present a periodic distribution of ABAB... on the low-doped N-type Ga2O3 epitaxial layer (3), wherein A represents the first combination part (5), and B represents the oxide dielectric layer (4), and the side walls of the first combination part (5) and the oxide dielectric layer (4) are tightly fitted.

3. The P-NiO / N-Ga2O3 heterojunction diode having a NiO field limiting ring and a floating field plate composite terminal structure according to claim 1, characterized in that: The material for preparing the cathode metal layer (1) includes at least one of Ti, Ni, Ag, and Au, and the total thickness of the cathode metal layer (1) is 200-500 nm.

4. The P-NiO / N-Ga2O3 heterojunction diode having a NiO field limiting ring and a floating field plate composite terminal structure according to claim 1, characterized in that: The thickness of the highly doped N-type Ga2O3 substrate (2) is 50-650 μm, and the doping concentration is 10 18 -10 20 cm -3 The thickness of the low-doped N-type Ga2O3 epitaxial layer (3) is 10-20 μm, and the doping concentration is 10 16 -10 17 cm -3 .

5. The P-NiO / N-Ga2O3 heterojunction diode having a NiO field limiting ring and a floating field plate composite terminal structure according to claim 1, characterized in that: The material for preparing the oxide dielectric layer (4) includes at least one of SiO2, Al2O3, and Si3N4, the thickness of the oxide dielectric layer (4) is 600-800 nm, the length W1 of the oxide dielectric layer (4) is 6-10 μm, and the spacing between the oxide dielectric layers (4) is 5-10 μm.

6. The P-NiO / N-Ga2O3 heterojunction diode having a NiO field limiting ring and a floating field plate composite terminal structure according to claim 1, characterized in that: The thickness of the first combination part (5) is 400-600 nm, and the P-type carrier concentration is 10 17 -10 18 cm -3 The length of the P-type NiO layer (51) is 100-500 μm, the length of the NiO field limiting ring (52) is 5-10 μm, the spacing W1 is 6-10 μm, the number is 4-8, and an alternating distribution structure is formed with the oxide dielectric layer (4).

7. The P-NiO / N-Ga2O3 heterojunction diode having a NiO field limiting ring and a floating field plate composite terminal structure according to claim 1, characterized in that: The materials for preparing the anode metal and the anode field plate (61) include at least one of Ni, Mo, W, Pt, Al, Au and Ag. The length of the anode metal is 100-500 μm, and the length of the anode field plate is L fp 4-8 μm.

8. The P-NiO / N-Ga2O3 heterojunction diode having a NiO field limiting ring and a floating field plate composite terminal structure according to claim 1, characterized in that: The material for preparing the floating metal field plate (62) includes at least one of Ni, Mo, W, Pt, Al, Au and Ag. The length of the floating metal field plate is 4-8 μm, and the number of the floating metal field plates is 4-8.

9. The P-NiO / N-Ga2O3 heterojunction diode having a NiO field limiting ring and a floating field plate composite terminal structure according to claim 1, characterized in that: The materials used to prepare the passivation layer (7) include polyimide (PI), Si3N4, SiO2 and SU-8 glue, and the thickness of the passivation layer (7) is 5-10 μm.

10. A method for preparing a P-NiO / N-Ga2O3 heterojunction diode having a composite terminal structure of a NiO field limiting ring and a floating field plate, characterized in that: A P-NiO / N-Ga2O3 heterojunction diode having a NiO field limiting ring and a floating field plate composite terminal structure as described in any one of claims 1 to 9 is prepared, comprising the following steps: Step 1: Pre-treating the highly doped N-type Ga2O3 substrate (2) to remove surface particles and stains; Step 2: depositing a low-doped N-type Ga2O3 epitaxial layer (3) on the upper surface of the pre-treated high-doped N-type Ga2O3 substrate (2); Step 3: depositing a layer of oxide on the upper surface of the low-doped N-type Ga2O3 epitaxial layer (3); Step 4: etching the oxide deposited in step 3 by a standard photolithography process to form an oxide dielectric layer (4); Step 5: depositing a layer of P-type NiO on the upper surface of the etched sample, wherein a portion of the NiO is deposited on the oxide dielectric layer (4) and another portion of the NiO is deposited on the low-doped N-type Ga2O3 epitaxial layer (3); Step 6: Etching the NiO deposited in step 5 by a standard photolithography process until the NiO on the oxide dielectric layer (4) is completely removed, thereby forming a P-type NiO layer (51) and a plurality of NiO field limiting rings (52); Step 7: depositing a layer of metal on the sample surface, and forming an anode metal and an anode field plate (61) and a plurality of floating metal field plates (62) through a standard lift-off process; Step 8: depositing a cathode metal layer (1) on the lower surface of the highly doped N-type Ga2O3 substrate (2); Step 9: Deposit a layer of oxide on the sample surface and form a passivation layer (7) using standard photolithography technology.

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