Test screening method and system for enhancing electrical interference resistance of chip

Abstract

The invention provides a test screening method and system for enhancing chip electrical interference resistance, and relates to the technical field of semiconductor chip electrical interference resistance, and the method comprises the steps: extracting a characteristic frequency set and corresponding space electric field distribution through a finite element analysis method, and generating an excitation signal library; the electron spin quantum state of the NV color center is regulated and controlled through microwave pulses, and a characteristic resonance frequency point set corresponding to the microcracks is locked; according to the characteristic resonance frequency point set, constructing a Vietories-Rips complex, and screening out a high-risk chip of which the defect risk index is greater than 0.15; dynamic bias temperature stress is applied to the high-risk chips, and the chips meeting the standard are screened out; and optimizing the excitation combination weight, the frequency band priority and the stress loading time sequence through interactive training, and finally outputting a self-adaptive test strategy. The method has the beneficial effects that the full-flow closed-loop control from signal generation, defect positioning to strategy self-adaption is realized, and the long-term stability of the chip is guaranteed.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor chip anti-electrical interference, and in particular to a test screening method and system for enhancing chip anti-electrical interference. Background Art

[0002] At present, the anti-interference test of high-density integrated circuits in complex electromagnetic environments mainly relies on fixed frequency band scanning and statistical threshold judgment of automatic test equipment. The traditional method has significant defects: first, the test bandwidth of ATE is usually limited to less than 200MHz, which cannot capture the hidden defects caused by GHz-level transient interference; second, the test parameters are set based on manual experience, resulting in a misjudgment rate of up to 15%-20%, and it cannot dynamically adapt to process fluctuations.

[0003] Existing technologies attempt to alleviate interference by adding a shielding cover or improving the filtering algorithm, but the former is limited by the packaging space, and the latter is difficult to cope with the multi-physical field coupling effect due to the rigid algorithm. Neither of them fundamentally solves the problem of high-frequency defect detection and reliability assessment. Summary of the invention

[0004] The purpose of the present invention is to provide a test screening method and system for enhancing chip anti-electrical interference to improve the above problems. In order to achieve the above purpose, the technical solution adopted by the present invention is as follows: In a first aspect, the present application provides a test screening method for enhancing chip resistance to electrical interference, comprising: Based on the failure frequency distribution data of historical failed chips on the production line, the three-dimensional time-domain finite difference method is used to solve the characteristic modes of the Maxwell equations. The characteristic frequency set and its corresponding spatial electric field distribution are extracted through the finite element analysis method to generate an excitation signal library, which includes sweep frequency signals, pulse modulation signals and field distribution coupling signals. The diamond NV color center array is used to detect the response of the excitation signal in the excitation signal library, and the electron spin quantum state of the NV color center is regulated by microwave pulses, the ground state transition probability is measured and the time domain magnetic field signal is inverted, and the time domain magnetic field signal is short-time Fourier transformed to generate the magnetic field fluctuation spectrum, and the characteristic resonance frequency point set corresponding to the microcrack is locked; The Vietoris-Rips complex is constructed based on the characteristic resonant frequency set, the continuous coherence characteristics are calculated and a life cycle distribution diagram is generated. The defect risk index is calculated based on the Betti number of the life cycle distribution diagram, and high-risk chips with a defect risk index greater than 0.15 are screened out; Traverse the list of high-risk chips, apply dynamic bias temperature stress to the high-risk chips, calculate the gate oxide trap density change rate through the electrothermal coupling effect, and screen out chips that meet the standards; Input the excitation signal library, the set of characteristic resonance frequencies, high-risk chips, and compliant chips into the deep deterministic policy gradient model for training. Use the test coverage rate and false positive rate as the reward function, and optimize the excitation combination weights, frequency band priorities, and stress loading timings through interactive training. Finally, output the adaptive test strategy.

[0005] Preferably, based on the failure frequency distribution data of historical failed chips on the production line, the characteristic modes of the Maxwell equation are solved using the three-dimensional finite difference time domain method. The set of characteristic frequencies and their corresponding spatial electric field distributions are extracted through the finite element analysis method to generate an excitation signal library, which includes: Obtain the frequency point distribution data of the failed chips in the historical failure analysis report of the production line. Based on the electromagnetic field theory, establish the Maxwell eigenvalue equation of the transient electromagnetic field to obtain the electromagnetic eigenmode of the chip under transient interference. Based on the electromagnetic eigenmode, use the finite element analysis to perform mesh division on the chip package structure, extract multiple resonance frequency points of the chip in the range of 1 MHz - 3 GHz, and the three-dimensional spatial field distribution corresponding to each resonance frequency point. Convert the characteristic frequencies of the resonance frequency points into time domain signals, and combine them with the three-dimensional spatial field distribution to generate signal types. Use the signal types as the excitation signal library, where the excitation signal library includes the sweep signal coverage of 1 MHz - 3 GHz, the adjustment of the spatial coupling mode of the signal based on the three-dimensional spatial field distribution, and various signal forms including single frequency, sweep, and pulse modulation.

[0006] Preferably, use the diamond NV color center array to detect the response of the excitation signals in the excitation signal library. Regulate the electron spin quantum state of the NV color center through microwave pulses, measure the ground state transition probability, and invert the time domain magnetic field signal. Perform a short-time Fourier transform on the time domain magnetic field signal to generate a magnetic field fluctuation spectrum, and lock the set of characteristic resonance frequencies corresponding to the microcracks, which includes: Based on the excitation signal library, utilize the quantum spin characteristics of the diamond nitrogen vacancy color center. By applying microwave pulses with a frequency of 12.5 - 18.5 GHz, regulate the electron spin quantum state of the NV color center, drive its spin state to transition from the ground state to the excited state, and form a coherent superposition state of the NV color center array. Measure the proportion of color centers in the ground state in the NV color center array through a fluorescence detection device, calculate the ground state transition probability, and invert the time domain magnetic field signal based on a preset inversion formula. Perform time-frequency analysis on the time domain magnetic field signal. Use the short-time Fourier transform to divide it into 50 ns time windows and generate time-frequency spectrograms segment by segment. Perform noise reduction processing on the time-frequency spectrograms through the Daubechies wavelet function to obtain the noise-reduced time-frequency spectrograms. Identify the set of peak frequency points that persist in the time-frequency spectrogram after noise reduction, and output the set of peak frequency points as the determination criterion for defect location, denoted as the characteristic resonance frequency point set, where the peak frequency points in the set of peak frequency points correspond to the local resonance characteristics caused by chip microcracks.

[0007] Preferably, construct a Vietoris-Rips complex based on the characteristic resonance frequency point set, calculate the persistent homology characteristics and generate a life cycle distribution diagram, calculate the defect risk index based on the Betti number of the life cycle distribution diagram, and screen out high-risk chips with a defect risk index greater than 0.15, including: Based on the characteristic resonance frequency point set, map the frequency points to points in a high-dimensional space. According to a preset point spacing threshold, connect adjacent points to form a complex, and then obtain a topological structure model of the frequency point space correlation. By incrementally expanding the scale parameter in the topological structure model, calculate the persistent homology characteristics of the complex in the one-dimensional homology group, and at the same time record the generation and disappearance process of the circular topological structure, and generate an original data set containing the life cycles of each circular structure; Analyze the generated original data set, extract the life cycle distribution diagram of the one-dimensional circular topological features associated with the defect frequency band in the characteristic resonance frequency point set. In the life cycle distribution diagram, the horizontal axis represents the frequency point spacing scale parameter, and the vertical axis represents the persistence length of the circular structure. By quantifying the correlation between the persistence length and the frequency point density, generate a defect risk space mapping relationship; Based on the defect risk space mapping relationship, count the number of circular rings of the Betti number in each frequency band interval to obtain a statistical result, calculate the defect risk index, screen out high-risk chips with a defect risk index greater than 0.15, and output the corresponding list.

[0008] Preferably, traverse the list of high-risk chips, apply dynamic bias temperature stress to the high-risk chips, calculate the change rate of the gate oxide trap density through the electro-thermal coupling effect, and screen out the chips that meet the standards, including: For the list of high-risk chips, apply dynamic bias temperature stress, including alternately applying a drain-source voltage of 1200 V and a junction temperature environment of 175 °C to simulate the electro-thermal coupling effect under extreme working conditions, so as to obtain electro-thermal response data; Based on the electro-thermal response data, analyze the electro-thermal coupling effect, extract the key parameters related to the electro-thermal coupling effect, and use the key parameters to calculate the change rate of the gate oxide trap density through a preset model; Set a threshold for the change rate of the gate oxide trap density, eliminate the failed chips with a change rate exceeding the threshold, and finally output the list of chips that pass the reliability test to complete the final verification of the anti-electromagnetic interference performance.

[0009] Second aspect, the present application also provides a test screening system for enhancing the anti-electrical interference of chips, including: Solution module: configured to solve the characteristic modes of the Maxwell equation by using the three-dimensional time-domain finite-difference method based on the failure frequency point distribution data of the historical failed chips on the production line, extract the set of characteristic frequencies and their corresponding spatial electric field distributions through the finite element analysis method, and generate an excitation signal library, where the excitation signal library includes sweep signals, pulse modulation signals, and field distribution coupling signals; Inversion calculation module: configured to detect the response of the excitation signals in the excitation signal library by using the diamond NV color center array, regulate the electron spin quantum state of the NV color center through microwave pulses, measure the ground state transition probability and invert the time-domain magnetic field signal, perform short-time Fourier transform on the time-domain magnetic field signal to generate a magnetic field fluctuation spectrum, and lock the set of characteristic resonance frequency points corresponding to the microcracks; First calculation and screening module: configured to construct a Vietoris-Rips complex according to the set of characteristic resonance frequency points, calculate the persistent homology characteristics and generate a life cycle distribution map, calculate the defect risk index based on the Betti number of the life cycle distribution map, and screen out high-risk chips with a defect risk index greater than 0.15; Second calculation and screening module: configured to traverse the list of high-risk chips, apply dynamic bias temperature stress to the high-risk chips, calculate the change rate of the gate oxide trap density through the electrothermal coupling effect, and screen out the chips that meet the standards; Training module: configured to input the excitation signal library, the set of characteristic resonance frequency points, the high-risk chips, and the chips that meet the standards into the deep deterministic policy gradient model for training, use the test coverage rate and misjudgment rate as the reward function, optimize the excitation combination weights, frequency band priorities, and stress loading timings through interactive training, and finally output an adaptive test strategy.

[0010] Third aspect, the present application also provides a test screening device for enhancing the anti-electrical interference of chips, including: Memory, configured to store a computer program; Processor, configured to implement the steps of the test screening method for enhancing the anti-electrical interference of chips when executing the computer program.

[0011] Fourth aspect, the present application also provides a readable storage medium, on which a computer program is stored, and the computer program, when executed by a processor, implements the steps of the above-mentioned test screening method for enhancing the anti-electrical interference of chips.

[0012] The beneficial effects of the present invention are: The present invention proposes a chip testing method that integrates quantum sensing, topological data analysis, and reinforcement learning. By constructing a multi-modal excitation signal library to simulate the real electromagnetic environment, using a diamond NV color center array to achieve magnetic field detection, combining persistent homology to quantify defect risks, and adopting a deep deterministic policy gradient model to dynamically optimize the testing strategy, it breaks through the bandwidth and accuracy limitations of traditional technologies and realizes a full-process closed-loop control from signal generation, defect location to policy adaptation.

[0013] The present invention breaks through the traditional ATE bandwidth limitation through quantum sensing, improves the frequency point positioning accuracy, and enhances the micro-crack detection rate; based on the defect risk index of topological data analysis, it reduces the misjudgment rate and solves the subjective deviation problem of manual experience at the same time; the reinforcement learning model realizes the adaptive adjustment of testing parameters, shortens the testing cycle, and supports real-time response to process fluctuations; the electro-thermal coupling stress model accurately predicts the gate oxide trap density to ensure the long-term stability of the chip.

[0014] Other features and advantages of the present invention will be described in the subsequent specification, and part of them will become obvious from the specification, or can be understood by implementing the embodiments of the present invention. The objectives and other advantages of the present invention can be achieved and obtained through the structures specifically pointed out in the written specification, claims, and drawings. Brief Description of the Drawings

[0015] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the drawings required to be used in the embodiments. It should be understood that the following drawings only show some embodiments of the present invention, so they should not be regarded as limiting the scope. For those of ordinary skill in the art, without creative efforts, other related drawings can also be obtained based on these drawings.

[0016] Figure 1 It is a schematic flow chart of the test screening method for enhancing the anti-electromagnetic interference of the chip described in the embodiments of the present invention; Figure 2 It is a schematic structural diagram of the test screening system for enhancing the anti-electromagnetic interference of the chip described in the embodiments of the present invention; Figure 3 It is a schematic structural diagram of the test screening device for enhancing the anti-electromagnetic interference of the chip described in the embodiments of the present invention.

[0017] In the figure: 701, solution module; 702, inversion calculation module; 703, first calculation and screening module; 704, second calculation and screening module; 705, training module; 800, test screening device for enhancing the anti-electromagnetic interference of the chip; 801, processor; 802, memory; 803, multimedia component; 804, I / O interface; 805, communication component. Detailed Embodiments

[0018] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. The components of the embodiments of the present invention described and illustrated in the accompanying drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed present invention, but merely represents selected embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts fall within the scope of protection of the present invention.

[0019] It should be noted that similar reference numerals and letters denote similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. At the same time, in the description of the present invention, the terms "first", "second", etc. are only used for descriptive distinction and cannot be construed as indicating or implying relative importance.

[0020] Embodiment 1:

[0021] This embodiment provides a test screening method for enhancing the anti-electromagnetic interference of a chip.

[0022] See Figure 1 , which shows that this method includes step S100, step S200, step S300, step S400, and step S500.

[0023] S100. Based on the failure frequency point distribution data of historical failed chips on the production line, use the three-dimensional time-domain finite difference method to solve the eigenmodes of the Maxwell equation, extract the set of eigenfrequencies and their corresponding spatial electric field distributions through the finite element analysis method, and generate an excitation signal library, where the excitation signal library includes sweep signals, pulse modulation signals, and field distribution coupling signals.

[0024] It can be understood that in this step S100, it includes S101, S102, and S103, where: S101. Obtain the frequency point distribution data of the failed chips in the historical failure analysis report of the production line. Based on the electromagnetic field theory, establish the Maxwell eigenvalue equation of the transient electromagnetic field to obtain the electromagnetic field eigenmode of the chip under transient interference. The calculation formula is as follows:

[0025] In the formula, is the curl operator, μ is the magnetic permeability, and E n is the electric field distribution vector, is the characteristic angular frequency, is the dielectric constant; S102: Based on the electromagnetic field eigenmode, use finite element analysis to perform mesh division on the chip package structure, extract multiple resonance frequency points of the chip in the range of 1 MHz - 3 GHz, and the corresponding three-dimensional spatial field distribution for each resonance frequency point; S103: Convert the characteristic frequency of the resonance frequency point into a time-domain signal, and combine it with the three-dimensional spatial field distribution to generate a signal type, and use the signal type as the excitation signal library, where the excitation signal library includes sweep signal coverage from 1 MHz - 3 GHz, adjustment of the spatial coupling mode of the signal based on the three-dimensional spatial field distribution, and various signal forms including single frequency, sweep, and pulse modulation.

[0026] It should be noted that the data source is to extract the frequency point distribution data of at least 300 failed chips (such as the range of 300 - 500 MHz) based on the production line historical failure analysis report (FA Report), and use the three-dimensional time-domain finite difference method (3D-FDTD) to solve the Maxwell eigenvalue equation. Among them, the Yee grid algorithm sets a 10-μm spatial resolution (matching the 3-GHz wavelength) and a 0.1 - 1-ps time step. The spatial grid resolution needs to match the minimum wavelength (such as 10-μm grid for 3 GHz); and set the perfectly matched layer (PML) absorption boundary to avoid reflection interference, and then extract the characteristic frequency and the electric field distribution E n ; perform finite element analysis through the adaptive grid encryption technology (encrypting the chip edge to 5 μm); use frequency response analysis to screen out the 1 MHz - 3 GHz resonance peaks with a Q factor greater than or equal to 50, that is, exclude the pseudo-modes with a Q factor less than 50; and use the normalized E n field distribution for the excitation signal parameter setting; finally generate a multi-modal excitation signal library including 1-MHz stepped sweep (residing for 10 μs), rising pulse with a rise time less than 1 ns (simulating ESD), and spatial coupling signals based on the E n field distribution. This step not only breaks through the 200-MHz bandwidth limitation of traditional ATE, supports 3-GHz transient interference simulation, but also optimizes the signal coupling efficiency through the electromagnetic field eigen-solution, improves the test sensitivity, and is compatible with chip testing of different process nodes.

[0027] S200: Use the diamond NV color center array to detect the response of the excitation signals in the excitation signal library, regulate the electron spin quantum state of the NV color center through microwave pulses, measure the ground state transition probability and invert the time-domain magnetic field signal, perform short-time Fourier transform on the time-domain magnetic field signal to generate the magnetic field fluctuation spectrum, and lock the set of characteristic resonance frequency points corresponding to the microcracks.

[0028] It is understandable that in this step S200, it includes S201, S202, S203 and S204, where: S201. Based on the excitation signal library, using the quantum spin characteristics of diamond nitrogen-vacancy color centers, by applying microwave pulses with a frequency of 12.5 - 18.5 GHz to regulate the electron spin quantum state of the NV color centers, driving the transition of its spin state from the ground state to the excited state, and forming a coherent superposition state of NV color center arrays; It should be noted that chemical vapor deposition diamond is used, and NV color center density of 10¹ 7 cm⁻³ is formed by ion implantation, and the spin state is regulated by a 12.5 - 18.5 GHz Hahn echo sequence. These pulses can precisely regulate the electron spin quantum state of the NV color centers, and 532 nm laser excitation and APD are used to detect the fluorescence intensity. Through the action of microwave pulses, the electron spin of the NV color centers is driven to transition from the ground state (|0>) to the excited state (|1>), forming a coherent superposition state . This coherent superposition state is a key state in quantum computing and quantum sensing and can be used for highly sensitive magnetic field detection. By preparing diamond through chemical vapor deposition and forming a high-density NV color center array in the diamond through ion implantation technology, this array structure can improve the signal intensity and uniformity, thereby improving the detection sensitivity.

[0029] S202. Measure the proportion of color centers in the ground state in the NV color center array through a fluorescence detection device, calculate the ground state transition probability, and based on a preset inversion formula, invert the time-domain magnetic field signal. The calculation formula of the preset inversion formula is as follows:

[0030] In the formula, B rf (t) is the inverted time-domain magnetic field signal is the electron gyromagnetic ratio, is the integration time, is the ground state transition probability; It should be noted that the proportion of color centers in the ground state (|0>) in the NV color center array is measured using a fluorescence detection device. Among them, the NV color centers emit fluorescence with a specific wavelength in the ground state. The proportion of ground state color centers can be determined by detecting the fluorescence intensity, and based on the fluorescence detection results, the ground state transition probability is calculated. This probability reflects the probability of the NV color centers transitioning from the ground state to the excited state under the action of microwave pulses. Based on the inversion formula to obtain the time-domain magnetic field signal, the time-domain magnetic field signal can be inverted with high precision.

[0031] S203. Perform time-frequency analysis on the time-domain magnetic field signal. Use the short-time Fourier transform to divide it into 50-ns time windows and generate a time-frequency spectrogram segment by segment. Denoise the time-frequency spectrogram using the Daubechies wavelet function to obtain the denoised time-frequency spectrogram. It should be noted that after denoising by the Blackman-Harris window STFT (window length of 50 ns) and the Daubechies6 wavelet, a set of defect characteristic frequency points with an accuracy of ±1 MHz is extracted to provide accurate data for subsequent spectrum analysis and to achieve dynamic monitoring of the magnetic field signal. In this step, time-frequency analysis is performed on the inverted time-domain magnetic field signal, and the short-time Fourier transform (STFT) is used to divide the signal into 50-ns time windows, generating a time-frequency spectrogram segment by segment, which can simultaneously analyze the time-domain and frequency-domain characteristics of the signal and provide more comprehensive signal information. Moreover, the Daubechies wavelet function is used to denoise the time-frequency spectrogram, effectively removing the noise in the signal while retaining the main characteristics of the signal.

[0032] S204. Identify the set of peak frequency points that persist in the denoised time-frequency spectrogram, and output the set of peak frequency points as the criterion for defect location, denoted as the set of characteristic resonance frequency points, where the peak frequency points in the set of peak frequency points correspond to the local resonance characteristics caused by microcracks in the chip.

[0033] It should be noted that in the denoised time-frequency spectrogram, identifying the set of peak frequency points that persist is to reflect the main frequency components in the signal, which is closely related to the local resonance characteristics of the chip. And the identified set of peak frequency points is used as the criterion for defect location, and these peak frequency points correspond to the local resonance characteristics caused by microcracks in the chip, which can be used to accurately identify the defect location in the chip. Finally, these peak frequency points are denoted as the set of characteristic resonance frequency points, serving as the basis for subsequent defect location and analysis. This step can accurately locate defects such as microcracks in the chip, improve the accuracy of defect detection, and contribute to further research on the nature and impact of defects.

[0034] S300. Construct a Vietoris-Rips complex based on the set of characteristic resonance frequency points, calculate the persistent homology characteristics and generate a life cycle distribution map, calculate the defect risk index based on the Betti numbers of the life cycle distribution map, and screen out high-risk chips with a defect risk index greater than 0.15.

[0035] It can be understood that in this step S300, it includes S301, S302, and S303, where: S301. Based on the set of characteristic resonance frequency points, map the frequency points to points in a high-dimensional space. According to a preset point-spacing threshold, connect adjacent points to form a complex, and then obtain a topological structure model of the frequency-point space correlation. By incrementally expanding the scale parameter in the topological structure model, calculate the persistent homology features of the complex in the one-dimensional homology group, and at the same time record the generation and disappearance processes of the circular topological structures, generating an original data set containing the life cycles of each circular structure; It should be noted that the frequency-point set is mapped to a metric space, and the distance function is defined as the frequency-point spacing , where d is the distance function, f i is the first data point, f j is the second data point, calculate the absolute value of the difference between f i and f j to obtain a non-negative distance metric, and set the initial value to 1 MHz, and increment it step by step to the maximum frequency-point spacing (such as 500 MHz), and then form 1-simplices (edges) and 2-simplices (triangles), excluding isolated points. Start recording the generation and disappearance thresholds of each circular structure, and define the persistence length. The disappearance threshold minus the generation threshold is the persistence length. It can be understood that according to the preset point-spacing threshold, connect adjacent points to form a complex, where the complex is a topological structure used to describe the connection relationship between points, and the selection of the point-spacing threshold is crucial, which determines which points are considered "adjacent". This threshold can be determined based on experimental data or theoretical analysis. By connecting adjacent points, a topological structure model of the frequency-point space correlation is formed, where the topological structure model describes the spatial relationship and interaction between frequency points.

[0036] S302. Analyze the generated original data set, extract the life-cycle distribution diagram of the one-dimensional circular topological features associated with the defect frequency band in the set of characteristic resonance frequency points. In the life-cycle distribution diagram, the horizontal axis represents the frequency-point spacing scale parameter, and the vertical axis represents the persistence length of the circular structure. By quantifying the correlation between the persistence length and the frequency-point density, generate a defect-risk space mapping relationship; It should be noted that in the defect frequency band, high-density regions (such as 300–400 MHz) usually correspond to short-persistence circular structures (transient interference), and low-density regions correspond to long-persistence structures (stable defects). Then, the Persim library in Python can be used to generate the life-cycle distribution diagram, where the life-cycle distribution diagram intuitively reveals the defect stability and supports rapid decision-making.

[0037] It is understandable that this step generates a defect risk space mapping relationship by quantifying the correlation between the persistence length and the frequency point density. This mapping relationship can link the topological features of the frequency points with the defect risk. The longer the persistence length, the more stable the annular structure, and it may be associated with more serious defects. When analyzing the topological structure model, first, the scale parameter in the model is incrementally expanded. This process is to gradually adjust the resolution of the model to more carefully observe the topological features of the data set. On this basis, the persistent homology features of the complex in the one-dimensional homology group are calculated. Among them, persistent homology is used to analyze the topological structure of the data set, and it can accurately capture the annular structures in the data. The appearance and disappearance processes of these annular structures are detailedly recorded, and then a raw data set containing the life cycle of each annular structure is generated. The so-called life cycle refers to the time span that the annular structure experiences from generation to final disappearance.

[0038] S303. Based on the defect risk space mapping relationship, count the number of rings of the Betti numbers in each frequency band interval to obtain the statistical results, calculate the defect risk index, screen out the high-risk chips with a defect risk index greater than 0.15, and output the corresponding list. The calculation formula is as follows:

[0039] In the formula, is the defect risk index, is the total persistence of the annular topological features of the one-dimensional homology group, and card(f d ) is the number of frequency points in the characteristic resonant frequency point set.

[0040] It should be noted that map the characteristic frequency points to the metric space, construct the Vietoris-Rips complex (ε = 1 - 500 MHz), calculate the persistent homology to generate the life cycle distribution map, count the Betti numbers by 50 MHz frequency bands, and determine the risk threshold of η > 0.15 (AUC = 0.92) through the ROC curve to screen out high-risk chips.

[0041] It is understandable that based on the defect risk space mapping relationship, count the number of rings of the Betti numbers in each frequency band interval. By counting the Betti numbers, the number of annular structures in each frequency band interval can be quantified, so as to evaluate the defect risk; screen out the high-risk chips with a defect risk index greater than 0.15 and output the corresponding list, and this threshold can be adjusted according to the actual application requirements to ensure the accuracy and reliability of the screening results.

[0042] S400. Traverse the list of high-risk chips, apply dynamic bias temperature stress to the high-risk chips, calculate the change rate of the gate oxide trap density through the electro-thermal coupling effect, and screen out the chips that meet the standards.

[0043] It is understandable that in this step S400, it includes S401, S402, and S403, where: S401. Apply dynamic bias temperature stress to the list of high-risk chips, including alternately loading a drain-source voltage of 1200 V and a junction temperature environment of 175 °C to simulate the electrothermal coupling effect under extreme working conditions, so as to obtain electrothermal response data; It should be noted that by using 1200V / 10μs (rise time < 1ns), the gate oxide tunneling effect can be excited to simulate the working state of the chip under high voltage. This high voltage can cause a strong electric field effect, which may trigger electrical breakdown or the generation of trap states; while by using 175 °C / 1ms (closed-loop control through thermocouple), the ion mobility can be accelerated to simulate the working state of the chip at high temperature, and at the same time, the degradation of the material and the generation of trap states are accelerated, affecting the performance of the chip. By alternately applying high voltage and high temperature to simulate the dynamic stress conditions that the chip may encounter in actual applications, the performance changes of the chip in a complex environment can be more realistically reflected. In this step, by applying dynamic bias temperature stress, these complex electrothermal coupling effects can be simulated, so as to obtain electrothermal response data.

[0044] S402. Based on the electrothermal response data, analyze the electrothermal coupling effect, extract the key parameters related to the electrothermal coupling effect, and use the key parameters to calculate the change rate of the gate oxide trap density through a preset model. The calculation formula is as follows:

[0045] Where, is the change rate of the gate oxide trap density, A is the material constant, E a is the activation energy for trap generation, m is the voltage exponent, T j is the junction temperature, k is the Boltzmann constant, V GS is the quantization voltage bias, V th is the threshold voltage; S403. Set the change rate threshold of the gate oxide trap density, remove the failed chips whose change rate exceeds the threshold, and finally output the list of chips that pass the reliability test to complete the final verification of the anti-electromagnetic interference performance.

[0046] It should be noted that the obtained electrothermal response data is analyzed in detail to extract key parameters related to the electrothermal coupling effect. These parameters may include electric field strength, temperature distribution, current density, etc. The extracted key parameters are used to describe the characteristics of the electrothermal coupling effect. The threshold of the set change rate of the gate oxide trap density is used to determine whether the chip meets the reliability requirements. The selection of the threshold should be based on the needs of actual applications and reliability standards. For example, the threshold can be set to 0.15, indicating that when the change rate of the gate oxide trap density exceeds 15%, the chip is considered to have a high failure risk. In this step, according to the calculated change rate of the gate oxide trap density, the failed chips with a change rate exceeding the threshold are removed, and removing the failed chips can ensure that the chips in the finally output chip list have high reliability. Finally, the chip list passing the reliability test is output to complete the final verification of the anti-electromagnetic interference performance, and these chips can work normally under extreme working conditions, that is, meet the reliability requirements.

[0047] S500. Input the excitation signal library, the set of characteristic resonance frequencies, high-risk chips, and compliant chips into the deep deterministic policy gradient model for training. Using the test coverage rate and misjudgment rate as the reward function, optimize the excitation combination weights, frequency band priorities, and stress loading time sequences through interactive training, and finally output an adaptive test strategy.

[0048] It can be understood that the excitation signal library parameters generated in step S100, the set of characteristic resonance frequencies output in step S200, the list of high-risk chips screened in step 300, and the reliability test results of step S400 are input into the deep deterministic policy gradient model to construct a multi-dimensional state space including frequency weights, field distribution coupling coefficients, and stress time sequences; taking the test coverage rate Coverage and misjudgment rate False_Rate as the optimization objectives, define the reward function R =0.7⋅Coverage−0.3⋅False_Rate, and update the policy parameters through interactive training of the Actor-Critic network, where:

[0049] Among them, Coverage is the test coverage rate, and False - Rate is the misjudgment rate.

[0050] Based on the converged policy network, output the optimal test parameter combination, including the excitation signal weight distribution { wk} ( k =1,2,..., n ), the defect frequency band priority sequence ( i =1,2,..., m ), and the dynamic stress loading time sequence , to achieve the closed-loop optimization of the test process.

[0051] Embodiment 2: As Figure 2 shown, this embodiment provides a test screening system for enhancing the anti-electromagnetic interference of chips. Refer to Figure 2 The system includes: Solution module 701: For based on the failure frequency point distribution data of historical failed chips on the production line, using the three-dimensional time-domain finite-difference method to solve the eigenmodes of the Maxwell equation, extracting the set of characteristic frequencies and their corresponding spatial electric field distributions through the finite element analysis method, and generating an excitation signal library. The excitation signal library includes swept-frequency signals, pulse modulation signals, and field distribution coupling signals; Inverse calculation module 702: For using the diamond NV color center array to detect the response of the excitation signals in the excitation signal library, regulating the electron spin quantum state of the NV color center through microwave pulses, measuring the ground state transition probability and inverting the time-domain magnetic field signal, performing a short-time Fourier transform on the time-domain magnetic field signal to generate a magnetic field fluctuation spectrum, and locking the set of characteristic resonance frequency points corresponding to microcracks; First calculation and screening module 703: For constructing a Vietoris-Rips complex according to the set of characteristic resonance frequency points, calculating the persistent homology characteristics and generating a life cycle distribution map, calculating the defect risk index based on the Betti number of the life cycle distribution map, and screening out high-risk chips with a defect risk index greater than 0.15; Second calculation and screening module 704: For traversing the list of high-risk chips, applying dynamic bias temperature stress to the high-risk chips, calculating the change rate of the gate oxide trap density through the electrothermal coupling effect, and screening out the qualified chips; Training module 705: For inputting the excitation signal library, the set of characteristic resonance frequency points, high-risk chips, and qualified chips into the deep deterministic policy gradient model for training, using the test coverage rate and misjudgment rate as the reward function, optimizing the excitation combination weight, frequency band priority, and stress loading timing through interactive training, and finally outputting an adaptive test strategy.

[0052] Specifically, the solution module 701 includes: Establishment unit: For obtaining the frequency point distribution data of the failed chips in the historical failure analysis report of the production line, and based on the electromagnetic field theory, establishing the Maxwell eigenvalue equation of the transient electromagnetic field to obtain the electromagnetic field eigenmode of the chip under transient interference. Its calculation formula is as follows:

[0053] In the formula, is the curl operator, μ is the magnetic permeability, E n is the electric field distribution vector, is the characteristic angular frequency, is the dielectric constant; The first extraction unit: Based on the electromagnetic field eigenmode, it uses finite element analysis to perform mesh division on the chip package structure, extracts multiple resonance frequency points of the chip in the range of 1 MHz - 3 GHz, and the three-dimensional spatial field distribution corresponding to each resonance frequency point; The generation unit: It is used to convert the characteristic frequency of the resonance frequency point into a time-domain signal, and combine it with the three-dimensional spatial field distribution to generate a signal type, and use the signal type as the excitation signal library, where the excitation signal library includes the sweep signal coverage of 1 MHz - 3 GHz, adjusts the spatial coupling method of the signal based on the three-dimensional spatial field distribution, and includes various signal forms such as single frequency, sweep frequency, and pulse modulation.

[0054] Specifically, the inversion calculation module 702 includes: The regulation and drive unit: Based on the excitation signal library, it uses the quantum spin characteristics of the diamond nitrogen vacancy color center, and by applying microwave pulses with a frequency of 12.5 - 18.5 GHz, it regulates the electron spin quantum state of the NV color center, drives its spin state to transition from the ground state to the excited state, and forms an NV color center array in a coherent superposition state; The calculation and inversion unit: It is used to measure the proportion of color centers in the ground state in the NV color center array through a fluorescence detection device, calculate the ground state transition probability, and based on a preset inversion formula, invert the time-domain magnetic field signal. The calculation formula of the preset inversion formula is as follows:

[0055] In the formula, B rf (t) is the inverted time-domain magnetic field signal, is the electron gyromagnetic ratio, is the integration time, is the ground state transition probability; The first analysis unit: It is used to perform time-frequency analysis on the time-domain magnetic field signal, uses the short-time Fourier transform to divide it into 50 ns time windows and generates a time-frequency spectrum diagram segment by segment, and performs noise reduction processing on the time-frequency spectrum diagram through the Daubechies wavelet function to obtain the noise-reduced time-frequency spectrum diagram; The recognition unit: It is used to recognize the set of peak frequency points that continuously exist in the noise-reduced time-frequency spectrum diagram, and output the set of peak frequency points as the determination criterion for defect location, denoted as the characteristic resonance frequency point set, where the peak frequency points in the set of peak frequency points correspond to the local resonance characteristics caused by microcracks in the chip.

[0056] Specifically, the first calculation and screening module 703 includes: The first acquisition unit: used to map frequency points to points in a high-dimensional space based on a set of characteristic resonance frequency points, connect adjacent points according to a preset point spacing threshold to form a complex, and then obtain a topological structure model of the frequency point space correlation. By incrementally expanding the scale parameter in the topological structure model, calculate the persistent homology characteristics of the complex in the first homology group, and at the same time record the generation and disappearance process of the circular topological structure, generating an original data set containing the life cycle of each circular structure; The second extraction unit: used to analyze the generated original data set, extract the life cycle distribution diagram of the one-dimensional circular topological features associated with the defect frequency band in the set of characteristic resonance frequency points. In the life cycle distribution diagram, the horizontal axis represents the frequency point spacing scale parameter, and the vertical axis represents the persistence length of the circular structure. By quantifying the correlation between the persistence length and the frequency point density, generate a defect risk space mapping relationship; The statistics unit: used to based on the defect risk space mapping relationship, count the number of circular rings of the Betti number in each frequency band interval to obtain a statistical result, calculate the defect risk index, screen out high-risk chips with a defect risk index greater than 0.15, and output the corresponding list. The calculation formula is as follows:

[0057] In the formula, is the defect risk index, is the total persistence of the one-dimensional homology group circular topological feature, card(f d ) is the number of frequency points in the set of characteristic resonance frequency points.

[0058] Specifically, the second calculation and screening module 704 includes: The second acquisition unit: used to apply dynamic bias temperature stress to the list of high-risk chips, including alternately loading a drain-source voltage of 1200 V and a junction temperature environment of 175 °C to simulate the electro-thermal coupling effect under extreme working conditions, so as to obtain electro-thermal response data; The second analysis unit: used to analyze the electro-thermal coupling effect based on the electro-thermal response data, extract key parameters related to the electro-thermal coupling effect, and use the key parameters to calculate the change rate of the gate oxide trap density through a preset model. The calculation formula is as follows:

[0059] Among them, is the change rate of the gate oxide trap density, A is the material constant, E a is the activation energy for trap generation, m is the voltage exponent, T j is the junction temperature, k is the Boltzmann constant, V GS is the quantization voltage bias, V th is the threshold voltage; Rejection unit: It is used to set the change rate threshold of the gate oxide trap density, reject the failed chips whose change rate exceeds the threshold, and finally output the list of chips that pass the reliability test, completing the final verification of the anti-electromagnetic interference performance.

[0060] It should be noted that for the system in the above embodiments, the specific manners in which each module performs operations have been described in detail in the embodiments related to the method, and will not be elaborated here.

[0061] Embodiment 3:

[0062] Corresponding to the above method embodiment, in this embodiment, a test screening device for enhancing the anti-electromagnetic interference of a chip is also provided. A test screening device for enhancing the anti-electromagnetic interference of a chip described below can be correspondingly referred to the method for enhancing the anti-electromagnetic interference of a chip described above.

[0063] Figure 3 It is a block diagram of a test screening device 800 for enhancing the anti-electromagnetic interference of a chip shown according to an exemplary embodiment. As Figure 3 shown, the test screening device 800 for enhancing the anti-electromagnetic interference of a chip includes: a processor 801 and a memory 802. The test screening device 800 for enhancing the anti-electromagnetic interference of a chip further includes one or more of a multimedia component 803, an I / O interface 804, and a communication component 805.

[0064] Among them, the processor 801 is used to control the overall operation of the test and screening device 800 for the enhanced chip's anti-electromagnetic interference, so as to complete all or part of the steps in the above-mentioned test and screening method for the enhanced chip's anti-electromagnetic interference. The memory 802 is used to store various types of data to support the operation of the test and screening device 800 for the enhanced chip's anti-electromagnetic interference. These data may include, for example, instructions for any application or method operating on the test and screening device 800 for the enhanced chip's anti-electromagnetic interference, as well as application-related data, such as contact data, sent and received messages, pictures, audio, video, and so on. The memory 802 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as Static Random Access Memory (SRAM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Erasable Programmable Read-Only Memory (EPROM), Programmable Read-Only Memory (PROM), Read-Only Memory (ROM), magnetic memory, flash memory, a magnetic disk, or an optical disc. The multimedia component 803 may include a screen and an audio component. Among them, the screen may be a touch screen, for example, and the audio component is used to output and / or input audio signals. For example, the audio component may include a microphone, and the microphone is used to receive external audio signals. The received audio signal may be further stored in the memory 802 or sent through the communication component 805. The audio component also includes at least one speaker for outputting audio signals. The I / O interface 804 provides an interface between the processor 801 and other interface modules, and the above-mentioned other interface modules may be a keyboard, a mouse, or buttons, etc. These buttons may be virtual buttons or physical buttons. The communication component 805 is used for wired or wireless communication between the test and screening device 800 for the enhanced chip's anti-electromagnetic interference and other devices. Wireless communication, such as Wi-Fi, Bluetooth, Near Field Communication (NFC), 2G, 3G, or 4G, or a combination of one or more of them. Therefore, the corresponding communication component 805 may include: a Wi-Fi module, a Bluetooth module, or an NFC module.

[0065] In an exemplary embodiment, the test screening device 800 for enhancing the anti-electrical interference of a chip may be implemented by one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components, and is used to execute the above-mentioned test screening method for enhancing the anti-electrical interference of a chip.

[0066] In another exemplary embodiment, a computer-readable storage medium including program instructions is further provided. When the program instructions are executed by a processor, the steps of the above-mentioned test screening method for enhancing the anti-electrical interference of a chip are implemented. For example, the computer-readable storage medium may be the above-mentioned memory 802 including program instructions, and the above program instructions may be executed by the processor 801 of the test screening device 800 for enhancing the anti-electrical interference of a chip to complete the above-mentioned test screening method for enhancing the anti-electrical interference of a chip.

[0067] Embodiment 4:

[0068] Corresponding to the above method embodiment, a readable storage medium is further provided in this embodiment. A readable storage medium described below and a test screening method for enhancing the anti-electrical interference of a chip described above can be referred to each other correspondingly.

[0069] A computer program is stored on the readable storage medium. When the computer program is executed by a processor, the steps of the test screening method for enhancing the anti-electrical interference of a chip in the above method embodiment are implemented.

[0070] The readable storage medium may specifically be a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disc, or other readable storage media that can store program codes.

[0071] The above are only the preferred embodiments of the present invention and are not used to limit the present invention. For those skilled in the art, the present invention may have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

[0072] As described above, it is only the specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention can easily think of changes or substitutions, which should all be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims

1. A test screening method for enhancing the anti-electric interference of a chip, characterized in that, Including: Based on the failure frequency point distribution data of historical failed chips on the production line, the characteristic modes of the Maxwell equations are solved using the three-dimensional finite-difference time-domain method. The set of characteristic frequencies and their corresponding spatial electric field distributions are extracted through the finite element analysis method to generate an excitation signal library. The excitation signal library includes swept-frequency signals, pulse modulation signals, and field distribution coupling signals; The diamond NV color center array is used to detect the response of the excitation signals in the excitation signal library. The electron spin quantum state of the NV color center is regulated by microwave pulses, the ground state transition probability is measured and the time-domain magnetic field signal is inverted. The short-time Fourier transform is performed on the time-domain magnetic field signal to generate a magnetic field fluctuation spectrum, and the set of characteristic resonance frequency points corresponding to the microcracks is locked; A Vietoris-Rips complex is constructed based on the set of characteristic resonance frequency points, the persistent homology features are calculated and a life cycle distribution map is generated. The defect risk index is calculated based on the Betti number of the life cycle distribution map, and the high-risk chips with a defect risk index greater than 0.15 are screened out; Traverse the list of high-risk chips, apply dynamic bias temperature stress to the high-risk chips, calculate the change rate of the gate oxide trap density through the electrothermal coupling effect, and screen out the chips that meet the standards; The excitation signal library, the set of characteristic resonance frequency points, the high-risk chips, and the chips that meet the standards are input into the deep deterministic policy gradient model for training. Taking the test coverage rate and misjudgment rate as the reward function, the excitation combination weights, frequency band priorities, and stress loading time sequences are optimized through interactive training, and finally an adaptive test strategy is output.

2. The test screening method for enhancing the anti-electromagnetic interference of the chip according to claim 1, wherein Based on the failure frequency point distribution data of historical failed chips on the production line, the characteristic modes of the Maxwell equations are solved using the three-dimensional finite-difference time-domain method. The set of characteristic frequencies and their corresponding spatial electric field distributions are extracted through the finite element analysis method to generate an excitation signal library, which includes: Obtain the frequency point distribution data of the failed chips in the production line historical failure analysis report. Based on the electromagnetic field theory, establish the Maxwell eigenvalue equation of the transient electromagnetic field to obtain the electromagnetic field eigenmode of the chip under transient interference. The calculation formula is as follows: In the formula, is the curl operator, μ is the magnetic permeability, and E n is the electric field distribution vector, is the characteristic angular frequency, is the permittivity; Based on the electromagnetic field eigenmode, the finite element analysis is used to divide the grid of the chip package structure, extract multiple resonance frequency points of the chip in the range of 1 MHz - 3 GHz, and the three-dimensional spatial field distribution corresponding to each resonance frequency point; Convert the characteristic frequencies of the resonance frequency points into time-domain signals, and combine with the three-dimensional spatial field distribution to generate signal types. The signal types are used as the excitation signal library. The excitation signal library includes the swept-frequency signal coverage of 1 MHz - 3 GHz, the spatial coupling method of adjusting the signal based on the three-dimensional spatial field distribution, and various signal forms including single frequency, swept frequency, and pulse modulation.

3. The method for testing and screening to enhance the anti-electromagnetic interference of the chip according to claim 1, wherein The diamond NV color center array is used to detect the response of the excitation signals in the excitation signal library. The electron spin quantum state of the NV color center is regulated by microwave pulses, the ground state transition probability is measured and the time-domain magnetic field signal is inverted. The short-time Fourier transform is performed on the time-domain magnetic field signal to generate a magnetic field fluctuation spectrum, and the set of characteristic resonance frequency points corresponding to the microcracks is locked, which includes: Based on the excitation signal library, using the quantum spin characteristics of diamond nitrogen-vacancy color centers, by applying microwave pulses with a frequency of 12.5–18.5 GHz to control the electronic spin quantum states of NV color centers, driving the transition of their spin states from the ground state to the excited state, a coherent superposition state NV color center array is formed; Measure the proportion of color centers in the ground state in the NV color center array through a fluorescence detection device, calculate the ground state transition probability, and based on a preset inversion formula, invert the time-domain magnetic field signal. The calculation formula of the preset inversion formula is as follows: In the formula, B rf (t) is the inverted time-domain magnetic field signal is the electron gyromagnetic ratio, is the integration time, is the ground state transition probability; Perform time-frequency analysis on the time-domain magnetic field signal. Use the short-time Fourier transform to segment it into 50 ns time windows and generate time-frequency spectrograms segment by segment. Perform noise reduction processing on the time-frequency spectrograms through the Daubechies wavelet function to obtain the noise-reduced time-frequency spectrograms; Identify the set of peak frequency points that persist in the noise-reduced time-frequency spectrograms, and output the set of peak frequency points as the determination criterion for defect localization, denoted as the characteristic resonant frequency point set. Among them, the peak frequency points in the set of peak frequency points correspond to the local resonance characteristics caused by microcracks in the chip.

4. The test screening method for enhancing the anti-electromagnetic interference of the chip according to claim 1, characterized in that, Construct a Vietoris-Rips complex based on the characteristic resonant frequency point set, calculate the persistent homology characteristics and generate a life cycle distribution map. Calculate the defect risk index based on the Betti number of the life cycle distribution map, and screen out high-risk chips with a defect risk index greater than 0.15, including: Based on the characteristic resonant frequency point set, map the frequency points to points in a high-dimensional space. According to the preset point spacing threshold, connect adjacent points to form a complex, and then obtain a topological structure model of the frequency point space correlation. By incrementally expanding the scale parameter in the topological structure model, calculate the persistent homology characteristics of the complex in the one-dimensional homology group, and record the generation and disappearance process of the circular topological structure at the same time, generating an original data set containing the life cycles of each circular structure; Analyze the generated original data set, extract the life cycle distribution map of the one-dimensional circular topological features associated with the defect frequency band in the characteristic resonant frequency point set. In the life cycle distribution map, the horizontal axis represents the frequency point spacing scale parameter, and the vertical axis represents the persistence length of the circular structure. Generate a defect risk space mapping relationship by quantifying the correlation between the persistence length and the frequency point density; Based on the defect risk space mapping relationship, count the number of circular rings of the Betti number in each frequency band interval to obtain a statistical result, calculate the defect risk index, screen out high-risk chips with a defect risk index greater than 0.15, and output the corresponding list. The calculation formula is as follows: In the formula, is the defect risk index, is the sum of the persistence of the one-dimensional homology group circular topology feature, and card(f d ) is the number of frequency points in the characteristic resonance frequency point set.

5. The test screening method for enhancing the anti-electromagnetic interference of a chip according to claim 1, wherein Traverse the list of high-risk chips, apply dynamic bias temperature stress to the high-risk chips, calculate the change rate of the gate oxide trap density through the electro-thermal coupling effect, and screen out the chips that meet the standards, including: For the list of high-risk chips, apply dynamic bias temperature stress, including alternately applying a drain-source voltage of 1200 V and a junction temperature environment of 175 degrees Celsius to simulate the electro-thermal coupling effect under extreme working conditions, so as to obtain electro-thermal response data; Based on the electrothermal response data, analyze the electrothermal coupling effect, extract the key parameters related to the electrothermal coupling effect, and use the key parameters to calculate the change rate of the gate oxide trap density through a preset model. The calculation formula is as follows: Among them, is the change rate of gate oxide trap density, A is the material constant, E a is the activation energy for trap generation, m is the voltage exponent, T j is the junction temperature, k is the Boltzmann constant, V GS is the quantization voltage bias, V th is the threshold voltage; Set the change rate threshold of the gate oxide trap density, eliminate the failed chips whose change rate exceeds the threshold, and finally output the list of chips that pass the reliability test to complete the final verification of the anti-electromagnetic interference performance.

6. A test and screening system for enhancing the anti-electrical interference of a chip, based on the test and screening method for enhancing the anti-electrical interference of a chip according to claim 1, characterized in that, Including: A solution module: used to solve the eigenmodes of the Maxwell equation based on the failure frequency point distribution data of the historical failed chips on the production line by using the three-dimensional time-domain finite difference method, extract the set of characteristic frequencies and their corresponding spatial electric field distributions through the finite element analysis method, and generate an excitation signal library. The excitation signal library includes sweep signals, pulse modulation signals, and field distribution coupling signals; An inversion calculation module: used to detect the response of the excitation signals in the excitation signal library by using the diamond NV color center array, regulate the electron spin quantum state of the NV color center through microwave pulses, measure the ground state transition probability and invert the time-domain magnetic field signal, perform a short-time Fourier transform on the time-domain magnetic field signal to generate a magnetic field fluctuation spectrum, and lock the set of characteristic resonance frequency points corresponding to the microcracks; A first calculation and screening module: used to construct a Vietoris-Rips complex according to the set of characteristic resonance frequency points, calculate the persistent homology characteristics and generate a life cycle distribution map, calculate the defect risk index based on the Betti number of the life cycle distribution map, and screen out the high-risk chips with a defect risk index greater than 0.15; A second calculation and screening module: used to traverse the list of high-risk chips, apply dynamic bias temperature stress to the high-risk chips, calculate the change rate of the gate oxide trap density through the electrothermal coupling effect, and screen out the chips that meet the standards; A training module: used to input the excitation signal library, the set of characteristic resonance frequency points, the high-risk chips, and the chips that meet the standards into the deep deterministic policy gradient model for training, use the test coverage rate and misjudgment rate as the reward function, optimize the excitation combination weight, frequency band priority, and stress loading time sequence through interactive training, and finally output an adaptive test strategy.

7. The test and screening system for enhancing the anti-electromagnetic interference of a chip according to claim 6, characterized in that, The solution module, which includes: An establishment unit: used to obtain the frequency point distribution data of the failed chips in the historical failure analysis report of the production line, and establish the Maxwell eigenvalue equation of the transient electromagnetic field based on the electromagnetic field theory to obtain the electromagnetic field eigenmode of the chip under transient interference. The calculation formula is as follows: In the formula, is the curl operator, μ is the magnetic permeability, and E n is the electric field distribution vector, is the characteristic angular frequency, is the permittivity; A first extraction unit: used to perform mesh division on the chip package structure by using the finite element analysis based on the electromagnetic field eigenmode, extract multiple resonance frequency points of the chip in the range of 1 MHz - 3 GHz, and the three-dimensional space field distribution corresponding to each resonance frequency point; A generation unit: used to convert the characteristic frequencies of the resonance frequency points into time-domain signals, and combine with the three-dimensional space field distribution to generate signal types, and use the signal types as the excitation signal library. The excitation signal library includes the sweep signal coverage of 1 MHz - 3 GHz, the adjustment of the spatial coupling method of the signal based on the three-dimensional space field distribution, and various signal forms including single frequency, sweep, and pulse modulation.

8. The test and screening system for enhancing the anti-electromagnetic interference of a chip according to claim 6, wherein The inversion calculation module, which includes: Regulation and drive unit: It is used to regulate the electronic spin quantum state of NV centers based on the excitation signal library, utilize the quantum spin characteristics of diamond nitrogen-vacancy centers, and drive the transition of their spin states from the ground state to the excited state by applying microwave pulses with a frequency of 12.5 - 18.5 GHz to form an NV center array in a coherent superposition state; Calculation and inversion unit: It is used to measure the proportion of centers in the ground state in the NV center array through a fluorescence detection device, calculate the ground state transition probability, and invert the time-domain magnetic field signal based on a preset inversion formula. The calculation formula of the preset inversion formula is as follows: In the formula, B rf (t) is the inverted time-domain magnetic field signal, is the electron gyromagnetic ratio, is the integration time, is the ground state transition probability; First analysis unit: It is used to perform time-frequency analysis on the time-domain magnetic field signal, segment it into 50 ns time windows by using short-time Fourier transform and generate a time-frequency spectrum diagram for each segment, and perform noise reduction processing on the time-frequency spectrum diagram through Daubechies wavelet function to obtain a noise-reduced time-frequency spectrum diagram; Recognition unit: It is used to recognize the set of peak frequency points that persist in the noise-reduced time-frequency spectrum diagram, and output the set of peak frequency points as the determination criterion for defect location, denoted as the characteristic resonance frequency point set, where the peak frequency points in the set of peak frequency points correspond to the local resonance characteristics caused by microcracks in the chip.

9. The test and screening system for enhancing the anti-electromagnetic interference of a chip according to claim 6, characterized in that, The first calculation and screening module, which includes: First acquisition unit: It is used to map frequency points to points in a high-dimensional space based on the characteristic resonance frequency point set, connect adjacent points according to a preset point spacing threshold to form a complex, and then obtain a topological structure model of the frequency point space correlation. By incrementally expanding the scale parameter in the topological structure model, calculate the persistent homology characteristics of the complex in the first homology group, and record the generation and disappearance process of the circular topological structure at the same time to generate an original data set containing the life cycle of each circular structure; Second extraction unit: It is used to analyze the generated original data set, extract the life cycle distribution diagram of the one-dimensional circular topological features associated with the defect frequency band in the characteristic resonance frequency point set. In the life cycle distribution diagram, the horizontal axis represents the frequency point spacing scale parameter, and the vertical axis represents the persistence length of the circular structure. By quantifying the correlation between the persistence length and the frequency point density, generate a defect risk space mapping relationship; Statistics unit: It is used to statistically count the number of circular rings of Betti numbers in each frequency band interval based on the defect risk space mapping relationship to obtain a statistical result, calculate the defect risk index, screen out high-risk chips with a defect risk index greater than 0.15, and output the corresponding list. The calculation formula is as follows: In the formula, is the defect risk index, is the sum of the persistence of the one-dimensional homology group circular topological features, and card(f d ) is the number of frequency points in the characteristic resonance frequency point set.

10. The test and screening system for enhancing the anti-electromagnetic interference of a chip according to claim 6, wherein The second calculation and screening module, which includes: Second acquisition unit: It is used to apply dynamic bias temperature stress to the list of high-risk chips, including alternately applying a drain-source voltage of 1200 V and a junction temperature environment of 175 °C to simulate the electro-thermal coupling effect under extreme working conditions, so as to obtain electro-thermal response data; Second analysis unit: It is used to analyze the electro-thermal coupling effect based on the electro-thermal response data, extract the key parameters related to the electro-thermal coupling effect, and use the key parameters to calculate the change rate of the gate oxide trap density through a preset model. The calculation formula is as follows: Among them, is the change rate of the gate oxide trap density, A is the material constant, E a is the activation energy for trap generation, m is the voltage exponent, T j is the junction temperature, k is the Boltzmann constant, V GS is the quantization voltage bias, V th is the threshold voltage; Rejection unit: It is used to set the change rate threshold of the gate oxide trap density, reject the failed chips whose change rate exceeds the threshold, and finally output the list of chips that pass the reliability test to complete the final verification of the anti-electromagnetic interference performance.

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