A chip pin multiplexing method and device, computer equipment and storage medium

Abstract

This invention provides a chip pin multiplexing method, apparatus, computer device, and storage medium. The chip pin multiplexing method includes: acquiring chip pin information; grouping the pin information according to preset rules; storing the grouped pin information in a pin multiplexing file; identifying custom code in the pin multiplexing file; and updating the pin multiplexing file based on the custom code. The custom code is used to control the pin's operating mode. This method, by grouping and organizing pin information, can aggregate similar or related pin information, eliminating the need to search through numerous pins during SoC integration, reducing integration complexity, and facilitating debugging. Furthermore, by adding custom code to the pin multiplexing file, the pin can be used to select functional modes or test modes, thus automatically adapting to pin multiplexing under various functional and test modes without requiring manual adjustment.

Description

Technical Field

[0001] This invention relates to the field of chip design technology, and in particular to a chip pin multiplexing method, apparatus, computer device, and computer-readable storage medium. Background Technology

[0002] With the continuous advancement of chip design technology, the requirements for optimizing power consumption, performance, and area in SoCs are becoming increasingly stringent. To balance cost and integration, the number of chip pins is shrinking due to packaging limitations, while the number of functional modules is growing exponentially (such as multi-core CPUs, AI accelerators, high-speed interface IPs, etc.), forcing individual pins to support more functional reuse scenarios. In complex on-chip systems, pin multiplexing has become a key technology for achieving resource sharing between modules, significantly increasing its complexity. A single pin may support up to a dozen functions, and the pin multiplexing configuration in test mode and functional mode often differs.

[0003] Existing pin multiplexing systems primarily focus on pin multiplexing in functional modes and cannot adequately adapt to test modes. Pin multiplexing configurations in test modes still require manual coding and debugging, which not only prolongs the development cycle but also easily introduces logical conflicts such as signal races and timing violations, making it difficult to guarantee the consistency and reliability of the functional and test configurations. Furthermore, due to differences in test interfaces across different generations of SoCs, existing pin multiplexing systems cannot automatically adapt, requiring manual modifications by developers, resulting in low debugging efficiency. Summary of the Invention

[0004] This invention provides a chip pin multiplexing method, apparatus, computer device, and storage medium to solve the technical problems of insufficient test mode support, poor SOC adaptability, and difficult debugging in existing pin multiplexing systems.

[0005] This invention provides a chip pin multiplexing method, including:

[0006] Read the pin information table;

[0007] Identify the position of the pin in the pin information table and determine the corresponding pin information;

[0008] The pin information is grouped according to preset rules;

[0009] The grouped pin information is stored in a pin multiplexing file to generate a pin model. A pin instantiation model is generated based on the pin information in the pin multiplexing file. The pin instantiation model includes the pin model in the pin instantiation file, which is instantiated from a pre-defined instantiation model in the script.

[0010] Identify the custom code in the pin multiplexing file and organize the special pin models in the custom code;

[0011] Update the pin multiplexing file based on the custom code;

[0012] The custom code is either code that cannot be implemented by script in the testing function, or a special pin instantiation file.

[0013] In one embodiment, the pin information includes at least one of pin name, control information, function information, and test information.

[0014] In one embodiment, grouping the pin information according to a preset rule includes:

[0015] Group the pins according to their pin names;

[0016] Pin signals within the same group are merged.

[0017] In one embodiment, grouping the pin information according to a preset rule further includes:

[0018] The control functions of the pins are grouped according to the control information;

[0019] The function selection of the pins is grouped according to the functional information;

[0020] The test functions of the pins are grouped according to the test information.

[0021] In one embodiment, the identification of custom code in the pin multiplexing file includes:

[0022] Locate the custom code defined according to the rules in the original pin multiplexing file;

[0023] The custom code is parsed to match the custom code with the function names in the script according to the grouped function names.

[0024] In one embodiment, the search for custom code defined according to rules in the original pin multiplexing file includes:

[0025] Locate and analyze port information in custom code;

[0026] Locate and analyze wire and / or reg declarations in your custom code.

[0027] Find at least one of the following in your custom code: inst, always, and assign.

[0028] In one embodiment, verifying the search results for the custom code includes:

[0029] Determine whether the inst code, always code, and assign code match the corresponding port information;

[0030] Determine whether the inst code, always code, and assign code have corresponding wire declarations and / or reg declarations.

[0031] Furthermore, this application also provides a chip pin multiplexing apparatus for implementing the above-mentioned chip pin multiplexing method, including:

[0032] The acquisition module is used to acquire the pin information of the chip;

[0033] A grouping module is used to group the pin information according to preset rules;

[0034] The storage module is used to store the grouped pin information in a pin multiplexing file;

[0035] The identification module is used to identify custom code in the pin multiplexing file;

[0036] The update module is used to update the code in the storage module and the identification module to the pin multiplexing file.

[0037] Furthermore, this application also provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps of the chip pin multiplexing method described in any of the above claims.

[0038] Furthermore, a computer-readable storage medium is also provided, on which a computer program is stored, which, when executed by a processor, implements the steps of the chip pin multiplexing method described in any of the preceding claims.

[0039] Compared with the prior art, the technical solution of the embodiments of the present invention has the following beneficial effects:

[0040] The chip pin multiplexing method, apparatus, computer device, and storage medium provided in this invention group and organize pin information, thereby aggregating similar or related pin information. This eliminates the need to search through numerous pins during SoC integration, reducing integration complexity and facilitating debugging. Furthermore, by adding custom code to the pin multiplexing file, pins can be selected for functional modes or test modes, automatically adapting to pin multiplexing under various functional and test modes without requiring manual adjustments. Attached Figure Description

[0041] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention, but not all embodiments. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0042] Figure 1 A schematic flowchart of a chip reuse method provided in one embodiment of the present invention;

[0043] Figure 2 A logic block diagram of a chip pin multiplexing method provided in an embodiment of this application;

[0044] Figure 3 This is a flowchart illustrating step S110 of a chip pin multiplexing method provided in an embodiment of this application.

[0045] Figure 4 A schematic diagram of a pin information table in a chip pin multiplexing method provided in this application embodiment;

[0046] Figure 5 This is a flowchart illustrating step S120 of a chip pin multiplexing method provided in an embodiment of this application.

[0047] Figure 6 A flowchart illustrating step S120 in a chip pin multiplexing method provided in another embodiment of this application;

[0048] Figure 7 This is a flowchart illustrating step S140 of a chip pin multiplexing method provided in an embodiment of this application.

[0049] Figure 8 This is a flowchart illustrating step S141 of a chip pin multiplexing method provided in an embodiment of this application.

[0050] Figure 9 This is a flowchart illustrating step S142 of a chip pin multiplexing method provided in an embodiment of this application.

[0051] Figure 10 A schematic diagram of a chip pin multiplexing device provided in an embodiment of this application;

[0052] Figure 11 This application provides a schematic diagram of the internal structure of a computer device according to an embodiment of the present application.

[0053] Figure 12a A schematic diagram of the pin model provided in the embodiments of this application;

[0054] Figure 12b This is a schematic diagram of a pin multiplexing model provided in an embodiment of this application. Detailed Implementation

[0055] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0056] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0057] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising / including” or “having,” etc., specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. Meanwhile, the term “and / or” as used in this specification includes any and all combinations of the associated listed items.

[0058] The technical solution of the present invention will be described in detail below with reference to specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments.

[0059] In view of the problems existing in the prior art, the present invention provides a chip pin multiplexing method, a chip pin multiplexing device, a computer and device, and a computer-readable storage medium.

[0060] Figure 1 This is a flowchart illustrating a chip pin multiplexing method according to an embodiment of the present invention. Figure 1 As shown, an embodiment of the present invention provides a chip pin multiplexing method, including:

[0061] Step S110: Obtain the pin information of the chip.

[0062] Specifically, the first step is to obtain the chip's pin information using a script. Scripting languages ​​include, but are not limited to, Python, Perl, and TCL. The pin information can be in tabular format, and includes pin names and pin signals. For example, the script can read the pin information table, identify the pin's position in the table, and determine the corresponding pin information.

[0063] Step S120: Group the pin information according to preset rules.

[0064] Specifically, after reading the pin information, the pin information is grouped. The grouping rules can be based on the pin name or pin function to divide and organize the pins. After grouping, signal merging and other operations can be performed on the pins within the group to facilitate subsequent debugging.

[0065] Step S130: Store the grouped pin information in a pin reuse file. Generate a pin model reuse file based on the pin names obtained in step S120.

[0066] Specifically, after obtaining the pin names, the instantiation name of each pin model in the pin model file can be determined, and then the instantiation of the pin models defined in the script can be determined as follows: Figure 12a As shown, one or more instantiations can be defined in the script. The functional information of the pins, such as PU, PD, and DS, is obtained through step S110. Adding the DOUT, DIN, and OEN signals determines the instantiation model corresponding to each pin. Since the pin multiplexing file and the pin model multiplexing file are two different files, the functional information required by the pin model multiplexing file needs to be transmitted via port information. The connection originates from the port information. The sequence of instantiations and their sequence within the total pin count can be obtained from the order of the pin names in Excel. The instantiation names and the final pin names can be obtained through step S120.

[0067] Specifically, the pin information is grouped and stored in a pin multiplexing file. In this embodiment, the pin multiplexing file is a Register Transfer Level (RTL) file, which can be written in Verilog.

[0068] Step S140: Identify custom code in the pin multiplexing file.

[0069] Specifically, the pin multiplexing file in this embodiment incorporates custom code. This custom code controls the pin's operating mode, such as the selection of functional and test modes. Since pin multiplexing functions are frequently modified throughout the entire chip design process, custom code with special comments is added to the code generated by the pin multiplexing script. After saving the pin information to the pin multiplexing file, this custom code can be identified within the pin multiplexing file.

[0070] Specifically, special annotations can be used to identify different categories of custom code in the pin multiplexing file. For example, / / SPECIAL can be used as a custom code segment, with BEGIN / END representing the start and end. Custom code is divided into three categories: port, signals, and inst. Inst contains code that cannot be implemented via scripts for testing functions. Taking port as an example: / / SPECIAL PORT BEGIN is identified as the start of a match. Once this annotation is identified, all ports instantiated after this line are considered custom code ports. The name, direction, and bit width of each port are obtained and stored in a list. / / SPECIAL PORT END is identified as the end of a custom port match. The same method can be used to find signals and inst.

[0071] After recognizing the custom code for port, signals, and inst, analyze the custom code. Taking assign as an example: the signal on the left needs to be connected to the port, and there are two signals on the right, one from script-generated A and the other from custom code B. Use global matching to find signals similar to A and output a matching list. Output both matched and unmatched signals together. Poll this operation until all signals are matched, and then complete the signal connection on the right side of assign.

[0072] Because pin multiplexing functionality is frequently modified throughout the entire chip design process, custom code with special comments is added to the code generated by the pin multiplexing script. This custom code can be identified within the pin multiplexing file after the pin information is saved.

[0073] Since some special pin models may still exist in the pin model reuse file and cannot be shared with ordinary functional pin model files, the method of obtaining custom pin models through comments in step S140 can be used to update the pin reuse model with these special pin models (such as crystal oscillator or USB interface pin models) in a custom way. The final generated file is as follows. Figure 12b As shown.

[0074] Step S150: Update the pin multiplexing file based on custom code.

[0075] Specifically, after identifying the custom code, the custom code is pre-processed and written into a new pin multiplexing file, thereby completing the update of the pin multiplexing file. Figure 2 A logic block diagram of a chip pin multiplexing method provided in this application embodiment is shown below. Figure 2 As shown, for the pin multiplexing file containing custom scripts obtained in this embodiment, the entire pin multiplexing file is taken as the top level. The testing (MIPI test mode) and function selection (MIPI PHY selection) are implemented in the custom code within the pin multiplexing file. However, existing pin multiplexing files do not contain custom code. Since the pin multiplexing file is generated by scripts, the testing (MIPI test mode) and function selection (MIPI PHY selection) must be implemented in modules outside the pin multiplexing file. Therefore, compared with existing pin multiplexing files, the pin multiplexing file in this embodiment reduces the number of input ports (PAD IN) and output ports (MIPI PHY), thus reducing the complexity of SoC integration.

[0076] In summary, the chip pin reuse method provided by this invention groups and organizes pin information, thereby aggregating similar or related pin information. This eliminates the need to search through numerous pins during SoC integration, reducing integration complexity and facilitating debugging. Furthermore, by adding custom code to the pin reuse file, the method automatically adapts to pin reuse under various functional and test modes, enabling selection of functional or test modes without manual adjustment.

[0077] Figure 3 This is a flowchart illustrating step S110 of a chip pin multiplexing method provided in an embodiment of this application, as shown below. Figure 3 As shown, in one embodiment, step S110 may include:

[0078] Step S111: Read the pin information table.

[0079] Step S112: Identify the position of the pin in the pin information table and determine the corresponding pin information.

[0080] Specifically, pin information can be obtained by reading a pin information table, which can be in Excel format. The pin information can include pin name, control information, function information, test information, etc. When reading pin information, the position of the pin in the pin information table is identified, and the corresponding pin name, control information, function information, test information, etc. are saved.

[0081] Furthermore, Figure 4 This is a schematic diagram of a pin information table in a chip pin multiplexing method provided in an embodiment of this application, as shown below. Figure 4 As shown in the pin information table of this embodiment, ROLB serves as the pin name (PAD NAME). During script processing, each pin is grouped, and pins with similar names are generated in the pinmux port. ROLC serves as the pin's DIR, used to identify whether the pin is an input or output. ROLD serves as the pin's control information, used to control the pad's pull-up and pull-down positions. ROLE~H serve as the pin's function information, where ROLE is the pin's function selection, used to select the function of ROLF~H, and DIR indicates the direction. ROLT~W serve as the pin's test information, where each MODE corresponds to the function of the test mode corresponding to that mode, DIR indicates the direction, and core indicates whether the signal corresponding to the test_mode comes from a custom RTL within the pinmux or from a port.

[0082] Figure 5 This is a flowchart illustrating step S120 of a chip pin multiplexing method provided in an embodiment of this application, as shown below. Figure 5 As shown, in one embodiment, step S120 may include:

[0083] Step S121: Group the pins according to their pin names.

[0084] Step S122: Merge the pin signals within the same group.

[0085] Specifically, after obtaining the pin information from the pin information table, the pin names of ROLB need to be grouped first. Grouping has two main functions: different bits of the same function can be combined into one signal, such as PWM0 and PWM1 can be combined into PWM[1:0]. For bus-type buses, not only can multiple bits be combined into one signal, but also pad information of the same category can be grouped together, which greatly reduces the difficulty of subsequent integration.

[0086] Furthermore, in a specific embodiment, pin names can be divided into two groups. The first group includes signals such as GPIO and PWM, while the second group includes signals such as I2C_SDA and SPI_CLK. In the pin information table, the first group (name_group) and the second group (name_group1) are distinguished by the string separator "_" in the name. When grouping, the "_" is used to obtain the two groups. `name_group` is the first group, where the total signal width and direction are obtained to get all the information for that port. `name_group1` is the second group. For example, in "I2C_SDA, I2C_SCL", "I2C" is the first group, while "SDA" and "SCL" are the second groups, respectively, where the bit width and direction are obtained. This achieves the pin grouping function. When generating the pin multiplexing file, it can be generated according to the first group to achieve a similar function declaration in one place.

[0087] Figure 6 This is a flowchart illustrating step S120 of a chip pin multiplexing method according to another embodiment of this application, as shown below. Figure 6 As shown, in one embodiment, step S120 may further include:

[0088] Step S124: Group the control functions of the pins according to the control information.

[0089] Step S125: Group the pin function selections according to the function information.

[0090] Step S126: Group the test functions of the pins according to the test information.

[0091] Specifically, in addition to grouping by pin name, the functions corresponding to each pin can also be grouped and organized. Specifically, they can be grouped according to the control function, function selection, and test function in the pin information.

[0092] Furthermore, for example, regarding the control function (ctrl), this function mainly involves controlling the pull-up (pull-up), pull-down (pupill-down), and drive strength (ds) of the pin, which is configured by sys_cfg. Its main matching method uses feature identification. For example, in ctrl0-0, the first 0 is the pad ctrl register number in cys_cfg, and the second 0 is the corresponding bit number in that register. This allows us to determine the control method corresponding to that pin.

[0093] For function selection (func), the same method as for ctrl is used for identification. For example, pin_func_sel7-0 represents the register number of func_sel in cys_cf, and the second 0 represents the starting bit number. If each pin in the chip can correspond to 16 functions, then the register number in func_sel corresponding to that pin is func_sel_reg7[3:0]. Thus, only one bit is needed to represent it.

[0094] For the test function, it is necessary to add recognition of function remaps, and these remaps should match specific signals within the function. It is also necessary to add recognition of the function's direction. Within the test category, it is necessary to add information on whether the function originates from within or outside of Pinmux.

[0095] Figure 7 This is a flowchart illustrating step S140 of a chip pin multiplexing method provided in an embodiment of this application, as shown below. Figure 7 As shown, in one embodiment, step S140 may include:

[0096] Step S141: Locate custom code in the pin multiplexing file according to the preset annotations.

[0097] Step S142: Verify the search results for the custom code.

[0098] Specifically, different categories of custom code in the pin multiplexing file can be identified using special annotations. For example, / / SPECIAL can be used as a custom code segment, with BEGIN / END representing the start and end. Custom code is categorized into three types: port, signals, and inst. Taking port as an example: / / SPECIAL PORT BEGIN indicates the start of a match. Once this annotation is identified, all ports instantiated after this line are considered custom code ports. The name, direction, and bit width of each port are obtained and stored in a list. / / SPECIAL PORT END indicates the end of a custom port match. The same method can be used to find signals and inst. After finding the custom code, it can be checked using code quality tools such as lint. Only after the custom code passes verification is it written into a new pin multiplexing file.

[0099] Figure 8 This is a flowchart illustrating step S141 of a chip pin multiplexing method provided in an embodiment of this application, as shown below. Figure 8 As shown, in one embodiment, step S141 may include:

[0100] Step S1411: Locate the port information in the custom code.

[0101] Step S1412: Locate wire and / or reg declarations in the custom code.

[0102] Step S1413: Locate at least one of the following inst, always, and assign codes in the custom code.

[0103] Specifically, when identifying custom code in the pin multiplexing file, the custom code is identified through three categories: port information, wire / reg declarations, and inst / always / assign code. First, the port is identified; any identified custom port is stored in a corresponding list. Next, the wire / reg declarations are identified, primarily the custom inst / always / assign declarations. The remaining code is divided into inst, assign, and always parts and cached separately. These three categories are stored in different groups. When generating a new version of the pin multiplexing file, the custom code from each group is written into the new pin multiplexing file.

[0104] Figure 9 This is a flowchart illustrating step S142 of a chip pin multiplexing method provided in an embodiment of this application, as shown below. Figure 9 As shown, in one embodiment, step S142 may include:

[0105] Step S1421: Determine whether the inst code, always code, and assign code match the corresponding port information.

[0106] Step S1422: Determine whether the inst code, always code, and assign code have corresponding wire declarations and / or reg declarations.

[0107] Specifically, after identifying the three parts of custom code, it needs to be verified. The main checks are whether the wire / reg corresponding to the always code / assign code / inst code is declared, and whether the corresponding port matches. If the wire / reg corresponding to the always code / assign code / inst code is declared, and the always code / assign code / inst code matches the corresponding port, then the custom code passes the verification and can be written into the new pin multiplexing file.

[0108] This application also provides a chip pin multiplexing device. Figure 10 This is a schematic diagram of a chip pin multiplexing device provided in an embodiment of this application. Figure 10 As shown, the chip pin multiplexing device includes: an acquisition module 210 for acquiring pin information of the chip; a grouping module 220 for grouping the pin information according to preset rules; a storage module 230 for storing the grouped pin information in a pin multiplexing file; an identification module 240 for identifying custom codes in the pin multiplexing file; and an update module 250 for updating the pin multiplexing file based on the custom codes. The custom codes are used to control the operating mode of the pins.

[0109] In summary, the chip pin multiplexing device provided by this invention can group and organize pin information, thereby aggregating similar or related pin information. This eliminates the need to search through numerous pins during SoC integration, reducing integration complexity and facilitating debugging. Furthermore, by adding custom code to the pin multiplexing file, the device can automatically adapt to pin multiplexing under various functional and test modes, enabling selection of functional or test modes without manual adjustment.

[0110] It is understood that the chip pin multiplexing device of this embodiment can also be used to implement the chip pin multiplexing method in any of the above embodiments, and has corresponding functional modules.

[0111] Furthermore, this application also provides a computer device, Figure 11 This is a schematic diagram of the internal structure of a computer device provided in an embodiment of this application. Figure 11 As shown, the computer device includes at least one processor and a memory communicatively connected to the at least one processor. The memory stores a computer program, and when the processor executes the computer program, it implements the steps of the chip pin multiplexing method in any of the above embodiments.

[0112] In one embodiment of this application, when the processor executes a computer program, it can: acquire pin information of a chip; group the pin information according to a preset rule; store the grouped pin information in a pin multiplexing file; identify custom code in the pin multiplexing file; and update the pin multiplexing file based on the custom code; wherein the custom code is used to control the working mode of the pin.

[0113] Furthermore, this application also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the steps of the chip pin multiplexing method in any of the above embodiments.

[0114] In one embodiment of this application, when the above-mentioned computer program is executed by a processor, it can achieve the following: acquiring the pin information of the chip; grouping the pin information according to a preset rule; storing the grouped pin information in a pin multiplexing file; identifying custom code in the pin multiplexing file; and updating the pin multiplexing file based on the custom code; wherein the custom code is used to control the working mode of the pin.

[0115] The various embodiments in this application are described in a progressive manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the device and medium embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the description of the method embodiments.

[0116] The foregoing has described specific embodiments of this application. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recited in the claims may be performed in a different order than that shown in the embodiments and may still achieve the desired results. Furthermore, the processes depicted in the drawings do not necessarily require the specific or sequential order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0117] The devices and media provided in this application are one-to-one with the methods. Therefore, the devices and media also have similar beneficial technical effects as their corresponding methods. Since the beneficial technical effects of the methods have been described in detail above, the beneficial technical effects of the devices and media will not be repeated here.

[0118] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0119] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0120] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0121] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0122] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0123] Memory may include non-persistent storage in computer-readable media, such as random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM. Memory is an example of computer-readable media.

[0124] Computer-readable media includes both permanent and non-permanent, removable and non-removable media that can store information using any method or technology. Information can be computer-readable instructions, data structures, modules of programs, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transferable medium that can be used to store information accessible by a computing device. As defined herein, computer-readable media does not include transient computer-readable media, such as modulated data signals and carrier waves.

[0125] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0126] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0127] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these modifications and improvements all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A method for multiplexing chip pins, characterized in that, include: Step S110: Read the pin information table; Identify the position of the pin in the pin information table and determine the corresponding pin information; Step S120: Group the pin information according to preset rules; Step S130: Store the grouped pin information in a pin multiplexing file, generate a pin model, and generate a pin instantiation model based on the pin information in the pin multiplexing file. The pin instantiation model includes a pin instantiation file, and the instantiation of the pin model comes from the instantiation model preset in the script. The pin multiplexing file and the pin model multiplexing file of the pin instantiation model are two different files. The functional information required by the pin model multiplexing file is transmitted through port transmission, and the connection comes from the port information. The instantiation sequence and the sequence in the total pins are obtained from the order of the pin information in the pin information table. Step S140: Add custom code with special comments to the pin multiplexing file. The custom code is used to control the working mode of the pins. Identify the custom code in the pin multiplexing file and organize the special pin models in the custom code. Implement the selection of pin pair function mode or test mode through custom code, and automatically adapt to pin multiplexing in function mode and various test modes. Step S150: Update the pin multiplexing file based on the custom code; after identifying the custom code, perform preset processing on the custom code and write it into the new pin multiplexing file to complete the update of the pin multiplexing file.

2. The chip pin multiplexing method according to claim 1, characterized in that, The pin information includes at least one of the following: pin name, control information, function information, and test information.

3. The chip pin multiplexing method according to claim 2, characterized in that, The step of grouping the pin information according to a preset rule includes: Group the pins according to their pin names; Pin signals within the same group are merged.

4. The chip pin multiplexing method according to claim 2, characterized in that, The step of grouping the pin information according to preset rules also includes: The control functions of the pins are grouped according to the control information; The function selection of the pins is grouped according to the functional information; The test functions of the pins are grouped according to the test information.

5. The chip pin multiplexing method according to claim 1, characterized in that, The custom code for identifying the pin multiplexing file includes: Locate the custom code defined according to the rules in the original pin multiplexing file; The custom code is parsed to match the custom code with the function names in the script according to the grouped function names.

6. The chip pin multiplexing method according to claim 5, characterized in that, The search for custom code defined according to rules in the original pin multiplexing file includes: Locate and analyze port information in custom code; Locate and analyze wire and / or reg declarations in your custom code. Find at least one of the following in your custom code: inst, always, and assign.

7. The chip pin multiplexing method according to claim 6, characterized in that, The verification of the search results for the custom code includes: Determine whether the inst code, always code, and assign code match the corresponding port information; Determine whether the inst code, always code, and assign code have corresponding wire declarations and / or reg declarations.

8. A chip pin multiplexing device for implementing the chip pin multiplexing method according to any one of claims 1-7, characterized in that, include: The acquisition module is used to acquire the pin information of the chip; A grouping module is used to group the pin information according to preset rules; The storage module is used to store the grouped pin information in a pin multiplexing file; The identification module is used to identify custom code in the pin multiplexing file; The update module is used to update the code in the storage module and the identification module to the pin multiplexing file.

9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the chip pin multiplexing method as described in any one of claims 1 to 7.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the chip pin multiplexing method as described in any one of claims 1 to 7.

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