Design method of arbitrary combination waveform generation display system based on LabVIEW and PXI
Through the combination of LabVIEW and PXI modular hardware architecture, efficient generation and display of complex waveforms are achieved, which solves the problems of cumbersome operation and inflexible parameter adjustment of traditional signal testing systems, and improves the efficiency and accuracy of the test system.
Patent Information
- Application Number
- CN202510460258.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-11
- Publication Date
- 2025-07-25
AI Technical Summary
Traditional signal testing systems are cumbersome and inefficient, LabVIEW development platform code reusability is poor, and PXI board control lacks dynamic parameter reconstruction capabilities, making it difficult to meet the needs of high-frequency signal testing and multi-dimensional parameter joint debugging.
The LabVIEW and PXI modular hardware architecture are adopted, and the hardware closed-loop link is built through the PXIe-5402 signal generator and the PXIe-5114 oscilloscope. The waveform generation and display are realized in combination with LabVIEW programming, and the parameter adjustment is adopted using dual-threaded parallel tasks and FFT spectrum analysis, which supports remote operation and data upload.
It realizes flexible adjustment and real-time display of waveform parameters, improves testing efficiency and accuracy, reduces operation difficulty, enhances the stability and reliability of the system, and is suitable for multi-field testing scenarios.
Smart Images

Figure CN120371440A_ABST
Abstract
Description
Technical Field
[0001] The present invention discloses a design method of an arbitrary combined waveform generation and display system based on LabVIEW and PXI, which relates to the technical field of automated measurement and control system development. Specifically, it relates to a method for realizing arbitrary waveform generation and display by programming and controlling a PXI modular hardware architecture based on LabVIEW, and is particularly applicable to the automated generation and closed-loop testing of programmable waveforms and arbitrary combined waveforms. It has the ability to automatically generate non-steady combined waveforms, supports an adaptive waveform reconstruction function based on joint time-frequency domain analysis, and significantly improves the high-frequency signal integrity retention ability. Background Art
[0002] Traditional signal test systems rely on manually configuring oscilloscopes and signal generators, which have problems such as cumbersome operation, low efficiency, and inflexible parameter adjustment. Although the LabVIEW platform provides graphical programming capabilities, there are still deficiencies such as a long development cycle and poor code reusability in complex waveform generation, multi-device collaborative control, and automated test closed-loops. The traditional technology system has three limitations: First, the basic manual operation mode relies on physical knobs to adjust oscilloscopes and signal generators, facing problems such as low parameter coordination efficiency and multi-device timing misalignment in complex waveform generation scenarios, seriously affecting the high-frequency signal test accuracy; Second, although the existing LabVIEW development platform has achieved preliminary graphical programming, there are still defects such as high code redundancy and obvious hardware response delays when dealing with the dynamic generation of combined waveforms; Third, the PXI board control scheme based on a preset panel lacks the ability of parameter dynamic reconstruction, making it difficult to meet the core requirements of real-time waveform reconstruction and multi-dimensional parameter joint debugging in fields such as 5G communication and radar signal processing. The present invention innovatively constructs an intelligent test architecture integrating virtual and real, and through deep integration of PXI-FGEN and PXI-SCOPE drivers in LabVIEW, proposes an efficient and scalable waveform control method, significantly improving the test system development efficiency.
[0003] Differences from the prior art are as follows:
[0004] Technical comparison with the patent CN111707694A "A design method of an NQR phase-controlled excitation pulse generator"
[0005] 1. Patent CN111707694A is based on a PXI system (specifically using a PXI-5421 arbitrary signal generator), focusing on the generation of radio frequency excitation pulses for nuclear quadrupole resonance (NQR) explosive detection scenarios. The hardware design is optimized around radio frequency pulse parameters (pulse width, interval, number, frequency), and the phased control function is achieved through a trigger module. In this study, a general PXI modular hardware architecture (signal generator + oscilloscope) is adopted, and LabVIEW is combined to realize the generation and display of arbitrary combined waveforms. The system architecture is more flexible, can adapt to various test scenarios (such as communication, electronic circuit analysis, etc.), and the hardware functions are not limited to specific frequency bands or application fields.
[0006] 2. Patent CN111707694A is dedicated to the field of explosive detection, generating specific radio frequency excitation pulses required for NQR detection, with fixed functions and non-reusable. This study is applicable to multiple fields such as educational experiments, electronic R & D, and communication system testing, can generate complex test signals (such as 5G NR waveforms, radar pulses), and replaces physical experiments through virtual simulation to solve the test problems in high-risk or high-cost scenarios.
[0007] 3. Patent CN111707694A does not mention remote operation or data interaction functions, being limited to local device control. This study supports networked operation (such as remote control, data upload to the cloud), and can realize multi-user collaborative testing through LabVIEW services, meeting the requirements of modern distributed test systems. Summary of the Invention
[0008] The object of the present invention is to address the deficiencies of the above-mentioned background technology and provide a design method for an arbitrary combined waveform generation and display system based on LabVIEW and modular hardware PXI, enabling developers to conveniently control a PXIe-5402 signal generator and a PXIe-5114 oscilloscope through a LabVIEW program, generate waveforms meeting different requirements, and perform real-time display. The PXI modular hardware architecture adopts a standardized modular design, supports the mixed configuration of various instrument modules such as signal generators, oscilloscopes, and data acquisition cards, so as to be freely combined according to experimental needs. Moreover, all modules are integrated and unified, interconnected through a high-speed backplane bus, avoiding the complex cable connections of traditional bench-top instruments, significantly saving space and enhancing system reliability.
[0009] To achieve the above object, the technical solution adopted by the present invention is:
[0010] A design method for an arbitrary combined waveform generation and display system based on LabVIEW and PXI includes the following steps:
[0011] Step 1: Control the PXI modular hardware architecture to achieve a closed-loop of waveform generation and display;
[0012] It includes a hardware co - architecture and a software closed - loop logic;
[0013] Hardware co - architecture: A hardware closed - loop link is constructed through a PXIe - 5402 signal generator and a PXIe - 5114 oscilloscope. A BNC - BNC connection cable is used for physical direct connection to generate an acquisition channel. Based on the PXI backplane bus, reference clock distribution and trigger interlock are realized to reduce the time - domain jitter error;
[0014] Software closed - loop logic: A dual - thread parallel task is established in LabVIEW. The waveform generation thread controls the signal generator through the PXI - FGEN driver to dynamically output a user - defined combined waveform, while the real - time acquisition thread controls the oscilloscope through the PXI - SCOPE driver to capture waveform data at a sampling rate 5 times the highest frequency of the signal;
[0015] Step 2: Configure PXI - FGEN and use LabVIEW for block diagram design, configure PXI - SCOPE and use LabVIEW for block diagram design;
[0016] Integrate a data comparison and adaptive correction module in the block diagram. Perform FFT spectrum analysis and time - domain parameter extraction on the acquired waveform. When the parameter error exceeds the tolerance, dynamically adjust the output amplitude and frequency parameters of the signal generator through the property node;
[0017] Step 3: Control the PXI modular hardware architecture to realize the generation and display of any combined waveform;
[0018] Embed waveform parameter threshold comparison logic in LabVIEW. According to the differential result between the measured waveform and the preset parameters, iteratively correct the phase compensation amount of the DDS algorithm of the signal generator until it converges within the error tolerance.
[0019] Step 4: Configure PXI - FGEN and use LabVIEW for block diagram design, configure PXI - SCOPE and use LabVIEW for block diagram design;
[0020] Implement a hardware status monitoring module in the block diagram. When trigger unlocking or clock synchronization is abnormal, trigger the visualization warning flag on the LabVIEW front panel.
[0021] As a further improvement of the present invention, the method for controlling the PXI modular hardware architecture to realize waveform generation and display in step 1 requires configuring FGEN, and the specific steps are as follows:
[0022] S1: Prepare the PXIe-5402 signal generator, PXIe-5114 oscilloscope, and BNC-BNC connection cable as supporting hardware, and LabVIEW, PXI-FGEN driver, and PXI-SCOPE driver as supporting software;
[0023] S2: Create a new PXI FGEN Generator and Acquisition.vi and save it. Place input controls on the front panel;
[0024] S3: Locate the FGEN function toolkit in the block diagram and place the initialization VI and termination VI of FGEN;
[0025] S4: Configure FGEN;
[0026] S5: Use local variables and property nodes to change the output waveform of FGEN;
[0027] S6: Press the stop button to stop the waveform output of the FGEN board and close the session with the device to release resources;
[0028] The steps of the FGEN main vi function are as follows:
[0029] S1: Initialize the device session and establish a communication connection with the PXI signal generator using a function;
[0030] S2: Call a function to enable the signal generator to switch from the "static configuration" state to the "dynamic output" state;
[0031] S3: Call a function to set the output mode to an arbitrary waveform or an arbitrary sequence;
[0032] S4: Call a function to configure the signal generator to output a standard waveform, specifically including: waveform type, frequency, and amplitude;
[0033] S5: Call a function to pass a boolean value to enable the signal generator channel;
[0034] S6: Call a function to enable the signal generation process from parameter configuration to actual output;
[0035] S7: Add a conditional structure;
[0036] S8: Place a stop module to release the hardware resources when abnormally terminating or normally closing the signal generator session;
[0037] S9: Call a function to send a trigger signal or a synchronization instruction to an external device;
[0038] S10: Call a function to remove the FGEN session and all its properties, and release any memory resources used by FGEN.
[0039] As a further improvement of the present invention, the steps for the step 2 to control the PXI modular hardware architecture to configure the SCOPE in waveform display are as follows:
[0040] S1: Add the initialization function of the SCOPE outside the loop to establish a connection with the SCOPE;
[0041] S2: Configure the parameters of the SCOPE in the loop;
[0042] S3: Configure the trigger mode of the SCOPE;
[0043] S4: Add a function to close the device and release resources;
[0044] The steps of the main vi function of the SCOPE are as follows:
[0045] S1: Call a function to establish a communication session with the hardware, allocate resources, and initialize default parameters;
[0046] S2: Call a function to adjust the vertical range of each or two digitizer channels;
[0047] S3: Call a function to specify the input impedance and maximum input frequency of the SCOPE channel;
[0048] S4: Call a function module to set the horizontal timing parameters of the oscilloscope to ensure accurate acquisition and display of waveforms in the time dimension;
[0049] S5: Change the trigger mode property node;
[0050] S6: Call a function to set it to auto trigger;
[0051] S7: Call a function to run the SCOPE to acquire data;
[0052] S8: Obtain the acquired data and display it through waveforms.
[0053] As a further improvement of the present invention, the closed-loop control architecture in the step 2 relies on the FGEN and SCOPE drivers in the LabVIEW graphical system design programming platform to achieve board-level signal synchronization; the clock synchronization between the PXIe-5402 signal generator and the PXIe-5114 oscilloscope is completed through the backplane trigger bus of the PXI modular hardware architecture.
[0054] As a further improvement of the present invention, the steps for the step 3 to control the PXI modular hardware architecture to generate arbitrary combined waveforms require configuring the PXI-FGEN, and the specific steps are as follows:
[0055] S1: Open LabVIEW and create a new Multi FGEN Generator and Acquisition.vi, then save it to Exercise;
[0056] S2: Place input controls on the front panel;
[0057] S3: Unbundle the elements in the cluster of the combined waveform;
[0058] S4: Initialize the FGEN;
[0059] S5: Use the property node to change the output waveform of the FGEN;
[0060] S6: After unbundling, add 1 to the value of the waveform and then connect it back to the waveform;
[0061] S7: Stop the FGEN output and close the hardware session;
[0062] The steps of the main vi function of the FGEN are as follows:
[0063] S1: Call a function to create a session to establish a connection between the signal generator and the application;
[0064] S2: Call a function to control the output of the FGEN board;
[0065] S3: Call a function to specify the output mode of the FGEN as the standard function generation mode;
[0066] S4: Call a function to configure the signal generator to output a standard waveform, specifically including: waveform type, frequency, and amplitude;
[0067] S5: Call a function to pass a boolean value to enable the signal generator channel;
[0068] S6: Call a function to make the signal generation process go from parameter configuration to actual output;
[0069] S7: Create a For loop. When connecting the combined waveform array control to the For loop, set the tunnel mode to enabled indexing and connect the parameters in the combined waveform on the front panel to the corresponding property nodes;
[0070] S8: After unbundling, add 1 to the value of the waveform and then connect it back to the waveform;
[0071] S9: Call a function to send a trigger signal or synchronization instruction to an external device;
[0072] S10: Call a function to eliminate the FGEN session and all its properties, and release any memory resources used by the FGEN.
[0073] As a further improvement of the present invention, in step 4: controlling the PXI modular hardware architecture to implement the display of arbitrary combined waveforms requires configuring PXI-SCOPE, and the specific steps are as follows:
[0074] S1: Adopt a parallel loop architecture to ensure that multiple tasks are executed relatively independently without affecting each other;
[0075] S2: Initialize the SCOPE board;
[0076] S3: Merge the error clusters of two tasks executed in parallel;
[0077] S4: Perform front panel parameter setting after passing through a simple error handler;
[0078] The steps of the SCOPE main vi function are as follows:
[0079] S1: Call functions to establish a communication session with the hardware, allocate resources, and initialize default parameters;
[0080] S2: Call functions to adjust the vertical range of each or two digitizer channels;
[0081] S3: Call functions to specify the input impedance and maximum input frequency of the SCOPE channel;
[0082] S4: Call function modules to set the horizontal timing parameters of the oscilloscope to ensure accurate acquisition and display of waveforms in the time dimension;
[0083] S5: Change the trigger mode property node;
[0084] S6: Call functions to set to auto trigger;
[0085] S7: Call functions to run SCOPE to acquire data;
[0086] S8: Obtain the acquired data and display it through waveforms.
[0087] The arbitrary waveform generation and display system designed by the present invention through this method can achieve the following functions:
[0088] 1. Control the PXI signal generator (FGEN) and oscilloscope (SCOPE) through LabVIEW programming to achieve full-process automation of "waveform generation → signal output → data acquisition → real-time display".
[0089] 2. Realize flexible adjustment of waveform parameters, such as frequency, amplitude, DC bias, etc., to meet the diverse requirements of different test scenarios for waveforms.
[0090] 3. Automatically generate standardized data files (TDMS format) and configuration files (XML format) to record waveform data, hardware parameters, and operation logs.
[0091] 4. A closed-loop generation method that meets the requirement of using the LabVIEW graphical system design programming platform to control the PXI modular hardware architecture to realize arbitrary combined waveform generation and display.
[0092] Advantages of the present invention:
[0093] 1. The method provided by the present invention realizes efficient control of hardware devices through LabVIEW programming, encapsulates complex hardware operations in the program, and users only need to set parameters on the front panel to realize waveform generation and display, greatly reducing the operation difficulty and improving the test efficiency.
[0094] 2. Realize flexible adjustment of waveform parameters. Whether it is a standard waveform or a combined waveform, users can quickly change parameters according to actual needs to meet diverse test requirements and improve the accuracy and flexibility of testing.
[0095] 3. Adopt a parallel loop architecture to process the generation and acquisition of combined waveforms, ensuring the independent execution of different tasks without interference, improving the stability and reliability of the system. At the same time, the introduction of an error handling mechanism helps to quickly locate and solve problems that occur during program operation, enhancing the fault tolerance of the system. Description of the drawings
[0096] Figure 1 The front panel for using the LabVIEW graphical system design programming platform to control the PXI modular hardware architecture to realize waveform generation and display;
[0097] Figure 2 The block diagram of the program for using the LabVIEW graphical system design programming platform to control the PXI modular hardware architecture to realize waveform generation and display;
[0098] Figure 3 The main vi for using the LabVIEW graphical system design programming platform to control the PXI modular hardware architecture to realize waveform generation;
[0099] Figure 4 The sub-vi for using the LabVIEW graphical system design programming platform to control the PXI modular hardware architecture to realize waveform generation;
[0100] Figure 5 The main vi for using the LabVIEW graphical system design programming platform to control the PXI modular hardware architecture to realize waveform display;
[0101] Figure 6The front panel for realizing arbitrary waveform generation and display by using the LabVIEW graphical system design programming platform to control the PXI modular hardware architecture;
[0102] Figure 7 The block diagram for realizing arbitrary waveform generation and display by using the LabVIEW graphical system design programming platform to control the PXI modular hardware architecture;
[0103] Figure 8 The main VI for realizing arbitrary waveform generation by using the LabVIEW graphical system design programming platform to control the PXI modular hardware architecture;
[0104] Figure 9 The first sub-VI for realizing arbitrary waveform generation by using the LabVIEW graphical system design programming platform to control the PXI modular hardware architecture;
[0105] Figure 10 The second sub-VI for realizing arbitrary waveform generation by using the LabVIEW graphical system design programming platform to control the PXI modular hardware architecture;
[0106] Figure 11 The main VI for realizing arbitrary waveform display by using the LabVIEW graphical system design programming platform to control the PXI modular hardware architecture;
[0107] Figure 12 An example for realizing waveform generation and display by using the LabVIEW graphical system design programming platform to control the PXI modular hardware architecture;
[0108] Figure 13 An example for realizing arbitrary waveform generation and display by using the LabVIEW graphical system design programming platform to control the PXI modular hardware architecture. Specific implementation manners
[0109] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific implementation manners:
[0110] For the relevant technical personnel in the field to more intuitively master the technical implementation details of the present invention, the following will systematically elaborate on the core processes and innovation points of the technical solution in combination with specific implementation cases and the accompanying drawings.
[0111] Design of the front panel:
[0112] The front panel is for the software designed by this method to communicate with the user, and the user sets waveform-related parameters, such as the waveform type, frequency, etc. of the signal generator; the design of the front panel is as shown in Figure 1 and Figure 6 and it is mainly divided into the following parts:
[0113] 1. Waveform Parameter Setting Area:
[0114] The basic waveform settings include: waveform type selection, frequency setting, amplitude setting, and DC offset. These input controls are used to select the basic content required for waveform initialization. Waveform type selection module: A drop-down list control that supports standard waveforms (sine wave, square wave, triangular wave, noise, etc.) and user-defined waveforms. Frequency setting: A numeric input control (unit: Hz) that supports continuous adjustment from 1 Hz to the device upper limit (e.g., 100 MHz). Amplitude setting: A peak-to-peak (Vpp) or amplitude (V) input control, and the range is set according to the hardware performance (e.g., ±10 V). DC offset: A numeric input control (unit: V) used to set the DC offset of the waveform.
[0115] The composite waveform settings include: waveform array control, indexing and unbinding module. These input controls are used to select the basic content required for waveform diversification. Waveform array control: Presented in the form of a cluster array, each cluster contains independent waveform type, frequency, amplitude, and DC offset parameters, and supports dynamically adding or deleting waveform entries to achieve multi-waveform superposition or periodic switching. Indexing and unbinding module: Parse the composite waveform parameters into independent variables through the "array index" and "unbundle by name" functions for the backend program to call.
[0116] 2. Hardware Channel and Trigger Setting Area:
[0117] This setting area includes: device selection, input impedance configuration, and trigger mode. Device selection module: A drop-down menu specifies the connected PXI device (such as PXIe-5402 signal generator, PXIe-5114 oscilloscope) and its channel (such as channel 0 / 1). Input impedance configuration module: Optional 50Ω or 1MΩ to adapt to the impedance matching requirements of different test scenarios. Trigger mode module: Supports modes such as auto trigger and edge trigger, and the trigger level (V) can be customarily input.
[0118] 3. Real-time Waveform Display Area:
[0119] This setting area includes: signal generator output waveform graph, oscilloscope acquisition waveform graph. Signal generator output waveform graph: Dynamically displays the currently generated waveform (standard or composite waveform), supports switching between time domain and frequency domain views, and highlights the filtering effect comparison. Oscilloscope acquisition waveform graph: Synchronously displays the waveform data captured by SCOPE, used for closed-loop verification, and supports multi-channel superposition display and zoom function.
[0120] 4. System Control and Status Monitoring Area:
[0121] This setting area includes: Start / Stop button, parameter lock, error prompt box, and resource occupancy monitoring. Start / Stop button: Controls the start and stop of waveform generation and acquisition, and integrates the function of releasing resources (closing the hardware session). Parameter lock: Prevents parameter conflicts caused by accidental operations during runtime. Error prompt box: Displays the system error code and description in real time (such as driver exception, hardware not connected), and supports one-key jump to the help document. Resource occupancy monitoring: Displays the CPU and memory usage rates to ensure the efficient operation of the system.
[0122] 5. Advanced Function Expansion Area:
[0123] This setting area includes: Filter parameter configuration, data saving and playback. Filter parameter configuration: Allows users to customize the order and cut-off frequency of the digital FIR filter to optimize the signal quality. Data saving and playback: Provides a file path selection control, supports saving waveform data in CSV or TDMS format, and supports loading and echoing historical data.
[0124] Design of the program block diagram:
[0125] The program block diagram is the core logical implementation part of the patented method. Based on the LabVIEW graphical programming environment, it realizes the intelligent control of waveform generation, acquisition, and closed-loop testing through modular design, as Figure 2 , Figure 7 shown. According to the technical solution of this patent, the program block diagram is divided into the following main VIs and sub-VIs, specifically as follows:
[0126] 1. Waveform Generation Main VI Function Settings
[0127] As Figure 3 shown is the main VI that uses the LabVIEW graphical system design programming platform to control the PXI modular hardware architecture to realize waveform generation
[0128] The main VI function is mainly used to control the complete operation process of the signal generator (such as PXIe-5402). It connects sub-VI functions such as hardware initialization, channel configuration, waveform generation, and output control in sequence to form an executable signal generation program. The main VI also integrates an error handling mechanism to ensure the safety and reliability of hardware operations. In addition, the main VI supports dynamic parameter configuration, such as selecting standard waveforms (sine wave, square wave, etc.) or customizing any waveform, and adjusting parameters such as frequency, amplitude, and offset. By cooperating with the SCOPE main VI, the FGEN main VI can achieve closed-loop testing, generate signals and then collect and analyze the results in real time, significantly improving the test efficiency and accuracy.
[0129] The steps of the main VI function are as follows:
[0130] Step 1: Call the Fgen Initialize function to establish a connection between the created session in the signal generator and the application. After establishing this connection, the signal generator can transfer data to the application.
[0131] Step 2: Call the Fgen Abort Generation function to immediately stop the waveform generation of the signal generator, which is commonly used in the following three situations:
[0132] Waveform generation termination: After calling this VI, the signal generator will immediately stop the output of the current waveform, regardless of whether the waveform generation is completed.
[0133] Hardware status reset: Clear the output buffer of the signal generator and restore the hardware status to the idle mode.
[0134] Resource release: After terminating the waveform generation, release the occupied hardware resources to prepare for subsequent operations.
[0135] Step 3: Call the Configure Output Mode function to specify the output mode of FGEN as the standard function generation mode;
[0136] Step 4: Call the Configure Standard Waveform function to configure the waveform parameters and connect the controls on the front panel to the specified terminals of this VI;
[0137] Step 5: Call the Output Enable function to enable the specified channel;
[0138] Step 6: Call the Initiate Generation function to control the output of the FGEN board;
[0139] Step 7: Use local variables and property nodes to make changes to the FGEN output waveform. Create corresponding local variables for the frequency, peak-to-peak value, and DC offset controls on the front panel, and at the same time create three different property nodes using the property node functions in the FGEN function palette; add a wait function with a value of 100 ms in the loop;
[0140] Step 8: Add a conditional structure so that the parameter values will be passed to the FGEN board only after the values on the front panel change. In case of abnormal termination or normal shutdown of the signal generator session, release the hardware resources;
[0141] Step 9: Call the Fgen Abort Generation function to immediately stop the waveform generation of the signal generator and reset the hardware status;
[0142] Step 10: Call the Fgen Close function to perform the following operations: close the document I / O session; eliminate the FGEN session and all its attributes; release any memory resources used by FGEN.
[0143] 2. Waveform Generation SubVI Function Settings
[0144] As Figure 4 shown is the SubVI that uses the LabVIEW graphical system design programming platform to control the PXI modular hardware architecture to achieve waveform generation
[0145] The core function of the SubVI function is to configure the frequency parameters of the signal generator. The specific process is as follows: The SubVI receives the frequency value (Frequency, unit: Hz) input by the user through the Fgen driver function and passes it to the signal generator hardware. Inside the SubVI, the Fgen Configure Standard Waveform function is called to bind the frequency parameter with the waveform type (such as sine wave, square wave, etc.) to ensure that the frequency of the output signal exactly matches the user's requirements. The signal flow is represented by orange lines, and the data connection is represented by purple lines. The SubVI passes the configuration result to the next module to achieve seamless connection of the signal generation process.
[0146] The steps of the SubVI are as follows:
[0147] Step 1: Right-click on the front panel and select the numeric input control in the control palette, and modify the label to Frequency (Hz), indicating that the user needs to enter the target frequency value (unit: Hertz) here;
[0148] Step 2: Mark "Fgen" and "Frequency" in the central frame to indicate that this module realizes the frequency generation function based on the PXI signal generator driver;
[0149] Step 3: Add a conditional structure, use the arrow tool to draw an arrow from the right side of the "Frequency (Hz)" input box to the left border of the processing module. The arrow line uses orange and the width is adjusted to 2 - 3 pixels to highlight the data flow;
[0150] 3. Waveform Display MainVI Function Settings
[0151] As Figure 5 shown is the MainVI that uses the LabVIEW graphical system design programming platform to control the PXI modular hardware architecture to achieve waveform generation
[0152] The main VI is used to control the complete signal acquisition and analysis process of a digitizer (such as PXIe-5160), achieving high-precision measurement by integrating hardware initialization, channel configuration, trigger setting, and data acquisition functions. After establishing a connection with the device, the main VI dynamically configures vertical parameters, horizontal parameters, and trigger conditions, then calls a function to start the acquisition task and extracts waveform data. Its built-in error handling link captures hardware exceptions in real-time to ensure operation stability; it supports multi-channel synchronous acquisition and trigger mode switching, adapting to the requirements of capturing high-speed transient signals or long-period waveforms. When cooperating with the FGEN main VI, it can build a closed-loop test system to verify the output characteristics of the signal source (such as frequency tolerance, amplitude distortion) in real-time, and is widely used in scenarios such as communication protocol analysis, power supply noise testing, and sensor dynamic response evaluation, significantly improving the efficiency of automated testing and data reliability.
[0153] The steps of the main vi function are as follows:
[0154] Step 1: Call the Scope Initialize function to establish a communication session with the PXI oscilloscope and prepare for subsequent operations;
[0155] Step 2: Call the Scope Configure Vertical function to set the vertical range (scale), offset, coupling mode (AC or DC), and probe attenuation coefficient of the channel. Adjust the vertical range of each or two digitizer channels, that is, configure the full-scale (peak-to-peak) voltage range at the input end of the digitizing instrument;
[0156] Step 3: Call the Configure Chan Characteristics function to specify the input impedance and maximum input frequency of the SCOPE channel, that is, comprehensively set the input signal characteristics of the oscilloscope channel to ensure that the signal can be correctly captured, amplified, filtered, and processed during acquisition;
[0157] Step 4: Call the Configure Horizontal Timing function to specify the horizontal parameters of the SCOPE, including the minimum sampling rate, reference position, and minimum record length, that is, by setting the time axis-related parameters of the oscilloscope, ensure that the time-domain characteristics of the waveform (such as frequency, period, transient events) can be accurately acquired and displayed;
[0158] Step 5: Change the trigger mode property node to configure the device to automatically complete the acquisition when no trigger is received. Marked as "Trigger Modifier" in the central box (trigger modification / trigger condition adjustment), optimize the trigger condition of the oscilloscope by configuring the extended parameters of the trigger logic to ensure accurate capture of the target signal;
[0159] Step 6: Call the Configure Trigger(poly) function to set it to automatic trigger, achieving fine-grained control of the trigger logic to ensure that the oscilloscope only starts acquisition when the target signal characteristics appear;
[0160] Step 7: Call the Initiate Acquisition function to run SCOPE to acquire data. As the core execution step in the data acquisition process, it triggers the hardware device to start capturing signals according to the preset parameters;
[0161] Step 8: Call the Fetch(poly) function to read the acquired waveform data from the on-board memory of the oscilloscope and convert it into a format suitable for subsequent processing or display. After obtaining the acquired data, the data is displayed through a waveform graph;
[0162] 4. Arbitrary Waveform Generation Main VI Function Settings
[0163] As Figure 8 shown is the main VI that uses the LabVIEW graphical system design programming platform to control the PXI modular hardware architecture to achieve arbitrary waveform generation
[0164] The main VI is the core program for controlling the PXIe-5402 signal generator to generate arbitrary combined waveforms. It receives multiple groups of waveform parameters (voltage, frequency, DC bias, and waveform type) through array cluster controls, and adopts an architecture of initialization-configuration-loop output: First, configure the FGEN to the standard function mode and load the waveform parameters, and then dynamically adjust the waveform attributes through the property node in the For loop to achieve seamless switching of waveform types. This VI synchronously supports the oscilloscope display function driven by the PXI-SCOPE, completing the closed-loop verification of waveform generation and acquisition.
[0165] The steps of the main VI function are as follows:
[0166] Step 1: Call the Fgen Initialize function to establish a communication session with the PXI signal generator;
[0167] Step 2: Call the Fgen Abort Generation function, which can immediately stop the waveform generation of the signal generator;
[0168] Step 3: Call the Configure Output Mode function to specify the output mode of the FGEN as the standard function generation mode;
[0169] Step 4: Call the Configure Standard Waveform function to configure the waveform parameters and connect the controls on the front panel to the specified terminals of this VI;
[0170] Step 5: Call the Output Enable function to enable the specified channel;
[0171] Step 6: Call the Initiate Generation function to control the output of the FGEN board;
[0172] Step 7: Create a For loop. When connecting the combined waveform array control to the For loop, set the enabled index of the tunnel mode. Then, use the property node functions in the FGEN function palette to create four different property nodes, and connect the waveform type, frequency, peak-to-peak value, and DC offset value in the combined waveform on the front panel to the corresponding property nodes. Add a wait function with a value of 2000m to the loop to make the waveform output by the FGEN board switch every 2s;
[0173] Step 8: The waveform property node is different from the Configure Standard Waveform function outside the loop when defining the waveform. Therefore, after unbundling, the value of the waveform needs to be incremented by 1 before connecting it to the waveform;
[0174] Step 9: Call the Fgen Abort Generation function to immediately stop the waveform generation of the signal generator and reset the hardware state;
[0175] Step 10: Call the Fgen Close function to perform the following operations: close the document I / O session; eliminate the FGEN session and all its properties; release any memory resources used by the FGEN.
[0176] 5. Setting of the first sub - VI function for arbitrary waveform generation
[0177] As Figure 9 shown is the first sub - VI for realizing arbitrary waveform generation by using the LabVIEW graphical system design programming platform to control the PXI modular hardware architecture
[0178] The core module "Arbitrary Waveform" of the sub - VI function supports generating basic waveforms such as sine waves and square waves, and integrates parameter adjustment functions: set the frequency (Hz), peak - to - peak amplitude (Vp - p), DC offset, and waveform type through the panel to adjust the signal characteristics in real - time. The connections between modules reflect the data - flow logic and are connected to the corresponding property nodes, which are suitable for complex scenarios and realize the integrated control of waveform configuration, output, and verification.
[0179] The steps of the sub - VI are as follows:
[0180] Step 1: Select the waveform type. In the parameter area, select the basic waveform type (such as sine wave, square wave, triangular wave, sawtooth wave, or custom waveform) under the label "Waveform". If a custom waveform is selected, a numerical sequence needs to be imported;
[0181] Step 2: Set the frequency (Frequency(Hz)) in the parameter area under the label "Frequency(Hz)". Define the frequency of the generated signal (unit: Hz), control the waveform period, and the input range should comply with the hardware limitations;
[0182] Step 3: Configure the amplitude (Amplitude(Vp-p)) in the parameter area under the label "Amplitude(Vp-p)". Set the peak-to-peak voltage of the signal (unit: Vp-p), which determines the waveform amplitude range. The load impedance needs to be matched to avoid signal distortion;
[0183] Step 4: Adjust the DC offset in the parameter area under the label "DC Offset". Superimpose a DC voltage component to offset the signal baseline (unit: V). Ensure that the total voltage (amplitude + offset) does not exceed the device output range;
[0184] Step 5: Connect the above waveform type, frequency, peak-to-peak value, and DC offset values to the corresponding attribute nodes;
[0185] 6. Settings for the second sub-VI function of arbitrary waveform generation
[0186] As Figure 10 shown is the second sub-VI for realizing arbitrary waveform generation by using the LabVIEW graphical system design programming platform to control the PXI modular hardware architecture
[0187] The sub-VI function generates a configurable periodic signal by integrating the input waveform type, frequency, peak-to-peak amplitude, and DC offset parameters. This module receives the waveform enumeration value (such as sine wave, square wave) through the orange data flow line and automatically adds "1" to the enumeration value to adapt to the PXI driver index (to avoid index errors starting from 0). The blue parameter lines are connected to controls such as frequency and amplitude to dynamically adjust the signal characteristics. The module is designed with a white background and an orange border to highlight the key parameter input area, intuitively display the signal generation process, and is suitable for the quick waveform configuration and output verification of a function generator.
[0188] The steps of the sub-VI are as follows:
[0189] Step 1: Arrange the input parameters of the previous sub-VI vertically on the left, with the arrow pointing to the right towards the processing module;
[0190] Step 2: Connect the parameters to the Fgen Waveform module with blue lines to indicate the data flow direction;
[0191] Step 3: Add a conditional structure, mark +1 next to Waveform, and correct the PXI driver index;
[0192] 7. Main VI function settings for arbitrary waveform display
[0193] As Figure 11 shown is the main VI that uses the LabVIEW graphical system design programming platform to control the PXI modular hardware architecture to achieve arbitrary waveform display
[0194] The main VI is developed based on the PXI-SCOPE driver and is used to control the PXIe-5114 oscilloscope to capture and display arbitrary waveforms generated by FGEN in real time. Its functions include: initializing the oscilloscope hardware, configuring parameters such as sampling rate, trigger conditions, and voltage range, starting data acquisition, circularly reading waveform data, and visualizing it through graphical controls. This VI runs in parallel with the FGEN generation end, ensures waveform real-time performance through a synchronization mechanism, supports verifying whether the frequency, amplitude, and shape of any combined waveform meet expectations, and is the core program for closed-loop testing of signal generation and acquisition in experiments.
[0195] The steps of the main VI function are as follows:
[0196] Step 1: Call the Scope Initialize function to establish a communication session with the PXI oscilloscope and prepare for subsequent operations. Adopt a parallel loop architecture to ensure that when multiple tasks are executed, each task can be executed relatively independently without affecting each other;
[0197] Step 2: Call the Scope Configure Vertical function to set the vertical range (range), offset, coupling mode (AC or DC), and probe attenuation coefficient of the channel;
[0198] Step 3: Call the Configure Chan Characteristics function to specify the input impedance and maximum input frequency of the SCOPE channel, that is, comprehensively set the input signal characteristics of the oscilloscope channel;
[0199] Step 4: Call the Configure Horizontal Timing function to specify the horizontal parameters of the SCOPE, that is, by setting the time axis-related parameters of the oscilloscope, ensure that the time-domain characteristics of the waveform can be accurately collected and displayed;
[0200] Step 5: Change the trigger mode property node to configure the device to automatically complete acquisition when no trigger is received. Marked as "Trigger Modifier" in the central box, optimize the trigger conditions of the oscilloscope by configuring the extended parameters of the trigger logic to ensure accurate capture of the target signal;
[0201] Step 6: Call the Configure Trigger(poly) function to set it to auto-trigger, achieving fine-grained control of the trigger logic to ensure that the oscilloscope starts acquisition only when the target signal characteristics appear;
[0202] Step 7: Call the Initiate Acquisition function to run SCOPE to acquire data. As the core execution step in the data acquisition process, trigger the hardware device to start capturing signals according to the preset parameters;
[0203] Step 8: Call the Fetch(poly) function to read the acquired waveform data from the on-board memory of the oscilloscope and convert it into a format suitable for subsequent processing or display. After obtaining the acquired data, display the data through a waveform graph;
[0204] Step 9: Merge the error clusters of the two tasks executed in parallel and pass through a simple error handler;
[0205] Example
[0206] To enable those skilled in the art to better understand the solution provided by the present invention, two examples are given below.
[0207] After the user opens the software, they enter the main interface as shown in Figure 1 and Figure 6 and perform the following operations in sequence:
[0208] Example 1:
[0209] After the user opens the software, they enter the interface as shown in Figure 1 and then the user can perform operations step by step.
[0210] Step 1: Set the peak-to-peak value of the sine wave to 5V;
[0211] Step 2: Set the frequency of the sine wave to 100KHz;
[0212] Step 3: Set the DC bias of the sine wave to 0V;
[0213] Step 4: Configure channel 0 of SCOPE as the acquisition channel;
[0214] Step 5: Set the vertical range to 6V;
[0215] Step 6: Set DC coupling and input impedance: to 1 MΩ;
[0216] Step 7: Set the minimum sampling rate to 10 MHz;
[0217] Step 8: Set the minimum record length to 1000;
[0218] Step 9: Set the trigger mode to auto trigger;
[0219] Step 10: Run the program to achieve the effect as Figure 12 shown.
[0220] Example 2:
[0221] After the user opens the software, they will enter the interface as Figure 6 shown, and then the user can operate step by step.
[0222] Step 1: Set the peak-to-peak value of the first sine wave to 5 V;
[0223] Step 2: Set the frequency of the first sine wave to 100 Hz;
[0224] Step 3: Set the DC bias of the first sine wave to 0 V;
[0225] Step 4: Set the peak-to-peak value of the second square wave to 3 V;
[0226] Step 5: Set the frequency of the second square wave to 100 Hz;
[0227] Step 6: Set the DC bias of the second square wave to 0 V;
[0228] Step 7: Set the peak-to-peak value of the third triangular wave to 1 V;
[0229] Step 8: Set the frequency of the third triangular wave to 100 Hz;
[0230] Step 9: Set the DC bias of the third triangular wave to 0 V;
[0231] Step 10: Set the parameters of the SCOPE: the vertical range is 6 V;
[0232] Step 11: Set the attenuation coefficient of the SCOPE to 1;
[0233] Step 12: Set the vertical bias of the SCOPE to 0 V;
[0234] Step 13: Set the maximum input frequency of the SCOPE to 0 Hz (indicating the use of the default);
[0235] Step 14: Set the input impedance of the SCOPE to 1 MΩ;
[0236] Step 15: Set the minimum sampling rate of SCOPE to 1 KHz;
[0237] Step 16: Set the minimum recording length of SCOPE to 300;
[0238] Step 17: Set the triggering mode to automatic triggering;
[0239] Step 18: Run the program to achieve the effects as Figure 13 shown.
[0240] The above is only the preferred embodiment of the present invention, and it is not intended to limit the present invention in any other form. Any modification or equivalent change made according to the technical essence of the present invention still falls within the scope claimed by the present invention.
Claims
1. Design method of an arbitrary combined waveform generation and display system based on LabVIEW and PXI, characterized in that It includes the following steps: Step 1: Control the PXI modular hardware architecture to achieve a closed-loop of waveform generation and display; It includes a hardware co-architecture and software closed-loop logic; Hardware co-architecture: Build a hardware closed-loop link through the PXIe-5402 signal generator and the PXIe-5114 oscilloscope. Use BNC-BNC connecting wires for physical direct connection to generate - acquisition channels, and implement reference clock distribution and trigger interlock based on the PXI backplane bus to reduce time-domain jitter error; Software closed-loop logic: Establish a dual-thread parallel task in LabVIEW. The waveform generation thread controls the signal generator through the PXI-FGEN driver to dynamically output user-defined combined waveforms, while the real-time acquisition thread controls the oscilloscope through the PXI-SCOPE driver to capture waveform data at a sampling rate 5 times the highest frequency of the signal; Step 2: Configure PXI-FGEN and use LabVIEW for block diagram design, configure PXI-SCOPE and use LabVIEW for block diagram design; Integrate a data comparison and adaptive correction module in the block diagram. Perform FFT spectrum analysis and time-domain parameter extraction on the acquired waveform. When the parameter error exceeds the tolerance, dynamically adjust the output amplitude and frequency parameters of the signal generator through the property node; Step 3: Control the PXI modular hardware architecture to achieve the generation and display of arbitrary combined waveforms; Embed waveform parameter threshold comparison logic in LabVIEW. According to the differential result between the measured waveform and the preset parameters, iteratively correct the phase compensation amount of the DDS algorithm of the signal generator until it converges within the error tolerance; Step 4: Configure PXI-FGEN and use LabVIEW for block diagram design, configure PXI-SCOPE and use LabVIEW for block diagram design; Implement a hardware status monitoring module in the block diagram. When trigger unlocking or clock synchronization is abnormal, trigger the visual alarm flag on the LabVIEW front panel.
2. The design method of the arbitrary combined waveform generating and displaying system based on LabVIEW and PXI according to claim 1, Its characteristics are; The method of controlling the PXI modular hardware architecture to achieve waveform generation and display in Step 1 requires configuring FGEN. The specific steps are as follows: S1: Prepare the PXIe -5402 signal generator, PXIe-5114 oscilloscope, BNC-BNC connecting wires as supporting hardware, and LabVIEW, PXI-FGEN driver, PXI-SCOPE driver as supporting software; S2: Create a new PXI FGEN Generator and Acquisition.vi and save it. Place input controls on the front panel; S3: Find the FGEN function toolkit in the block diagram and place the initialization VI and termination VI of FGEN; S4: Configure FGEN; S5: Use local variables and property nodes to change the output waveform of FGEN; S6: Press the stop button to stop the waveform output of the FGEN board card, and close the session with the device to release resources; The steps of the main vi function of FGEN are as follows: S1: Initialize the device session and establish a communication connection with the PXI signal generator using a function; S2: Call a function to make the signal generator switch from the "static configuration" state to the "dynamic output" state; S3: Call a function to set the output mode to an arbitrary waveform or an arbitrary sequence; S4: Call a function to configure the signal generator to output a standard waveform, specifically including: waveform type, frequency, and amplitude; S5: Call a function to pass a boolean value to enable the signal generator channel; S6: Call a function to make the signal generation process proceed from parameter configuration to actual output; S7: Add a conditional structure; S8: Place a stop module to release the hardware resources when abnormally terminating or normally closing the signal generator session; S9: Call a function to send a trigger signal or a synchronization instruction to an external device; S10: Call a function to eliminate the FGEN session and all its attributes, and release any memory resources used by FGEN.
3. The design method of the arbitrary combined waveform generating and displaying system based on LabVIEW and PXI according to claim 1, It is characterized in that; The steps of the above step 2 for controlling the PXI modular hardware architecture to implement the configuration of SCOPE in waveform display are as follows: S1: Add an initialization function of SCOPE outside the loop to establish a connection with SCOPE; S2: Configure the parameters of SCOPE in the loop; S3: Configure the triggering method of SCOPE; S4: Add a function to close the device and release the resources; The steps of the main vi function of SCOPE are as follows: S1: Call a function to establish a communication session with the hardware, allocate resources, and initialize the default parameters; S2: Call a function to adjust the vertical range of each or two digitizer channels; S3: Call a function to specify the input impedance and maximum input frequency of the SCOPE channel; S4: Call a function module to set the horizontal timing parameters of the oscilloscope to ensure the accurate acquisition and display of the waveform in the time dimension; S5: Change the triggering method property node; S6: Call a function to set it to auto-trigger; S7: Call a function to run SCOPE to acquire data; S8: Obtain the acquired data and display it through a waveform.
4. The design method of the arbitrary combined waveform generation and display system based on LabVIEW and PXI according to claim 1, It is characterized in that; The above step 2's closed-loop control architecture relies on the FGEN and SCOPE drivers in the LabVIEW graphical system design programming platform to achieve board-level signal synchronization; the clock synchronization between the PXIe-5402 signal generator and the PXIe-5114 oscilloscope is completed through the backplane trigger bus of the PXI modular hardware architecture.
5. The design method of the arbitrary combined waveform generation and display system based on LabVIEW and PXI according to claim 1, characterized in that; The steps of the above step 3 for controlling the PXI modular hardware architecture to generate an arbitrary combined waveform require configuring PXI-FGEN, and the specific steps are as follows: S1: Open LabVIEW and create a new Multi FGEN Generator and Acquisition.vi, and save it to Exercise; S2: Place input controls on the front panel; S3: Unbundle the elements in the cluster of the combined waveform; S4: Initialize FGEN; S5: Use the property node to change the output waveform of FGEN; S6: After unbundling, add 1 to the value of waveform and then connect it to waveform; S7: Stop the FGEN output and close the hardware session; The steps of the FGEN main vi function are as follows: S1: Call a function to create a session to establish a connection between the signal generator and the application; S2: Call a function to control the output of the FGEN board; S3: Call a function to specify the output mode of the FGEN as the standard function generation mode; S4: Call a function to configure the signal generator to output a standard waveform, specifically including: waveform type, frequency, and amplitude; S5: Call a function to pass a boolean value to enable the signal generator channel; S6: Call a function to enable the signal generation process from parameter configuration to actual output; S7: Create a For loop. When connecting the combined waveform array control to the For loop, set the tunnel mode to enabled index and connect the parameters in the combined waveform on the front panel to the corresponding property nodes; S8: After unbundling, increment the value of the waveform by 1 and then connect it to the waveform; S9: Call a function to send a trigger signal or synchronization instruction to an external device; S10: Call a function to eliminate the FGEN session and all its properties, and release any memory resources used by the FGEN.
6. The design method of the arbitrary combined waveform generation and display system based on LabVIEW and PXI according to claim 1, It is characterized in that; The step 4: To control the PXI modular hardware architecture to realize the display of any combined waveform, it is necessary to configure the PXI - SCOPE. The specific steps are as follows: S1: Adopt a parallel loop architecture to ensure that multiple tasks are executed relatively independently without affecting each other; S2: Initialize the SCOPE board; S3: Merge the error clusters of the two tasks executed in parallel; S4: Perform front - panel parameter setting after passing through a simple error handler; The steps of the SCOPE main vi function are as follows: S1: Call a function to establish a communication session with the hardware, allocate resources, and initialize default parameters; S2: Call a function to adjust the vertical range of each or two digitizer channels; S3: Call a function to specify the input impedance and maximum input frequency of the SCOPE channel; S4: Call a function module to set the horizontal timing parameters of the oscilloscope to ensure the accurate acquisition and display of the waveform in the time dimension; S5: Change the trigger mode property node; S6: Call a function to set it to auto - trigger; S7: Call a function to run the SCOPE to collect data; S8: Obtain the collected data and display it through a waveform.
Citation Information
Patent Citations
Oscilloscope of VIIS-EM (virtual instrument integration system for electronic measuring)
CN102879622A
Design method of NQR phase control excitation pulse generator
CN111707694A
Giant magnetoresistance current sensor testing and measuring system and method based on LabView
CN115524654A