Virtual machine operation frequency determination method and device, electronic equipment and storage medium

Abstract

The invention provides a method and device for determining the running frequency of a virtual machine, electronic equipment and a storage medium, and relates to the technical field of computers, in particular to the technical field of virtualization in a cloud scene. The method comprises the steps that a target register is obtained from a transparent transmission list, register data corresponding to the target register are obtained, and the registers in the transparent transmission list can be accessed by a virtual machine; and in the running period of the virtual machine, responding to a received instruction for reading the data of the target register, and transmitting the register data corresponding to the target register to the virtual machine, so that the virtual machine obtains the running frequency of the virtual machine according to the register data. According to the transparent transmission mechanism disclosed by the invention, the virtual machine can perceive the actual operation frequency of the host machine in real time, so that the real-time performance and accuracy of the virtual machine in the aspects of performance monitoring and optimization are remarkably improved.

Description

Technical Field

[0001] The present disclosure relates to the field of computer technologies, specifically to the field of virtualization technologies in cloud scenarios, and particularly to a method, apparatus, electronic device, and storage medium for determining the operating frequency of a virtual machine. Background Art

[0002] In the current virtualization environment based on QEMU (Quick Emulator, virtualization management software) and KVM (Kernel-based Virtual Machine, kernel virtualization module), the operating frequency of a virtual machine is usually a fixed value, which is usually the same as the nominal main frequency of the host CPU (Central Processing Unit). However, modern CPUs support dynamic frequency adjustment technology, which makes the actual operating frequency of the host CPU may vary dynamically due to factors such as load, temperature, or power consumption. In addition, when the host CPU frequency decreases due to abnormal conditions (such as overheating or power management policies), the actual operating frequency of the virtual machine will also fluctuate. However, the operating frequency of the virtual machine in the prior art usually shows a fixed value, and users cannot perceive the change in the actual operating frequency of the virtual machine, which limits the real-time monitoring and optimization of the performance of the virtual machine by users. Summary of the Invention

[0003] The present disclosure provides a method, apparatus, electronic device, and storage medium for determining the operating frequency of a virtual machine.

[0004] According to one aspect of the present disclosure, there is provided a method for determining the operating frequency of a virtual machine, the method including:

[0005] Obtaining a target register from a passthrough list, and obtaining register data corresponding to the target register, where the registers in the passthrough list can be accessed by the virtual machine;

[0006] During the operation of the virtual machine, in response to receiving an instruction to read the target register data, transmitting the register data corresponding to the target register to the virtual machine, so that the virtual machine obtains the operating frequency of the virtual machine according to the register data.

[0007] According to another aspect of the present disclosure, there is provided a device for determining the operating frequency of a virtual machine, the device including:

[0008] An obtaining module, configured to obtain a target register from a passthrough list, and obtain register data corresponding to the target register, where the registers in the passthrough list can be accessed by the virtual machine;

[0009] A pass-through module, which is configured to, during the operation of the virtual machine, in response to receiving an instruction to read the data of a target register, pass through the register data corresponding to the target register to the virtual machine, so that the virtual machine can obtain the operating frequency of the virtual machine according to the register data.

[0010] According to a third aspect of the present disclosure, there is provided an electronic device, including:

[0011] At least one processor; and

[0012] A memory communicatively connected to the at least one processor; wherein,

[0013] The memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the method described in any one of the above technical solutions.

[0014] According to a fourth aspect of the present disclosure, there is provided a non-transitory computer-readable storage medium storing computer instructions, wherein the computer instructions are used to cause the computer to execute the method described in any one of the above technical solutions.

[0015] According to a fifth aspect of the present disclosure, there is provided a computer program product, including a computer program, and the computer program implements the method described in any one of the above technical solutions when executed by a processor.

[0016] The present disclosure provides a method, an apparatus, an electronic device, and a storage medium for determining the operating frequency of a virtual machine. The present disclosure adds a target register to a pass-through list, and during the operation of the virtual machine, passes through the register data of the target register to the virtual machine, so that the virtual machine can calculate and obtain its own operating frequency in real time according to these register data. This pass-through mechanism enables the virtual machine to directly access the value of the target register, thereby enabling it to obtain the actual operating frequency of the host machine in real time, and further solving the problem that the virtual machine can only see a fixed frequency in a traditional virtualization environment, enabling the virtual machine to dynamically perceive the frequency change of the host machine. Secondly, when the present disclosure responds to an instruction to read the data of the target register, it directly reads the pass-through register data, thereby accurately calculating the operating frequency of the virtual machine. This direct access to the hardware register avoids the problem of inaccurate frequency perception caused by the abstraction of the virtualization layer in the traditional method. It can be seen that the pass-through mechanism of the present solution enables the virtual machine to perceive the actual operating frequency of the host machine in real time, thereby significantly improving the real-time performance and accuracy of the virtual machine in performance monitoring and optimization. This not only improves the performance of the virtual machine, but also provides more accurate performance feedback for the application programs in the virtualization environment, which helps to achieve more efficient and flexible resource management and performance optimization.

[0017] It should be understood that the content described in this part is not intended to identify the key or important features of the embodiments of the present disclosure, nor is it used to limit the scope of the present disclosure. Other features of the present disclosure will become readily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The drawings are used to better understand the solution and do not constitute a limitation to the present disclosure. Among them:

[0019] Figure 1 is a schematic diagram of the steps of the method for determining the virtual machine operating frequency in an embodiment of the present disclosure;

[0020] Figure 2 is a schematic diagram of the process corresponding to the passthrough mechanism in an embodiment of the present disclosure;

[0021] Figure 3 is a schematic diagram corresponding to the passthrough mechanism in an embodiment of the present disclosure;

[0022] Figure 4 is a schematic diagram of the process for reading and writing register data in an embodiment of the present disclosure;

[0023] Figure 5 is a schematic diagram of the process corresponding to the compensation mechanism in an embodiment of the present disclosure;

[0024] Figure 6 The principle block diagram of the device for determining the virtual machine operating frequency in an embodiment of the present disclosure;

[0025] Figure 7 is a block diagram of an electronic device for implementing the method for determining the virtual machine operating frequency in an embodiment of the present disclosure. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0026] The following describes exemplary embodiments of the present disclosure with reference to the accompanying drawings. Various details of the embodiments of the present disclosure are included to facilitate understanding, and they should be considered merely exemplary. Therefore, those of ordinary skill in the art should recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the present disclosure. Similarly, descriptions of well-known functions and structures are omitted below for clarity and conciseness.

[0027] In the current virtualization environment, the methods for viewing the virtual machine operating frequency mainly include the following:

[0028] The first method is: view through the interfaces exposed by the virtual machine. Usually, the virtual machine reports CPU (Central Processing Unit) frequency information through operating system interfaces (such as / proc / cpuinfo) or system tools (such as cpupower monitor, turbostat, etc.). These tools rely on accessing the values of APERF (Actual Performance Frequency register) / MPERF (Maximum Performance Frequency register) to determine the actual operating frequency of the CPU. However, in the virtualization scenarios of QEMU (Quick Emulator, virtualization management software) and KVM (Kernel-based Virtual Machine, kernel virtualization module), the virtual machine cannot directly access these registers, resulting in the tools only being able to return the fixed main frequency value of the CPU and unable to reflect the actual dynamic frequency changes of the CPU.

[0029] The second method is: use tools to observe on the virtual machine, that is, by using performance analysis tools (such as perf) or writing custom test programs in the virtual machine, the operating frequency of the CPU can be indirectly calculated. This method usually obtains the number of CPU cycles within a period of time by accessing the Performance Monitoring Unit (PMU) and combines it with the task clock (that is, the time when the CPU actually executes tasks) to calculate the operating frequency of the CPU. Although this method does not rely on the APERF / MPERF registers, there are some disadvantages: it is relatively complex to use and not intuitive enough; the results may not be accurate. Due to the scheduler or other system interferences (such as context switching, interrupt handling, etc.), the calculation results of the performance analysis tools may have deviations and cannot provide accurate frequency information.

[0030] The third method is: view through the host machine. Since the operating frequency of the CPU in the virtual machine usually remains the same as that of the host machine, the CPU frequency of the virtual machine can be indirectly estimated by viewing the CPU frequency of the host machine. However, in a virtualized cloud environment, users usually can only log in to and manage their own virtual machines and do not have access to the host machine. This permission restriction makes it impossible for users to indirectly obtain the CPU frequency information of the virtual machine through the host machine, further exacerbating the difficulty of frequency monitoring in the virtualized environment.

[0031] To solve the above technical problems, the present disclosure provides a method for determining the operating frequency of a virtual machine. See Figure 1 as shown in Figure 1 which is a schematic diagram of the steps of the method for determining the operating frequency of a virtual machine in an embodiment of the present disclosure. This method is applied to KVM and includes:

[0032] Step S101: Obtain the target register from the passthrough list and obtain the register data corresponding to the target register. The registers in the passthrough list can be accessed by the virtual machine.

[0033] Specifically, the "target register" refers to those specific hardware registers related to virtual machine performance monitoring, such as MSR_IA32_APERF and MSR_IA32_MPERF, which record the frequency of the CPU in the actual running state and the frequency in the maximum performance state respectively. The passthrough list is a list maintained by a virtualization kernel module (such as KVM) to record which hardware register values should be directly passed through to the virtual machine instead of being indirectly accessed through the virtualization layer. When the virtual machine is running, obtain the target register from the passthrough list, as well as the register data corresponding to the target register, and directly pass these values to the virtual machine. In this way, the virtual machine can directly access the data of these registers, thereby obtaining the actual running frequency of the CPU in real time for performance monitoring and optimization. This mechanism not only improves the accuracy and real-time performance of performance monitoring but also reduces the overhead of the virtualization layer, enabling the virtual machine to more efficiently utilize the performance monitoring features of the host CPU.

[0034] Step S102: During the operation of the virtual machine, in response to receiving an instruction to read the target register data, pass through the register data corresponding to the target register to the virtual machine so that the virtual machine can obtain the running frequency of the virtual machine based on the register data.

[0035] Specifically, during the operation of the virtual machine, through a mechanism called "passthrough", the virtual machine can directly access specific hardware registers (i.e., "target registers") of the host CPU, thereby obtaining the data in these registers (i.e., "register data"). These target registers, such as MSR_IA32_MPERF and MSR_IA32_APERF, record key performance metrics such as the actual running frequency of the CPU. When the kernel of the virtual machine executes an instruction to read the data of these target registers, KVM (or a similar virtualization kernel module) will directly pass the data of the corresponding register in the host CPU to the virtual machine instead of returning a simulated or preset value. In this way, the virtual machine can accurately calculate its own running frequency based on this real register data, thereby achieving real-time perception of the dynamic frequency changes of the host CPU and improving the accuracy and real-time performance of performance monitoring.

[0036] Taking the target registers including APERF (Actual Performance Frequency) and MPERF (Maximum Performance Frequency) as an example, since APERF and MPERF are used to measure the actual operating frequency of the CPU and the number of operating cycles at the maximum frequency. Specifically, the APERF counter records the number of cycles of the CPU in the actual operating state, which reflects the actual operating frequency of the CPU under the current load and frequency adjustment strategy. The MPERF counter records the number of cycles of the CPU at the maximum frequency (i.e., the nominal main frequency), which represents the number of operating cycles of the CPU in the ideal state. Therefore, the frequency at which the CPU is currently operating can be obtained by calculating through these two counters.

[0037] The specific calculation process is as follows: First, the kernel detects whether the CPU supports the X86_FEATURE_APERFMPERF feature (also known as the target feature). If it supports, it reads the current values of the APERF and MPERF counters at each clock interrupt, and calculates and saves the differences (ΔAPERF and ΔMPERF) from the previous sampling values; when the user executes cat / proc / cpuinfo, the kernel uses the following formula to calculate the operating frequency of the virtual machine based on these differences. The specific formula is:

[0038]

[0039] where ΔAPERF and ΔMPERF are the differences from the previous sampling values, and CPU_KHZ is the nominal frequency of the CPU.

[0040] The present disclosure provides a method, apparatus, electronic device, and storage medium for determining the operating frequency of a virtual machine. By adding a target register to the passthrough list and passthroughing the register data of the target register to the virtual machine during the operation of the virtual machine, the virtual machine can calculate and obtain its own operating frequency in real time based on this register data. This passthrough mechanism enables the virtual machine to directly access the value of the target register, thereby enabling it to obtain the actual operating frequency of the host machine in real time, and further solving the problem that the virtual machine in the traditional virtualization environment can only see a fixed frequency, enabling the virtual machine to dynamically perceive the frequency change of the host machine. Secondly, when responding to the instruction to read the target register data, the present disclosure directly reads the passthrough register data, thereby accurately calculating the operating frequency of the virtual machine. This direct access to the hardware register avoids the problem of inaccurate frequency perception caused by the abstraction of the virtualization layer in the traditional method. It can be seen that the passthrough mechanism of this solution enables the virtual machine to perceive the actual operating frequency of the host machine in real time, thereby significantly improving the real-time performance and accuracy of the virtual machine in performance monitoring and optimization. This not only improves the performance of the virtual machine, but also provides more accurate performance feedback for the applications in the virtualization environment, which helps to achieve more efficient and flexible resource management and performance optimization.

[0041] In some alternative embodiments, before obtaining the target register from the passthrough list, the method further includes;

[0042] If a target feature request instruction is received, the target register information included in the target feature request instruction is added to the passthrough list.

[0043] Specifically, the "target feature request instruction" refers to an instruction sent by virtualization management software (such as QEMU) to the kernel virtualization module (such as KVM) to enable specific hardware features, such as the performance monitoring registers of the CPU (such as APERF and MPERF). These instructions contain "target register information", that is, the identification information of the specific hardware registers that need to be enabled. When KVM receives such a request, it adds this register information to the "passthrough list". The passthrough list is a list maintained by KVM to record which hardware register values should be directly passthrough to the virtual machine, enabling the virtual machine to directly access the values of these registers without indirect access through the virtualization layer.

[0044] The implementation process of this solution includes that QEMU sends a request to enable the target feature to KVM through the ioctl (device control) system call. This request contains the identification information of the target registers, such as the register numbers of MSR_IA32_MPERF and MSR_IA32_APERF. After receiving the request, KVM parses the target register information in the request and adds the identifications of these registers to the passthrough list. Once the register information is added to the passthrough list, KVM ensures that the virtual machine can directly access the values of these registers. When the virtual machine executes an instruction to read these registers, KVM directly reads the values of the registers from the hardware and returns them to the virtual machine, instead of returning a fixed value or an emulated value.

[0045] In this way, by adding the target register information to the passthrough list when receiving the instruction to enable the target feature request, the virtual machine can directly access the data of these registers. This mechanism not only improves the virtual machine's perception ability of the host CPU features, but also enhances the accuracy and real-time performance of performance monitoring. Specifically, the virtual machine can calculate its own running frequency in real time based on the data of these registers, so as to more accurately monitor and optimize performance. This way of directly accessing the hardware registers avoids the problem of inaccurate frequency perception caused by the abstraction of the virtualization layer in the traditional method, improves the performance of the virtual machine in performance monitoring and optimization, and provides more accurate performance feedback for the applications in the virtualization environment.

[0046] In some alternative embodiments, before adding the target register information included in the target feature request instruction to the passthrough list, the method further includes:

[0047] If a detection instruction for detecting whether the host supports the target feature is received, obtain the processor feature detection instruction and execute the instruction to obtain the feature information of the host;

[0048] Determine whether the host supports the target feature according to the feature information of the host.

[0049] Specifically, when an instruction for detecting whether a host supports a specific hardware feature (i.e., the "target feature") is received, a series of operations are triggered to determine the actual capabilities of the host. Specifically, first, a "processor feature detection instruction" is obtained and executed. This instruction is usually the CPUID instruction, which is a standard x86 architecture instruction used to query detailed information about the CPU, including the manufacturer, model, supported instruction sets, and feature flags, etc. By executing the CPUID instruction, the feature information of the host can be obtained, and this information is presented in the form of a set of specific flag bits or return values, indicating which hardware features the host supports. Subsequently, these feature information are analyzed to check whether they contain specific flag bits indicating support for the target feature. For example, if the target feature is the APERF / MPERF register, it will be checked whether there are corresponding APERF and MPERF support flags in the flag bits returned by CPUID. If these flag bits exist, it indicates that the host supports the target feature; conversely, if these flag bits do not exist, it indicates that the host does not support the target feature. This process not only ensures that the virtualization environment can accurately identify the hardware capabilities of the host, but also provides an important basis for subsequent feature enabling and virtual machine configuration, enabling the virtual machine to reasonably enable and utilize relevant features according to the actual hardware support of the host, thereby improving the performance and compatibility of the virtual machine.

[0050] In this way, this solution can accurately obtain the feature information of the host by receiving the detection instruction and executing the processor feature detection instruction (such as CPUID), and then determine whether the host supports the target feature (such as the APERF / MPERF register). This mechanism ensures that the virtualization environment can be reasonably configured and optimized according to the actual hardware capabilities of the host. Specifically, it enables the virtual machine to dynamically sense the features of the host CPU and enable relevant features when supported, thereby improving the accuracy and real-time performance of performance monitoring. In addition, this detection mechanism also enhances the flexibility and compatibility of the virtualization environment, allowing the virtual machine to make adaptive adjustments according to different hardware configurations of the host, ensuring optimal performance on various hardware platforms.

[0051] In some optional embodiments, before obtaining the processor feature detection instruction and executing the instruction to obtain the feature information of the host, the method further includes;

[0052] Obtain the processor feature detection instruction and add the target feature to the processor feature detection instruction;

[0053] Execute the processor feature detection instruction to obtain the feature information of the host.

[0054] Specifically, the "processor feature detection instruction" usually refers to the CPUID instruction, which is a standard instruction used to obtain detailed CPU information in x86 architecture processors. By executing the CPUID instruction, information such as the manufacturer, model, supported instruction set, and various hardware features of the CPU can be obtained. The "target feature" refers to specific hardware features or functions, such as the APERF and MPERF registers, which are crucial for the virtual machine to perceive the dynamic frequency changes of the host CPU.

[0055] The implementation process of this solution includes: First, it is necessary to obtain the CPUID instruction and clearly specify the target feature to be queried in this instruction. This means that when executing the CPUID instruction, appropriate input parameters need to be set so that the instruction can return information related to the target feature. For example, to detect the support status of the APERF and MPERF registers, the input parameters of the CPUID instruction need to be set so that it can return the flag bits or function information related to these registers. Next, execute this modified CPUID instruction to obtain the feature information of the host machine. This information will clearly indicate whether the host machine's CPU supports the target feature. If the host machine's CPU supports these features, then in the returned feature information, the corresponding flag bits or function information will be set, indicating that the host machine has these features. Conversely, if these flag bits are not set, it means that the host machine does not support the target feature. In this way, this solution can accurately detect whether the host machine supports specific hardware features, providing an important basis for subsequent virtualization operations.

[0056] In this way, by adding the target feature to the processor feature detection instruction (such as CPUID) and executing this instruction to obtain the feature information of the host machine, it is possible to accurately detect whether the host machine supports specific hardware features. This mechanism ensures that the virtualization environment can be reasonably configured and optimized according to the actual hardware capabilities of the host machine, thereby improving the virtual machine's perception ability of the host CPU features. Specifically, it enables the virtual machine to dynamically perceive the features of the host CPU and enable relevant features when supported, thereby enhancing the accuracy and real-time performance of performance monitoring. In addition, this detection mechanism also enhances the flexibility and compatibility of the virtualization environment, allowing the virtual machine to make adaptive adjustments according to different hardware configurations of the host machine, ensuring optimal performance on various hardware platforms.

[0057] In some alternative embodiments, if a target feature enabling request instruction is received, adding the target register information included in the target feature request instruction to the passthrough list includes:

[0058] If a request instruction to enable the actual performance frequency feature and the maximum performance frequency feature is received, the actual performance frequency register and the maximum performance frequency register are added to the passthrough list.

[0059] Specifically, the "request instruction to enable the actual performance frequency feature and the maximum performance frequency feature" refers to an instruction sent by virtualization management software (such as QEMU) to the kernel virtualization module (such as KVM) to enable specific hardware features that allow virtual machines to directly access the performance monitoring registers of the host CPU. Specifically, these features include the "actual performance frequency feature" (corresponding to the MSR_IA32_APERF register) and the "maximum performance frequency feature" (corresponding to the MSR_IA32_MPERF register). These registers record the frequency of the CPU in the actual running state and the frequency in the maximum performance state respectively, which are crucial for real-time monitoring and optimizing CPU performance.

[0060] When KVM receives such an enable request, it adds the identification information of these two registers to an internal list called the "passthrough list". The passthrough list is a list maintained by KVM to record which hardware register values should be directly passed through to the virtual machine instead of being emulated or accessed indirectly through the virtualization layer. By adding the MSR_IA32_APERF and MSR_IA32_MPERF registers to the passthrough list, KVM ensures that the virtual machine can directly access the values of these registers, thereby obtaining the actual running frequency and the maximum performance frequency of the CPU in real time. This direct access method not only improves the accuracy and real-time performance of performance monitoring but also reduces the overhead of the virtualization layer, enabling the virtual machine to more efficiently utilize the performance monitoring features of the host CPU.

[0061] In this way, by receiving the request instruction to enable the actual performance frequency feature and the maximum performance frequency feature and adding the corresponding registers to the passthrough list, the virtual machine can directly access these registers, thereby obtaining the actual running frequency and the maximum performance frequency of the CPU in real time. This mechanism significantly improves the virtual machine's perception of the host CPU performance, enhances the accuracy and real-time performance of performance monitoring, reduces the overhead of the virtualization layer, improves the performance of the virtual machine, and at the same time provides more accurate performance feedback for applications in the virtualization environment, contributing to more efficient and flexible resource management and performance optimization.

[0062] To understand the passthrough mechanism of the present application as a whole, refer to Figure 2 , Figure 2 which is a schematic flowchart corresponding to the passthrough mechanism in an embodiment of the present disclosure. The flowchart includes:

[0063] Step S201, QEMU sends a detection instruction to KVM to detect whether the host supports the target feature;

[0064] Step S202, KVM determines whether the host supports the target feature;

[0065] Step S203, if supported, QEMU sends an enable target feature request instruction to KVM;

[0066] Step S204, KVM adds the target register information included in the target feature request instruction to the passthrough list, so that during the operation of the virtual machine, the virtual machine can obtain the register data of the target register. Refer to Figure 3 , Figure 3 is a system schematic diagram corresponding to the passthrough mechanism in an embodiment of the present disclosure. The system includes a user space part 301 (userspace) and a hardware part 302 (hardware). The user space part 301 (userspace) refers to the environment where the virtual machine (VM) runs, that is, the space where the operating system and user applications are located; while the hardware part 302 (hardware) refers to the physical hardware of the host, especially the CPU, and the CPU specifically includes the MSR_IA32_APERF and MSR_IA32_MPERF registers. The working principle corresponding to this figure is: when the user executes cat / proc / cpuinfo, if the CPU supports the X86_FEATURE_APERFMPERF feature (i.e., the target feature), the virtual machine can directly obtain the values of MSR_IA32_MPERF and MSR_IA32_APERF. In this way, the virtual machine can accurately calculate its own operating frequency based on these real register data, so as to achieve real-time perception of the dynamic frequency change of the host CPU, improving the accuracy and real-time performance of performance monitoring.

[0067] In some alternative embodiments, the method further includes:

[0068] When the virtual machine migrates out of the first physical processor of the host, a compensation value is calculated according to the actual performance frequency register value and the maximum performance frequency register value corresponding to the first physical processor, the register value on the host side is compensated according to the compensation value, and the compensated register value is updated to the target register.

[0069] Specifically, the "first physical processor" refers to the host CPU core where the vCPU of the virtual machine is currently located, and the "actual performance frequency register value" and "maximum performance frequency register value" respectively refer to the values of the MSR_IA32_APERF and MSR_IA32_MPERF registers. These two registers record the frequency of the CPU in the actual running state and the frequency in the maximum performance state respectively. When the vCPU of the virtual machine migrates out of the first physical processor of the host, in order to ensure that the virtual machine can accurately perceive the frequency change of the host CPU, this solution takes a series of compensation measures. Specifically, KVM will read the values of the MSR_IA32_APERF and MSR_IA32_MPERF registers corresponding to the first physical processor, calculate the frequency change amount since the last update, that is, the compensation value. Then, KVM will adjust the register value on the host side according to this compensation value to reflect the actual change of the frequency during this period. Finally, KVM writes the compensated register value into the target register to ensure that the virtual machine can continue to accurately monitor and optimize performance based on the latest frequency information after migration. This process not only ensures the continuity of the virtual machine's perception of the CPU frequency before and after migration, but also improves the accuracy and stability of performance monitoring in the entire virtualization environment.

[0070] In this way, when the virtual machine migrates from the first physical processor of the host, the compensation value is calculated using the values of the actual performance frequency register (MSR_IA32_APERF) and the maximum performance frequency register (MSR_IA32_MPERF), and the register value on the host side is compensated accordingly, and then the compensated value is updated to the target register. This mechanism ensures that the virtual machine can accurately perceive the actual running frequency of the host CPU before and after migration, thus maintaining the continuity and accuracy of performance monitoring. This compensation mechanism not only solves the problem of inaccurate frequency perception caused by the change of the physical processor during virtual machine migration, but also improves the reliability and stability of performance monitoring in the virtualization environment, enabling the virtual machine to perform performance optimization and resource management more effectively.

[0071] In some optional embodiments, when the virtual machine migrates out of the first physical processor of the host, the compensation value is calculated according to the actual performance frequency register value and the maximum performance frequency register value corresponding to the first physical processor, the register value on the host side is compensated according to the compensation value, and the compensated register value is updated to the target register, including:

[0072] When the virtual machine exits from the first physical processor, obtain the actual performance frequency register value and the maximum performance frequency register value corresponding to the first physical processor, and respectively obtain the first actual performance frequency register value and the first maximum performance frequency register value;

[0073] Calculate a compensation value based on the first actual performance frequency register value and the first maximum performance frequency register value;

[0074] Compensate the first actual performance frequency register value and the first maximum performance frequency register value according to the compensation value to obtain a second actual performance frequency register value and a second maximum performance frequency register value;

[0075] Store the second actual performance frequency register value and the second maximum performance frequency register value into the actual performance frequency register and the maximum performance frequency register respectively.

[0076] Specifically, this solution addresses the performance monitoring problem of virtual machines in a virtualized environment and proposes a processing mechanism when a virtual machine exits from a first physical processor. Specifically, when the vCPU of a virtual machine exits from the first physical processor, obtain the values of the corresponding actual performance frequency register (MSR_IA32_APERF) and the maximum performance frequency register (MSR_IA32_MPERF) of this processor, and denote them as the first actual performance frequency register value and the first maximum performance frequency register value respectively. These two registers record the frequency of the CPU in the actual running state and the frequency in the maximum performance state respectively, which is crucial for real-time monitoring of CPU performance.

[0077] Next, calculate the compensation value based on these two register values. The calculation of the compensation value is to adjust the frequency perception difference caused by virtual machine migration or scheduling, ensuring that the virtual machine can accurately perceive the actual running frequency of the host CPU before and after migration. By applying the compensation value to the first actual performance frequency register value and the first maximum performance frequency register value, the updated second actual performance frequency register value and the second maximum performance frequency register value are obtained.

[0078] Finally, store these two updated register values back into the actual performance frequency register and the maximum performance frequency register respectively. This process not only ensures the continuity and accuracy of the virtual machine's perception of the CPU frequency before and after migration, but also improves the stability and reliability of the performance monitoring in the entire virtualized environment. Through this mechanism, the virtual machine can perform performance optimization and resource management more effectively, thereby enhancing the overall performance of the virtualized environment.

[0079] In this way, by obtaining and calculating the compensation value when the virtual machine exits from the first physical processor and then compensating and updating the register value, it is ensured that the virtual machine can accurately perceive the actual operating frequency of the host CPU before and after migration. This mechanism not only solves the problem of inaccurate frequency perception caused by changes in physical processors during virtual machine migration but also improves the continuity and stability of performance monitoring in the virtualized environment. Through this compensation mechanism, the virtual machine can perform performance optimization and resource management more effectively, thereby enhancing the overall performance of the virtualized environment.

[0080] In some optional embodiments, calculating the compensation value according to the first actual performance frequency register value and the first maximum performance frequency register value includes:

[0081] Obtaining the actually updated performance frequency register value at the previous moment and the actually updated maximum performance frequency register value at the previous moment;

[0082] Calculating the difference between the first actual performance frequency register value and the actually updated performance frequency register value at the previous moment to obtain the actually updated performance frequency register compensation value;

[0083] Calculating the difference between the first maximum performance frequency register value and the actually updated maximum performance frequency register value at the previous moment to obtain the actually updated maximum performance frequency register compensation value.

[0084] Specifically, in order to ensure that the virtual machine can accurately perceive the actual operating frequency of the host CPU before and after migration, this solution introduces a compensation mechanism. Specifically, first, the actually updated performance frequency register value (MSR_IA32_APERF) at the previous moment and the actually updated maximum performance frequency register value (MSR_IA32_MPERF) at the previous moment are obtained. These values respectively record the frequency of the CPU in the actual operating state and the frequency in the maximum performance state, which are important bases for the virtual machine to perform performance monitoring.

[0085] Next, calculate the difference between the first actual performance frequency register value at the current moment and the actually updated performance frequency register value at the previous moment to obtain the actually updated performance frequency register compensation value. Similarly, calculate the difference between the first maximum performance frequency register value at the current moment and the actually updated maximum performance frequency register value at the previous moment to obtain the actually updated maximum performance frequency register compensation value.

[0086] In this way, this solution can accurately calculate the change in CPU frequency between two moments. These compensation values reflect the frequency changes of the CPU in the actual running and maximum performance states, which are crucial for maintaining the continuity and accuracy of performance monitoring when virtual machines are migrated or scheduled. By applying these compensation values, the virtual machine can more accurately perceive the actual running frequency of the host CPU, thereby improving the reliability of performance monitoring, optimizing resource management, and enhancing the overall performance of the virtualization environment.

[0087] In this way, by obtaining the actual performance frequency register value and the maximum performance frequency register value updated at the previous moment, and calculating the difference between the current value and the previous moment value to obtain the compensation value, this solution can accurately quantify the change in CPU frequency. This mechanism enables the virtual machine to use these compensation values to adjust its performance monitoring data during migration or scheduling, so as to ensure that the virtual machine's perception of the CPU frequency remains continuous and accurate when migrating between different physical processors. This not only improves the reliability of performance monitoring, but also optimizes resource management, enhances the overall performance of the virtualization environment, and ensures that the virtual machine can perform effective performance optimization based on the latest frequency information.

[0088] In some alternative embodiments, compensating the first actual performance frequency register value and the first maximum performance frequency register value according to the compensation value to obtain a second actual performance frequency register value and a second maximum performance frequency register value includes:

[0089] Adding the first actual performance frequency register value and the actual performance frequency register compensation value, and taking the sum result as the second actual performance frequency register value;

[0090] Adding the first maximum performance frequency register value and the maximum performance frequency register compensation value, and taking the sum result as the second maximum performance frequency register value.

[0091] Specifically, the "first actual performance frequency register value" and "first maximum performance frequency register value" of this solution refer to the values of the actual performance frequency (MSR_IA32_APERF) and the maximum performance frequency (MSR_IA32_MPERF) registers obtained from the current physical processor before the virtual machine is migrated. These registers respectively record the frequency of the CPU in the actual running state and the frequency in the maximum performance state. The "actual performance frequency register compensation value" and "maximum performance frequency register compensation value" are obtained by calculating the difference between the current value and the value updated at the previous moment, and are used to compensate for the frequency perception difference caused by virtual machine migration or scheduling.

[0092] The implementation process of this solution includes adding the first actual performance frequency register value and the actual performance frequency register compensation value, and using the obtained result as the second actual performance frequency register value. Similarly, adding the first maximum performance frequency register value and the maximum performance frequency register compensation value, and using the obtained result as the second maximum performance frequency register value. Through this addition operation, the frequency information before migration can be combined with the compensation value, so as to obtain a more accurate frequency value, reflecting the actual running state of the virtual machine after migration. This process not only ensures the continuity of the virtual machine's perception of the CPU frequency before and after migration, but also improves the accuracy and stability of performance monitoring, enabling the virtual machine to perform effective performance optimization and resource management based on the latest frequency information.

[0093] In this way, by adding the first actual performance frequency register value and the actual performance frequency register compensation value, and adding the first maximum performance frequency register value and the maximum performance frequency register compensation value, this solution can generate more accurate second actual performance frequency register value and second maximum performance frequency register value. This addition operation ensures that the virtual machine can continuously and accurately perceive the actual running frequency and maximum performance frequency of the host CPU before and after migration. This mechanism significantly improves the virtual machine's ability to perceive changes in the host CPU frequency, enhances the accuracy and stability of performance monitoring, and thus provides more reliable performance feedback for applications in the virtualization environment, helping to achieve more efficient and flexible resource management and performance optimization.

[0094] To facilitate an overall understanding of the compensation mechanism of this application, first refer to Figure 4 , Figure 4 which is a schematic flowchart of reading and writing register data in an embodiment of the present disclosure. Taking the host processor 401 (also referred to as the CPU) as an example, when the vCPU starts running on the host processor 401 (i.e., VM entry), the register value corresponding to the current CPU needs to be read. When the vCPU stops running on the host processor 401 (i.e., VM exit), the updated value is written into the register of the current CPU so that the latest performance data can be reflected during the next access.

[0095] Refer to Figure 5 , Figure 5It is a schematic flowchart corresponding to the compensation mechanism in an embodiment of the present disclosure, that is, this figure shows the process of updating register data when a vCPU exits from a physical processor. Taking a virtual machine (vCPU) exiting from CPU0 (which can also be referred to as the first physical processor 501) and then entering CPU1 (referred to as the second physical processor 502) as an example, that is, the process of updating the register values when the vCPU migrates from CPU0 to CPU1. Among them, the registers corresponding to CPU0 are APERF0 and MPERF0, and the registers corresponding to CPU1 are APERF1 and MPERF1. When the vCPU migrates from CPU0 to CPU1, it will first trigger a VM exit (virtual machine exit event) from CPU0 to exit the execution, and then migrate the vCPU to CPU1, and trigger a VM entry (virtual machine entry event) on CPU1 to enter CPU1 to run. When the vCPU triggers a VM exit from CPU0, KVM reads the values of APERF0 and MPERF0 of the current CPU0, and calculates the increment during this period (which can also be referred to as the compensation value), where the compensation value satisfies the following formula:

[0096] △aperf = APERF0 - v_aperf; where △aperf is the compensation value of the actual performance frequency register, APERF0 is the value of the first actual performance frequency register, and v_aperf is the value of the actual performance frequency register updated at the previous moment;

[0097] △mperf = MPERF0 - v_mperf; where △mperf is the compensation value of the maximum performance frequency register, MPERF0 is the value of the first maximum performance frequency register, and v_mperf is the value of the maximum performance frequency register updated at the previous moment.

[0098] After calculating the compensation value, the compensation is respectively compensated to aperf (the value of the first actual performance frequency register) and mperf (the value of the first maximum performance frequency register), and the compensated aperf and mperf are written back to the APERF0 and MPERF0 registers of CPU0 through the instruction of writing to the model-specific register. At the same time, APERF0 is saved as the value of v_aperf, and MPERF0 is saved as the value of v_mperf, so as to obtain the value of the vCPU for future use.

[0099] When the vCPU triggers a VM entry on CPU1 to enter CPU1 to run, KVM reads the values of APERF1 and MPERF1 of the current CPU1, and assigns them to aperf and mperf. At the same time, the v_aperf and v_mperf on the virtual machine side are written into the MSR register.

[0100] The following introduces the device embodiments of the present application, which can be used to execute the method for determining the virtual machine operating frequency in the above embodiments of the present application. For the details not disclosed in the device embodiments of the present application, please refer to the embodiments of the method for determining the virtual machine operating frequency in the above of the present application.

[0101] The present disclosure also provides a device 600 for determining the virtual machine operating frequency, as Figure 6 shown, including:

[0102] An acquisition module 601, configured to acquire a target register from a passthrough list and acquire register data corresponding to the target register, where the registers in the passthrough list can be accessed by the virtual machine;

[0103] A passthrough module 602, configured to, during the operation of the virtual machine, in response to receiving an instruction to read the target register data, passthrough the register data corresponding to the target register to the virtual machine, so that the virtual machine can obtain the operating frequency of the virtual machine according to the register data.

[0104] In some optional embodiments, before acquiring the target register from the passthrough list, the acquisition module 601 is further configured to, if receiving an instruction to enable a target feature request, add the target register information included in the target feature request instruction to the passthrough list.

[0105] In some optional embodiments, before adding the target register information included in the target feature request instruction to the passthrough list, the acquisition module 601 is further configured to;

[0106] if receiving an instruction to detect whether the host supports the target feature, acquire a processor feature detection instruction and execute the instruction to obtain the feature information of the host;

[0107] Determine whether the host supports the target feature according to the feature information of the host.

[0108] In some optional embodiments, before the acquisition module 601 acquires a processor feature detection instruction and executes the instruction to obtain the feature information of the host, it is further configured to;

[0109] Acquire a processor feature detection instruction and add the target feature to the processor feature detection instruction;

[0110] Execute the processor feature detection instruction to obtain the feature information of the host.

[0111] In some optional embodiments, if the acquisition module 601 receives an instruction to enable a target feature request, adding the target register information included in the target feature request instruction to the passthrough list includes:

[0112] If a request instruction for enabling the actual performance frequency characteristic and the maximum performance frequency characteristic is received, the actual performance frequency register and the maximum performance frequency register are added to the passthrough list.

[0113] In some alternative embodiments, the apparatus further includes a migration module, and the migration module is configured to:

[0114] When a virtual machine migrates out of a first physical processor of a host, a compensation value is calculated according to the value of the actual performance frequency register and the value of the maximum performance frequency register corresponding to the first physical processor, the register value on the host side is compensated according to the compensation value, and the compensated register value is updated to a target register.

[0115] In some alternative embodiments, when a virtual machine migrates out of a first physical processor of a host, the migration module calculates a compensation value according to the value of the actual performance frequency register and the value of the maximum performance frequency register corresponding to the first physical processor, compensates the register value on the host side according to the compensation value, and updates the compensated register value to a target register, including:

[0116] When the virtual machine exits from the first physical processor, the value of the actual performance frequency register and the value of the maximum performance frequency register corresponding to the first physical processor are obtained, and a first actual performance frequency register value and a first maximum performance frequency register value are respectively obtained;

[0117] A compensation value is calculated according to the first actual performance frequency register value and the first maximum performance frequency register value;

[0118] The first actual performance frequency register value and the first maximum performance frequency register value are compensated according to the compensation value, and a second actual performance frequency register value and a second maximum performance frequency register value are obtained;

[0119] The second actual performance frequency register value and the second maximum performance frequency register value are respectively stored in the actual performance frequency register and the maximum performance frequency register.

[0120] In some alternative embodiments, the migration module calculates a compensation value according to the first actual performance frequency register value and the first maximum performance frequency register value, including:

[0121] The value of the actual performance frequency register updated at the previous moment and the value of the maximum performance frequency register updated at the previous moment are obtained;

[0122] The difference between the first actual performance frequency register value and the value of the actual performance frequency register updated at the previous moment is calculated to obtain an actual performance frequency register compensation value;

[0123] Calculate the difference between the first maximum performance frequency register value and the maximum performance frequency register value updated at the previous moment to obtain the maximum performance frequency register compensation value.

[0124] In some alternative embodiments, the migration module compensates the first actual performance frequency register value and the first maximum performance frequency register value according to the compensation value to obtain a second actual performance frequency register value and a second maximum performance frequency register value, including:

[0125] Accumulate the first actual performance frequency register value and the actual performance frequency register compensation value, and use the accumulation result as the second actual performance frequency register value;

[0126] Accumulate the first maximum performance frequency register value and the maximum performance frequency register compensation value, and use the accumulation result as the second maximum performance frequency register value.

[0127] In the technical solution of the present disclosure, the acquisition, storage, and application of the user's personal information involved all comply with the provisions of relevant laws and regulations and do not violate public order and good customs.

[0128] According to the embodiments of the present disclosure, the present disclosure also provides an electronic device, a readable storage medium, and a computer program product.

[0129] Figure 7 FIG. shows a schematic block diagram of an exemplary electronic device 700 that can be used to implement the embodiments of the present disclosure. The electronic device is intended to represent various forms of digital computers, such as, a laptop computer, a desktop computer, a workbench, a personal digital assistant, a server, a blade server, a mainframe computer, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as, a personal digital processor, a cellular phone, a smart phone, a wearable device, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely exemplary and are not intended to limit the implementation of the present disclosure described and / or claimed herein.

[0130] As Figure 7 shown, the electronic device 700 includes a computing unit 701, which can execute various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 702 or the computer program loaded from the storage unit 708 into the random access memory (RAM) 703. In the RAM 703, various programs and data required for the operation of the device 700 can also be stored. The computing unit 701, the ROM 702, and the RAM 703 are connected to each other through a bus 704. The input / output (I / O) interface 705 is also connected to the bus 704.

[0131] Multiple components in device 700 are connected to I / O interface 705, including: an input unit 706, such as a keyboard, a mouse, etc.; an output unit 708, such as various types of displays, speakers, etc.; a storage unit 708, such as a disk, an optical disc, etc.; and a communication unit 709, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 709 allows device 700 to exchange information / data with other devices via a computer network such as the Internet and / or various telecommunication networks.

[0132] The computing unit 701 can be various general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of the computing unit 701 include but are not limited to a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. The computing unit 701 executes the various methods and processes described above, such as the method for determining the virtual machine running frequency. For example, in some embodiments, the method for determining the virtual machine running frequency can be implemented as a computer software program, which is tangibly contained in a machine-readable medium, such as the storage unit 708. In some embodiments, part or all of the computer program can be loaded and / or installed onto device 700 via the ROM 702 and / or the communication unit 709. When the computer program is loaded into the RAM 703 and executed by the computing unit 701, one or more steps of the small program distribution described above can be executed. Alternatively, in other embodiments, the computing unit 701 can be configured to execute the method for determining the virtual machine running frequency by any other suitable means (e.g., by means of firmware).

[0133] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-chip (SOCs), complex programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a dedicated or general-purpose programmable processor, and can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit the data and instructions to the storage system, the at least one input device, and the at least one output device.

[0134] The program code for implementing the methods of the present disclosure can be written in any combination of one or more programming languages. These program codes can be provided to a processor or controller of a general-purpose computer, a special-purpose computer, or a device for determining the operating frequency of other programmable virtual machines, such that when the program codes are executed by the processor or controller, the functions / operations specified in the flowchart and / or block diagram are implemented. The program codes can be executed entirely on the machine, partially on the machine, executed partially on the machine and partially on a remote machine as an independent software package, or executed entirely on a remote machine or server.

[0135] In the context of the present disclosure, a machine-readable medium can be a tangible medium that can contain or store a program for use by or in connection with an instruction execution system, apparatus, or device. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium can include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0136] In order to provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device for displaying information to the user (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor); and a keyboard and a pointing device (e.g., a mouse or a trackball) through which the user can provide input to the computer. Other kinds of devices can also be used to provide interaction with the user; for example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, voice input, or tactile input).

[0137] The systems and techniques described herein can be implemented in a computing system including backend components (e.g., as a data server), or a computing system including middleware components (e.g., an application server), or a computing system including frontend components (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described herein), or a computing system including any combination of such backend components, middleware components, or frontend components. The components of the system can be interconnected to each other by digital data communication in any form or medium (e.g., a communication network). Examples of communication networks include: local area network (LAN), wide area network (WAN), and the Internet.

[0138] A computer system can include a client and a server. The client and the server are generally far from each other and typically interact through a communication network. The client-server relationship is generated by computer programs running on the respective computers and having a client-server relationship with each other. The server can be a cloud server, a server of a distributed system, or a server incorporating a blockchain.

[0139] It should be understood that various forms of the processes shown above can be used, steps can be reordered, added, or deleted. For example, the steps recited in this disclosure can be executed in parallel, sequentially, or in a different order, as long as the desired results of the technical solution of this disclosure can be achieved, and this is not limited herein.

[0140] The above specific embodiments do not constitute a limitation on the protection scope of this disclosure. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this disclosure shall be included within the protection scope of this disclosure.

Claims

1. A method for determining the running frequency of a virtual machine, wherein, The method includes: Obtain a target register from a passthrough list and obtain register data corresponding to the target register, where the registers in the passthrough list can be accessed by a virtual machine; During the operation of the virtual machine, in response to receiving an instruction to read target register data, passthrough the register data corresponding to the target register to the virtual machine, so that the virtual machine can obtain the operating frequency of the virtual machine based on the register data.

2. The method according to claim 1, wherein, Before obtaining the target register from the passthrough list, the method further includes; If a target feature request instruction is received, add the target register information included in the target feature request instruction to the passthrough list.

3. The method according to claim 2, wherein Before adding the target register information included in the target feature request instruction to the passthrough list, the method further includes; If a detection instruction for detecting whether the host supports a target feature is received, obtain a processor feature detection instruction and execute the instruction to obtain the feature information of the host; Determine whether the host supports the target feature according to the feature information of the host.

4. The method according to claim 3, wherein Before obtaining the processor feature detection instruction and executing the instruction to obtain the feature information of the host, the method further includes; Obtain the processor feature detection instruction and add the target feature to the processor feature detection instruction; Execute the processor feature detection instruction to obtain the feature information of the host.

5. The method according to claim 2, wherein, The step of, if a target feature request instruction is received, adding the target register information included in the target feature request instruction to the passthrough list includes: If a request instruction for enabling the actual performance frequency feature and the maximum performance frequency feature is received, add the actual performance frequency register and the maximum performance frequency register to the passthrough list.

6. The method according to any one of claims 1 to 5, wherein The method further includes: When the virtual machine migrates out of the first physical processor of the host, calculate a compensation value according to the actual performance frequency register value and the maximum performance frequency register value corresponding to the first physical processor, compensate the register value on the host side according to the compensation value, and update the compensated register value to the target register.

7. The method according to claim 6, wherein The step of, when the virtual machine migrates out of the first physical processor of the host, calculating a compensation value according to the actual performance frequency register value and the maximum performance frequency register value corresponding to the first physical processor, compensating the register value on the host side according to the compensation value, and updating the compensated register value to the target register includes: When the virtual machine exits from the first physical processor, obtain the actual performance frequency register value and the maximum performance frequency register value corresponding to the first physical processor, and respectively obtain a first actual performance frequency register value and a first maximum performance frequency register value; Calculate the compensation value according to the first actual performance frequency register value and the first maximum performance frequency register value; Compensate the first actual performance frequency register value and the first maximum performance frequency register value according to the compensation value to obtain a second actual performance frequency register value and a second maximum performance frequency register value; Store the second actual performance frequency register value and the second maximum performance frequency register value into the actual performance frequency register and the maximum performance frequency register respectively.

8. The method according to claim 7, wherein The calculating the compensation value according to the first actual performance frequency register value and the first maximum performance frequency register value includes: Obtain the actual performance frequency register value updated at the previous moment, and the maximum performance frequency register value updated at the previous moment; Calculate the difference between the first actual performance frequency register value and the actual performance frequency register value updated at the previous moment to obtain an actual performance frequency register compensation value; Calculate the difference between the first maximum performance frequency register value and the maximum performance frequency register value updated at the previous moment to obtain a maximum performance frequency register compensation value.

9. The method according to claim 8, wherein The compensating the first actual performance frequency register value and the first maximum performance frequency register value according to the compensation value to obtain a second actual performance frequency register value and a second maximum performance frequency register value includes: Accumulate the first actual performance frequency register value and the actual performance frequency register compensation value, and use the accumulation result as the second actual performance frequency register value; Accumulate the first maximum performance frequency register value and the maximum performance frequency register compensation value, and use the accumulation result as the second maximum performance frequency register value.

10. An apparatus for determining the operating frequency of a virtual machine, wherein, The device includes: An obtaining module, configured to obtain a target register from a passthrough list and obtain register data corresponding to the target register, where the registers in the passthrough list can be accessed by a virtual machine; A passthrough module, configured to, during the running of the virtual machine, in response to receiving an instruction to read target register data, passthrough the register data corresponding to the target register to the virtual machine, so that the virtual machine obtains the running frequency of the virtual machine according to the register data.

11. An electronic device, including: At least one processor; And A memory communicatively connected to the at least one processor; wherein, The memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor, so that the at least one processor can execute the method according to any one of claims 1-9.

12. A non-transitory computer-readable storage medium storing computer instructions, wherein, The computer instructions are used to cause the computer to execute the method according to any one of claims 1-9.

13. A computer program product, including a computer program, where the computer program, when executed by a processor, implements the method according to any one of claims 1-9.

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