Voltage regulation circuit, conversion circuit and method of DC-DC converter

Abstract

The invention relates to a voltage regulation circuit, a conversion circuit and a method of a DC-DC converter. The voltage regulation circuit comprises an inverter U1; the inverter U1 is an inverter with Schmidt trigger input and supplies power through a VDD end. The output end of the inverter U1 is electrically connected with a voltage dividing network; the voltage dividing network has a point A; the point A is electrically connected with a first-order delay circuit; the first-order delay circuit is provided with a point B; the input end of the inverter U1 is connected with a voltage regulation instruction; the inverter U1 converts a voltage regulation instruction generated by the system into a digital signal of 0 or VDD; the point B is also electrically connected with a positive input end of an operational amplifier U2, and a negative input end of the operational amplifier U2 is output by a point C; the device is reasonable in design, compact in structure and convenient to use.

Description

Technical Field

[0001] The present invention relates to a voltage regulation circuit, a conversion circuit and a method for a DC-DC converter, which are applied to a power supply that automatically adjusts the output voltage according to an instruction. Background Art

[0002] A DC-DC converter is a chip that controls the conversion of an input voltage to an output voltage, and realizes the functions of boosting or bucking. The converter is divided into two types: fixed output and adjustable output. u Figure 1 In a DC-DC conversion system, the output voltage value Vo is fed back to the voltage feedback pin (FB) of the DC-DC converter after being divided by resistors RF1 and RF2, and is used to detect the change of the output voltage, and then the adjustment is realized. If it is detected through the FB pin that the output voltage is higher than the set value, the PWM (pulse width modulation) duty cycle output by its driving end (DRV) decreases; if the output voltage is higher than the set value, the PWM duty cycle output by DRV increases, so as to ensure stable output. VFB is a fixed voltage value, and the relationship between the output voltage VO and VFB is: ; The output voltage value is set by setting the resistance values of RF1 and RF2.

[0003] In some applications, such as the dual-switch power supply in patent CN2021101690165, it is necessary to automatically adjust the output voltage of the power supply. For example, when the input voltage is normal, the output voltage of the backup power supply is VO1, and when the input voltage drops, the output voltage is VO2. Patent CN2021101690165 adopts a scheme of controlling the parallel resistance value of RF2 by controlling the MOS transistor switch through a digital signal to realize the switching of the output voltage from VO1 to VO2.

[0004] The above circuit for adjusting the voltage output has the advantage of being relatively simple, but its disadvantage is that due to the use of the MOS transistor switch, the conversion time of the parallel resistance value of RF2 and R2 is very short and uncontrollable. In the case of low output power, the problem of rapid change of the VO set value is not significant. However, in the case of medium and high output power, if the VO set value changes rapidly, it will cause a rapid adjustment of the PWM duty cycle of the regulator, and then cause the oscillation and instability of the entire power supply system, resulting in voltage regulation failure. Summary of the Invention

[0005] In order to solve such problems, the present invention provides a voltage regulation circuit, a conversion circuit and a method for a DC-DC converter. In order to solve the above problems, the technical solution adopted by the present invention is: A voltage regulation circuit for a DC-DC converter includes an inverter U1; The inverter U1 is an inverter with a Schmitt trigger input and is powered through the VDD terminal; The output terminal of the inverter U1 is electrically connected to a voltage dividing network; The voltage dividing network has a point A; The point A is electrically connected to a first-order delay circuit; the first-order delay circuit has a point B; The input terminal of the inverter U1 receives a voltage regulation instruction; The inverter U1 converts the voltage regulation instruction generated by the system into a digital signal of 0 or VDD; The point B is also electrically connected to the positive input terminal of the operational amplifier U2, The negative input terminal of the operational amplifier U2 outputs at point C.

[0006] Further, the voltage dividing network includes a resistor R3 and a resistor R4; The output terminal of the inverter U1 is connected to the input terminal of the resistor R3, and the point A is the output terminal A of the resistor R3; The point A is grounded through the resistor R4.

[0007] Further, when the inverter U1 outputs VDD, the voltage at the point A is equal to the feedback terminal voltage VFB of the DC-DC converter, that is: Formula (1); The first-order delay circuit includes a resistor R1 and a capacitor C1; The point A is also electrically connected to the input terminal of the resistor R1, and the point B is the output terminal of the resistor R1; The point B is grounded through the capacitor C1.

[0008] Further, the resistance value of the resistor R1 ≫ the parallel value of the resistor R3 and the resistor R4; The resistance value of the resistor R1 > the parallel value of the resistor R3 and the resistor R4 × 100; The time constant τ of the first-order circuit; the time constant τ = R1 × C1.

[0009] Further, assuming that the initial voltage value of the capacitor C1 is 0, after the electrical signal passes through the first-order delay circuit, when the inverter U1 outputs VDD, the voltage at the point B rises exponentially; Exponential rise; Assuming that the initial voltage value of the capacitor C1 is VFB, when the inverter U1 outputs 0V, the voltage at the point B decreases exponentially, converting the voltage regulation instruction of the digital signal into a smoothly changing first-order delay signal, and the delay time of the first-order delay signal is determined by the time constant τ. Exponential decay,

[0010] Further, the operational amplifier U2 converts the relatively large input impedance at the front end of the op-amp into a relatively small output impedance at the back end of the op-amp; The voltage range of point B is from 0 to VFB, and the lowest voltage is 0V.

[0011] A DC-DC converter includes a DC-DC converter, an output voltage feedback network, a voltage converter, and the above-mentioned voltage regulating circuit; The FB terminal of the DC-DC converter is electrically connected to the output voltage feedback network, and the DRV terminal is electrically connected to the voltage converter; The output terminal of the voltage converter is connected to the output voltage VO terminal of the DC-DC conversion system, and the output voltage feedback network is connected to the output voltage VO terminal of the DC-DC conversion system; The output voltage feedback network includes resistor RF1, resistor RF2, and resistor R2; Point C is electrically connected to resistor R2; Resistor R2 and resistor RF2 are connected in parallel and then connected in series with resistor RF1 to form the output voltage feedback network; The value of resistor R2 ≫ the output impedance of operational amplifier U2; The value of resistor R2 > the output impedance of operational amplifier U2 × 100; The values of resistor RF1 and resistor RF2 satisfy the lowest output voltage Vo1 of the voltage regulating circuit Vo1 = VFB(1 + RF1 / RF2) Formula (2); The value of resistor R2 ensures the highest output voltage Vo2 of the circuit Vo2 = Vo1 + VFB × RF1 / R2 Formula (3). A voltage regulating method for a DC-DC converter, with the help of the above-mentioned voltage regulating circuit; the voltage regulating method includes the following situations: Situation 1, during the process of the output voltage rising from Vo1 to Vo2, first, the voltage regulating instruction makes the output of inverter U1 instantaneously change from VDD to 0, and the values of the resistances of resistor R1 and resistor R2 are taken. Then, the change process of the output voltage VC of point C is: Formula (4); As can be seen from Formula (4), when t = 0, VC = VFB; when t = 3τ, VC ≈ 0; then between 0 moment and 3τ moment, the output voltage VC of point C smoothly decreases according to an exponential curve; Then, during the descending process, the current i flowing through resistor RF2 f2 is Formula (5); The current i2 flowing through resistor R2 is Formula (6); Secondly, according to the node current method, the current i flowing through resistor RF1 f1 is Formula (7); Then the voltage drop V1 across the resistor RF1 is Formula (8); Then the set value of the output voltage Vo2 is Vo2 = VFB + V1 Formula (9);

[0012] ; Again, the output voltage Vo terminal of the DC - DC conversion system smoothly rises from the output voltage Vo1 to Vo2 along the exponential function curve with a time constant of τ; τ = R1 × C1. By adjusting the resistor R1 and the capacitor C1, the transition time from the output voltage Vo1 to Vo2 is set; different transition times from Vo1 to Vo2 are set as needed to achieve a smooth change in the set value of the voltage output.

[0013] Furthermore, in Case 2, during the process of dropping from the output voltage Vo2 to the output voltage Vo1: Formula (10); Adjust the resistor R1 and the capacitor C1, and set different transition times from Vo2 to Vo1 as needed to achieve a smooth change in the set value of the voltage output. The present invention proposes a voltage regulating circuit. This circuit controls the conversion time of the set value of the output voltage by changing the current value of the feedback network through a resistor - capacitor delay circuit and a voltage - following method, avoiding sudden changes in the set value of the output voltage, thereby avoiding situations such as oscillation, instability, and voltage regulation failure during the voltage regulation process of medium - high power. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 is a schematic diagram of the output voltage setting of the DC - DC converter before improvement.

[0015] Figure 2 is a schematic diagram of the output voltage regulating circuit of the present invention. DETAILED DESCRIPTION OF THE INVENTION Regarding Figure 1 the existing problems, the present invention is improved as Figure 2 , in Figure 2 , the dotted - line box in is the output voltage regulating circuit of the present invention, and the functions of each part are introduced as follows: The inverter U1 is an inverter with a Schmitt - trigger input, powered by VDD, and its function is to convert the voltage regulation instruction generated by the system into a digital signal of 0 or VDD.

[0016] ​Resistors R3 and R4 form a voltage-dividing network, and the resistance values are required to make the voltage at point A equal to VFB (the feedback terminal voltage of the DC-DC converter) when the output of inverter U1 is VDD, that is: Formula (1); Resistor R1 and capacitor C1 form a first-order delay circuit. The value of resistor R1 should be guaranteed to be much larger than (such as more than 100 times) the parallel value of resistors R3 and R4, so that the output resistance of the voltage-dividing network composed of inverter U1, resistor R3 and resistor R4 can be ignored when calculating the time constant τ of the first-order circuit.

[0017] Another advantage of a relatively large value of resistor R1 is that a relatively small value of capacitor C1 can be used to obtain the required time constant τ = R1 × C1.

[0018] After passing through the first-order delay circuit, when the output of inverter U1 is VDD (assuming the initial voltage value of capacitor C1 is 0), the voltage VB at point B will increase exponentially according to an exponential rise; When the output of inverter U1 is 0V (assuming the initial voltage value of capacitor C1 is VFB), the voltage VB at point B will decrease exponentially according to an exponential decay. In this way, the voltage regulation instruction of the digital signal is converted into a smoothly changing first-order delay signal, and its delay time is determined by the time constant τ.

[0019] The operational amplifier U2 operates in the voltage follower state, and its main function is to convert the relatively large input impedance at the front end of the op-amp into a relatively small output impedance at the back end of the op-amp. The voltage range at point B is [0, VFB], and the lowest voltage is 0V. If the operational amplifier U2 is powered by a single power supply, a rail-to-rail type op-amp needs to be selected so that the output voltage at point C can follow within the range of [0, VFB]. Such a configuration enables the signal at point C to completely follow the signal at point B, which is also a smoothly changing first-order delay signal.

[0020] In the conversion circuit, it includes a DC-DC converter, an output voltage feedback network and a voltage converter; The FB terminal of the DC-DC converter is electrically connected to the output voltage feedback network, and the DRV terminal is electrically connected to the voltage converter; The output terminal of the voltage converter is connected to the VO terminal, and the output voltage feedback network is connected to the VO terminal; The output voltage feedback network includes resistor RF1, resistor RF2 and resistor R2; Point C is electrically connected to resistor R2; The output voltage feedback network is formed by connecting resistor R2 and resistor RF2 in parallel and then connecting the combination in series with resistor RF1. The value of resistor R2 should be much larger than the output impedance of operational amplifier U2 (e.g., more than 100 times). During calculations, the operational amplifier can be treated as an ideal operational amplifier, and the influence of its output impedance can be ignored. The values of resistor RF1 and resistor RF2 should achieve the lowest output voltage of the voltage regulation circuit Vo1 = VFB(1 + RF1 / RF2) Equation (2); The value of resistor R2 should ensure the highest output voltage of the circuit Vo2 = Vo1 + VFB×RF1 / R2 Equation (3); During the operation process of the present invention, the two processes of the output voltage rising from Vo1 to Vo2 and falling from Vo2 to Vo1 illustrate the steps of voltage regulation.

[0021] During the process of the output voltage rising from Vo1 to Vo2, the voltage regulation instruction causes the output of inverter U1 to instantaneously change from VDD to 0. According to the aforementioned resistor values and circuit analysis, the change process of the output voltage VC at point C is as follows: Equation (4); As can be seen from Equation (4), when t = 0, VC = VFB, and when t = 3τ, VC ≈ 0; VC smoothly decreases according to an exponential curve between 0 and 3τ. During this process, the current flowing through resistor RF2 is Equation (5); The current flowing through resistor R2 is Equation (6); Based on the fact that the input impedance of the voltage feedback terminal (FB terminal of the DC-DC converter) is very high and the current can be ignored, according to the node current method, the current flowing through resistor RF1 is Equation (7); Therefore, the voltage drop across resistor RF1 is Equation (8); The output voltage setting value is Equation (9);

[0022]

[0023] ​It can be seen that Vo smoothly rises from Vo1 to Vo2 along the exponential function curve with a time constant of τ. Since τ = R1×C1, by adjusting R1 and C1, the transition time from Vo1 to Vo2 can be set as needed to achieve a smooth change in the voltage output set value, thereby eliminating the problems of output voltage oscillation, instability, and voltage regulation failure.

[0024] Similarly, the process of Vo2 decreasing to Vo1 can be described by the formula: Formula (10); The change in the output set value also varies along the smooth curve of the exponential function with a time constant of τ. Similarly, by adjusting R1 and C1, the transition time from Vo2 to Vo1 can be set as needed to achieve a smooth change in the voltage output set value, thereby eliminating the problems of output voltage oscillation, instability, and voltage regulation failure. The present invention is fully described for a clearer disclosure, and the prior art will not be listed one by one.

[0025] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements for some of the technical features; it is obvious for those skilled in the art to combine multiple technical solutions of the present invention. And these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention. The technical content not described in detail in the present invention is well-known technology.

Claims

1. A voltage regulating circuit for a DC-DC converter, characterized in that: It includes an inverter U1; The inverter U1 is an inverter with a Schmitt trigger input and is powered through the VDD terminal; The output terminal of the inverter U1 is electrically connected to a voltage dividing network; The voltage dividing network has a point A; The point A is electrically connected to a first-order delay circuit; the first-order delay circuit has a point B; The input terminal of the inverter U1 receives a voltage regulation instruction; The inverter U1 converts the voltage regulation instruction generated by the system into a digital signal of 0 or VDD; The point B is also electrically connected to the positive input terminal of an operational amplifier U2, The negative input terminal of the operational amplifier U2 outputs at point C.

2. The voltage regulation circuit of the DC-DC converter according to claim 1, characterized in that: The voltage dividing network includes a resistor R3 and a resistor R4; The output terminal of the inverter U1 is connected to the input terminal of the resistor R3, and the point A is the output terminal A of the resistor R3; The point A is grounded through the resistor R4.

3. The voltage regulation circuit of the DC-DC converter according to claim 2, wherein: When the inverter U1 outputs VDD, the voltage at the point A is equal to the feedback terminal voltage VFB of the DC-DC converter, that is: Formula (1); The first-order delay circuit includes a resistor R1 and a capacitor C1; The point A is also electrically connected to the input terminal of the resistor R1, and the point B is the output terminal of the resistor R1; The point B is grounded through the capacitor C1.

4. The voltage regulating circuit of the DC-DC converter according to claim 3, wherein: The resistance value of the resistor R1 ≫ the parallel value of the resistor R3 and the resistor R4; The resistance value of the resistor R1 > the parallel value of the resistor R3 and the resistor R4 × 100; The time constant τ of the first-order circuit; the time constant τ = R1 × C1.

5. The voltage regulating circuit of the DC-DC converter according to claim 4, wherein: Assume that the initial voltage of capacitor C1 is 0. After the electrical signal passes through the first-order delay circuit, when the inverter U1 outputs VDD, the voltage at point B rises exponentially according to an exponential increase; Assume that the initial voltage of capacitor C1 is VFB. When the output of inverter U1 is 0V, the voltage at point B decreases exponentially, converting the voltage regulation instruction of the digital signal into a smoothly varying first-order delay signal. The delay time of the first-order delay signal is determined by the time constant τ. The delay time of the first-order delay signal is determined by the time constant τ.

6. The voltage regulation circuit of the DC-DC converter according to claim 5, wherein: The operational amplifier U2 converts the relatively large input impedance at the front end of the op-amp into a relatively small output impedance at the back end of the op-amp; The voltage range of the point B is from 0 to VFB, and the lowest voltage is 0V.

7. A DC-DC converter, characterized in that: It includes a DC-DC converter, an output voltage feedback network, a voltage converter, and the voltage regulation circuit according to any one of claims 1-6; The FB terminal of the DC-DC converter is electrically connected to the output voltage feedback network, and the DRV terminal is electrically connected to the voltage converter; The output terminal of the voltage converter is connected to the output voltage VO terminal of the DC-DC conversion system, and the output voltage feedback network is connected to the output voltage VO terminal of the DC-DC conversion system; The output voltage feedback network includes a resistor RF1, a resistor RF2, and a resistor R2; The point C is electrically connected to the resistor R2; The resistor R2 and the resistor RF2 are connected in parallel and then connected in series with the resistor RF1 to form the output voltage feedback network; The value of the resistor R2 ≫ the output impedance of the operational amplifier U2; The value of the resistor R2 > the output impedance of the operational amplifier U2 × 100; The values of the resistor RF1 and the resistor RF2 satisfy the achievement of the lowest output voltage Vo1 of the voltage regulation circuit Vo1 = VFB(1 + RF1 / RF2) Formula (2); The value of the resistor R2 ensures the highest output voltage Vo2 of the circuit Vo2 = Vo1 + VFB × RF1 / R2 Formula (3).

8. A voltage regulation method for a DC-DC converter, characterized in that: By means of the voltage regulation circuit according to any one of claims 1-6; the voltage regulation method includes the following situations; Situation 1, during the process of the output voltage rising from Vo1 to Vo2, first, the voltage regulation instruction makes the output of the inverter U1 instantaneously change from VDD to 0, and the resistances of the resistor R1 and the resistor R2 are valued, then the change of the output voltage VC at the point C The process is: Formula (4); As can be seen from Formula (4), when t = 0, VC = VFB; when t = 3τ, VC ≈ 0; then between the 0 moment and the 3τ moment, the output voltage VC at the point C smoothly decreases according to an exponential curve; Then, during the descent, the current i flowing through the resistor RF2 f2 is Formula (5); The current i2 flowing through the resistor R2 is Formula (6); Secondly, according to the nodal current method, the current i of RF1 flowing through the resistor f1 is Formula (7); Then the voltage drop V1 across the resistor RF1 is Formula (8); Then the set value of the output voltage Vo2 is Vo2 = VFB + V1 Formula (9); ] ; Again, at the output voltage Vo terminal of the DC-DC conversion system, based on the output voltage Vo1, it smoothly rises to Vo2 along the exponential function curve with a time constant of τ; τ = R1 × C1. By adjusting the resistor R1 and the capacitor C1, the transition time from the output voltage Vo1 to the output voltage Vo2 is set; Different transition times from Vo1 to Vo2 are set as needed to achieve a smooth change in the set value of the voltage output.

9. The voltage regulation method of the DC-DC converter according to claim 8, characterized in that: Case 2, during the process of dropping from the output voltage Vo2 to the output voltage Vo1: Formula (10); Adjust the resistor R1 and the capacitor C1, and set different transition times from Vo2 to Vo1 as needed to achieve a smooth change in the set value of the voltage output.

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