Low-frequency measurement amplification circuit for suppressing direct-current bias voltage and noise

Abstract

The invention provides a low-frequency measurement amplifying circuit for suppressing direct-current bias voltage and noise. The low-frequency measurement amplifying circuit is mainly used for reducing the direct-current bias voltage and suppressing interference of low-frequency and high-frequency noise of the circuit. The scheme of the invention comprises a low-pass filtering module, a charge conversion module, a multi-gear gain adjustment module and an output signal protection module. High-frequency noise of weak charge signals generated by the piezoelectric sensor is filtered out through the low-pass filtering module, then the charge signals are converted into voltage signals through the charge conversion module, the voltage signals are amplified according to different proportions through the multi-gear gain adjusting module, and finally the converted and amplified voltage signals are output through the output signal protection module. Compared with the prior art, the low lower limit cut-off frequency is achieved, meanwhile, the direct current bias voltage and noise generated by the circuit are reduced, a band elimination filter is formed through circuit design, the influence of low-frequency and high-frequency interference signals is restrained, and the quality of output signals is improved.

Description

Technical Field

[0001] The present invention belongs to the technical fields of charge amplifier circuits and piezoelectric measurements, and particularly relates to a low-frequency measurement amplifier circuit for suppressing DC bias voltage and noise. Background Art

[0002] As a secondary instrument in the field of piezoelectric measurements, a charge amplifier can amplify the weak electrical signals of charge-output sensors, transform the high-impedance input into a low-impedance output, and has the characteristics of stable output signals and sensitivity independent of the length of the transmission cable. It is well-suited for the measurement of signals such as shock and vibration, and has been widely used in fields such as structural health monitoring, human physiological signal monitoring, and advanced manufacturing. Currently, the key technology research of charge amplifiers mainly focuses on the research of drift characteristics, noise characteristics, high-frequency characteristics, and low-frequency characteristics. Among them, the contradiction between low-frequency characteristics and drift characteristics and noise characteristics is the key problem restricting the wide application of charge amplifiers in the field of low-frequency measurements.

[0003] During the actual use process, the distortion-free measurement of a large number of low-frequency signals requires the charge amplifier to have a sufficiently low lower cut-off frequency. However, due to the influence of the input offset voltage V os and input bias current I b of the operational amplifier used, a DC bias voltage will be generated, causing the output signal to exceed the specified range and resulting in a clipping phenomenon. And noise interference will cause signal distortion and affect the quality of signal acquisition. Therefore, the DC bias voltage and noise interference of the charge amplifier will not only limit the application of the piezoelectric measurement system in quasi-static or low-frequency long-time measurements, but also affect data processing.

[0004] Researchers often initially reduce the lower cut-off frequency by increasing the resistance value of the feedback resistor, which not only exacerbates the DC bias phenomenon but also increases the resistor thermal noise. Graeme Jerald proposed in *Photodiode amplifiers: op amp solutions* to introduce a T-shaped resistor network into the DC feedback loop of the circuit to replace the large resistor, reducing the resistor thermal noise, but not well solving the problem of the contradiction between DC bias and low-frequency characteristics in the design of charge amplifiers. Blumen et al. proposed an active charge conversion circuit in patent US20070296496A1, which can suppress the DC bias voltage to a certain extent but did not consider the impact of reducing the lower cut-off frequency on noise; patent CN202310616372.6 proposed that by combining a differential structure and an active op-amp feedback structure, while suppressing voltage drift, the common-mode noise of the circuit can be reduced, mainly used to solve the problem of poor acquisition signal quality but did not consider the impact of low-frequency measurement. Wu Xuan proposed in *Design and Experimental Research of High-Performance Charge Amplifiers* that on the basis of the active charge conversion circuit structure, introducing a T-shaped resistor voltage-dividing network can prevent the feedback capacitor from saturating due to low-frequency drift signals, but since the T-shaped resistor of this circuit is connected to the output end, it will also cause an increase in the DC bias voltage. Summary of the Invention

[0005] In order to overcome the deficiencies of the prior art and to reduce the DC bias voltage and suppress the interference of low-frequency and high-frequency noise in the circuit, the present invention provides a low-frequency measurement amplifier circuit for suppressing DC bias voltage and noise.

[0006] The present invention is improved on the basis of the active charge conversion circuit and the T-shaped resistor voltage-dividing network. First, by grounding the resistors in the T-shaped resistor voltage-dividing network, the loop of the DC bias current is blocked, and it can only be fed back to the input end through the active op-amp, reducing the DC bias voltage. Second, a low-pass filter module is introduced at the input end, and the amplitude-frequency characteristic presents a band-stop characteristic, effectively suppressing the interference of low-frequency and high-frequency noise in the circuit. Third, a multi-stage amplification module is designed, and manual or intelligent gear switching is realized by selecting a DIP switch or an analog switch.

[0007] The technical solution adopted by the present invention to solve its technical problems is as follows:

[0008] A low-frequency measurement amplifier circuit for suppressing DC bias voltage and noise, comprising a low-pass filter module, a charge conversion module, a multi-stage gain adjustment module, and a positive and negative power supply module; the input of the low-frequency measurement amplifier circuit for suppressing DC bias voltage and noise is an input charge signal; the output of the low-frequency measurement amplifier circuit for suppressing DC bias voltage and noise is an output voltage signal; the low-pass filter module is used to suppress high-frequency interference signals in the circuit and prevent interference signals from coupling to the subsequent circuit without attenuation; the charge conversion module is used to convert a charge source with a high internal resistance into a voltage source with a low internal resistance; the multi-stage gain adjustment module is used to amplify weak signals and adjust the gain multiple according to the magnitude of the measured signal charge amount; the positive and negative power supply module is used to provide a stable positive and negative voltage source for the operational amplifier;

[0009] The positive and negative power supply module includes a positive power supply terminal +VCC and a negative power supply terminal -VCC;

[0010] The input of the low-pass filter module is the low-pass filter input terminal; the output of the low-pass filter module is the low-pass filter output terminal; the input charge signal Q is connected to the low-pass filter input terminal;

[0011] The input of the charge conversion module is the charge conversion module input terminal; the output of the charge conversion module includes a first charge conversion output terminal and a second charge conversion output terminal; the low-pass filter output terminal is connected to the charge conversion module input terminal;

[0012] The input of the multi-stage gain adjustment module includes a first multi-stage gain adjustment input terminal and a second multi-stage gain adjustment input terminal; the output of the multi-stage gain adjustment module is the multi-stage gain adjustment output terminal; the multi-stage gain adjustment output terminal is connected to the output voltage signal Vo; the first multi-stage gain adjustment input terminal is connected to the first charge conversion output terminal; the second multi-stage gain adjustment input terminal is connected to the second charge conversion output terminal; the multi-stage gain adjustment output terminal is connected to the output voltage signal Vo.

[0013] Furthermore, the low-pass filter module includes a first resistor R1 and a first capacitor C1;

[0014] The low-pass filter input terminal is connected to the input terminal of the first resistor R1; the output terminal of the first resistor R1 is connected to the low-pass filter output terminal; the output terminal of the first resistor R1 is respectively connected to the output terminal of the low-pass filter module and the input terminal of the first capacitor C1; the output terminal of the first capacitor C1 is grounded.

[0015] Furthermore, the charge conversion module includes a first operational amplifier U1, a second operational amplifier U2, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, and a seventh resistor R7;

[0016] The second pin a2 of the first operational amplifier U1 is the inverting input terminal; the third pin a3 of the first operational amplifier U1 is the non-inverting input terminal; the fourth pin a4 of the first operational amplifier U1 is the negative power supply terminal, the sixth pin a6 of the first operational amplifier U1 is the output terminal, and the seventh pin a7 of the first operational amplifier U1 is the positive power supply terminal; the first operational amplifier U1 and the second operational amplifier U2 have the same structure;

[0017] The input end of the charge conversion module is respectively connected to the input end of the second capacitor C2, the input end of the second resistor R2, and the second pin a2 of the first operational amplifier U1;

[0018] The output end of the second capacitor C2 is connected to the first charge conversion output end;

[0019] The output end of the second resistor R2 is respectively connected to the input end of the fourth resistor R4 and the input end of the third resistor R3; the output end of the fourth resistor R4 is grounded; the output end of the third resistor R3 is respectively connected to the input end of the third capacitor C3 and the sixth pin a6 of the second operational amplifier U2; the third pin a3 of the second operational amplifier U2 is respectively connected to the input end of the fourth capacitor C4 and the input end of the fifth resistor R5; the output end of the fifth resistor R5 is connected to the second charge conversion output end; the output end of the fourth capacitor C4 is grounded; the second pin a2 of the second operational amplifier U2 is respectively connected to the output end of the third capacitor C3 and the input end of the sixth resistor R6; the output end of the sixth resistor R6 is grounded; the fourth pin a4 of the second operational amplifier U2 is connected to the negative power supply terminal -VCC; the seventh pin a7 of the second operational amplifier U2 is connected to the positive power supply terminal +VCC; the first pin a1, the fifth pin a5, and the eighth pin a8 of the second operational amplifier U2 are all in a floating state;

[0020] The third pin a3 of the first operational amplifier U1 is connected to the input end of the seventh resistor R7; the output end of the seventh resistor R7 is grounded; the fourth pin a4 of the first operational amplifier U1 is connected to the negative power supply terminal -VCC; the sixth pin a6 of the first operational amplifier U1 is respectively connected to the first charge conversion output end and the second charge conversion output end; the seventh pin a7 of the first operational amplifier U1 is connected to the positive power supply terminal +VCC; the first pin a1, the fifth pin a5, and the eighth pin a8 of the first operational amplifier U1 are all in a floating state.

[0021] Further, the multi - stage gain adjustment module includes a third operational amplifier U3, a switch SW1, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, and a fourteenth resistor R14;

[0022] The switch SW1 is a DIP switch; the switch SW1 includes a DIP switch first pin S1, a DIP switch second pin S2, a DIP switch third pin S3, a DIP switch fourth pin S4, a DIP switch fifth pin S5, a DIP switch sixth pin S6, a DIP switch seventh pin S7, a DIP switch eighth pin S8, a DIP switch ninth pin S9, and a DIP switch tenth pin S10;

[0023] The first multi - stage gain adjustment input terminal is connected to the input terminal of the ninth resistor R9; the output terminal of the ninth resistor R9 is connected to the DIP switch first pin S1; the DIP switch tenth pin S10 is connected to the low - pass filter output terminal;

[0024] The second multi - stage gain adjustment input terminal is connected to the input terminal of the eighth resistor R8; the output terminal of the eighth resistor R8 is respectively connected to the second pin a2 of the third operational amplifier U3, the input terminal of the tenth resistor R10, the input terminal of the eleventh resistor R11, the input terminal of the twelfth resistor R12, and the input terminal of the thirteenth resistor R13;

[0025] The third pin a3 of the third operational amplifier U3 is connected to the input terminal of the fourteenth resistor R14; the output terminal of the fourteenth resistor R14 is grounded; the fourth pin a4 of the third operational amplifier U3 is connected to the negative power supply terminal - VCC; the sixth pin a6 of the third operational amplifier U3 is connected to the multi - stage gain adjustment output terminal; the seventh pin a7 of the third operational amplifier U3 is connected to the positive power supply terminal + VCC; the first pin a1, the fifth pin a5, and the eighth pin a8 of the third operational amplifier U3 are all in a floating state;

[0026] The output terminal of the tenth resistor R10 is connected to the DIP switch second pin S2; the output terminal of the eleventh resistor R11 is connected to the DIP switch third pin S3; the output terminal of the twelfth resistor R12 is connected to the DIP switch fourth pin S4; the output terminal of the thirteenth resistor R13 is connected to the DIP switch fifth pin S5; the DIP switch sixth pin S6, the DIP switch seventh pin S7, the DIP switch eighth pin S8, the DIP switch ninth pin S9, and the DIP switch tenth pin S10 are all connected to the multi - stage gain adjustment output terminal.

[0027] Further, a low-frequency measurement amplifier circuit for suppressing DC bias voltage and noise includes an output signal protection module; the output signal protection module includes a fifteenth resistor R15; the input end of the fifteenth resistor R15 is connected to the multi-stage gain adjustment output end; the output end of the fifteenth resistor R15 is connected to the output voltage signal Vo.

[0028] Further, the fifth resistor R5 and the sixth resistor R6 are the same devices with the same specifications; the third capacitor C3 and the fourth capacitor C4 are the same devices with the same specifications;

[0029] The fourth pin a4 of the first operational amplifier U1 is respectively connected to the negative power supply terminal -VCC and the fifth capacitor C5; the output end of the fifth capacitor C5 is grounded.

[0030] Further, the fourth pin a4 of the second operational amplifier U2 is respectively connected to the input end of the eleventh capacitor C11, the input end of the twelfth capacitor C12, and the negative power supply terminal -VCC; the output ends of the eleventh capacitor C11 and the twelfth capacitor C12 are both grounded; the eleventh capacitor C11 and the twelfth capacitor C12 play a role in filtering the power supply module of the second operational amplifier U2 to remove high-frequency noise;

[0031] The seventh pin a7 of the second operational amplifier U2 is respectively connected to the input end of the ninth capacitor C9, the input end of the tenth capacitor C10, and the negative power supply terminal -VCC; the output ends of the ninth capacitor C9 and the tenth capacitor C10 are both grounded; the ninth capacitor C9 and the tenth capacitor C10 play a role in filtering the power supply module of the second operational amplifier U2 to remove high-frequency noise;

[0032] Further, the fourth pin a4 of the first operational amplifier U1 is respectively connected to the input end of the sixth capacitor C6, the input end of the fifth capacitor C5, and the negative power supply terminal -VCC, and the output ends of the fifth capacitor C5 and the sixth capacitor C6 are grounded; the fifth capacitor C5 and the sixth capacitor C6 play a role in filtering the power supply module of the first operational amplifier U1 to remove high-frequency noise;

[0033] The seventh pin a7 of the first operational amplifier U1 is respectively connected to the input end of the eighth capacitor C8 and the input end of the seventh capacitor C7; the output ends of the eighth capacitor C8 and the seventh capacitor C7 are both grounded; the eighth capacitor C8 and the seventh capacitor C7 play a role in filtering the power supply module of the first operational amplifier U1 to remove high-frequency noise.

[0034] Further, the fourth pin a4 of the third operational amplifier U3 is respectively connected to the negative power supply terminal -VCC, the input terminal of the fourteenth capacitor C14, and the input terminal of the fifteenth capacitor C15; the output terminals of the fourteenth capacitor C14 and the fifteenth capacitor C15 are both grounded; the fourteenth capacitor C14 and the fifteenth capacitor C15 play a role in filtering the power supply module of the third operational amplifier U3 to remove high-frequency noise.

[0035] The seventh pin a7 of the third operational amplifier U3 is respectively connected to the positive power supply terminal +VCC, the input terminal of the sixteenth capacitor C16, and the input terminal of the fifteenth capacitor C15; the output terminal of the sixteenth capacitor C16 and the output terminal of the fifteenth capacitor C15 are grounded; the sixteenth capacitor C16 and the fifteenth capacitor C15 play a role in filtering the power supply module of the third operational amplifier U3 to remove high-frequency noise.

[0036] The sixth capacitor C6, the eighth capacitor C8, the tenth capacitor C10, and the twelfth capacitor C12 of the charge conversion module are the same devices with the same specifications; the fifth capacitor C5, the seventh capacitor C7, the ninth capacitor C9, and the eleventh capacitor C11 are the same devices with the same specifications; and the capacitance value of the sixth capacitor C6 is less than that of the fifth capacitor C5.

[0037] The fourteenth capacitor C14 and the sixteenth capacitor C16 of the multi-stage gain adjustment module are the same devices with the same specifications; the thirteenth capacitor C13 and the fifteenth capacitor C15 are the same devices with the same specifications; and the capacitance value of the fourteenth capacitor C14 is less than that of the thirteenth capacitor C13.

[0038] Further, the models of the first operational amplifier U1, the second operational amplifier U2, and the third operational amplifier U3 are all OPA627; the second capacitor C2 is a plug-in component; the second resistor R2 is a plug-in component.

[0039] The beneficial effects of the present invention are: compared with the prior art, the circuit designed by the present invention can achieve a lower lower cut-off frequency while greatly suppressing the DC bias phenomenon and noise interference in the circuit, form a band-stop filter through circuit design to improve the quality of the output signal, and at the same time, through the adjustment of circuit parameters, realize the conversion of the measured charge signal into an amplified output voltage signal. Description of the Drawings

[0040] Figure 1 It is a structural diagram of a low-frequency measurement amplifier circuit for suppressing DC bias voltage and noise in an embodiment of the present invention;

[0041] Figure 2 It is a structural diagram of a traditional charge conversion circuit;

[0042] Figure 3It is the structural diagram of the traditional active charge conversion circuit;

[0043] Figure 4 It is the comparison diagram of the amplitude-frequency characteristics of the low-frequency measurement amplifier circuit for suppressing DC bias voltage and noise in the embodiment of the present invention, the traditional charge conversion circuit, and the active charge conversion circuit;

[0044] Figure 5 It is the comparison diagram of the DC bias voltage of the low-frequency measurement amplifier circuit for suppressing DC bias voltage and noise in the embodiment of the present invention, the traditional charge conversion circuit, and the active charge conversion circuit;

[0045] Figure 6 It is the comparison diagram of the DC bias of the low-frequency measurement amplifier circuit for suppressing DC bias voltage and noise in the embodiment of the present invention, the traditional charge conversion circuit, and the active charge conversion circuit at different feedback resistor values.

[0046] In the figure, I - low-pass filter module; II - charge conversion module; III - multi-stage gain adjustment module; IV - output signal protection module; Q - input charge signal; Vo - output voltage signal;

[0047] U1 - the first operational amplifier; U2 - the second operational amplifier; U3 - the third operational amplifier; SW1: DIP switch;

[0048] C1 - the first capacitor; C2 - the second capacitor; C3 - the third capacitor; C4 - the fourth capacitor; C5 - the fifth capacitor; C6 - the sixth capacitor; C7 - the seventh capacitor; C8 - the eighth capacitor; C9 - the ninth capacitor; C10 - the tenth capacitor; C11 - the eleventh capacitor; C12 - the twelfth capacitor; C13 - the thirteenth capacitor; C14 - the fourteenth capacitor; C15 - the fifteenth capacitor; C16 - the sixteenth capacitor;

[0049] R1 - the first resistor; R2 - the second resistor; R3 - the third resistor; R4 - the fourth resistor; R5 - the fifth resistor; R6 - the sixth resistor; R7 - the seventh resistor; R8 - the eighth resistor; R9 - the ninth resistor; R10 - the tenth resistor; R11 - the eleventh resistor; R12 - the twelfth resistor; R13 - the thirteenth resistor; R14 - the fourteenth resistor;

[0050] a1 - the first pin of the operational amplifier; a2 - the second pin of the operational amplifier; a3 - the third pin of the operational amplifier; a4 - the fourth pin of the operational amplifier; a5 - the fifth pin of the operational amplifier; a6 - the sixth pin of the operational amplifier; a7 - the seventh pin of the operational amplifier; a8 - the eighth pin of the operational amplifier;

[0051] S1 - The first pin of the DIP switch; S2 - The second pin of the DIP switch; S3 - The third pin of the DIP switch; S4 - The fourth pin of the DIP switch; S5 - The fifth pin of the DIP switch; S6 - The sixth pin of the DIP switch; S7 - The seventh pin of the DIP switch; S8 - The eighth pin of the DIP switch; S9 - The ninth pin of the DIP switch; S10 - The tenth pin of the DIP switch;

[0052] C21 - The twenty - first capacitor; R21 - The twenty - first resistor;

[0053] C31 - The thirty - first capacitor; C32 - The thirty - second capacitor; C33 - The thirty - third capacitor; R31 - The thirty - first resistor; R32 - The thirty - second resistor; R33 - The thirty - third resistor. Detailed implementation

[0054] A low - frequency measurement amplifier circuit for suppressing DC bias voltage and noise, comprising a low - pass filter module, a charge conversion module, a multi - stage gain adjustment module, and a positive and negative power supply module; the input of the low - frequency measurement amplifier circuit for suppressing DC bias voltage and noise is an input charge signal; the output of the low - frequency measurement amplifier circuit for suppressing DC bias voltage and noise is an output voltage signal;

[0055] The low - pass filter module is used to suppress high - frequency interference signals in the circuit and prevent the interference signals from coupling to the subsequent circuit without attenuation;

[0056] The charge conversion module is used to convert a high - internal - resistance charge source into a low - internal - resistance voltage source and is the core module of the charge amplifier;

[0057] The multi - stage gain adjustment module is used to amplify weak signals and adjust the gain multiple according to the magnitude of the measured signal charge quantity;

[0058] The positive and negative power supply module is used to provide a stable positive and negative voltage source for the operational amplifier;

[0059] Among them, the weak charge signal generated by the piezoelectric sensor is filtered by the low - pass filter module to remove high - frequency noise, then the charge signal is converted into a voltage signal by the charge conversion module, and then the voltage signal is amplified in different proportions by the multi - stage gain adjustment module, and finally the converted and amplified voltage signal is output through the output signal protection module;

[0060] The positive and negative power supply module includes a positive power supply terminal +VCC and a negative power supply terminal -VCC;

[0061] The low - pass filter module includes a first resistor R1 and a first capacitor C1; the input of the low - pass filter module is the low - pass filter input terminal; the output of the low - pass filter module is the low - pass filter output terminal; the input charge signal Q is connected to the low - pass filter input terminal;

[0062] The input end of the low-pass filtering module is connected to the input end of the first resistor R1; the output end of the first resistor R1 is connected to the low-pass filtering output end; the output end of the first resistor R1 is respectively connected to the output end of the low-pass filtering module and the input end of the first capacitor C1; the output end of the first capacitor C1 is grounded;

[0063] The charge conversion module includes a first operational amplifier U1, a second operational amplifier U2, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, and a seventh resistor R7; the input end of the charge conversion module is the input end of the charge conversion module; the output end of the charge conversion module includes a first charge conversion output end and a second charge conversion output end; the low-pass filtering output end is connected to the input end of the charge conversion module; the input end of the charge conversion module is connected to the output end of the low-pass filtering module;

[0064] The second pin a2 of the first operational amplifier U1 is the inverting input end; the third pin a3 of the first operational amplifier U1 is the non-inverting input end; the fourth pin a4 of the first operational amplifier U1 is the negative power supply terminal, the sixth pin a6 of the first operational amplifier U1 is the output end, and the seventh pin a7 of the first operational amplifier U1 is the positive power supply terminal; the first operational amplifier U1 and the second operational amplifier U2 have the same structure;

[0065] The input end of the charge conversion module is respectively connected to the input end of the second capacitor C2, the input end of the second resistor R2, and the second pin a2 of the first operational amplifier U1;

[0066] The output end of the second capacitor C2 is connected to the first charge conversion output end;

[0067] The output terminal of the second resistor R2 is respectively connected to the input terminals of the fourth resistor R4 and the third resistor R3; the output terminal of the fourth resistor R4 is grounded; the output terminal of the third resistor R3 is respectively connected to the input terminal of the third capacitor C3 and the sixth pin a6 of the second operational amplifier U2; the third pin a3 of the second operational amplifier U2 is respectively connected to the input terminal of the fourth capacitor C4 and the input terminal of the fifth resistor R5; the output terminal of the fifth resistor R5 is connected to the second charge conversion output terminal; the output terminal of the fourth capacitor C4 is grounded; the second pin a2 of the second operational amplifier U2 is respectively connected to the output terminal of the third capacitor C3 and the input terminal of the sixth resistor R6; the output terminal of the sixth resistor R6 is grounded; the fourth pin a4 of the second operational amplifier U2 is connected to the negative power supply terminal -VCC; the seventh pin a7 of the second operational amplifier U2 is connected to the positive power supply terminal +VCC; the first pin a1, the fifth pin a5, and the eighth pin a8 of the second operational amplifier U2 are all in a floating state;

[0068] The third pin a3 of the first operational amplifier U1 is connected to the input terminal of the seventh resistor R7; the output terminal of the seventh resistor R7 is grounded; the fourth pin a4 of the first operational amplifier U1 is connected to the negative power supply terminal -VCC; the sixth pin a6 of the first operational amplifier U1 is respectively connected to the first charge conversion output terminal and the second charge conversion output terminal; the seventh pin a7 of the first operational amplifier U1 is connected to the positive power supply terminal +VCC; the first pin a1, the fifth pin a5, and the eighth pin a8 of the first operational amplifier U1 are all in a floating state;

[0069] The multi-stage gain adjustment module includes a third operational amplifier U3, a switch SW1, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, and a fourteenth resistor R14;

[0070] The switch SW1 is a DIP switch; the switch SW1 includes a DIP switch first pin S1, a DIP switch second pin S2, a DIP switch third pin S3, a DIP switch fourth pin S4, a DIP switch fifth pin S5, a DIP switch sixth pin S6, a DIP switch seventh pin S7, a DIP switch eighth pin S8, a DIP switch ninth pin S9, and a DIP switch tenth pin S10;

[0071] The input of the multi - stage gain adjustment module includes a first multi - stage gain adjustment input terminal and a second multi - stage gain adjustment input terminal; the output of the multi - stage gain adjustment module is a multi - stage gain adjustment output terminal; the multi - stage gain adjustment output terminal is connected to the output voltage signal Vo; the first multi - stage gain adjustment input terminal is connected to the first charge conversion output terminal; the second multi - stage gain adjustment input terminal is connected to the second charge conversion output terminal; the multi - stage gain adjustment output terminal is connected to the output voltage signal Vo;

[0072] The first multi - stage gain adjustment input terminal is connected to the input terminal of the ninth resistor R9; the output terminal of the ninth resistor R9 is connected to the first pin S1 of the DIP switch; the tenth pin S10 of the DIP switch is connected to the low - pass filter output terminal;

[0073] The second multi - stage gain adjustment input terminal is connected to the input terminal of the eighth resistor R8; the output terminal of the eighth resistor R8 is respectively connected to the second pin a2 of the third operational amplifier U3, the input terminal of the tenth resistor R10, the input terminal of the eleventh resistor R11, the input terminal of the twelfth resistor R12, and the input terminal of the thirteenth resistor R13;

[0074] The third pin a3 of the third operational amplifier U3 is connected to the input terminal of the fourteenth resistor R14; the output terminal of the fourteenth resistor R14 is grounded; the fourth pin a4 of the third operational amplifier U3 is connected to the negative power supply terminal - VCC; the sixth pin a6 of the third operational amplifier U3 is connected to the multi - stage gain adjustment output terminal; the seventh pin a7 of the third operational amplifier U3 is connected to the positive power supply terminal + VCC; the first pin a1, the fifth pin a5, and the eighth pin a8 of the third operational amplifier U3 are all in a floating state;

[0075] The output terminal of the tenth resistor R10 is connected to the second pin S2 of the DIP switch; the output terminal of the eleventh resistor R11 is connected to the third pin S3 of the DIP switch; the output terminal of the twelfth resistor R12 is connected to the fourth pin S4 of the DIP switch; the output terminal of the thirteenth resistor R13 is connected to the fifth pin S5 of the DIP switch; the sixth pin S6, the seventh pin S7, the eighth pin S8, the ninth pin S9, and the tenth pin S10 of the DIP switch are all connected to the multi - stage gain adjustment output terminal;

[0076] The second capacitor C2 is a plug - in component; the second resistor R2 is a plug - in component;

[0077] The fifth resistor R5 and the sixth resistor R6 are the same devices with the same specifications; the third capacitor C3 and the fourth capacitor C4 are the same devices with the same specifications;

[0078] The sixth capacitor C6, eighth capacitor C8, tenth capacitor C10, and twelfth capacitor C12 of the charge conversion module are the same devices with consistent specifications; the fifth capacitor C5, seventh capacitor C7, ninth capacitor C9, and eleventh capacitor C11 are the same devices with consistent specifications; and the capacitance value of the sixth capacitor C6 is less than that of the fifth capacitor C5.

[0079] The fourteenth capacitor C14 and sixteenth capacitor C16 of the multi-stage gain adjustment module are the same devices with consistent specifications; the thirteenth capacitor C13 and fifteenth capacitor C15 are the same devices with consistent specifications; and the capacitance value of the fourteenth capacitor C14 is less than that of the thirteenth capacitor C13;

[0080] In another embodiment, a low-frequency measurement amplifier circuit for suppressing DC bias voltage and noise includes an output signal protection module; the output signal protection module includes a fifteenth resistor R15; the input end of the fifteenth resistor R15 is connected to the output end of the multi-stage gain adjustment; the output end of the fifteenth resistor R15 is connected to the output voltage signal Vo;

[0081] In another embodiment, the fourth pin a4 of the first operational amplifier U1 is respectively connected to the negative power supply terminal -VCC and the fifth capacitor C5; the output end of the fifth capacitor C5 is grounded;

[0082] In another embodiment, the fourth pin a4 of the second operational amplifier U2 is respectively connected to the input end of the eleventh capacitor C11, the input end of the twelfth capacitor C12, and the negative power supply terminal -VCC; the output ends of the eleventh capacitor C11 and the twelfth capacitor C12 are both grounded; the eleventh capacitor C11 and the twelfth capacitor C12 play a role in filtering the power supply module of the second operational amplifier U2 to remove high-frequency noise;

[0083] In another embodiment, the seventh pin a7 of the second operational amplifier U2 is respectively connected to the input end of the ninth capacitor C9, the input end of the tenth capacitor C10, and the negative power supply terminal -VCC; the output ends of the ninth capacitor C9 and the tenth capacitor C10 are both grounded; the ninth capacitor C9 and the tenth capacitor C10 play a role in filtering the power supply module of the second operational amplifier U2 to remove high-frequency noise;

[0084] In another embodiment, the fourth pin a4 of the first operational amplifier U1 is respectively connected to the input end of the sixth capacitor C6, the input end of the fifth capacitor C5, and the negative power supply terminal -VCC, and the output ends of the fifth capacitor C5 and the sixth capacitor C6 are grounded; the fifth capacitor C5 and the sixth capacitor C6 play a role in filtering the power supply module of the first operational amplifier U1 to remove high-frequency noise;

[0085] In another embodiment, the seventh pin a7 of the first operational amplifier U1 is respectively connected to the input ends of the eighth capacitor C8 and the seventh capacitor C7; the output ends of the eighth capacitor C8 and the seventh capacitor C7 are both grounded; the eighth capacitor C8 and the seventh capacitor C7 play a role in filtering the power supply module of the first operational amplifier U1 to remove high-frequency noise;

[0086] In another embodiment, the fourth pin a4 of the third operational amplifier U3 is respectively connected to the negative power supply terminal -VCC, the input end of the fourteenth capacitor C14, and the input end of the fifteenth capacitor C15; the output ends of the fourteenth capacitor C14 and the fifteenth capacitor C15 are both grounded; the fourteenth capacitor C14 and the fifteenth capacitor C15 play a role in filtering the power supply module of the third operational amplifier U3 to remove high-frequency noise;

[0087] In another embodiment, the seventh pin a7 of the third operational amplifier U3 is respectively connected to the positive power supply terminal +VCC, the input end of the sixteenth capacitor C16, and the input end of the fifteenth capacitor C15; the output end of the sixteenth capacitor C16 and the output end of the fifteenth capacitor C15 are grounded; the sixteenth capacitor C16 and the fifteenth capacitor C15 play a role in filtering the power supply module of the third operational amplifier U3 to remove high-frequency noise;

[0088] The models of the first operational amplifier U1, the second operational amplifier U2, and the third operational amplifier U3 are all OPA627.

[0089] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0090] Combined Figure 1 As shown, a low-frequency measurement amplifier circuit for suppressing DC bias voltage and noise includes a low-pass filter module I, a charge conversion module II, a multi-stage gain adjustment module III, and an output signal protection module IV. Among them, the weak charge signal generated by the piezoelectric sensor passes through the low-pass filter module I and then through the charge conversion module II to convert the charge signal into a voltage signal, and then through the multi-stage gain adjustment module III to amplify the voltage signal in different proportions, and finally through the output signal protection module IV to output the converted and amplified voltage signal.

[0091] The low-pass filter module includes a first resistor R1 and a first capacitor C1, which are mainly used to suppress high-frequency interference signals in the circuit and prevent the interference signals from coupling to the subsequent circuit without attenuation.

[0092] The charge conversion module includes a first operational amplifier U1 and a second operational amplifier U2, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, and a seventh resistor R7, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, an eighth capacitor C8, a ninth capacitor C9, a tenth capacitor C10, an eleventh capacitor C11, and a twelfth capacitor C12. The first operational amplifier U1 and the second capacitor C2 are the key components of this module, which play a role in converting the charge signal into a voltage signal. The charge signal enters from the inverting input terminal of U1, and after being output from the output terminal of U1, it passes through C2 and then returns to the inverting input terminal to form a negative feedback loop. R7 is a compensation resistor. When the second operational amplifier U2 is in an ideal operating state, the DC input resistance of the non-inverting input terminal of U2 is very large, and the charge signal realizes the conversion from the charge signal to the voltage signal by charging the second capacitor C2. The second resistor R2 provides a stable bias voltage for the DC negative feedback, and the active feedback resistor composed of R3 and U2 provides a differential link to prevent the second capacitor C2 from saturating due to low-frequency drift signals. C6, C8, C10, C12 and C7, C9, C11, C13 are decoupling capacitors at the positive and negative power supply terminals of U1 and U2 to reduce power supply interference. Among them, C6, C8, C10, and C12 have the same specifications, C7, C9, C11, and C13 have the same specifications, and the capacitance value of C6 should be less than that of C7.

[0093] The multi-stage gain adjustment module includes an operational amplifier U3, a switch SW1, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a thirteenth capacitor C13, a fourteenth capacitor C14, a fifteenth capacitor C15, and a sixteenth capacitor C16. The input signal passes through the inverting input terminal of U3. According to the opening and closing of the switch SW1, a negative feedback loop is formed through R9, R10, R11, R12, or R13, and the output signal voltage depends on the magnitudes of R8, R9, R10, R11, R12, R13, and R14. R14 is a compensation resistor. When S1-S10 of the switch SW1 is in the closed state, the feedback C2 in the charge conversion module discharges to prevent the capacitor from saturating. R9 is a protection resistor, and the output signal is 0 at this time. When S2-S9 of the switch SW1 is in the closed state, the amplification factor of the output voltage is R10 / R8. The closing states of the other 3 gears of switches are the same as that of S2-S9, only the amplification factors of the output voltages are different.

[0094] The output signal protection module includes a fifteenth resistor R15. R15 is connected in series after the multi-stage gain adjustment module to prevent the components in the circuit that suppress the DC bias voltage and noise of the charge amplifier from being burned out due to too high external input current or short circuit of the output line.

[0095] CombinedFigure 2 As shown, the traditional charge conversion circuit structure includes an operational amplifier, the twenty-first capacitor C21, and the twenty-first resistor R21. In the integrated operational amplifier of the charge amplifier, capacitive negative feedback is adopted, which is equivalent to an open loop for the DC operating point and is sensitive to cable noise, so the zero drift is very large. In order to make the charge amplifier work stably and reduce the zero drift, the twenty-first resistor R21 is connected in parallel at both ends of the twenty-first capacitor C21 to form a DC negative feedback to stabilize the DC operating point of the charge amplifier. For the traditional charge conversion circuit to obtain a lower lower cut-off frequency, usually the way of increasing the twenty-first resistor R21 is adopted, but it will lead to the aggravation of the DC bias phenomenon and the increase of circuit noise.

[0096] Combined with Figure 3 As shown, the traditional active charge conversion circuit structure includes two operational amplifiers, the thirty-first capacitor C31, the thirty-first resistor R31, the thirty-second capacitor C32, the thirty-third capacitor C33, the thirty-second resistor R32, and the thirty-third resistor R33. This circuit adds an active operational amplifier negative feedback loop compared with the traditional charge conversion circuit. When the resistance value of the feedback thirty-first resistor R31 increases, it can compensate for the DC bias in the circuit and play a role in stabilizing the DC bias voltage. Among them, the specifications of C32 and C33 are the same, and the specifications of R32 and R33 are the same.

[0097] Combined with Figures 4-6 As shown, the comparison of the low-frequency measurement amplifier circuit for suppressing DC bias voltage and noise with the traditional charge conversion circuit and the active charge conversion circuit in terms of amplitude-frequency characteristics, DC bias, and voltage drift under different feedback resistor resistance values. At this time, C2 = Cf = 1 nF, R2 = Rf = 5 GΩ, C1 = 10 nF, and R1 = 1 k. By comparing the amplitude-frequency characteristics, it can be seen that when Vo / Vi = 0.707, the lower cut-off frequency of the traditional charge conversion circuit is about 31 mHz, the lower cut-off frequency of the active charge conversion circuit is about 25 mHz, and the lower cut-off frequency of the low-frequency measurement amplifier circuit for suppressing DC bias voltage and noise can reach 10 mHz, and it has a faster attenuation rate compared with the traditional charge conversion circuit. By comparing the DC bias voltage, the voltage drift of the traditional charge conversion circuit is about 63 mV, the active charge conversion circuit is about -226 mV, and the voltage drift of the low-frequency measurement amplifier circuit for suppressing DC bias voltage and noise is almost 0. By comparing the DC bias under different feedback resistor resistance values, in the case where Rf of the traditional charge conversion circuit is less than 10 GΩ, the DC bias is relatively small, while when Rf is greater than 10 GΩ, the DC bias shows an exponential growth trend, while the low-frequency measurement amplifier circuit for suppressing DC bias voltage and noise and the active charge conversion circuit are less affected by the Rf resistance value. When Rf = 1 T, there is still a small DC bias voltage.

[0098] The following is an example with specific embodiments for illustration.

[0099] For example, in the low-pass filter module, C1 = 10 nF and R1 = 1 kΩ, which can suppress interference signals above 200 kHz. For U1 and U2 in the charge conversion module, JFET operational amplifiers with as small input bias current and input bias voltage as possible can be selected. A resistor with R2 = 5 GΩ and a capacitor with C2 = 1 nF are selected. And to keep the performance as stable as possible, surface mount components are preferably selected during component selection. R3 = R4 = 1 kΩ, R5 = R6 = 20 MΩ, C3 = C4 = 1 μF. Decoupling capacitors C6 = C8 = C10 = C12 = 0.1 μF, C7 = C9 = C11 = C13 = 10 μF, and compensation resistor R7 = 10 kΩ. In the multi-stage gain adjustment module, the resistance value of R9 is 100 Ω, which mainly functions as current limiting for the circuit. For example, if R8 = 1 kΩ, R9 = 100 Ω, R10 = 1 kΩ, R11 = 10 kΩ, and R12 = 100 kΩ can be set, so that the voltage is amplified by 0.1, 1, 10, and 100 times respectively. In the output signal protection module, R15 = 1 kΩ to prevent excessive external input current.

Claims

1. A low-frequency measurement amplifier circuit for suppressing DC bias voltage and noise, characterized in that: It includes a low-pass filter module, a charge conversion module, a multi-stage gain adjustment module, and a positive and negative power supply module; the input of the low-frequency measurement amplifier circuit for suppressing DC bias voltage and noise is an input charge signal; the output of the low-frequency measurement amplifier circuit for suppressing DC bias voltage and noise is an output voltage signal; the low-pass filter module is used to suppress high-frequency interference signals in the circuit to prevent the interference signals from coupling to the subsequent circuit without attenuation; the charge conversion module is used to convert a charge source with a high internal resistance into a voltage source with a low internal resistance; the multi-stage gain adjustment module is used to amplify weak signals and adjust the gain multiple according to the magnitude of the measured signal charge amount; the positive and negative power supply module is used to provide a stable positive and negative voltage source for the operational amplifier; The positive and negative power supply module includes a positive power supply terminal (+VCC) and a negative power supply terminal (-VCC); The input of the low-pass filter module is the low-pass filter input terminal; the output of the low-pass filter module is the low-pass filter output terminal; the input charge signal (Q) is connected to the low-pass filter input terminal; The input of the charge conversion module is the charge conversion module input terminal; the output of the charge conversion module includes a first charge conversion output terminal and a second charge conversion output terminal; the low-pass filter output terminal is connected to the charge conversion module input terminal; The input of the multi-stage gain adjustment module includes a first multi-stage gain adjustment input terminal and a second multi-stage gain adjustment input terminal; the output of the multi-stage gain adjustment module is the multi-stage gain adjustment output terminal; the first multi-stage gain adjustment input terminal is connected to the first charge conversion output terminal; the second multi-stage gain adjustment input terminal is connected to the second charge conversion output terminal; the multi-stage gain adjustment output terminal is connected to the output voltage signal (Vo).

2. The low-frequency measurement amplifier circuit for suppressing DC bias voltage and noise according to claim 1, characterized in that: The low-pass filter module includes a first resistor (R1) and a first capacitor (C1); The input terminal of the low-pass filter module is connected to the input terminal of the first resistor (R1); the output terminal of the first resistor (R1) is connected to the low-pass filter output terminal; the output terminal of the first resistor (R1) is respectively connected to the output terminal of the low-pass filter module and the input terminal of the first capacitor (C1); the output terminal of the first capacitor (C1) is grounded.

3. A low-frequency measurement amplifier circuit for suppressing DC bias voltage and noise according to claim 1, characterized in that: The charge conversion module includes a first operational amplifier (U1), a second operational amplifier (U2), a second capacitor (C2), a third capacitor (C3), a fourth capacitor (C4), a fifth capacitor (C5), a second resistor (R2), a third resistor (R3), a fourth resistor (R4), a fifth resistor (R5), a sixth resistor (R6), and a seventh resistor (R7); The second pin (a2) of the first operational amplifier (U1) is the inverting input terminal; the third pin (a3) of the first operational amplifier (U1) is the non-inverting input terminal; the fourth pin (a4) of the first operational amplifier (U1) is the negative power supply terminal, the sixth pin (a6) of the first operational amplifier (U1) is the output terminal, the seventh pin (a7) of the first operational amplifier (U1) is the positive power supply terminal; the structures of the first operational amplifier (U1) and the second operational amplifier (U2) are the same; The input end of the charge conversion module is respectively connected to the input end of the second capacitor (C2), the input end of the second resistor (R2), and the second pin (a2) of the first operational amplifier (U1); The output end of the second capacitor (C2) is connected to the first charge conversion output end; The output end of the second resistor (R2) is respectively connected to the input end of the fourth resistor (R4) and the input end of the third resistor (R3); the output end of the fourth resistor (R4) is grounded; the output end of the third resistor (R3) is respectively connected to the input end of the third capacitor (C3) and the sixth pin (a6) of the second operational amplifier (U2); the third pin (a3) of the second operational amplifier (U2) is respectively connected to the input end of the fourth capacitor (C4) and the input end of the fifth resistor (R5); the output end of the fifth resistor (R5) is connected to the second charge conversion output end; the output end of the fourth capacitor (C4) is grounded; the second pin (a2) of the second operational amplifier (U2) is respectively connected to the output end of the third capacitor (C3) and the input end of the sixth resistor (R6); the output end of the sixth resistor (R6) is grounded; the fourth pin (a4) of the second operational amplifier (U2) is connected to the negative power supply terminal (-VCC); the seventh pin (a7) of the second operational amplifier (U2) is connected to the positive power supply terminal (+VCC); the first pin (a1), the fifth pin (a5), and the eighth pin (a8) of the second operational amplifier (U2) are all in a floating state; The third pin (a3) of the first operational amplifier (U1) is connected to the input end of the seventh resistor (R7); the output end of the seventh resistor (R7) is grounded; the fourth pin (a4) of the first operational amplifier (U1) is connected to the negative power supply terminal (-VCC); the sixth pin (a6) of the first operational amplifier (U1) is respectively connected to the first charge conversion output end and the second charge conversion output end; the seventh pin (a7) of the first operational amplifier (U1) is connected to the positive power supply terminal (+VCC); the first pin (a1), the fifth pin (a5), and the eighth pin (a8) of the first operational amplifier (U1) are all in a floating state.

4. A low-frequency measurement amplifier circuit for suppressing DC bias voltage and noise according to claim 1, characterized in that: The multi-stage gain adjustment module includes a third operational amplifier (U3), a switch SW1, an eighth resistor (R8), a ninth resistor (R9), a tenth resistor (R10), an eleventh resistor (R11), a twelfth resistor (R12), a thirteenth resistor (R13), and a fourteenth resistor (R14); The switch SW1 is a DIP switch; the switch SW1 includes a first DIP switch pin (S1), a second DIP switch pin (S2), a third DIP switch pin (S3), a fourth DIP switch pin (S4), a fifth DIP switch pin (S5), a sixth DIP switch pin (S6), a seventh DIP switch pin (S7), an eighth DIP switch pin (S8), a ninth DIP switch pin (S9), and a tenth DIP switch pin (S10); The first multi - stage gain adjustment input terminal is connected to the input terminal of the ninth resistor (R9); The output terminal of the ninth resistor (R9) is connected to the first DIP switch pin (S1); the tenth DIP switch pin (S10) is connected to the low - pass filter output terminal; The second multi - stage gain adjustment input terminal is connected to the input terminal of the eighth resistor (R8); the output terminal of the eighth resistor (R8) is respectively connected to the second pin (a2) of the third operational amplifier (U3), the input terminal of the tenth resistor (R10), the input terminal of the eleventh resistor (R11), the input terminal of the twelfth resistor (R12), and the input terminal of the thirteenth resistor (R13); The third pin (a3) of the third operational amplifier (U3) is connected to the input terminal of the fourteenth resistor (R14); the output terminal of the fourteenth resistor (R14) is grounded; the fourth pin (a4) of the third operational amplifier (U3) is connected to the negative power supply terminal (-VCC); the sixth pin (a6) of the third operational amplifier (U3) is connected to the multi - stage gain adjustment output terminal; the seventh pin (a7) of the third operational amplifier (U3) is connected to the positive power supply terminal (+VCC); the first pin (a1), the fifth pin (a5), and the eighth pin (a8) of the third operational amplifier (U3) are all in a floating state; The output terminal of the tenth resistor (R10) is connected to the second DIP switch pin (S2); the output terminal of the eleventh resistor (R11) is connected to the third DIP switch pin (S3); the output terminal of the twelfth resistor (R12) is connected to the fourth DIP switch pin (S4); the output terminal of the thirteenth resistor (R13) is connected to the fifth DIP switch pin (S5); the sixth DIP switch pin (S6), the seventh DIP switch pin (S7), the eighth DIP switch pin (S8), the ninth DIP switch pin (S9), and the tenth DIP switch pin (S10) are all connected to the multi - stage gain adjustment output terminal.

5. A low-frequency measurement amplifier circuit for suppressing DC bias voltage and noise according to claim 1, characterized in that: It includes an output signal protection module; the output signal protection module includes a fifteenth resistor (R15); the input terminal of the fifteenth resistor (R15) is connected to the multi - stage gain adjustment output terminal; the output terminal of the fifteenth resistor (R15) is connected to the output voltage signal (Vo).

6. The low-frequency measurement amplifier circuit for suppressing DC bias voltage and noise according to claim 3, characterized in that: The fifth resistor (R5) and the sixth resistor (R6) are the same device with the same specifications; the third capacitor (C3) and the fourth capacitor (C4) are the same device with the same specifications; The fourth pin (a4) of the first operational amplifier (U1) is respectively connected to the negative power supply terminal (-VCC) and the fifth capacitor (C5); the output terminal of the fifth capacitor (C5) is grounded.

7. The low-frequency measurement amplifier circuit for suppressing DC bias voltage and noise according to claim 3, wherein: The fourth pin (a4) of the second operational amplifier (U2) is respectively connected to the input terminal of the eleventh capacitor (C11), the input terminal of the twelfth capacitor (C12), and the negative power supply terminal (-VCC); the output terminals of the eleventh capacitor (C11) and the twelfth capacitor (C12) are both grounded; the eleventh capacitor (C11) and the twelfth capacitor (C12) play a role in filtering the power supply module of the second operational amplifier (U2) to remove high-frequency noise. The seventh pin (a7) of the second operational amplifier (U2) is respectively connected to the input terminal of the ninth capacitor (C9), the input terminal of the tenth capacitor (C10), and the negative power supply terminal (-VCC); the output terminals of the ninth capacitor (C9) and the tenth capacitor (C10) are both grounded; the ninth capacitor (C9) and the tenth capacitor (C10) play a role in filtering the power supply module of the second operational amplifier (U2) to remove high-frequency noise. The fourth pin (a4) of the first operational amplifier (U1) is respectively connected to the input terminal of the sixth capacitor (C6), the input terminal of the fifth capacitor (C5), and the negative power supply terminal (-VCC), and the output terminals of the fifth capacitor (C5) and the sixth capacitor (C6) are grounded; the fifth capacitor (C5) and the sixth capacitor (C6) play a role in filtering the power supply module of the first operational amplifier (U1) to remove high-frequency noise. The seventh pin (a7) of the first operational amplifier (U1) is respectively connected to the input terminal of the eighth capacitor (C8) and the input terminal of the seventh capacitor (C7); the output terminals of the eighth capacitor (C8) and the seventh capacitor (C7) are both grounded; the eighth capacitor (C8) and the seventh capacitor (C7) play a role in filtering the power supply module of the first operational amplifier (U1) to remove high-frequency noise.

8. A low-frequency measurement amplifier circuit for suppressing DC offset voltage and noise according to claim 4, characterized in that: The fourth pin (a4) of the third operational amplifier (U3) is respectively connected to the negative power supply terminal (-VCC), the input terminal of the fourteenth capacitor (C14), and the input terminal of the fifteenth capacitor (C15); the output terminals of the fourteenth capacitor (C14) and the fifteenth capacitor (C15) are both grounded; the fourteenth capacitor (C14) and the fifteenth capacitor (C15) play a role in filtering the power supply module of the third operational amplifier (U3) to remove high-frequency noise. The seventh pin (a7) of the third operational amplifier (U3) is respectively connected to the positive power supply terminal (+VCC), the input terminal of the sixteenth capacitor (C16), and the input terminal of the fifteenth capacitor (C15); the output terminals of the sixteenth capacitor (C16) and the fifteenth capacitor (C15) are grounded; the sixteenth capacitor (C16) and the fifteenth capacitor (C15) play a role in filtering the power supply module of the third operational amplifier (U3) to remove high-frequency noise.

9. A low-frequency measurement amplifier circuit for suppressing DC bias voltage and noise according to claim 3, characterized in that: The sixth capacitor (C6), eighth capacitor (C8), tenth capacitor (C10), and twelfth capacitor (C12) of the charge conversion module are the same devices with consistent specifications; the fifth capacitor (C5), seventh capacitor (C7), ninth capacitor (C9), and eleventh capacitor (C11) are the same devices with consistent specifications; and the capacitance value of the sixth capacitor (C6) is less than that of the fifth capacitor (C5).

10. A low-frequency measurement amplifier circuit for suppressing DC bias voltage and noise according to claim 4, characterized in that: The fourteenth capacitor (C14) and sixteenth capacitor (C16) of the multi-stage gain adjustment module are the same devices with consistent specifications; the thirteenth capacitor (C13) and fifteenth capacitor (C15) are the same devices with consistent specifications; and the capacitance value of the fourteenth capacitor (C14) is less than that of the thirteenth capacitor (C13).

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