False alarm detection method and device, storage medium, communication equipment and chip
By obtaining the LLR and data length after the solution rate matching of the DCI to be detected in the new radio system, determining the rate matching mode, generating hard judgment results and recoding results, the problem of low false alarm detection efficiency in the prior art is solved, the detection speed and system processing efficiency are improved, the hardware power consumption is reduced, and the user experience is improved.
Patent Information
- Application Number
- CN202410544700.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-30
- Publication Date
- 2025-07-25
AI Technical Summary
In New Radio (NR), the existing false alarm detection method requires obtaining all decoded metrics of the DCI to be detected before false alarm detection can be performed, resulting in reduced efficiency and affecting system processing efficiency and user experience.
By obtaining the log likelihood ratio (LLR) and data length after the DCI to be detected, the rate matching pattern is determined, the hard judgment result and recode result are generated, and the logical judgment process is performed to obtain the reconstructed false alarm metric value for false alarm detection.
It realizes false alarm detection immediately after receiving the DCI to be detected, which improves detection efficiency, reduces hardware implementation power consumption, and improves system processing efficiency and user experience.
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Figure CN120378066A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of communication technologies, and in particular, to a false alarm detection method, apparatus, storage medium, communication device, and chip. Background Art
[0002] In existing wireless communication systems, a false alarm refers to a situation where the receiving end misjudges the presence of a signal when no information is transmitted at the transmitting end. The false alarm problem can lead to waste of spectrum resources, communication interference, and unnecessary consumption of resource allocation.
[0003] Currently, existing false alarm detection mainly jointly performs false alarm judgment through the Downlink Control Information (DCI) field checksum and the decoding metric value (convolutional code). Specifically, after passing the DCI field check, the decoding metric value judgment compares the target decoding metric value obtained by sorting the decoding metric values of different aggregation levels of DCI in subframe granularity and the decoding metric values of all DCI to be screened in the current subframe, and then determines whether there is a false alarm signal.
[0004] However, in New Radio (NR), using this false alarm detection method requires obtaining the decoding metric values of all DCI to be detected before false alarm detection can be performed, which will lead to a decrease in the false alarm detection efficiency of DCI, and further affect the processing efficiency of the system and subsequent signal reception, thus affecting the user experience. Summary of the Invention
[0005] In view of this, this application provides a false alarm detection method, apparatus, storage medium, communication device, and chip, mainly aiming to improve the technical problem that currently, false alarm detection can only be performed after obtaining the decoding metric values of all DCI to be detected, which will lead to a decrease in the false alarm detection efficiency of DCI, and further affect the processing efficiency of the system and subsequent signal reception, thus affecting the user experience.
[0006] In a first aspect, this application provides a false alarm detection method, including:
[0007] In response to receiving the DCI to be detected, obtain the first Log Likelihood Ratio (LLR) after rate dematching of the DCI to be detected and the first data length of the first LLR, where the DCI to be detected is the DCI after rate matching through the Physical Downlink Control Channel (PDCCH);
[0008] Based on the first data length, determine the rate matching mode of the DCI to be detected for rate matching through the PDCCH;
[0009] Process the first LLR according to the rate matching pattern to generate a hard decision result and a re-encoding result corresponding to the first LLR;
[0010] Perform a logical decision process on the hard decision result and the re-encoding result to obtain a reconstructed false alarm metric value corresponding to the DCI to be detected, and perform a false alarm detection on the DCI to be detected based on the reconstructed false alarm metric value.
[0011] Optionally, before determining the rate matching pattern for the DCI to be detected to perform rate matching through the PDCCH based on the first data length, the method further includes:
[0012] Obtain the data length of the DCI to be detected, the CRC sequence length corresponding to the DCI to be detected, and the second data length of the LLR before derate matching of the DCI to be detected;
[0013] Perform a combination process on the data length of the DCI to be detected and the CRC sequence length to obtain a third data length corresponding to the DCI to be detected.
[0014] Optionally, the determining the rate matching pattern for the DCI to be detected to perform rate matching through the PDCCH based on the first data length includes:
[0015] Determine the rate matching pattern corresponding to the DCI to be detected based on the first data length, the second data length, and the third data length.
[0016] Optionally, the determining the rate matching pattern corresponding to the DCI to be detected based on the first data length, the second data length, and the third data length includes:
[0017] If it is determined that the first data length is less than or equal to the second data length, determine that the rate matching pattern corresponding to the DCI to be detected is the repetition pattern; or,
[0018] If it is determined that the first data length is greater than the second data length, determine the rate matching pattern corresponding to the DCI to be detected according to the second data length and the third data length.
[0019] Optionally, the if it is determined that the first data length is greater than the second data length, determining the rate matching pattern corresponding to the DCI to be detected according to the second data length and the third data length includes:
[0020] If it is determined that the first data length is greater than the second data length, determine the ratio of the second data length to the third data length;
[0021] When the ratio of the second data length to the third data length is less than or equal to a preset ratio threshold, determine that the rate matching mode corresponding to the DCI to be detected is the puncturing mode; or,
[0022] When the ratio of the second data length to the third data length is greater than the preset ratio threshold, determine that the rate matching mode corresponding to the DCI to be detected is the truncation mode.
[0023] Optionally, the processing the first LLR according to the rate matching mode to generate a hard decision result and a re-encoding result corresponding to the first LLR includes:
[0024] Update the first LLR according to the rate matching mode to obtain a second LLR after the first LLR is updated;
[0025] Perform a hard decision process on the second LLR to generate a hard decision result of the second LLR.
[0026] Optionally, the processing the first LLR according to the rate matching mode to generate a hard decision result and a re-encoding result corresponding to the first LLR further includes:
[0027] Decode the first LLR through a preset decoder, and re-encode the decoded first LLR through a preset encoder to obtain a re-encoding result to be updated corresponding to the first LLR;
[0028] Update the re-encoding result to be updated according to the rate matching mode to generate a re-encoding result corresponding to the first LLR.
[0029] Optionally, the updating the re-encoding result to be updated according to the rate matching mode to generate a re-encoding result corresponding to the first LLR includes:
[0030] If the rate matching mode is the repetition mode, determine the re-encoding result to be updated as the re-encoding result; or,
[0031] If the rate matching mode is the puncturing mode, update the re-encoding result to be updated according to the first data length and the third data length to generate a re-encoding result corresponding to the first LLR; or,
[0032] If the rate matching mode is the truncation mode, update the re-encoding result to be updated according to the third data length to generate a re-encoding result corresponding to the first LLR.
[0033] Optionally, updating the first LLR according to the rate matching pattern to obtain a second LLR after updating the first LLR includes:
[0034] If the rate matching pattern is a repetition pattern, determining the first LLR as the second LLR; or,
[0035] If the rate matching pattern is a puncturing pattern, updating the first LLR according to the first data length and the third data length to obtain a second LLR after updating the first LLR; or,
[0036] If the rate matching pattern is a truncation pattern, updating the first LLR according to the third data length to obtain a second LLR after updating the first LLR.
[0037] Optionally, after performing a logical decision process on the hard decision result and the re-encoding result to obtain a reconstructed false alarm metric value corresponding to the DCI to be detected, and performing a false alarm detection on the DCI to be detected based on the reconstructed false alarm metric value, the method further includes:
[0038] If it is determined that the reconstructed false alarm metric value is greater than or equal to a preset false alarm metric threshold, determining the DCI to be detected as a false alarm DCI.
[0039] In a second aspect, the present application provides a false alarm detection device, including:
[0040] An acquisition module, configured to acquire a first LLR after rate dematching of the DCI to be detected and a first data length of the first LLR in response to receiving the DCI to be detected, where the DCI to be detected is a DCI after rate matching through a PDCCH;
[0041] A determination module, configured to determine a rate matching pattern for rate matching the DCI to be detected through a PDCCH based on the first data length;
[0042] A generation module, configured to process the first LLR according to the rate matching pattern to generate a hard decision result and a re-encoding result corresponding to the first LLR;
[0043] A detection module, configured to perform a logical decision process on the hard decision result and the re-encoding result to obtain a reconstructed false alarm metric value corresponding to the DCI to be detected, and perform a false alarm detection on the DCI to be detected based on the reconstructed false alarm metric value.
[0044] In a third aspect, the present application provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the false alarm detection method described in the first aspect is implemented.
[0045] In a fourth aspect, the present application provides a communication device, which includes: a transceiver; a memory; and a processor, which are respectively connected to the transceiver and the memory, and are configured to control the wireless signal transceiver of the transceiver by executing computer-executable instructions on the memory, and can implement the false alarm detection method described in the first aspect.
[0046] In a fifth aspect, the present application provides a chip, which includes at least one processor and a communication interface; the communication interface is used to receive signals input to the chip or signals output from the chip, and the processor communicates with the communication interface and implements the false alarm detection method described in the first aspect through logic circuits or by executing code instructions.
[0047] By means of the above technical solutions, a false alarm detection method, device, storage medium, communication device and chip provided by the present application. Specifically, first, in response to receiving a DCI to be detected, a first LLR after rate matching of the DCI to be detected and a first data length of the first LLR are obtained, where the DCI to be detected is a DCI after rate matching through a PDCCH; based on the first data length, a rate matching mode for rate matching the DCI to be detected through the PDCCH is determined; the first LLR is processed according to the rate matching mode to generate a hard decision result and a re-encoding result corresponding to the first LLR; a logical decision process is performed on the hard decision result and the re-encoding result to obtain a reconstructed false alarm metric value corresponding to the DCI to be detected, and false alarm detection is performed on the DCI to be detected based on the reconstructed false alarm metric value. Compared with the current related technologies, the present application can perform false alarm detection immediately after receiving the DCI to be detected, use independent DCI blind detection information for false alarm judgment, and does not need to associate other blind detection information, which can greatly improve the detection efficiency; by determining the rate matching mode for rate matching the DCI to be detected through the PDCCH, processing the first LLR according to the rate matching mode to generate a hard decision result and a re-encoding result corresponding to the first LLR, and then performing false alarm detection on the DCI to be detected through the reconstructed false alarm metric value, the distribution range of the decision quantity is limited, which is more friendly to hardware implementation, greatly improves the detection speed of false alarm signals and reduces the hardware implementation power consumption while ensuring the effectiveness of false alarm verification, improves the processing efficiency of the system, and enhances the user experience.
[0048] The above description is only an overview of the technical solution of the present application. In order to be able to understand the technical means of the present application more clearly, it can be implemented according to the content of the specification. And in order to make the above and other purposes, features and advantages of the present application more obvious and understandable, the specific embodiments of the present application are specifically given below. Description of the Drawings
[0049] The drawings here are incorporated into the specification and form a part of this specification, showing embodiments consistent with the present application, and are used together with the specification to explain the principles of the present application.
[0050] In order to more clearly illustrate the technical solutions in the embodiments of the present application or in the related art, the following will briefly introduce the drawings required for use in the description of the embodiments or the related art. Obviously, for those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.
[0051] Figure 1 It shows a schematic flow chart of a false alarm detection method provided by an embodiment of the present application;
[0052] Figure 2 It shows a schematic flow chart of a false alarm detection method provided by an embodiment of the present application;
[0053] Figure 3 It shows a schematic structural diagram of a false alarm detection device provided by an embodiment of the present application;
[0054] Figure 4 It shows a schematic structural diagram of a communication device provided by an embodiment of the present application;
[0055] Figure 5 It shows a schematic structural diagram of a chip provided by an embodiment of the present application. Detailed Embodiments
[0056] The embodiments of the present application will be described in more detail below with reference to the drawings. It should be noted that, without conflict, the embodiments in the present application and the features in the embodiments can be combined with each other.
[0057] In order to improve the technical problem that currently, false alarm detection can only be performed after obtaining the decoding metric values of all the DCIs to be detected, which will lead to a decrease in the false alarm detection efficiency of the DCI, and further affect the processing efficiency of the system and subsequent signal reception, and affect the user experience. This embodiment provides a false alarm detection method, as Figure 1 shown, the method includes:
[0058] Step 101, in response to receiving the DCI to be detected, obtain the first LLR after rate matching of the DCI to be detected and the first data length of the first LLR.
[0059] Among them, the DCI to be detected is the DCI after rate matching through the PDCCH.
[0060] The execution subject of this embodiment can be configured on the terminal device side, such as an electronic device or a chip, etc.
[0061] In some examples, the terminal device can be referred to as a terminal, a user equipment (UE), a mobile station (MS), a mobile terminal (MT), etc. The terminal device can also be an automobile with communication functions, a smart car, a mobile phone, a wearable device, a tablet computer (Pad), a computer with wireless transceiver functions, a virtual reality (VR) device, an augmented reality (AR) device, a wireless terminal device in industrial control, a wireless terminal device in self-driving, a wireless terminal device in remote medical surgery, a wireless terminal device in a smart grid, a wireless terminal device in transportation safety, a wireless terminal device in a smart city, a wireless terminal device in a smart home, and so on. The embodiments of the present application do not limit the specific technologies and specific device forms adopted by the terminal device.
[0062] In the embodiments of the present application, the received DCI to be detected can be the DCI to be detected received from the network device.
[0063] In some examples, the network device can be devices such as a base station, a satellite, etc., which are not specifically limited in the embodiments of the present application. The network device can be an entity on the network side for transmitting or receiving signals. For example, the network device can be a communication satellite, an evolved NodeB (eNB), a transmission reception point (TRP), a next generation NodeB (gNB) in the NR system, a base station in other future mobile communication systems, or an access node in a wireless fidelity (WiFi) system. The embodiments of the present disclosure do not limit the specific technologies and specific device forms adopted by the network device.
[0064] For this embodiment, the DCI to be detected is the DCI after rate matching through the PDCCH. Specifically, in the 5G New Radio (NR) system, the Physical Downlink Control Channel (PDCCH) is a physical channel used to transmit Downlink Control Information (DCI), which mainly includes key control information such as scheduling instructions, HARQ feedback information, and power control commands. Since the PDCCH carries a small amount of information but needs to flexibly allocate resources within each time slot, rate matching is performed in actual applications. The main purpose of rate matching in the PDCCH is to adjust the length of the encoded bit sequence to match the actual available physical resources.
[0065] It should be noted that in a wireless communication system, De-Rate Matching is a process opposite to rate matching. Rate matching is an encoding technique used to adapt to physical layer transmission resources, ensuring that the length of the data bits after encoding and interleaving can exactly fill the subcarriers, symbols, or time slots allocated to it. De-rate matching occurs at the receiving end, and its purpose is to restore the received data to extract the original information bits before encoding.
[0066] Optionally, in the decoding process at the receiving end, the Log-Likelihood Ratio (LLR) is used to measure the likelihood that the received signal bit is 0 or 1. Specifically, for a binary modulation signal, after being transmitted through the channel and affected by noise, the receiving end needs to determine whether the original transmitted bit is 0 or 1 based on the received signal strength. The LLR value is the logarithm of the probability difference that the received signal is 0 or 1. In the embodiments of this application, the first LLR is the LLR corresponding to the DCI to be detected after de-rate matching. Correspondingly, the first data length of the first LLR is the initial data length after de-rate matching of the first LLR.
[0067] Step 102: Based on the first data length, determine the rate matching mode for the DCI to be detected through the PDCCH for rate matching.
[0068] In a communication system, especially in the field of wireless communication (such as LTE, NR, etc.), the rate matching mode (RateMatching) is a technique for adapting the bit stream output by the encoder to the physical layer transmission resources. The purpose of rate matching is to ensure that the bit sequence after channel coding and interleaving can exactly fill the specified resource blocks, such as subcarriers, symbols, or time slots. Different rate matching modes can be adopted according to different actual channel conditions, modulation methods, and physical layer resource allocations.
[0069] Step 103: Process the first LLR according to the rate matching pattern to generate a hard decision result and a re-encoding result corresponding to the first LLR.
[0070] In the embodiment of the present application, hard decision is a simple signal demodulation method. After receiving a signal that has been encoded, modulated, and transmitted, the receiving end needs to convert the analog signal back to the original binary data bit stream.
[0071] For this embodiment, the re-encoding can specifically be Polar Re-Encoding. Specifically, Polar Re-Encoding generally refers to the process of re-encoding a Polar Code.
[0072] Step 104: Perform a logical decision process on the hard decision result and the re-encoding result to obtain a reconstructed false alarm metric value corresponding to the DCI to be detected, and perform a false alarm detection on the DCI to be detected based on the reconstructed false alarm metric value.
[0073] In some examples, the logical decision process can be an exclusive OR logical decision. Correspondingly, the false positive rate measures the frequency of misidentifying a normal situation as an abnormal or incorrect situation.
[0074] Compared with the current related technologies, in this embodiment, false alarm detection can be immediately performed after receiving the DCI to be detected, and false alarm judgment is made using independent DCI blind detection information without associating with other blind detection information, which can greatly improve the detection efficiency; by determining the rate matching pattern for the DCI to be detected to perform rate matching through the PDCCH, processing the first LLR according to the rate matching pattern to generate a hard decision result and a re-encoding result corresponding to the first LLR, and then performing false alarm detection on the DCI to be detected through the reconstructed false alarm metric value, the distribution range of the decision quantity is limited, which is more friendly to hardware implementation, greatly improves the detection speed of false alarm signals and reduces the hardware implementation power consumption while ensuring the effectiveness of false alarm verification, improves the processing efficiency of the system, and enhances the user experience.
[0075] Further, to illustrate the specific implementation process of the method in this embodiment, this embodiment provides a specific method as shown in Figure 2 which includes:
[0076] Step 201: In response to receiving the DCI to be detected, obtain the first LLR after rate dematching of the DCI to be detected and the first data length of the first LLR.
[0077] Wherein, the DCI to be detected is the DCI after rate matching through the PDCCH.
[0078] The false alarm detection process for PDCCH reconfiguration is located after CRC check, and only makes a decision on the DCI that passes the CRC check and the DCI field check, which can further effectively suppress the false alarm probability.
[0079] Exemplarily, if the DCI to be detected is 1, the first LLR after rate dematching is LLR_DRM(i), the first data length of LLR_DRM(i) is N, and false alarm detection is performed.
[0080] Step 202: Obtain the data length of the DCI to be detected, the CRC sequence length corresponding to the DCI to be detected, and the second data length of the LLR before rate dematching of the DCI to be detected.
[0081] In the embodiments of the present application, Cyclic Redundancy Check (CRC) is an error detection technology widely used in data communication and storage systems. The basic principle is that at the sending end, a fixed-length check code related to the original data is generated through a specific algorithm, and this check code is appended to the original data and sent together. After receiving the data, the receiving end recalculates the check code for the received data using the same algorithm and compares it with the received check code. If the two match, it is considered that no error occurred during data transmission; if they do not match, it indicates that an error may have occurred in the data, and corresponding error handling strategies need to be taken. CRC can effectively detect most single-bit errors and certain burst errors, and is relatively simple to implement and has high computational efficiency. It is widely used in various fields such as communication protocols, file systems, and disk drives. Different CRC standards use different polynomials to generate check codes to meet the requirements of error detection capabilities in different application scenarios.
[0082] For this embodiment, the second data length is the data length of the LLR before rate dematching of the DCI to be detected. The second data length may be the same as or different from the first data length. The specific relationship between the first data length and the second data length is not specifically limited in the embodiments of the present application.
[0083] Exemplarily, based on step 201, for the DCI1 to be detected, it can be determined that the data length of the DCI1 to be detected is M, the CRC sequence length corresponding to the DCI to be detected is X, and the second data length of the LLR before rate dematching of the DCI to be detected is E.
[0084] Step 203: Combine and process the data length and CRC sequence length of the DCI to be detected to obtain the third data length corresponding to the DCI to be detected.
[0085] In some examples, the combined processing of the data length of the DCI to be detected and the CRC sequence length can be to add the two data lengths.
[0086] It should be noted that in the 5G NR (New Radio) system, in order to enhance transmission reliability, a CRC sequence is added after the DCI information field for error detection.
[0087] Exemplarily, based on step 202, the third length data K can be obtained by adding the data length M of the DCI1 to be detected and the CRC sequence length X corresponding to the DCI to be detected.
[0088] Step 204: Determine the rate matching mode corresponding to the DCI to be detected based on the first data length, the second data length, and the third data length.
[0089] Optionally, step 204 may specifically include: if it is determined that the first data length is less than or equal to the second data length, determining that the rate matching mode corresponding to the DCI to be detected is the repetition mode; or, if it is determined that the first data length is greater than the second data length, determining the rate matching mode corresponding to the DCI to be detected according to the second data length and the third data length.
[0090] In some examples, the repetition mode is a data coding strategy adopted to adapt to different channel conditions or physical layer transmission requirements. In the repetition mode, some important or information bits that need to enhance reliability are replicated multiple times, and then these replicated bits are placed into the available transmission resources. This can increase the energy of the signal, thereby improving the reception performance in an environment with a low signal-to-noise ratio, especially in the coverage edge area or for high-speed mobile terminals.
[0091] It should be noted that the name of the repetition mode can also be the repetition mode, etc., and the specific name of the repetition mode is not specifically limited in the embodiments of the present application.
[0092] Optionally, step 204 may further include: if it is determined that the first data length is greater than the second data length, determining the ratio of the second data length to the third data length; in the case where the ratio of the second data length to the third data length is less than or equal to a preset ratio threshold, determining that the rate matching mode corresponding to the DCI to be detected is the puncturing mode; or, in the case where the ratio of the second data length to the third data length is greater than the preset ratio threshold, determining that the rate matching mode corresponding to the DCI to be detected is the truncation mode.
[0093] For this embodiment, the puncturing pattern is a rate matching technique used to adapt to different channel conditions or transmission requirements. During the encoding phase, information bits are added with redundancy to form a longer encoded sequence. However, in some cases, it may be necessary to reduce the amount of data transmitted to adapt to the actual transmission resource limitations of the physical layer or to optimize transmission efficiency. Through the puncturing mechanism, some redundant bits can be selectively discarded according to predefined rules without affecting the validity of the entire encoding structure. For example, for an already encoded sequence, if it is determined that the bits at a certain position contribute less to the error correction ability, then these bits can be "punctured" away, thus maintaining a high encoding efficiency while maintaining the error correction performance to a certain extent. The receiver decoder needs to know the same puncturing pattern to correctly decode.
[0094] It should be noted that the name of the puncturing pattern can also be the puncturing mode, etc., and the specific name of the puncturing pattern is not specifically limited in the embodiments of this application.
[0095] As an alternative, the truncation pattern is a technique for adjusting the encoding length. Through the truncation operation, the length of the encoded bit sequence can be reduced to adapt to different transmission rate requirements. Specifically, during the encoding phase, the original information bits are extended into a longer encoded sequence containing redundancy. When it is necessary to reduce the amount of encoded data, the "truncation" technique can be used to remove some redundant bits to shorten the length of the encoding block, but it should be noted that this may have a certain impact on the error correction ability of the encoding. The truncation pattern is a strategy for optimizing the balance between encoding efficiency and transmission rate, which allows flexible adjustment of the encoding length according to actual application requirements.
[0096] It should be noted that the name of the truncation pattern can also be the truncation mode, the shortening mode, etc., and the specific name of the truncation pattern is not specifically limited in the embodiments of this application.
[0097] Exemplarily, based on step 203, if the preset ratio threshold is then in the case of N ≤ E, the rate matching uses the repetition pattern, and in the case of N > E and in the case of, the rate matching uses the puncturing pattern, and in the case of N > E and in the case of, then the rate matching uses the truncation pattern.
[0098] Step 205: Process the first LLR according to the rate matching pattern to generate the hard decision result and the re-encoding result corresponding to the first LLR.
[0099] Optionally, step 205 may include: updating the first LLR according to a rate matching pattern to obtain a second LLR after updating the first LLR; performing a hard decision process on the second LLR to generate a hard decision result of the second LLR.
[0100] In some examples, step 205 further includes: decoding the first LLR through a preset decoder, re-encoding the decoded first LLR through a preset encoder to obtain a re-encoding result to be updated corresponding to the first LLR; updating the re-encoding result to be updated according to a rate matching pattern to generate a re-encoding result corresponding to the first LLR.
[0101] As an alternative, step 205 further includes: if the rate matching pattern is a repetition pattern, determining the re-encoding result to be updated as the re-encoding result; if the rate matching pattern is a puncturing pattern, updating the re-encoding result to be updated according to the first data length and the third data length to generate a re-encoding result corresponding to the first LLR; if the rate matching pattern is a truncation pattern, updating the re-encoding result to be updated according to the third data length to generate a re-encoding result corresponding to the first LLR.
[0102] Exemplarily, based on step 204, if the re-encoding result to be updated is C ′ (i), in the case of N≤E, the rate matching uses the repetition pattern and does not process the re-encoding result to be updated. In the case of N>E and , the rate matching uses the puncturing pattern, and the re-encoding result to be updated is updated through Formula 1 to generate a re-encoding result corresponding to the first LLR. Formula 1 is specifically as follows:
[0103] C ′ (i) = C ′ (N - E + 1:end) (Formula 1)
[0104] It should be noted that in Formula 1, N - E + 1:end represents from the (N - E + 1)-th to the last one in C ′ (i).
[0105] In the case of N>E and , the rate matching uses the truncation pattern, and the re-encoding result to be updated is updated through Formula 2 to generate a re-encoding result corresponding to the first LLR. Formula 2 is specifically as follows:
[0106] C ′ (i) = C ′ (1:E) (Formula 2)
[0107] It should be noted that in Formula 2, 1:E represents from the first to the E-th in C ′the first to the E-th in (i).
[0108] In some examples, step 204 further includes: if the rate matching mode is the repetition mode, determining the first LLR as the second LLR; or, if the rate matching mode is the puncturing mode, updating the first LLR based on the first data length and the third data length to obtain the second LLR after updating the first LLR; or, if the rate matching mode is the truncation mode, updating the first LLR based on the third data length to obtain the second LLR after updating the first LLR.
[0109] Exemplarily, based on step 204, the first LLR after rate dematching is LLR_DRM(i). When N≤E, the repetition mode is used for rate matching and LLR_DRM(i) is not processed. When N>E and in this case, the puncturing mode is used for rate matching, and the first LLR is updated through Formula 3 to obtain the second LLR after updating the first LLR. Formula 3 is specifically as follows:
[0110] LLR_DRM(i) = LLR_DRM(N - E + 1:end) (Formula 3)
[0111] It should be noted that in Formula 3, N - E + 1:end represents from the (N - E + 1)-th to the last one in LLR_DRM(i).
[0112] When N>E and in this case, the truncation mode is used for rate matching, and the first LLR is updated through Formula 4 to obtain the second LLR after updating the first LLR. Formula 4 is specifically as follows:
[0113] LLR_DRM(i) = LLR_DRM(1:E) (Formula 4)
[0114] It should be noted that in Formula 4, 1:E represents from the first to the E-th in LLR_DRM(i).
[0115] The updated LLR_DRM(i) is hard-decided through Formula 5 to obtain the decision result C(i). Formula 5 is specifically as follows:
[0116] C(i) = LLR_DRM(i) ≤ 0? 1:0 (Formula 5)
[0117] It should be noted that in Formula 5, ≤ 0? 1:0 means that if LLR_DRM(i) ≤ 0, the decision is 1, and if LLR_DRM(i) > 0, the decision is 0.
[0118] Step 206: Perform a logical decision process on the hard decision result and the re - encoding result to obtain the reconstructed false - alarm metric value corresponding to the DCI to be detected, and perform false - alarm detection on the DCI to be detected based on the reconstructed false - alarm metric value.
[0119] In the embodiment of the present application, the logical decision process can be an exclusive - OR logical decision, and the specific logic is shown in Table 1 below:
[0120] Table 1
[0121]
[0122]
[0123] Optionally, after step 206, the method of this embodiment further includes: If it is determined that the reconstructed false - alarm metric value is greater than or equal to the preset false - alarm metric threshold, then determine the DCI to be detected as a false - alarm DCI.
[0124] Exemplarily, based on step 205, the reconstructed false - alarm metric value is determined by Formula 6, and Formula 6 is specifically as follows:
[0125]
[0126] In Formula 6, Thr represents the decision threshold, which is set differently according to different aggregation levels. represents the exclusive - OR process.
[0127] In the existing wireless communication system, the false - alarm problem of the terminal device has always been an important challenge. The false - alarm problem refers to the situation where the receiving end misjudges the existence of a signal without transmitting any information, which may lead to waste of spectrum resources, communication interference, and unnecessary loss of resource allocation. Taking the downlink control channel in NR as an example, it is responsible for transmitting system control information, such as scheduling information, modulation mode, power control, etc. by transmitting DCI (downlink control information). DCI uses a 24 - bit - long CRC (Cyclic Redundancy Check) for reliability verification. Assuming the terminal uses a decoder with 8 paths, then the probability of false - alarm in a single decoding is Calculated based on the maximum blind detection capability of 44 decodings within a single time slot specified in R15, on average, a false - alarm occurs every second. However, when the terminal device supports the multi - span detection capability of R16 (i.e., supports more blind detection times within a single time slot), the false - alarm problem will be further aggravated.
[0128] Currently, false alarm verification can be performed through DCI field verification, adaptive threshold detection, and decoding path metric detection. Among them, DCI field verification is a false alarm verification method that obtains information through DCI field parsing. First, the used DCI format is determined according to the DCI format identifier, and each field in the DCI message is extracted. Then, the consistency between the parsed fields and the expected DCI format is checked, with particular attention paid to key fields such as resource allocation information, scheduling information, and modulation and coding schemes. If the parsed fields are inconsistent with the expected DCI format, the current signal is considered a false alarm signal, and the DCI information obtained this time is discarded.
[0129] Adaptive threshold detection is a commonly used false alarm detection method that is based on the statistical characteristics of signals and the adjustment of dynamic thresholds. This method performs false alarm detection by monitoring the received signal strength or energy and comparing it with a preset threshold. Using statistical analysis and adaptive algorithms, the threshold can be automatically adjusted according to changes in the environment and the characteristics of interference patterns. This method has advantages in terms of real-time performance and simplicity and can effectively reduce false alarms. Generally speaking, existing adaptive threshold detection methods perform false alarm judgment by measuring the signal-to-noise ratio of the received signal. When the signal-to-noise ratio is lower than the preset threshold value, it is considered a false alarm signal.
[0130] The decoding path metric is a false alarm detection technique based on coding theory. In a wireless communication system, the transmitted signal usually undergoes coding processing to improve the reliability of data transmission and anti-interference ability. The anti-coding method analyzes the coding structure of the received signal and predefined coding rules to distinguish between real signals and false alarm signals. By detecting error patterns or non-conforming features in the coding sequence, false alarm signals can be identified and corresponding processing can be performed. This method relies on the understanding and analysis of the coding characteristics of signals and is applicable to certain specific communication systems and scenarios.
[0131] In the existing DCI false alarm verification scheme, false alarm judgment is mainly performed jointly through DCI field verification and decoding metric values (convolutional codes). Among them, the decoding metric value judgment scheme is to compare and judge the decoding metric values of DCIs with different aggregation levels and the decoding metric values of all DCIs to be screened in the current subframe at the subframe granularity after passing the DCI field verification. The process is as follows: Step 1: Judge whether the convolutional code decoding path metric value of the DCI information with the current aggregation level of i is less than or equal to Mp_Ali; Step 2: Judge whether the convolutional code decoding path metric value of the DCI information with the current aggregation level of i is greater than Mp_Ali but less than Mq and M_Average; Step 3: Judge the DCI that does not meet the above steps as false alarm information. The Mp_Ali is the convolutional code decoding path metric value corresponding to the p-th DCI after sorting the DCIs to be screened with the aggregation level of i in each subframe according to the path metric value. The Mq is the convolutional code decoding path metric value corresponding to the q-th DCI after sorting the DCIs to be screened in each subframe according to the path metric value. The M_Average is the average value of the convolutional code decoding path metric values corresponding to the DCIs to be screened in each subframe. The p and q are determined by the number of PDCCH channels corresponding to each subframe. At the same time, in the industry, there is a judgment on the DTX (Discontinuous Transmission) state of the NR uplink control channel through the normalized metric value, that is, when the terminal device actively reports SR, the base station side needs to detect and judge whether there is a signal transmission; since the judgment process is before CRC in the uplink scenario (that is, first judge whether there is a signal, and then judge whether the decoding is correct. The main reason here is that in some uplink PUCCH scenarios, the CRC is only 6 bits (bit), and the false alarm probability of CRC is extremely high), so it is used for signal presence judgment, not for false alarm suppression of correct CRC information.
[0132] Compared with the current related technologies, in this embodiment, false alarm detection can be immediately performed after receiving the DCI to be detected, and false alarm judgment is made using independent DCI blind detection information without associating with other blind detection information, which can greatly improve the detection efficiency; by determining the rate matching mode for rate matching of the DCI to be detected through the PDCCH, processing the first LLR according to the rate matching mode to generate a hard decision result and a re-encoding result corresponding to the first LLR, and then performing false alarm detection on the DCI to be detected by reconstructing the false alarm metric value, the distribution range of the decision quantity is limited, which is more friendly to hardware implementation. While ensuring the effectiveness of false alarm verification, the detection speed of false alarm signals is greatly improved and the hardware implementation power consumption is reduced, improving the processing efficiency of the system and enhancing the user experience.
[0133] Further, as Figure 1 and Figure 2 a specific implementation of the method shown, this embodiment provides a false alarm detection device, as Figure 3As shown, the device includes: an acquisition module 31, a determination module 32, and a detection module 33.
[0134] The acquisition module 31 is configured to, in response to receiving the DCI to be detected, acquire the first LLR after rate dematching of the DCI to be detected and the first data length of the first LLR, where the DCI to be detected is the DCI after rate matching through the PDCCH;
[0135] The determination module is configured to determine the rate matching mode of the DCI to be detected through the PDCCH based on the first data length;
[0136] The generation module is configured to process the first LLR according to the rate matching mode to generate a hard decision result and a re-encoding result corresponding to the first LLR;
[0137] The detection module 33 is configured to perform a logical decision process on the hard decision result and the re-encoding result to obtain a reconstructed false alarm metric value corresponding to the DCI to be detected, and perform false alarm detection on the DCI to be detected based on the reconstructed false alarm metric value.
[0138] In some examples of this embodiment, the determination module 32 is further configured to acquire the data length of the DCI to be detected, the cyclic redundancy check (CRC) sequence length corresponding to the DCI to be detected, and the second data length of the LLR before rate dematching of the DCI to be detected; perform a combination process on the data length of the DCI to be detected and the CRC sequence length to obtain a third data length corresponding to the DCI to be detected.
[0139] In some examples of this embodiment, the determination module 32 is specifically configured to determine the rate matching mode corresponding to the DCI to be detected based on the first data length, the second data length, and the third data length.
[0140] In some examples of this embodiment, the determination module 32 is specifically further configured to, if it is determined that the first data length is less than or equal to the second data length, determine that the rate matching mode corresponding to the DCI to be detected is the repetition mode; or, if it is determined that the first data length is greater than the second data length, determine the rate matching mode corresponding to the DCI to be detected based on the second data length and the third data length.
[0141] In some examples of this embodiment, the determining module 32 is further specifically configured to, if it is determined that the length of the first data is greater than the length of the second data, determine the ratio of the length of the second data to the length of the third data; and in the case where the ratio of the length of the second data to the length of the third data is less than or equal to a preset ratio threshold, determine that the rate matching mode corresponding to the DCI to be detected is the puncturing mode; or, in the case where the ratio of the length of the second data to the length of the third data is greater than the preset ratio threshold, determine that the rate matching mode corresponding to the DCI to be detected is the truncation mode.
[0142] In some examples of this embodiment, the determining module 32 is further specifically configured to update the first LLR according to the rate matching mode to obtain a second LLR after the first LLR is updated; and perform a hard decision process on the second LLR to generate a hard decision result of the second LLR.
[0143] In some examples of this embodiment, the determining module 32 is further specifically configured to decode the first LLR through a preset decoder, and perform a re-encoding process on the decoded first LLR through a preset encoder to obtain a re-encoding result to be updated corresponding to the first LLR; and update the re-encoding result to be updated according to the rate matching mode to generate a re-encoding result corresponding to the first LLR.
[0144] In some examples of this embodiment, the determining module 32 is further specifically configured to, if the rate matching mode is the repetition mode, determine the re-encoding result to be updated as the re-encoding result; or, if the rate matching mode is the puncturing mode, update the re-encoding result to be updated according to the length of the first data and the length of the third data to generate a re-encoding result corresponding to the first LLR; or, if the rate matching mode is the truncation mode, update the re-encoding result to be updated according to the length of the third data to generate a re-encoding result corresponding to the first LLR.
[0145] In some examples of this embodiment, the determining module 32 is further specifically configured to, if the rate matching mode is the repetition mode, determine the first LLR as the second LLR; or, if the rate matching mode is the puncturing mode, update the first LLR according to the length of the first data and the length of the third data to obtain a second LLR after the first LLR is updated; or, if the rate matching mode is the truncation mode, update the first LLR according to the length of the third data to obtain a second LLR after the first LLR is updated.
[0146] In some examples of this embodiment, the detection module 33 is further configured to determine that the to-be-detected DCI is a false-alarm DCI if it is determined that the reconstructed false-alarm metric value is greater than or equal to a preset false-alarm metric threshold value.
[0147] It should be noted that for other corresponding descriptions of the functional units involved in the false-alarm detection device provided in this embodiment, reference can be made to Figure 1 and Figure 2 the corresponding descriptions therein, which will not be elaborated here.
[0148] Figure 4 FIG. 11 is a schematic structural diagram of a communication device 1800 provided in this embodiment. The communication device 1800 may be a terminal device, a network device, a chip, a chip system, or a processor that supports the network device to implement the above method, or may also be a chip, a chip system, or a processor that supports the user equipment to implement the above method. The device can be used to implement the method described in the above method embodiment, and specifically, reference can be made to the description in the above method embodiment.
[0149] The communication device 1800 may include one or more processors 1801. The processor 1801 may be a general-purpose processor or a dedicated processor, etc. For example, it may be a baseband processor or a central processing unit. The baseband processor may be used to process communication protocols and communication data, and the central processing unit may be used to control a communication device (such as a base station, a baseband chip, a terminal device, a terminal device chip, a DU or a CU, etc.), execute a computer program, and process the data of the computer program.
[0150] Optionally, the communication device 1800 may further include one or more memories 1802, on which a computer program 1804 may be stored. The processor 1801 executes the computer program 1804 to enable the communication device 1800 to execute the method described in the above method embodiment. Optionally, data may also be stored in the memory 1802. The communication device 1800 and the memory 1802 may be provided separately or integrated together.
[0151] Optionally, the communication device 1800 may further include a transceiver 1805 and an antenna 1806. The transceiver 1805 may be referred to as a transceiver unit, a transceiver, or a transceiver circuit, etc., and is used to implement the transceiver function. The transceiver 1805 may include a receiver and a transmitter. The receiver may be referred to as a receiver or a receiving circuit, etc., and is used to implement the receiving function; the transmitter may be referred to as a transmitter or a transmitting circuit, etc., and is used to implement the transmitting function.
[0152] Optionally, the communication device 1800 may further include one or more interface circuits 1807. The interface circuit 1807 is used to receive code instructions and transmit them to the processor 1801. The processor 1801 executes the code instructions to enable the communication device 1800 to execute the method described in the above method embodiment.
[0153] In one implementation, the processor 1801 may include a transceiver for implementing the receiving and sending functions. For example, the transceiver may be a transceiver circuit, an interface, or an interface circuit. The transceiver circuit, interface, or interface circuit for implementing the receiving and sending functions may be separate or integrated. The above-mentioned transceiver circuit, interface, or interface circuit may be used for reading and writing code / data, or the above-mentioned transceiver circuit, interface, or interface circuit may be used for transmitting or delivering signals.
[0154] In one implementation, the processor 1801 may store a computer program 1803, which runs on the processor 1801 and enables the communication device 1800 to perform the method described in the above method embodiment. The computer program 1803 may be fixed in the processor 1801, in which case the processor 1801 may be implemented by hardware.
[0155] In one implementation, the communication device 1800 may include a circuit that can implement the functions of sending or receiving or communicating in the aforementioned method embodiments. The processor and transceiver described in the present disclosure may be implemented in an integrated circuit (IC), an analog IC, a radio frequency integrated circuit RFIC, a mixed signal IC, an application specific integrated circuit (ASIC), a printed circuit board (PCB), an electronic device, etc. The processor and transceiver may also be manufactured using various IC process technologies, such as complementary metal oxide semiconductor (CMOS), N-type metal oxide semiconductor (nMetal-oxide-semiconductor, NMOS), P-type metal oxide semiconductor (positive channelmetal oxide semiconductor, PMOS), bipolar junction transistor (bipolar junction transistor, BJT), bipolar CMOS (BiCMOS), silicon germanium (SiGe), gallium arsenide (GaAs), etc.
[0156] The communication device in the above-described embodiments may be a network device or a user equipment, but the scope of the communication device described in the present disclosure is not limited thereto, and the structure of the communication device may not be subject to Figure 4 restrictions. The communication device may be an independent device or may be part of a larger device. For example, the communication device may be:
[0157] (1) An independent integrated circuit (IC), or chip, or chip system or subsystem;
[0158] (2) A set of one or more ICs, optionally, the IC set may also include a storage component for storing data and computer programs;
[0159] (3) An ASIC, such as a modem;
[0160] (4) A module that can be embedded in other devices;
[0161] (5) A receiver, a terminal device, a smart terminal device, a cellular phone, a wireless device, a handheld device, a mobile unit, a vehicle-mounted device, a network device, a cloud device, an artificial intelligence device, and so on;
[0162] (6) Others, etc.
[0163] Based on the above embodiments, the present embodiment further provides a chip, including at least one processor and a communication interface; the communication interface is configured to receive a signal input to the chip or a signal output from the chip, and the processor communicates with the communication interface and implements the above-mentioned such as Figure 1 and Figure 2 shown method.
[0164] Figure 5 is a schematic structural diagram of a chip 1000 for implementing the above communication method provided in the present embodiment. Referring to Figure 5 , the chip 1000 includes at least one communication interface 1001 and a processor 1002. The communication interface 1001 is configured to receive a signal input to the chip 1000 or a signal output from the above chip 1000, and the processor 1002 communicates with the communication interface 1001 and implements the communication method described in the above embodiments of the present disclosure through logic circuits or by executing code instructions.
[0165] Those skilled in the art can also understand that the various illustrative logical blocks and steps listed in the embodiments of the present disclosure can be implemented by electronic hardware, computer software, or a combination of both. Whether such a function is implemented by hardware or software depends on the specific application and the design requirements of the entire system. Those skilled in the art can use various methods to implement the described function for each specific application, but such implementation should not be construed as exceeding the scope protected by the embodiments of the present disclosure.
[0166] The present disclosure also provides a computer-readable storage medium, on which instructions are stored, and when the instructions are executed by a computer, the functions of any one of the above method embodiments are implemented.
[0167] The present disclosure also provides a computer program product, and when the computer program product is executed by a computer, the functions of any one of the above method embodiments are implemented.
[0168] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer programs. When the computer program is loaded and executed on a computer, the processes or functions according to the embodiments of the present disclosure are generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer program can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another. For example, the computer program can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center in a wired manner (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or a wireless manner (such as infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or data center that includes one or more integrated available media. The available medium can be a magnetic medium (such as a floppy disk, hard disk, magnetic tape), an optical medium (such as a high-density digital video disc (DVD)), or a semiconductor medium (such as a solid state disk (SSD)), etc.
[0169] Those of ordinary skill in the art can understand that the various numerical numbers such as first and second involved in the present disclosure are only for the convenience of description and are not used to limit the scope of the embodiments of the present disclosure, nor do they represent the order of precedence.
[0170] At least one in the present disclosure may also be described as one or more. The plurality may be two, three, four or more, and the present disclosure does not make any limitation. In the embodiments of the present disclosure, for a technical feature, the technical features in this kind of technical feature are distinguished by "first", "second", "third", "A", "B", "C" and "D", etc. There is no order of precedence or order of magnitude between the technical features described by the "first", "second", "third", "A", "B", "C" and "D".
[0171] As used herein, the terms "machine-readable medium" and "computer-readable medium" refer to any computer program product, device, and / or apparatus (e.g., magnetic disks, optical disks, memory, programmable logic device (PLD)) for providing machine instructions and / or data to a programmable processor, including a machine-readable medium that receives machine instructions as a machine-readable signal. The term "machine-readable signal" refers to any signal for providing machine instructions and / or data to a programmable processor.
[0172] The systems and techniques described herein can be implemented in a computing system including backend components (e.g., as a data server), or a computing system including middleware components (e.g., an application server), or a computing system including frontend components (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described herein), or a computing system including any combination of such backend components, middleware components, or frontend components. The components of the system can be interconnected to each other by digital data communication in any form or medium (e.g., a communication network). Examples of communication networks include: local area network (LAN), wide area network (WAN), and the Internet.
[0173] A computer system may include a client and a server. The client and the server are generally far from each other and typically interact through a communication network. The client-server relationship is created by computer programs running on the respective computers and having a client-server relationship with each other.
[0174] It should be understood that various forms of the processes shown above can be used, steps can be reordered, added or deleted. For example, the steps recited in the present disclosure can be executed in parallel, sequentially, or in a different order, as long as the desired results of the technical solution of the present application can be achieved, and no limitation is made herein.
[0175] In addition, it should be understood that the various embodiments described in the present disclosure can be implemented separately or, where the solution permits, in combination with other embodiments.
[0176] Those of ordinary skill in the art can realize that the units and algorithm steps of each example described in combination with the embodiments claimed herein can be implemented by electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. A professional technician can use different methods for each specific application to implement the described functions, but such implementation should not be considered to exceed the scope of this disclosure.
[0177] Those skilled in the art can clearly understand that for the sake of convenience and brevity of description, the specific working processes of the systems, devices, and units described above can refer to the corresponding processes in the foregoing method embodiments and will not be elaborated herein.
[0178] As mentioned above, the above is only the specific implementation manner of this disclosure, but the protection scope of this disclosure is not limited thereto. Any person skilled in the art within the technical scope disclosed by this disclosure can easily think of changes or substitutions, which should all be covered within the protection scope of this disclosure. Therefore, the protection scope of this disclosure should be subject to the protection scope of the claims.
Claims
1. A false alarm detection method, characterized in that Including: In response to receiving the downlink control information DCI to be detected, obtaining the first log-likelihood ratio LLR after rate matching the DCI to be detected and the first data length of the first LLR, where the DCI to be detected is the DCI after rate matching through the physical downlink control channel PDCCH; Based on the first data length, determining the rate matching mode for the DCI to be detected to perform rate matching through the PDCCH; Processing the first LLR according to the rate matching mode to generate a hard decision result and a re-encoding result corresponding to the first LLR; Performing a logical decision process on the hard decision result and the re-encoding result to obtain a reconstructed false alarm metric value corresponding to the DCI to be detected, and performing false alarm detection on the DCI to be detected based on the reconstructed false alarm metric value.
2. The method according to claim 1, characterized in that, Before the step of determining the rate matching mode for the DCI to be detected to perform rate matching through the PDCCH based on the first data length, the method further includes: Obtaining the data length of the DCI to be detected, the cyclic redundancy check CRC sequence length corresponding to the DCI to be detected, and the second data length of the LLR before rate matching the DCI to be detected; Performing a combined process on the data length of the DCI to be detected and the CRC sequence length to obtain a third data length corresponding to the DCI to be detected.
3. The method according to claim 2, wherein The step of determining the rate matching mode for the DCI to be detected to perform rate matching through the PDCCH based on the first data length includes: Determining the rate matching mode corresponding to the DCI to be detected based on the first data length, the second data length, and the third data length.
4. The method according to claim 3, wherein The step of determining the rate matching mode corresponding to the DCI to be detected based on the first data length, the second data length, and the third data length includes: If it is determined that the first data length is less than or equal to the second data length, determining that the rate matching mode corresponding to the DCI to be detected is the repetition mode; or, If it is determined that the first data length is greater than the second data length, determining the rate matching mode corresponding to the DCI to be detected according to the second data length and the third data length.
5. The method according to claim 4, characterized in that, The step of, if it is determined that the first data length is greater than the second data length, determining the rate matching mode corresponding to the DCI to be detected according to the second data length and the third data length includes: If it is determined that the first data length is greater than the second data length, determining the ratio of the second data length to the third data length; In the case where the ratio of the second data length to the third data length is less than or equal to a preset ratio threshold, determining that the rate matching mode corresponding to the DCI to be detected is the puncturing mode; or, In the case where the ratio of the second data length to the third data length is greater than the preset ratio threshold, determining that the rate matching mode corresponding to the DCI to be detected is the truncation mode.
6. The method according to claim 2, characterized in that, The step of processing the first LLR according to the rate matching mode to generate a hard decision result and a re-encoding result corresponding to the first LLR includes: Update the first LLR according to the rate matching pattern to obtain a second LLR after the update of the first LLR; Perform a hard decision process on the second LLR to generate a hard decision result of the second LLR.
7. The method according to claim 6, wherein The processing of the first LLR according to the rate matching pattern to generate a hard decision result and a re-encoding result corresponding to the first LLR further includes: Decode the first LLR through a preset decoder, and perform re-encoding processing on the decoded first LLR through a preset encoder to obtain a re-encoding result to be updated corresponding to the first LLR; Update the re-encoding result to be updated according to the rate matching pattern to generate a re-encoding result corresponding to the first LLR.
8. The method according to claim 7, wherein The updating the re-encoding result to be updated according to the rate matching pattern to generate a re-encoding result corresponding to the first LLR includes: If the rate matching pattern is a repetition pattern, determine the re-encoding result to be updated as the re-encoding result; or, If the rate matching pattern is a puncturing pattern, update the re-encoding result to be updated according to the first data length and the third data length to generate a re-encoding result corresponding to the first LLR; or, If the rate matching pattern is a truncation pattern, update the re-encoding result to be updated according to the third data length to generate a re-encoding result corresponding to the first LLR.
9. The method according to claim 6, wherein The updating the first LLR according to the rate matching pattern to obtain a second LLR after the update of the first LLR includes: If the rate matching pattern is a repetition pattern, determine the first LLR as the second LLR; or, If the rate matching pattern is a puncturing pattern, update the first LLR according to the first data length and the third data length to obtain a second LLR after the update of the first LLR; or, If the rate matching pattern is a truncation pattern, update the first LLR according to the third data length to obtain a second LLR after the update of the first LLR.
10. The method according to any one of claims 1 to 9, characterized in that, After performing a logical decision process on the hard decision result and the re-encoding result to obtain a reconstructed false alarm metric value corresponding to the DCI to be detected, and performing false alarm detection on the DCI to be detected based on the reconstructed false alarm metric value, the method further includes: If it is determined that the reconstructed false alarm metric value is greater than or equal to a preset false alarm metric threshold, determine the DCI to be detected as a false alarm DCI.
11. A false alarm detection device, characterized in that, Includes: An acquisition module, configured to, in response to receiving a DCI to be detected, acquire a first LLR after rate dematching of the DCI to be detected and a first data length of the first LLR, where the DCI to be detected is a DCI after rate matching through a PDCCH; A determination module, configured to determine a rate matching pattern for rate matching of the DCI to be detected through a physical downlink control channel PDCCH based on the first data length; A generation module, configured to process the first LLR according to the rate matching pattern, and generate a hard decision result and a re-encoding result corresponding to the first LLR; A detection module, configured to perform a logical decision process on the hard decision result and the re-encoding result to obtain a reconstructed false alarm metric value corresponding to the DCI to be detected, and perform false alarm detection on the DCI to be detected based on the reconstructed false alarm metric value.
12. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the method according to any one of claims 1 to 10.
13. A communication device, wherein, Comprising: A transceiver; A memory; A processor, respectively connected to the transceiver and the memory, configured to control the wireless signal transceiver of the transceiver by executing computer-executable instructions on the memory, and be able to implement the method according to any one of claims 1 to 10.
14. A chip, characterized in that, Comprising at least one processor and a communication interface; the communication interface is used to receive signals input to the chip or signals output from the chip, and the processor communicates with the communication interface and implements the method according to any one of claims 1 to 10 through logic circuits or by executing code instructions.