Preparation method of back contact photovoltaic cell and IBC cell
By combining boron-coated diffusion slurry technology and PERC-IBC battery process, the preparation process of HPBC batteries is simplified, the problem of pollution introduced by high-temperature diffusion is solved, and efficient and low-cost IBC battery production is achieved.
Patent Information
- Application Number
- CN202510528434.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-25
- Publication Date
- 2025-07-25
AI Technical Summary
The existing HPBC battery preparation methods are complex and easy to introduce pollution. The high-temperature phosphorus expansion and boron expansion are operated in two times to reduce the quality of the silicon wafer, and the metal impurities are seriously polluted.
The coated boron diffusion slurry technology is used to replace traditional boron high-temperature diffusion, combine PERC and IBC cell processes to simplify the process flow, and use laser etching and PECVD to deposit the passivation layer to form a P+ layer and electrode.
It reduces production costs, simplifies process flow, improves battery efficiency, reduces metal composites, improves silicon wafer life, and is suitable for mass production.
Smart Images

Figure CN120379378A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of batteries, and in particular to a preparation method of a back-contact photovoltaic cell and an IBC cell. Background Art
[0002] The IBC cell is short for a fully back-electrode contact crystalline silicon solar cell. It has no grid lines on the front side, and the positive and negative metal grid lines on the back side are arranged in a finger-like cross pattern. In order to improve the efficiency of the IBC cell, researchers usually combine it with a PERC cell to make an HPBC cell or combine it with a TOPCon cell to make a TBC cell;
[0003] The existing preparation method of the HPBC cell involves multiple masking and cleaning steps. The process is complex and prone to introducing contamination. Phosphorus diffusion and boron diffusion need to be carried out at high temperature in two separate steps. The two high-temperature processes will reduce the quality of the silicon wafer, and metal impurity contamination is likely to be introduced during the high-temperature process. Therefore, the present invention proposes a preparation method of a back-contact photovoltaic cell and an IBC cell to solve the problems existing in the prior art. Summary of the Invention
[0004] In view of the above problems, the present invention proposes a preparation method of a back-contact photovoltaic cell and an IBC cell. The preparation method of the back-contact photovoltaic cell and the IBC cell uses a boron diffusion paste coating technology to replace the traditional high-temperature boron diffusion, which has low cost, short cycle, high production capacity, simple and controllable operation, avoids the adverse effects of high temperature on the battery chip, and reduces metal recombination.
[0005] To achieve the object of the present invention, the present invention is realized through the following technical solutions: A preparation method of a back-contact photovoltaic cell includes the following steps:
[0006] S1: Select a P-type silicon wafer and perform double-sided alkaline texturing;
[0007] S2: In a phosphorus diffusion tube, introduce a phosphorus source and oxygen to perform gettering treatment on the silicon wafer;
[0008] S3: Perform double-sided removal of PSG, double-sided polishing, double-sided LPCVD + phosphorus diffusion on the silicon wafer;
[0009] S4: Use laser etching technology to pattern the back side, open the required P region, remove the front-side PSG, and perform alkaline texturing;
[0010] S5: Coat boron diffusion paste on the front side and the laser-grooved P region, dry and anneal to form a boron-diffused P+ layer;
[0011] S6: Deposit double-sided aluminum oxide and silicon nitride, screen-print silver paste on the back-side N region of the silicon wafer and print aluminum paste on the P region to prepare electrodes.
[0012] A further improvement lies in that: in S1, a double-sided alkali texturing is carried out using a KOH solution with a concentration of 2%, and after texturing, cleaning is performed to wash away the texturing additives, impurity particles, and metal ions adsorbed on the surface of the silicon wafer during the texturing process.
[0013] A further improvement lies in that: in S2, a phosphorus source and oxygen are introduced, and the operation is carried out at 780 °C to 900 °C for 15 min to 30 min to perform an impurity gettering treatment on the silicon wafer.
[0014] A further improvement lies in that the phosphorus source is any one of POCl3, PH3, and PO(CH3O)3, and POCl3 is preferred.
[0015] A further improvement lies in that S3 includes the following steps:
[0016] In a tank-type machine tool, the double-sided PSG is removed, and a 2% HF acid solution is used for cleaning for 2 - 4 min;
[0017] The surface of the P-type silicon wafer is cleaned, and the double-sided acid polishing treatment of the silicon wafer is carried out using an acid solution or the double-sided alkali polishing treatment of the silicon wafer is carried out using an alkali solution. The neutralization of the KOH solution, the cleaning of metal ions and the oxide layer are carried out in an HCl / HF mixed acid solution;
[0018] The polished silicon wafer after cleaning is placed in an LPCVD device, and a 1.5 nm tunneling oxide layer is grown at a temperature of 500 °C, and an intrinsic poly layer is grown at a temperature of 550 °C;
[0019] The temperature of phosphorus diffusion is controlled at 780 °C - 900 °C, and the diffusion time is 30 min - 50 min to form a PSG layer.
[0020] A further improvement lies in that: in S4, during alkali texturing, a KOH solution with a concentration of 1% - 2% is used to perform alkali texturing on the front surface of the silicon wafer and the P region with laser grooving to form a textured surface, and surface cleaning is carried out after texturing.
[0021] A further improvement lies in that S5 includes the following steps:
[0022] Coating is carried out by means of printing, spin coating, roll coating, or spraying;
[0023] Prepare a boron diffusion paste, including the following raw materials: 15 - 20 parts of borosilicate glass powder, 40 - 50 parts of alcohol ester twelve, 2 - 3 parts of cellulose ether (100), 2 - 4 parts of polyamide wax, and 1 - 3 parts of dibutyl phthalate;
[0024] Mix dodecyl alcohol ester, cellulose ether (100), polyamide wax and dibutyl phthalate, keep it at 90 °C for 7 - 8 h, then add borosilicate glass powder, and stir at a speed of 3000 - 4000 r / min for 5 - 6 h to obtain a boron diffusion slurry;
[0025] Coat the front side of the silicon wafer and the laser-grooved P region with the boron diffusion slurry and send it into the furnace tube, bake it at 550 - 600 °C for 3 - 10 s, and then perform thermal diffusion at 780 - 800 °C in a nitrogen atmosphere for 10 min to form a boron-diffused P+ layer.
[0026] A further improvement lies in that: in S6, deposit double-sided alumina and silicon nitride, use PECVD to deposit double-sided alumina thin film and antireflection film, control the thickness of the alumina thin film to be 5 - 12 nm, control the thickness of the front antireflection film to be 60 - 80 nm, control the refractive index to be 2.05 - 2.13, control the thickness of the back antireflection film to be 70 - 80 nm, control the refractive index to be 2.09 - 2.15, and control the deposition rate to be 0.1 - 0.15 nm / s.
[0027] An IBC cell includes a P-type silicon wafer, an N region and a P region are provided on the back side of the P-type silicon wafer, an n-poly layer is provided on the N region, and P+ layers are provided on both the front side of the P region and the P-type silicon wafer;
[0028] Electrodes are provided on both the N region and the P region.
[0029] A further improvement lies in that: passivation layers are provided on the outermost sides of both the back and front sides of the P-type silicon wafer, and the passivation layer is an ALO x +SiN x layer.
[0030] The beneficial effects of the present invention are as follows:
[0031] 1. The present invention adopts the technology of coating boron diffusion slurry to replace the traditional high-temperature boron diffusion, which has low cost, short cycle, high production capacity, simple and controllable operation, avoids the adverse effects of high temperature on the battery wafers, reduces metal recombination, and phosphorus diffusion and gettering during the preparation process of the IBC cell can improve the lifespan of the silicon wafer, and thus is beneficial to the open-circuit voltage and fill factor.
[0032] 2. The present invention combines the PERC and IBC cell process technologies, makes full use of the existing PERC equipment, and combines with the IBC technology, which not only improves the cell efficiency but also reduces the production cost. In terms of equipment investment, it simplifies the existing TBC process, is conducive to realizing large-scale mass production, and can better meet the production needs. Brief Description of the Drawings
[0033] Figure 1 It is a schematic structural diagram of the present invention. Detailed Embodiments
[0034] To deepen the understanding of the present invention, the present invention will be further described in detail below in conjunction with embodiments. These embodiments are only used to explain the present invention and do not constitute a limitation on the protection scope of the present invention.
[0035] Embodiment 1
[0036] According to Figure 1 As shown, this embodiment proposes a preparation method for a back-contact photovoltaic cell, including the following steps:
[0037] S1: Select a P-type silicon wafer and perform double-sided alkaline texturing; use a KOH solution with a concentration of 2% for double-sided alkaline texturing. After texturing, perform cleaning to wash away the texturing additives, impurity particles, and metal ions adsorbed on the surface of the silicon wafer during the texturing process;
[0038] S2: In a phosphorus diffusion tube, introduce a phosphorus source and oxygen to perform gettering treatment on the silicon wafer; introduce a phosphorus source and oxygen, and operate at 780 °C to 900 °C for 15 min to 30 min to perform gettering treatment on the silicon wafer; the phosphorus source is any one of POCl3, PH3, and PO(CH3O)3, with POCl3 being the preferred choice;
[0039] S3: Perform double-sided PSG removal, double-sided polishing, double-sided LPCVD + phosphorus diffusion on the silicon wafer; specifically include the following steps: In a tank-type machine tool, remove double-sided PSG, use a 2% HF acid solution, and clean for 2 - 4 min; perform surface cleaning on the P-type silicon wafer, perform double-sided acid polishing on the silicon wafer using an acid solution or perform double-sided alkaline polishing on the silicon wafer using an alkaline solution, and perform neutralization of KOH solution, cleaning of metal ions and oxide layers in an HCl / HF mixed acid solution; put the cleaned polished silicon wafer into an LPCVD device, control the temperature at 500 °C to grow a 1.5 nm tunneling oxide layer, and grow an intrinsic poly layer at 550 °C; control the temperature of phosphorus diffusion at 780 °C - 900 °C, and the diffusion duration at 30 min - 50 min to form a PSG layer
[0040] S4: Use laser etching technology to pattern the back side, open the required P region, remove the front-side PSG, and perform alkaline texturing; when performing alkaline texturing, use a KOH solution with a concentration of 1% - 2% to perform alkaline texturing on the front surface of the silicon wafer and the laser-opened P region to form a textured surface. After texturing, perform surface cleaning;
[0041] S5: Coat the front side and the laser-grooved P region with boron diffusion paste, dry it, and anneal it to form a boron-diffused P+ layer. Specifically, it includes the following steps: The coating is carried out by printing, spin coating, roll coating or spraying; Prepare the boron diffusion paste, including the following raw materials: 15-20 parts of borosilicate glass powder, 40-50 parts of alcohol ester twelve, 2-3 parts of cellulose ether (100), 2-4 parts of polyamide wax, and 1-3 parts of dibutyl phthalate; Mix alcohol ester twelve, cellulose ether (100), polyamide wax and dibutyl phthalate, keep it at 90 °C for 7-8 h, then add borosilicate glass powder, and stir at a speed of 3000-4000 r / min for 5-6 h to obtain the boron diffusion paste; Coat the front side of the silicon wafer and the laser-grooved P region with the boron diffusion paste and send it into the furnace tube, bake it at 550-600 °C for 3-10 s, and then carry out thermal diffusion in a nitrogen atmosphere at 780-800 °C for -10 min to form a boron-diffused P+ layer. In the boron diffusion paste, the particle size range of silicon particles is 10-50 nm. The viscosity of cellulose ether 100 is 80-95 Pas, so that the obtained paste has good printing performance; Polyamide wax can form a strong network structure, its excellent thixotropic performance, has excellent anti-sagging ability and anti-settling ability. When screen printing, the paste has a lower viscosity, which helps the paste to flow and is convenient for printing high-precision patterns. After printing, the shear force becomes smaller, and the paste will have a higher viscosity, which can prevent the paste from settling and increase the storage time of the paste; Dibutyl phthalate has good stability, flex resistance, adhesion and waterproofness.
[0042] S6: Deposit double-sided alumina and silicon nitride, screen-print silver paste on the back N region of the silicon wafer and aluminum paste on the P region to prepare electrodes. Deposit double-sided alumina and silicon nitride, use PECVD to deposit double-sided alumina thin film and antireflection film, the thickness of the alumina thin film is controlled to be 5-12 nm, the thickness of the front antireflection film is controlled to be 60-80 nm, the refractive index is controlled to be 2.05-2.13, the thickness of the back antireflection film is controlled to be 70-80 nm, the refractive index is controlled to be 2.09-2.15, and the deposition rate is controlled to be 0.1-0.15 nm / s.
[0043] Example Two
[0044] According to Figure 1 As shown, this example proposes a preparation method of a back-contact photovoltaic cell, including the following steps:
[0045] Wafer sorting: Select P-type monocrystalline silicon wafers with a resistivity of 1.5 Ω·cm;
[0046] Texturing and cleaning: Double-sided alkaline texturing is carried out using a KOH solution with a concentration of 2%, and the size of the pyramids is 2 μm; after texturing, cleaning is carried out. The cleaning agents used are: No. 1 solution, water, HF acid (concentration 5%), water, No. 2 solution, water, HF acid (concentration 2%), water (the cleaning agents used in this step in the following examples are the same as those in this example), to wash away the texturing additives, impurity particles and metal ions adsorbed on the surface of the silicon wafer during the texturing process;
[0047] Phosphorus gettering: In a phosphorus diffusion furnace tube, phosphorus source POCl3 and O2 are introduced and run at 850 °C for 18 min;
[0048] Double-sided removal of PSG: In a tank type machine, remove the double-sided PSG, HF acid (concentration 2%), and clean for 3 min;
[0049] Double-sided polishing: Place the P-type silicon wafer in No. 1 solution for surface cleaning, and perform double-sided acid polishing on the silicon wafer using an acid solution or double-sided alkaline polishing on the silicon wafer using an alkaline solution; then carry out the neutralization of the KOH solution, the cleaning of metal ions and the oxide layer in the HCl / HF mixed acid solution; the acid solution is hydrofluoric acid or nitric acid, and polishing is carried out using an acid prepared with a volume ratio of 1.5:1:6 of HNO3 / HF / H2O; the alkaline solution is a KOH solution with a concentration of 5% and a temperature of 62 °C; after completion, wash with water and then heat dry.
[0050] Double-sided LPCVD + phosphorus diffusion: Put the cleaned and polished silicon wafer into an LPCVD equipment, control the temperature at 500 °C to grow a 1.5 nm tunneling oxide layer; grow an intrinsic poly layer at 550 °C, and the thickness of the poly layer is 280 nm; the temperature of phosphorus diffusion is 780 °C - 900 °C, the diffusion time is 30 min - 50 min, and the thickness of the PSG layer is 30 nm - 60 nm.
[0051] Laser window opening: Use laser etching technology to pattern on the back to open the required P area. The laser uses green picosecond laser, with a wavelength of 532 nm, a pulse width at the picosecond level, a laser energy of 80 μj, a laser frequency of 600 KHz, and a laser speed of 45 m / s.
[0052] Single-sided removal of front PSG: Remove the front PSG on a chain type PSG removal machine.
[0053] Post-texturing: Alkaline texturing is carried out using a KOH solution with a concentration of 1% - 2%, at a temperature of 82 °C for 500 s, and the size of the pyramids is 1 μm. After texturing, surface cleaning is carried out with No. 1 solution and No. 2 solution.
[0054] Coating boron diffusion paste: Print boron source on the front and the laser grooved area, send it into the furnace tube and bake at 550 °C for 10 s, then carry out thermal diffusion at 780 °C in a nitrogen atmosphere for 6 min to form a boron diffusion P+ layer.
[0055] Passivation: Deposit double-sided aluminum oxide and silicon nitride. Use PECVD to deposit double-sided aluminum oxide thin film and antireflection film. The thickness of the aluminum oxide thin film is 5 - 12 nm, the thickness of the front antireflection film is 60 - 80 nm, the refractive index is between 2.05 - 2.13, the thickness of the back antireflection film is 70 - 80 nm, the refractive index is between 2.09 - 2.15, and the deposition rate is 0.1 - 0.15 nm / s.
[0056] Metallization: Screen-print silver paste on the back N region and aluminum paste on the P region of the silicon wafer to prepare electrodes. During the sintering process, the paste burns through the passivation layer, and the sintering temperature is between 760 °C.
[0057] The No. 1 liquid used is an aqueous solution containing NH₃·H₂O and H₂O₂ (the mass concentration of NH₃·H₂O is 28%, and the mass concentration of hydrogen peroxide is 25%), and the No. 2 liquid is an aqueous solution containing hydrochloric acid and hydrogen peroxide (the mass concentration of hydrochloric acid is 38%, and the volume ratio concentration of hydrogen peroxide is 25%).
[0058] Example 3
[0059] According to Figure 1 As shown, this example proposes an IBC cell, including a P-type silicon wafer. The back of the P-type silicon wafer is provided with an N region and a P region. An n-poly layer is provided on the N region, and P⁺ layers are provided on both the front of the P region and the P-type silicon wafer; Electrodes are provided on both the N region and the P region. Passivation layers are provided on the outermost sides of both the back and the front of the P-type silicon wafer, and the passivation layer is an ALO x +SiN x layer.
[0060] The present invention adopts the technology of coating boron diffusion paste to replace the traditional high-temperature boron diffusion, which has low cost, short cycle, high production capacity, and simple and controllable operation; It avoids the adverse effects of high temperature on the battery chips, reduces metal recombination, and phosphorus diffusion and gettering during the preparation process of IBC cells can improve the life of the silicon wafer, which is beneficial to the open-circuit voltage and FF. At the same time, the present invention combines the PERC and IBC cell process technologies, makes full use of the existing PERC equipment, and matches the IBC technology, which not only improves the battery efficiency but also reduces the production cost. In terms of equipment investment, the existing TBC process is simplified, which is conducive to realizing large-scale production and can better meet the production needs. In addition, the P region of this product has a PN junction velvet surface structure, and the N region polished surface structure is the same as the TOPCon structure, which improves silicon surface passivation and reduces contact resistance.
[0061] The foregoing has shown and described the basic principles, main features and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited by the above embodiments, and what is described in the above embodiments and the specification is only to illustrate the principle of the present invention. Without departing from the spirit and scope of the present invention, the present invention will have various changes and improvements, and these changes and improvements all fall within the scope of the present invention claimed. The scope of protection claimed by the present invention is defined by the appended claims and their equivalents.
Claims
1. A method for preparing a back-contact photovoltaic cell, characterized in that, It includes the following steps: S1: Select a P-type silicon wafer and perform double-sided alkaline texturing; S2: In a phosphorus diffusion tube, introduce a phosphorus source and oxygen to perform gettering treatment on the silicon wafer; S3: Perform double-sided PSG removal, double-sided polishing, double-sided LPCVD + phosphorus diffusion on the silicon wafer; S4: Use laser etching technology to pattern the back surface, open the required P region, remove the front PSG, and perform alkaline texturing; S5: Coat the front surface and the laser-grooved P region with boron diffusion paste, dry and anneal to form a boron-diffused P+ layer; S6: Deposit double-sided alumina and silicon nitride, screen-print silver paste on the back N region of the silicon wafer and print aluminum paste on the P region to prepare electrodes.
2. The preparation method of a back-contact photovoltaic cell according to claim 1, characterized in that: In the above S1, use a KOH solution with a concentration of 2% for double-sided alkaline texturing. After texturing, perform cleaning to wash away the texturing additives, impurity particles, and metal ions adsorbed on the surface of the silicon wafer during the texturing process.
3. The preparation method of a back-contact photovoltaic cell according to claim 1, characterized in that: In the above S2, introduce a phosphorus source and oxygen, and operate at 780°C - 900°C for 15 min - 30 min to perform gettering treatment on the silicon wafer.
4. The manufacturing method of a back-contact photovoltaic cell according to claim 3, characterized in that: The phosphorus source is any one of POCl3, PH3, and PO(CH3O)3, with POCl3 being the preferred choice.
5. The manufacturing method of a back-contact photovoltaic cell according to claim 1, characterized in that: The above S3 includes the following steps: In a trough-type machine tool, remove double-sided PSG, use 2% HF acid and clean for 2 - 4 min; Perform surface cleaning on the P-type silicon wafer, perform double-sided acid polishing on the silicon wafer using an acid solution or perform double-sided alkaline polishing on the silicon wafer using an alkaline solution, and perform neutralization of the KOH solution, cleaning of metal ions and oxide layers in a HCl / HF mixed acid solution; Put the cleaned polished silicon wafer into an LPCVD device, control the temperature at 500°C to grow a 1.5 nm tunneling oxide layer, and grow an intrinsic poly layer at 550°C; Control the temperature of phosphorus diffusion at 780°C - 900°C and the diffusion duration at 30 min - 50 min to form a PSG layer.
6. The preparation method of a back-contact photovoltaic cell according to claim 1, wherein: In the above S4, during alkaline texturing, use a KOH solution with a concentration of 1% - 2% to perform alkaline texturing on the front surface of the silicon wafer and the laser-grooved P region to form a textured surface, and perform surface cleaning after texturing.
7. The manufacturing method of a back contact photovoltaic cell according to claim 1, characterized in that: The above S5 includes the following steps: The coating is carried out by printing, spin coating, roll coating or spraying; Prepare boron diffusion paste, including the following raw materials: 15 - 20 parts of borosilicate glass powder, 40 - 50 parts of alcohol ester twelve, 2 - 3 parts of cellulose ether (100), 2 - 4 parts of polyamide wax, and 1 - 3 parts of dibutyl phthalate; Mix alcohol ester twelve, cellulose ether (100), polyamide wax, and dibutyl phthalate, keep it at 90°C for 7 - 8 h, then add borosilicate glass powder and stir at 3000 - 4000 r / min for 5 - 6 h to obtain boron diffusion paste; Coat the front surface of the silicon wafer and the laser-grooved P region with boron diffusion paste and send it into a furnace tube, bake at 550 - 600°C for 3 - 10 s, and then perform thermal diffusion at 780 - 800°C in a nitrogen atmosphere for 10 min to form a boron-diffused P+ layer.
8. The preparation method of a back-contact photovoltaic cell according to claim 1, characterized in that: In S6, double-sided aluminum oxide and silicon nitride are deposited. The deposition of the double-sided aluminum oxide thin film and the antireflection film is carried out by PECVD. The thickness of the aluminum oxide thin film is controlled to be 5 - 12 nm, the thickness of the front antireflection film is controlled to be 60 - 80 nm, the refractive index is controlled to be 2.05 - 2.13, the thickness of the back antireflection film is controlled to be 70 - 80 nm, the refractive index is controlled to be 2.09 - 2.15, and the deposition rate is controlled to be 0.1 - 0.15 nm / s.
9. An IBC cell, which applies the preparation method of a back-contact photovoltaic cell according to any one of the above claims 1-8, is characterized in that: It includes a P-type silicon wafer. An N region and a P region are provided on the back of the P-type silicon wafer. An n-poly layer is provided on the N region, and P+ layers are provided on both the P region and the front of the P-type silicon wafer. Electrodes are provided on both the N region and the P region.
10. An IBC battery according to claim 9, wherein: A passivation layer is provided on both the outermost sides of the back and front of the P-type silicon wafer, and the passivation layer is ALO x +SiN x layer.