Manufacturing method of high-voltage mini-LED chip

Abstract

The invention discloses a manufacturing method of a high-voltage mini-LED chip, and the method comprises the following steps: carrying out the pretreatment of an epitaxial P / N cross section before the PECVD (Plasma Enhanced Chemical Vapor Deposition) of SiO2, and cleaning the epitaxial P / N cross section through an HCl (or HCl-containing) solution, so as to form a micro step on the P / N cross section, thereby solving the problem of micro electric leakage when the P / N cross section is covered by SiO2. According to the high-voltage LED chip manufacturing method, the preprocessing step is introduced, and the micro-step structure is constructed on the P / N section, so that the problems of micro electric leakage and non-uniform darkness and brightness existing in the high-voltage LED chip manufacturing method in the prior art are successfully solved. The innovative solution not only improves the performance and reliability of the chip, but also provides a wider prospect for the application of the high-voltage LED chip in the fields of backlight and display.

Description

Technical Field:

[0001] The present invention relates to the technical field of semiconductor lighting, and in particular to a manufacturing method of a high-voltage mini-LED chip. Background Art:

[0002] LED, as an outstanding representative of modern lighting technology, has penetrated into all aspects of our lives with its multiple advantageous features such as energy conservation, environmental protection, safety, long lifespan, and low power consumption. From tiny indicator lights to backlights for large displays, and then to general lighting devices in homes and commercial places, the application of LED can be seen everywhere. This extensive application not only benefits from the excellent performance of the LED itself, but also because with the continuous progress of technology, LED technology is constantly innovating and developing.

[0003] In recent years, high-voltage LED chip technology has attracted particular attention. Compared with traditional LED chips, high-voltage LED chips have significant advantages in packaging costs. Due to their special structural design, high-voltage LED chips can significantly reduce the number of components and solder joints required for packaging while ensuring performance. This not only simplifies the production process but also improves the reliability of the product. In addition, the working current of high-voltage LED chips is smaller while the voltage is higher, which means that the loss during voltage conversion will be greatly reduced, thereby improving energy utilization efficiency. At the same time, its drive design is also more simplified and the heat dissipation requirements are relatively low, which makes high-voltage LED chips show strong competitiveness in various application scenarios.

[0004] Especially with the increasing maturity of local dimming technology, the application of high-voltage mini-LED chips in the backlight and display fields has been unprecedentedly expanded. Local dimming technology can adjust the backlight brightness of different regions in real time according to the picture content, thereby achieving a more precise and delicate display effect. And the high-voltage mini-LED chip is one of the key components to realize this technology. Its small size and high-voltage characteristics enable the backlight system to be more compact and efficient, thus bringing a more excellent visual experience to users.

[0005] However, despite the many advantages of high-voltage LED chips, there are still certain problems with existing manufacturing methods. To achieve series connection between single crystals and prevent short-circuit phenomena, a layer of SiO2 is usually covered in the isolation groove as an insulating layer during the manufacturing process. However, this approach has led to the emergence of micro-leakage phenomena. Due to the incomplete fit between the SiO2 layer and the P / N cross-section or other reasons, the single crystals covered with SiO2 often exhibit a low voltage during startup. More seriously, this micro-leakage phenomenon also causes a significant difference in brightness between single crystals, manifested as uneven brightness between the single crystals covered with SiO2 and those not covered with SiO2. This not only affects the overall performance of the product but also seriously damages the user's visual experience. Therefore, how to solve this problem has become an urgent technical problem to be solved in the current field of high-voltage LED chip manufacturing. Summary of the Invention:

[0006] The purpose of the present invention is to provide a manufacturing method for high-voltage mini-LED chips to solve the problems of micro-leakage and uneven brightness in the prior art.

[0007] The present invention achieves the above purpose through the following solutions:

[0008] A manufacturing method for high-voltage mini-LED chips includes the following steps: Before depositing SiO2 by PECVD (Plasma-Enhanced Chemical Vapor Deposition), pretreat the epitaxial P / N cross-section and clean it with an HCL (or HCL-containing) solution to form micro-steps on the P / N cross-section, thereby solving the micro-leakage problem existing when SiO2 covers the P / N cross-section.

[0009] Preferably, the angle of the micro-steps is between 30 - 80°, and the width W is The height H is The number of steps is between 5 - 50.

[0010] Preferably, the above method further includes a series of steps such as depositing GaN (gallium nitride) on the substrate, etching N-GaN (N-type gallium nitride) using the ICP (Inductively Coupled Plasma) process, completely etching through the epitaxy in the isolation groove by lithography and ICP processes, depositing an SiO2 or SiN insulating and passivating layer by the PECVD process, depositing a transparent conductive layer ITO (Indium Tin Oxide), manufacturing metal electrodes, performing photoluminescence detection, depositing SiO2 or SiN again, grinding and thinning the chip, and plating a Bragg reflector.

[0011] Preferably, the manufacturing method is applicable to front-mounted high-voltage chips and also to manufacturing methods for high-voltage chips such as flip-chip DBR (Distributed Bragg Reflector) and Ag mirror (Silver Mirror).

[0012] In view of the problems of micro-leakage and uneven dark and bright in the existing manufacturing methods for high-voltage LED chips, the present invention proposes an innovative solution - a micro-step structure is carefully constructed on the P / N cross-section. The introduction of this pretreatment step significantly improves the micro-leakage problem when SiO2 covers the P / N cross-section. The formation of the micro-steps optimizes the contact between the SiO2 layer and the P / N cross-section, reducing the leakage phenomenon caused by incomplete fitting. This not only improves the starting voltage stability of the single crystal but also effectively eliminates the problem of uneven dark and bright between the single crystal covered by SiO2 and the uncovered single crystal.

[0013] In addition, by precisely controlling the shape, size, and distribution of the micro-steps, the present invention further enhances the performance and reliability of the high-voltage LED chips. The presence of the micro-steps optimizes the current distribution inside the chip, reducing the risk of local hot spots and current crowding. This not only improves the luminous efficiency of the chip but also extends its service life, providing users with a more durable and stable lighting experience.

[0014] In summary, the present invention successfully solves the problems of micro-leakage and uneven dark and bright in the existing manufacturing methods for high-voltage LED chips by introducing a pretreatment step and constructing a micro-step structure on the P / N cross-section. This innovative solution not only improves the performance and reliability of the chips but also provides a broader prospect for the application of high-voltage LED chips in the backlight and display fields. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 It is a cross-sectional structure diagram of a front-mounted high-voltage product in an embodiment of the present invention;

[0016] Figure 2 It is a schematic diagram of the P / N cross-sectional structure of an existing conventional high-voltage LED chip;

[0017] Figure 3 It is a schematic diagram of the micro-step structure formed on the P / N cross-section in an embodiment of the present invention;

[0018] Figure 4 It is a comparison diagram of the bright and dark areas of a high-voltage LED chip under a conventional manufacturing process.

[0019] Figure 5 It is the brightness situation of the entire area of the high-voltage LED chip prepared by the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS:

[0020] To make the technical solutions and advantages of the present invention clearer, the following will be elaborated in detail with reference to the accompanying drawings. Please note that only some embodiments are described, not all. The components shown in the drawings can be configured flexibly. Therefore, the detailed description does not limit the scope of protection, but only shows selected examples. Other embodiments obtained by those skilled in the art based on these examples are also protected.

[0021] Embodiment:

[0022] The specific implementation manner of the present invention is as follows:

[0023] (1) Deposit GaN on the substrate 1, and sequentially deposit the N-GaN layer 2, the MQWs layer 3, and the P-GaN layer 4;

[0024] (2) Use the traditional ICP process to etch N-GaN on the LED epitaxial wafer, expose the N-GaN for use in making the metal negative electrode, and determine the chip size and the number of series and parallel connections;

[0025] (3) Through photolithography and ICP process, etch through all the epitaxy in the isolation groove to expose the PSS substrate pattern, and divide the chip into N single crystals, N≥2;

[0026] (4) Immerse in HCL or HCL-containing solution for 5 - 10 minutes to form micro-steps at the P / N cross-section of GaN. The angle of this step is between 30 - 80°, and the width W is The height H is The number of steps is between 5 - 50;

[0027] (5) Deposit a 50 - 500nm SiO2 or SiN insulating passivation layer 5 on the chip surface through the PECVD process, and make the required pattern through photolithography and wet etching;

[0028] (6) Deposit a layer of ITO transparent conductive layer 6 on the surface through the Sputter or RPD process, with a thickness of 10nm - 300nm, and remove the excess through photolithography and wet etching;

[0029] (7) Open the required pattern for PAD through photolithography, and make the metal electrode 7 using the electron beam evaporation method. The material of the metal electrode is Cr, Ti, Al, Ag, Ni, Pt, Au and other materials, and the total thickness is controlled within 1 - 5um;

[0030] (8) Perform photoluminescence detection on the wafer through AOI to detect single crystal dark and bright and other appearance defects;

[0031] (9) Deposit SiO2 or SiN by PECVD with a thickness between 500 - 10000 Å. Open the required pattern through photolithography, and use wet etching or ICP to remove the excess SiO2 / SiN, exposing the P / N electrodes 8;

[0032] (10) Thinning the chip by grinding to the target thickness;

[0033] (11) Deposit a stack layer such as SiO2 / TiO on the surface by plasma-assisted deposition to form a Bragg reflector 9, i.e., DBR, to enhance the chip brightness;

[0034] (12) Fabricate the required high-voltage chip through a series of means such as cutting, dot testing, AOI, and sorting.

[0035] The main protection of the present invention is the processes (1)-(4), and the subsequent product structure differentiation steps will not be described in detail. At the same time, the present invention also protects the manufacturing methods of flip-chip DBR, Ag mirror, and other high-voltage chips.

[0036] Through the manufacturing method of the present invention, we have successfully overcome two major problems in the manufacturing process of high-voltage mini-LED chips: micro-leakage and uneven dark and bright. This innovative method significantly improves the brightness and uniformity of the chips, laying a solid foundation for the further development of high-voltage mini-LED technology.

[0037] Under the conventional manufacturing process, as Figure 4 shown, it often encounters the situation where the single crystal has high brightness while other areas are relatively dark. This uneven brightness not only affects the overall performance of the chip but also limits its application in the high-end display and backlight fields.

[0038] However, by applying the method of the present invention, uniform distribution of the brightness of high-voltage mini-LED chips is achieved. As Figure 5 shown, the chips prepared by the present invention exhibit uniform and high brightness in the entire area. This improvement not only enhances the user's visual experience but also opens up new opportunities for the application of high-voltage mini-LED chips in the high-end market and professional fields.

Claims

1. A manufacturing method of a high-voltage mini-LED chip, characterized in that, Including the following steps: Before depositing SiO2 by PECVD, pre-treat the epitaxial P / N cross-section, and clean it with HCl (or HCl-containing) solution to form micro-steps on the P / N cross-section, thereby solving the micro-leakage problem existing when SiO2 covers the P / N cross-section.

2. The manufacturing method according to claim 1, characterized in that, The angle of the micro-step is between 30° and 80°, and the width W is The height H is The number of steps is between 5 and 50.

3. The manufacturing method according to claim 1 or 2, characterized in that It also includes a series of steps such as depositing GAN on the substrate, etching N-GaN using the ICP process, completely etching through the epitaxy in the isolation groove by photolithography and the ICP process, depositing SiO2 or SiN insulating passivation layer by the PECVD process, depositing the transparent conductive layer ITO, fabricating metal electrodes, performing photoluminescence detection, depositing SiO2 or SiN again, grinding and thinning the chip, and plating a Bragg reflector.

4. The manufacturing method according to any one of the preceding claims, characterized in that, The manufacturing method is applicable to the fabrication of vertical high-voltage chips, and is also applicable to the fabrication methods of flip-chip DBR, Ag mirror and other high-voltage chips.

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