Method for removing defects on extreme ultraviolet lithography photomask
The defects on the extreme ultraviolet photolithography photomask are removed through directional etching process, and the photomask imaging problem is solved, and the photomask imaging is achieved is achieved without damaging the photomask structure, saving production time and cost.
Patent Information
- Application Number
- CN202410373007.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-01-26
- Filing Date
- 2024-03-29
- Publication Date
- 2025-07-29
AI Technical Summary
The prior art is difficult to effectively remove defects on the extreme ultraviolet photolithography mask, resulting in problems with imaging on wafer substrates.
Using the directional etching process, the defects on the photocoat are etched at an acute angle relative to the normal direction of the defect surface by adjusting the etching conditions, so that it is much larger than the etching rate of the cover layer, absorbing layer and pattern layer until the defect is completely removed.
The rapid repair of the photocoat is achieved without damaging the cover layer, absorbing layer and pattern layer, saving production time and cost, and no water-based cleaning method is required.
Smart Images
Figure CN120386137A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to a method for removing defects on an extreme ultraviolet (EUV) lithography mask. More specifically, the present disclosure relates to a method for removing defects on an EUV lithography mask by etching. Background Art
[0002] When manufacturing an integrated circuit (IC), the circuit design of the substrate of a wafer is converted into a layout. Then, the layout is transferred onto the substrate of the wafer by lithography. For example, a mask, such as an EUV mask, is disposed on the substrate of the wafer, and a radiation source is irradiated onto the mask to form a pattern on the substrate of the wafer according to the layout.
[0003] However, as the requirements for ICs become more and more precise, lithography technology becomes finer and finer. When particulate defects falling on a mask (such as an EUV mask) are located in an important area of the EUV mask, problems will occur in the imaging on the substrate of the wafer. Therefore, there is an urgent need in the industry for a method for removing defects on an EUV mask. Summary of the Invention
[0004] Embodiments of the present disclosure provide a method for removing defects on an EUV lithography mask, including the following steps. An EUV lithography mask is received, and there is at least one defect on the EUV lithography mask. The EUV lithography mask includes a covering layer, an absorption layer located on the covering layer, and a pattern layer located on the absorption layer. The absorption layer and the pattern layer together form a pattern on the covering layer. The pattern forms a plurality of covered portions and a plurality of exposed portions on the covering layer, and at least one defect forms a shielded area in the exposed portion on the covering layer. In an etching chamber, a directional etching process is performed on at least one defect at a first acute angle with respect to the normal direction of the surface of at least one defect, so as to reduce at least one defect located on the EUV lithography mask by a plurality of etching particles, wherein the shielded area formed by at least one defect is also reduced due to the performance of the directional etching process. The directional etching process is continued on at least one defect at a second acute angle with respect to the normal direction of the surface of at least one defect to completely remove at least one defect, wherein the second acute angle is greater than the first acute angle.
[0005] In some embodiments, the first acute angle is greater than 30 degrees, and the second acute angle is greater than 30 degrees.
[0006] In some embodiments, the first acute angle is greater than 30 degrees and less than 90 degrees, and the second acute angle is greater than 30 degrees and less than 90 degrees.
[0007] In some embodiments, according to the size and position of at least one defect, the first acute angle gradually increases to the second acute angle.
[0008] In some embodiments, at least one defect includes Sn, Al, Mo, Ni, Ta, or a combination thereof.
[0009] In some embodiments, the directional etching process is controlled by adjusting a plurality of etching conditions, and the etching conditions include the type of etching particles, the concentration of etching particles, the flow rate of etching particles, the reaction pressure applied to the extreme ultraviolet lithography mask, the radio frequency applied to the extreme ultraviolet lithography mask, the bias power applied to the extreme ultraviolet lithography mask, the temperature applied to the extreme ultraviolet lithography mask, or a combination thereof.
[0010] In some embodiments, the directional etching process is carried out by a gas.
[0011] In some embodiments, the etching rate of at least one defect is greater than the etching rates of the pattern layer, the absorption layer, and the cover layer.
[0012] In some embodiments, according to the type of at least one defect, one or more of the etching conditions are controlled so that the etching rate of at least one defect is greater than the etching rates of the pattern layer, the absorption layer, and the cover layer.
[0013] In some embodiments, the directional etching process includes a reactive ion etching process, a plasma etching process, and a sputter etching process.
[0014] Embodiments of the present disclosure provide a method for removing defects on an extreme ultraviolet lithography mask, including the following steps. Receiving an extreme ultraviolet lithography mask having at least one defect thereon, and the extreme ultraviolet lithography mask includes a cover layer, an absorption layer located on the cover layer, and a pattern layer located on the absorption layer. Placing the extreme ultraviolet lithography mask having at least one defect on a wafer chuck in an etching chamber. Introducing a plurality of etching particles into the etching chamber. The etching particles etch at least one defect at an acute angle with respect to the normal direction of the surface of at least one defect until at least one defect disappears, and the acute angle changes as at least one defect shrinks until it disappears, and the acute angle is non-horizontal with respect to the top surface of the cover layer. Removing a plurality of etching products generated during the etching of at least one defect.
[0015] In some embodiments, the acute angle is greater than 30 degrees.
[0016] In some embodiments, the acute angle is related to the size and position of at least one defect.
[0017] In some embodiments, when at least one defect becomes smaller, the acute angle incident on at least one defect gradually becomes larger.
[0018] In some embodiments, the first etching rate of at least one defect is greater than the second etching rate of the cover layer, the first etching rate of at least one defect is greater than the third etching rate of the absorption layer, and the first etching rate of at least one defect is greater than the fourth etching rate of the pattern layer.
[0019] In some embodiments, etching at least one defect is performed by a directional etching process of a gas.
[0020] In some embodiments, etching at least one defect is controlled by adjusting a plurality of etching conditions, and the etching conditions include the type of etching particles, the concentration of etching particles, the flow rate of the gas, the reaction pressure applied to the extreme ultraviolet lithography mask, the radio frequency applied to the extreme ultraviolet lithography mask, the bias power applied to the extreme ultraviolet lithography mask, the temperature applied to the extreme ultraviolet lithography mask, or a combination thereof.
[0021] In some embodiments, the type of at least one defect includes Sn, Al, Mo, Ni, Ta, or a combination thereof.
[0022] In some embodiments, one or more of the etching conditions are controlled according to the type of at least one defect, so that the first etching rate of at least one defect is much greater than the second etching rate of the cover layer, the third etching rate of the absorption layer, and the fourth etching rate of the pattern layer.
[0023] In some embodiments, the etching conditions are adjusted according to the appearance, type, and hardness of at least one defect. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] Read the following embodiments in conjunction with the accompanying drawings to clearly understand the viewpoints of the present disclosure. It should be noted that, according to the standard practice in the industry, various features are not drawn to scale. In fact, for the sake of clarity, the dimensions of various features may be arbitrarily enlarged or reduced.
[0025] Figures 1 to 5 is a view of a method configured to remove defects on an extreme ultraviolet lithography mask according to some embodiments of the present disclosure. DETAILED DESCRIPTION
[0026] Reference will now be made in detail to the embodiments of the present disclosure, examples of which are illustrated in the accompanying drawings. Whenever possible, the same reference numerals will be used in the drawings and the description to refer to the same or like parts.
[0027] In addition, for ease of description, spatial relative terms such as "upper", "above", "lower", "between", etc. may be used in this disclosure to describe the relationship between one element or feature and another as shown in the accompanying drawings or functions. Except for the orientations depicted in the accompanying drawings, spatial relative terms are intended to cover different orientations during the use or operation of the device. The device may be oriented in other ways (rotated 90 degrees or in other directions), and the spatial relative descriptors used in this disclosure can be correspondingly interpreted.
[0028] The terms "comprising", "having", "including", etc. used in this disclosure are open-ended terms, meaning including but not limited to.
[0029] It should be noted that when the following drawings (for example Figures 1 to 5 ) are described and explained in a series of operations or steps, the order of explanation of these operations or steps should not be restricted. For example, some operations or steps may be carried out in a different order from that in this disclosure, or some operations or steps may occur simultaneously, or some operations may not be carried out, and / or some operations or steps may be repeated. In addition, additional operations or steps may be carried out before, during, or after the planarization of the wafer for the actual operations or steps of the process stage. Therefore, some of these additional operations or steps may be briefly described in this disclosure. In addition, unless otherwise specified, the same explanations for the following drawings (for example Figures 1 to 5 ) can be directly applied to other drawings.
[0030] During the manufacturing process of semiconductor wafers, defects will occur, and the defects will fall on the EUV mask containing patterns. Moreover, due to the imaging principle of the EUV mask, the defects falling within the patterns have a greater impact on the lithography process of semiconductor wafers. For example, when a defect falls on the cover layer of the EUV mask and is located between the patterns formed by the absorption layer and the pattern layer of the EUV mask, it has a greater impact on the lithography process of semiconductor wafers. Therefore, embodiments of this disclosure provide a configuration to remove defects on the EUV mask in the validation tool stage for manufacturing semiconductor wafers. Please refer to the following Figures 1 to 5 to understand the method for removing defects on the EUV mask provided by the embodiments of this disclosure.
[0031] Please refer to Figure 1Receiving an EUV mask 100 having at least one defect 102a / 102b thereon, and the defects 102a and 102b may be collectively referred to as defect 102. The EUV mask 100 includes a substrate 110 (such as a low thermal expansion material (LTEM) substrate), a multilayer reflective layer 120 located on the substrate 110, a capping layer 130 located on the multilayer reflective layer 120, an absorption layer 140 located on the capping layer 130, and a pattern layer 150 located on the absorption layer 140. The multilayer reflective layer 120 includes a plurality of Mo layers and a plurality of Si layers alternating with the Mo layers. The capping layer 130 is a Ru-based capping layer. The absorption layer 140 is a Ta-based absorption layer. For example, the absorption layer 140 includes TaN. It is worth mentioning that Figure 1 The number of the shown defects 102a / 102b is two, but the number of the defects 102a / 102b is not limited thereto. Similarly, Figure 1 Although the appearance of each of the shown defects 102a / 102b is close to an ellipse, each of the defects 102a / 102b may also be circular or irregular, and the surface of each of the defects 102a / 102b may be uneven, and the present disclosure is not limited thereto.
[0032] As Figure 1 shown, the absorption layer 140 and the pattern layer 150 together form a pattern 160 for manufacturing a semiconductor wafer. The pattern 160 includes a plurality of capping portions 162 and a plurality of exposed portions 164 located on the capping layer 130. The defect 102a forms a shielded area 166a in the exposed portion 164 on the top surface of the capping layer 130, and the defect 102b forms a shielded area 166b in the exposed portion 164 on the top surface of the capping layer 130. And, due to the different sizes of the defect 102a and the defect 102b, the defect 102a completely shields the top surface of the capping layer 130 between the capping portions 162, while the defect 102b partially shields the top surface of the capping layer 130 between the capping portions 162. Whether it is the defect 102a or the defect 102b, it will be imaged onto the semiconductor wafer together with the pattern 160, resulting in imaging problems.
[0033] Next, please refer to Figure 2, the EUV mask 100 having defects 102a and 102b is placed in the etching chamber 200 to perform a directional etching process to remove the defects 102a and 102b on the EUV mask 100. In some embodiments, the directional etching process is performed by dry etching of a gas. In addition, the gas includes a plurality of etching particles 240, and the etching particles 240 can serve as an etchant. In some embodiments, the gas includes a halogen-based gas, such as a Cl ion-based gas, an F ion-based gas, or a combination thereof. Additionally, the etching chamber 200 includes a wafer chuck 210 configured to fix the EUV mask 100, an inlet hole 220 configured to receive a plurality of etching particles 240, and an outlet hole 230 configured to purge the gas. When the directional etching process is performed, the etching particles 240 are input into the etching chamber 200 to etch the defects 102a / 102b, causing the defects 102a / 102b to shrink until they disappear. Moreover, the etching of the defects 102a / 102b can be controlled by adjusting the etching conditions. In some embodiments, the etching conditions include the type of the etching particles 240, the concentration of the etching particles 240, the flow rate of the gas input into the etching chamber 200, the reaction pressure applied to the EUV mask 100, the radio frequency (RF) applied to the EUV mask 100, the bias power applied to the EUV mask 100, the temperature applied to the EUV mask 100, or a combination thereof. In some embodiments, the type of each defect 102a / 102b includes Sn, Al, Mo, Ni, Ta, or a combination thereof. Furthermore, one or more of the etching conditions can be adjusted according to the characteristics of the defects 102a / 102b, such as the hardness (soft or hard), etch resistance, and thermal sensitivity of the defects 102a / 102b.
[0034] In some embodiments, the directional etching process includes a reactive-ion etching (RIE) process, a plasma etching process, a sputter etching process, or a combination thereof. In some embodiments, the etching particles 240 include charged ions, radicals, electrons, or a combination thereof.
[0035] Furthermore, please refer to Figures 3 to 5 . In the directional etching process, the defects on the EUV mask 100 are removed by using the etching particles 240. The etching particles 240 are directed to the defects 102a / 102b at an acute angle θ with respect to the normal direction N of the surface of the defects 102a / 102b. For example, as Figure 3The arrows shown indicate the direction in which the etching particles 240 impinge on the defects 102a / 102b, and the etching particles 240 cause the defects 102a / 102b to shrink until they disappear. It should be noted that, for simplicity in the drawings, only one etching particle 240 impinging on the defects 102a / 102b is depicted, but in reality, multiple etching particles 240 can simultaneously impinge on the defects 102a / 102b at an acute angle θ.
[0036] In addition, in Figure 3 , the defects 102a / 102b are etched at an acute angle θ with respect to the normal direction N, where the acute angle θ is non - horizontal with respect to the top surface of the capping layer 130. Further, since the acute angle θ is associated with the normal direction N of the surface of the defects 102a / 102b, the acute angle θ changes according to the size of the defects 102a / 102b. For example, since the size of the defect 102a is larger than the size of the defect 102b, the acute angle θ impinging on the defect 102a and the acute angle θ impinging on the defect 102b can be the same or different. In some embodiments, the acute angle θ changes according to the position of the defect on the EUV mask 100. For example, the defect 102a is on the top surface of the capping layer 130 between the covering portions 162, and the defect 102a contacts the sidewalls of the absorption layer 140 and the pattern layer 150, while the defect 102b is on the capping layer 130 but does not contact the sidewalls of the absorption layer 140 and the pattern layer 150. Thus, with respect to the surface of the capping layer 130, the position of the defect 102a is different from the position of the defect 102b, and the acute angle θ impinging on the defect 102a and the acute angle θ impinging on the defect 102b can be the same or different. In some embodiments, the acute angle θ is greater than 30 degrees. In some embodiments, the acute angle θ is greater than 30 degrees and less than 90 degrees.
[0037] In addition, as Figure 4 shown, since the defect 102a becomes smaller to the defect 102c, the acute angle θ (e.g., Figure 3 shown) with respect to the normal direction N of the surface of the defect 102a changes to the acute angle α1 with respect to the normal direction N of the surface of the defect 102c. In some embodiments, according to the size of the defect 102, the acute angle θ (e.g., Figure 3 shown) with respect to the normal direction N increases to the acute angle α1 with respect to the normal direction N. In some embodiments, according to the size of the defect 102, the acute angle θ (e.g., Figure 3 shown) gradually increases to the acute angle α1 with respect to the normal direction N. In this exemplary embodiment of the acute angle α1, due to the acute angle θ of the defect 102a (e.g., Figure 3 shown), the etching particles 240 cause the defect 102a (e.g., Figure 3is reduced to the defect 102c, and the defect 102c is located in the space formed by the top surface of the cover layer 130 and the side surface of the absorption layer 140. That is, the shaded area 166a formed by the defect 102a (e.g., Figure 3 shown) is reduced to the shaded area 166c formed by the defect 102c. And, due to the size and position of the defect 102c, the acute angle α1 is greater than the acute angle θ.
[0038] In some embodiments, as the defect 102b is reduced to the defect 102d, the defect 102b (e.g., Figure 3 shown) originally etched through the acute angle θ (e.g., Figure 3 shown in) is changed to etching the defect 102d through the acute angle α2 with respect to the normal direction N of the surface of the defect 102d. In this exemplary embodiment of the acute angle α2, due to the position of the defect 102b (e.g., Figure 3 shown) and the acute angle θ (e.g., Figure 3 shown), the etching particles 240 cause the defect 102b (e.g., Figure 3 shown) to be reduced to the defect 102d, and the defect 102d is located on the cover layer 130 but does not contact the side walls of the absorption layer 140 and the side walls of the pattern layer 150. In some embodiments, according to the size of the defect 102, the acute angle θ with respect to the normal direction N is increased to the acute angle α2. In some embodiments, according to the size of the defect 102, the acute angle θ with respect to the normal direction N is gradually increased to the acute angle α2 with respect to the normal direction N. In addition, the shaded area 166b formed by the defect 102b (e.g., Figure 3 shown) is reduced to the shaded area 166d formed by the defect 102d. In this way, due to the size and position of the defect 102d, the acute angle α2 is greater than the acute angle θ. Similarly, in this exemplary embodiment, due to the positions of the defect 102c and the defect 102d, the acute angle α2 is less than the acute angle α1. In some embodiments, both the acute angle α1 and the acute angle α2 are greater than 30 degrees. In some embodiments, both the acute angle α1 and the acute angle α2 are greater than 30 degrees and less than 90 degrees. Similarly, the defects 102c and 102d can be collectively referred to as the defect 102.
[0039] In addition, in order not to damage the cover layer 130, the absorption layer 140, and the pattern layer 150 during the etching process, one or more etching conditions are controlled according to the type of the defect 102, so that the etching rate of the defect 102 is much greater than the etching rates of the cover layer 130, the absorption layer 140, and the pattern layer 150. That is, the first etching rate of the defect 102 is greater than the second etching rate of the cover layer 130, the first etching rate of the defect 102 is greater than the third etching rate of the absorption layer 140, and the first etching rate of the defect 102 is greater than the fourth etching rate of the pattern layer 150. In addition, etching products 410 are generated during the directional etching process. It is worth mentioning that atFigure 4 In this case, the number of etch products 410 generated by the defect 102 is four, but the number of etch products 410 is not limited to this.
[0040] As Figure 5 shown, through the directional etching process, the defect (such as Figure 3 the defect 102) is completely removed. And during the directional etching process, by controlling the acute angle (such as, Figure 3 the acute angle θ in Figure 3 ), the defect (such as
[0041] the defect 102), the etching conditions between the capping layer 130, the absorption layer 140, and the pattern layer 150 are adjusted according to different etching rates, so that the capping layer 130, the absorption layer 140, and the pattern layer 150 are not damaged. In addition, after or during the directional etching process, the etch products 410 generated during the directional etching process are removed through the outlet hole 230 of the etch chamber 200 to update the surrounding environment of the etch chamber 200. Therefore, a defect-free EUV mask 100 can be obtained to further generate a semiconductor wafer with a pattern 160 through the EUV mask 100.
[0042] In addition, through the directional etching process, the method provided by the present disclosure embodiment does not need to use a water-based cleaning method to repair the EUV mask, which can save production time and production cost more.
[0043] Although some embodiments of the present disclosure have been described in considerable detail, other embodiments are also possible. Therefore, the spirit and scope of the claims should not be limited to the embodiments described herein.
[0044] The features of multiple embodiments in this disclosure are outlined above, making it easier for those skilled in the art to understand this disclosure. Any person skilled in the art should understand that this disclosure can easily be used as a basis for changes or designs of other structures or processes to achieve the same purposes as the embodiments of this disclosure and / or obtain the same advantages. Any person skilled in the art can also understand that equivalent structures as described above do not depart from the spirit and scope of this disclosure, and changes, substitutions, and modifications can be made without departing from the spirit and scope of this disclosure.
[0045]
Symbol Explanation
[0046] 100: EUV mask
[0047] 102, 102a, 102b, 102c, 102d: Defect 110: Substrate
[0048] 120: Multilayer reflective layer
[0049] 130: Overlayer
[0050] 140: Absorbing layer
[0051] 150: Pattern layer
[0052] 160: Pattern
[0053] 162: Covered part
[0054] 164: Exposed part
[0055] 166a, 166b, 166c, 166d: Masked area 200: Etching chamber
[0056] 210: Wafer chuck
[0057] 220: Inlet hole
[0058] 230: Outlet hole
[0059] 240: Etching particles
[0060] 410: Etching product N: Normal direction
[0061] θ, α1, α2: Acute angles.
Claims
1. A method for removing defects on an extreme ultraviolet lithography mask, characterized in that, Comprising: Receiving an extreme ultraviolet (EUV) lithography mask, wherein there is at least one defect on the EUV lithography mask, and the EUV lithography mask includes a cover layer, an absorption layer located on the cover layer, and a pattern layer located on the absorption layer. The absorption layer and the pattern layer jointly form a pattern on the cover layer. The pattern forms a plurality of covered portions and a plurality of exposed portions on the cover layer, and the at least one defect forms a shielded area in the exposed portions on the cover layer; In an etching chamber, performing a directional etching process on the at least one defect at a first acute angle with respect to the normal direction of the surface of the at least one defect, so as to reduce the at least one defect on the EUV lithography mask through a plurality of etching particles. The shielded area formed by the at least one defect is also reduced due to the performance of the directional etching process; And Continuing to perform the directional etching process on the at least one defect at a second acute angle with respect to the normal direction of the surface of the at least one defect to completely remove the at least one defect, wherein the second acute angle is greater than the first acute angle.
2. The method according to claim 1, wherein Wherein the first acute angle is greater than 30 degrees, and the second acute angle is greater than 30 degrees.
3. The method according to claim 1, wherein Wherein the first acute angle is greater than 30 degrees and less than 90 degrees, and the second acute angle is greater than 30 degrees and less than 90 degrees.
4. The method according to claim 1, wherein Wherein according to the size and position of the at least one defect, the first acute angle gradually increases to the second acute angle.
5. The method according to claim 1, characterized in that Wherein the at least one defect includes Sn, Al, Mo, Ni, Ta, or a combination thereof.
6. The method according to claim 5, characterized in that Wherein the directional etching process is controlled by adjusting a plurality of etching conditions, and the etching conditions include the type of the etching particles, the concentration of the etching particles, the flow rate of the etching particles, the reaction pressure applied to the EUV lithography mask, the radio frequency applied to the EUV lithography mask, the bias power applied to the EUV lithography mask, the temperature applied to the EUV lithography mask, or a combination thereof.
7. The method according to claim 1, characterized in that, Wherein the directional etching process is carried out by a gas.
8. The method according to claim 6, characterized in that Wherein the etching rate of the at least one defect is greater than the etching rates of the pattern layer, the absorption layer, and the cover layer.
9. The method according to claim 8, characterized in that, Wherein according to the type of the at least one defect, one or more of the etching conditions are controlled so that the etching rate of the at least one defect is greater than the etching rates of the pattern layer, the absorption layer, and the cover layer.
10. The method according to claim 1, characterized in that, Wherein the directional etching process includes a reactive ion etching process, a plasma etching process, and a sputter etching process.
11. A method for removing defects on an extreme ultraviolet lithography mask, characterized in that: Comprising: Receiving an extreme ultraviolet (EUV) lithography mask, wherein there is at least one defect on the EUV lithography mask, and the EUV lithography mask includes a cover layer, an absorption layer located on the cover layer, and a pattern layer located on the absorption layer; Placing the EUV lithography mask having the at least one defect on a wafer chuck in an etching chamber; Allowing a plurality of etching particles to enter the etching chamber; The etching particles etching the at least one defect at an acute angle with respect to the normal direction of the surface of the at least one defect until the at least one defect disappears, wherein the acute angle changes as the at least one defect shrinks until it disappears, and the acute angle is non-horizontal with respect to the top surface of the cover layer; and Removing a plurality of etching products generated during the etching of the at least one defect.
12. The method according to claim 11, characterized in that, Wherein the acute angle is greater than 30 degrees.
13. The method according to claim 11, characterized in that Wherein the acute angle is related to the size and position of the at least one defect.
14. The method according to claim 13, wherein Wherein when the at least one defect becomes smaller, the acute angle incident on the at least one defect gradually becomes larger.
15. The method according to claim 11, wherein Wherein a first etching rate of the at least one defect is greater than a second etching rate of the cover layer, the first etching rate of the at least one defect is greater than a third etching rate of the absorption layer, and the first etching rate of the at least one defect is greater than a fourth etching rate of the pattern layer.
16. The method according to claim 15, characterized in that Wherein etching the at least one defect is performed by a directional etching process of a gas.
17. The method according to claim 16, wherein Wherein etching the at least one defect is controlled by adjusting a plurality of etching conditions, and the etching conditions include types of the etching particles, concentrations of the etching particles, flow rate of the gas, reaction pressure applied to the extreme ultraviolet lithography mask, radio frequency applied to the extreme ultraviolet lithography mask, bias power applied to the extreme ultraviolet lithography mask, temperature applied to the extreme ultraviolet lithography mask, or a combination thereof.
18. The method according to claim 17, wherein Wherein types of the at least one defect include Sn, Al, Mo, Ni, Ta, or a combination thereof.
19. The method according to claim 18, characterized in that Wherein one or more of the etching conditions are controlled according to the type of the at least one defect, so that the first etching rate of the at least one defect is much greater than the second etching rate of the cover layer, the third etching rate of the absorption layer, and the fourth etching rate of the pattern layer.
20. The method according to claim 17, wherein Wherein the etching conditions are adjusted according to the appearance, type, and hardness of the at least one defect.