Data access method and device

Abstract

The invention discloses a data access method and device, and belongs to the technical field of computers. The method comprises the following steps: a processor obtains an access request of a first process, wherein the access request indicates an access process except for memory access; the processor allocates an access memory in the memory based on the access request, and provides a physical address of the access memory for the first process; and the processor obtains an access operation of the first process on the access memory based on the physical address, and responds to the access operation. According to the method and the device, the process of responding to the access request of the first process by the operating system is simplified, and the efficiency of responding to the access request is improved.

Description

Technical Field

[0001] This application relates to the field of computer technology, and particularly to a data access method and apparatus. Background Art

[0002] With the development of technology, it has become increasingly common to achieve application requirements through access to computing devices. For example, between different processes in a computing device or between different computing devices, data exchange can be achieved through storage access or network access.

[0003] Currently, to achieve access to a storage medium, after the kernel of an operating system obtains an access request for the storage medium, it needs to perform software processing using a storage protocol stack, etc., to respond to the access request. Similarly, to achieve access to a network card, after the kernel of an operating system obtains an access request for the network card, it needs to perform software processing using a network protocol stack, etc., to respond to the access request.

[0004] However, the process of the operating system responding to access through software stacks such as the storage protocol stack and the network protocol stack is relatively complex, resulting in low efficiency in responding to access requests. Summary of the Invention

[0005] This application provides a data access method and apparatus. This application simplifies the process of the operating system responding to an access request from a first process, reduces the computing power overhead generated by responding to the access request, and helps improve the efficiency of responding to the access request and the computing efficiency of the first computing node. The technical solutions provided by this application are as follows:

[0006] In a first aspect, this application provides a data access method. This method is applied to a processor of a first computing node. The first computing node further includes a memory. This method includes: the processor obtains an access request from a first process, and the access request indicates an access process other than memory access; the processor allocates access memory in the memory based on the access request and provides the physical address of the access memory to the first process; the processor obtains the access operation of the first process on the access memory based on the physical address and responds to the access operation.

[0007] In this data access method, the processor allocates access to memory for the first process, and the first process accesses the allocated memory, enabling the first process to obtain the data indicated by the access request through the memory access, and converting various types of access requirements of the first process into access operations on the memory. For example, various types of accesses that need to use storage protocol stacks, network protocol stacks, etc. to implement access are all converted into memory accesses. In this way, when the operating system of the first computing node responds to this access request, there is no need to execute corresponding software processing such as protocol stacks according to the specific access requirements of the first process, simplifying the process of the operating system responding to the access request of the first process, reducing the computing power overhead generated by responding to the access request, and helping to improve the efficiency of responding to the access request and the computing efficiency of the first computing node.

[0008] In a possible implementation, the first process is a process running on the processor. At this time, the implementation scenario of the data access method in this application can be regarded as a scenario where different processes in the first computing node access each other. And / or, the first process is a process running in the second computing node. At this time, the implementation scenario of the data access method in this application can be regarded as a scenario where the second computing node accesses the first computing node.

[0009] In a possible implementation scenario, after obtaining the access request, the processor can first execute a judgment process to determine whether it is necessary to allocate access to memory. In one implementation, in response to the first process being a process running in the second computing node, the processor allocates access to memory based on the access request, including: when the first computing node and the second computing node are connected by a communication bus supporting memory semantics, the processor allocates access to memory based on the access request. At this time, the first computing node and the second computing node are connected by a communication bus supporting memory semantics, and the processor responds to the access operation, including: the processor responds to the access operation based on the communication bus.

[0010] In this application, the access request indicates an access process other than memory access. That is, the access request indicates any type of access other than memory access. For example, the access request indicates accessing a file stored in the first computing node. And / or, the access request indicates transferring data with a second process running on the processor. That is, the access request indicates accessing the network card of the first computing node. In addition, the access request can also optionally indicate access to non-hard disk networks, access to accelerators (such as encryption and decryption accelerators), and access to security national cryptography chips, etc.

[0011] The processor's response to an access operation means that, for the access type indicated by the access request, the processor performs memory management according to the corresponding access type. By way of example, when the access request indicates reading a file in the first computing node, the processor's response to the access operation includes: the processor instructing the access memory to provide the data that the first process needs to access. For example, when the access request indicates accessing a file stored in the first computing node, the processor's response to the access operation includes: the processor reading the file from the persistent storage medium into the access memory, performing the operation indicated by the access operation on the file stored in the access memory, and updating the file stored in the persistent storage medium based on the operation result. As another example, when the access request indicates transferring data with a second process running on the processor, if the access operation indicates that the first process receives target data from the second process, the processor's response to the access operation includes: the processor instructing the second process to store the target data in the access memory and providing the target data to the first process based on the access operation. If the access operation indicates that the first process transfers target data to the second process, the processor's response to the access operation includes: the processor storing the target data in the access memory and providing the target data to the second process.

[0012] In a possible implementation, in response to the first process being a process running in the second computing node, before the processor provides the physical address of the access memory to the first process, the method further includes: the processor configuring the second process and establishing a communication connection between the second process and the first process. Then, the processor providing the physical address of the access memory to the first process includes: the processor providing the physical address to the first process through the second process. When the first process is a process running in the first computing node and the processor provides the second process to send the physical address to the first process, if the physical address is still sent to the first process running in the second computing node through the second process, it is possible to achieve the compatibility and unity of intra-node communication and inter-node communication in terms of local node notification and cross-node notification, which helps the horizontal and vertical expansion of the distributed system.

[0013] In one implementation, after receiving the physical address, the second process can immediately send the physical address to the first process. This implementation is equivalent to the second process actively sending the physical address to the first process. In another implementation, after receiving the physical address and receiving an inquiry request sent by the first process, the second process sends the physical address to the first process. This implementation is equivalent to the second process passively sending the physical address to the first process.

[0014] In a possible implementation, after the processor allocates access to memory in the memory, the method further includes: the processor configures the access permission of the first process to the accessed memory. The access permission is used to indicate the operations that the first process can perform when accessing the accessed memory. Exemplarily, when the access permission indicates that the first process can perform read and write operations on the accessed memory, the access permission is a borrowing permission. When the access permission indicates that the first process can perform only read operations on the accessed memory, the access permission is a sharing permission. Exemplarily, when the physical address of the accessed memory is provided to multiple processes, the first process has only read permission to the accessed memory; when the physical address of the accessed memory is provided to one process, the first process has read and write permission to the accessed memory. Correspondingly, the processor responds to the access operation, including: the processor responds to the access operation when the access operation meets the access permission.

[0015] By configuring the access permission of the first process to the accessed memory and responding to the access operation when the access operation of the first process meets the access permission, the processor can authenticate the access operation of the first process and ensure the secure operation of the accessed memory.

[0016] In a possible implementation manner, the access permission is indicated by the attribute information of the access request. The access permission can be determined by the inherent attributes of the first computing node. For example, when the first process triggers an access request by calling an access interface, if the access interface has inherent attributes, the processor can determine the access permission of the first process to the accessed memory based on the inherent attributes. Exemplarily, when the inherent attributes of the access interface indicate the access permission of the access implemented through the interface, the processor can determine the access permission indicated by the inherent attributes as the access permission of the first process to the accessed memory. And the attribute information used to indicate the inherent attributes can be carried in the access request.

[0017] In another implementation, the access right can be determined based on the data indicated to be accessed by the access request. Exemplarily, when the data indicated to be accessed by the access request needs to be provided to multiple processes, there may be conflicts in the access of the data by the multiple processes. Then the processor can configure the first process to have the shared right to access the memory. When the data indicated to be accessed by the access request needs to be provided to one process, there will be no access conflict due to multiple processes accessing the memory. Then the processor can configure the first process to have the borrowing right to access the memory. For example, when the memory needs to be provided for multiple processes to access, the physical address of the memory needs to be provided to multiple processes. To avoid access conflicts in the access of the memory by multiple processes, the processor can configure the first process to have the shared right to access the memory. When the memory needs to be provided for one process to access, the physical address of the memory needs to be provided to one process, and the memory is used by one process, and there will be no access conflict due to multiple processes accessing the memory. Then the processor can configure the first process to have the borrowing right to access the memory.

[0018] In a second aspect, the present application provides a data access device. The device is applied to the processor of the first computing node. The first computing node further includes a memory. The device includes: an interaction module, configured to obtain an access request of a first process, where the access request indicates an access process other than memory access; an allocation module, configured to allocate access memory in the memory based on the access request and provide the physical address of the access memory to the first process; and a response module, configured to obtain an access operation of the first process on the access memory based on the physical address and respond to the access operation.

[0019] In a possible implementation, the first process is a process running on the processor, and / or the first process is a process running in the second computing node.

[0020] In a possible implementation, in response to the first process being a process running in the second computing node, the allocation module is specifically configured to: when the first computing node and the second computing node are connected by a communication bus supporting memory semantics, allocate access memory in the memory based on the access request.

[0021] In a possible implementation, when the first computing node and the second computing node are connected by a communication bus supporting memory semantics, the response module is specifically configured to: respond to the access operation based on the communication bus.

[0022] In a possible implementation, the access request indicates accessing a file stored in the first computing node, and / or the access request indicates transferring data with a second process running on the processor.

[0023] In a possible implementation, in response to an access request indicating access to a file stored in a first computing node, the response module is specifically configured to: read the file from a persistent storage medium into an access memory, perform the operation indicated by the access operation on the file stored in the access memory, and update the file stored in the persistent storage medium based on the operation result.

[0024] In a possible implementation, in response to an access request indicating data transfer with a second process running on a processor, the response module is specifically configured to: when the access operation indicates receiving target data from the second process, instruct the second process to store the target data in the access memory and provide the target data to the first process based on the access operation; when the access operation indicates transferring target data to the second process, store the target data in the access memory and provide the target data to the second process.

[0025] In a possible implementation, in response to the first process being a process running in a second computing node, the allocation module is specifically configured to: configure the second process and establish a communication connection between the second process and the first process; provide a physical address to the first process through the second process.

[0026] In a possible implementation, the allocation module is specifically configured to: after receiving a physical address and receiving an inquiry request sent by the first process, send the physical address to the first process.

[0027] In a possible implementation, the allocation module is specifically configured to: configure the access permission of the first process to the access memory. Then, the response module is specifically configured to: respond to the access operation when the access operation meets the access permission.

[0028] In a possible implementation, when the physical address of the access memory is provided to multiple processes, the first process has read-only permission to the access memory; when the physical address of the access memory is provided to one process, the first process has read-write permission to the access memory.

[0029] In a possible implementation, the access permission is indicated by the attribute information of the access request.

[0030] In a third aspect, the present application provides a computing device, including a memory and a processor. The memory stores program instructions, and the processor runs the program instructions to execute the method provided in the first aspect of the present application and any of its possible implementation manners.

[0031] In a fourth aspect, the present application provides a computing device cluster, including multiple computing devices. The multiple computing devices include multiple processors and multiple memories. Program instructions are stored in the multiple memories, and the multiple processors run the program instructions so that the computing device cluster executes the method provided in the first aspect of the present application and any of its possible implementation manners.

[0032] In a fifth aspect, the present application provides a computer-readable storage medium, which is a non-volatile computer-readable storage medium. The computer-readable storage medium includes program instructions that, when executed on a computing device, cause the computing device to execute the methods provided in the first aspect of the present application and any of its possible implementation manners.

[0033] In a sixth aspect, the present application provides a computer program product containing instructions that, when the computer program product runs on a computer, cause the computer to execute the methods provided in the first aspect of the present application and any of its possible implementation manners.

[0034] Optionally, the computer program product is an operating system running in the processor of a computer device. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 is a schematic structural diagram of an implementation scenario related to a data access method provided by an embodiment of the present application;

[0036] Figure 2 is a schematic structural diagram of another implementation scenario related to a data access method provided by an embodiment of the present application;

[0037] Figure 3 is a flowchart of a data access method provided by an embodiment of the present application;

[0038] Figure 4 is a schematic diagram of the process of a traditional operating system using a storage protocol stack to respond to file access provided by an embodiment of the present application;

[0039] Figure 5 is a schematic diagram of the process of a traditional operating system using a network protocol stack to send data provided by an embodiment of the present application;

[0040] Figure 6 is a schematic diagram of transmitting a physical address to a process in a second computing node through IPI provided by an embodiment of the present application;

[0041] Figure 7 is a schematic diagram of a first computing node and a second computing node accessing through accessing memory provided by an embodiment of the present application;

[0042] Figure 8 is a schematic diagram of the process of accessing using the data access method of the present application provided by an embodiment of the present application;

[0043] Figure 9 is a schematic diagram of devices accessing each other through accessing memory provided by an embodiment of the present application;

[0044] Figure 10 It is a schematic diagram of a data access device provided by an embodiment of the present application;

[0045] Figure 11 It is a schematic structural diagram of a computing device provided by an embodiment of the present application;

[0046] Figure 12 It is a schematic structural diagram of a computing device cluster provided by an embodiment of the present application. Detailed implementation manners

[0047] To make the objectives, technical solutions and advantages of the present application clearer, the following will further describe the embodiments of the present application in detail with reference to the accompanying drawings.

[0048] With the development of technology, it has become increasingly common to achieve application requirements through access to computing devices. For example, between different processes in a computing device or between different computing devices, data exchange can be achieved through storage access or network access. Currently, to achieve access to a storage medium, after the kernel of an operating system obtains an access request for the storage medium, it needs to perform software processing using a storage protocol stack, etc., to respond to the access request. Similarly, to achieve access to a network card, after the kernel of the operating system obtains an access request for the network card, it needs to perform software processing using a network protocol stack, etc., to respond to the access request. The kernel is the most fundamental part of the OS. The kernel is used to allocate the computing power resources of the processor in the form of processes, allocate physical memory in the form of virtual memory, and manage input / output (IO) devices in the form of files.

[0049] However, the process of the operating system responding to access through software stacks such as the storage protocol stack and the network protocol stack is relatively complex, resulting in low efficiency in responding to access requests.

[0050] Moreover, with the improvement of the performance of network cards and storage media, etc., the computing power consumption on the software stack (such as the protocol stack) of the operating system (OS) has become increasingly large. For example, in the scenario of accessing traditional storage media such as hard disk drives (HDDs) and solid state drives (SSDs), 80% of the computing power consumption is used on the storage media and their interfaces, and 20% of the computing power consumption is used on the operating system. However, in the scenario of accessing new storage media, 20% of the computing power consumption is used on the storage media and their interfaces, and 80% of the computing power consumption is used on software processing such as the kernel using the storage protocol stack. It can be seen from this that currently, the proportion of computing power consumption occupied by software processing such as the kernel using the protocol stack is very large, resulting in the software processing of the kernel using the protocol stack becoming the main link affecting access performance. At the same time, multiple operation processes need to be executed during the process of the kernel using the protocol stack, and the process of the kernel responding to access through the software stack is relatively complex, resulting in a low efficiency of responding to access requests. Each operation process will use memory, which leads to the problem of multiple channel redundancies during the process of using the protocol stack.

[0051] Although the industry has been constantly trying to bypass the protocol stack through bypass technologies to give full play to the performance of hardware to a greater extent. Bypass technologies mainly include the data plane development kit (DPDK) and the persistent memory development kit (PDMK), etc.

[0052] DPDK mainly consists of the DPDK lib library and the user-mode network card driver. Business programs are used through the application program interface (API) of DPDK. To address the performance issues of the traditional socket method, DPDK improves the capabilities of network cards through technologies such as large memory pages, pre-allocated packet memory, using polling, and multi-core concurrency. The core technical solution is to bypass the protocol stack of the transmission control protocol (TCP) / internet protocol (IP) in the kernel and directly operate the network card buffer in the user mode. By bypassing the Linux kernel, it realizes the elimination of the copy on the kernel side of network forwarding packets and the software stack, thereby improving the efficiency of network forwarding. Among them, in the design of the CPU, the user mode refers to the non-privileged state. In this state, the executed code is restricted by the hardware and cannot perform certain operations. For example, writing to the storage space of other processes is restricted to prevent security risks to the operating system. In the design of the operating system, the user mode is similar, referring to the non-privileged execution state. The kernel prohibits the code in this state from performing potentially dangerous operations. For example, writing to system configuration files is prohibited, killing processes of other users is prohibited, and restarting the system is prohibited.

[0053] PDMK is a set of development tool libraries for using storage media with direct access (DAX) characteristics. Non-volatile memory (NVM) can use a file system that enables the DAX function to directly expose it in the user space. In this way, user-mode programs can use standard file system APIs to operate on NVM. They can also use mmap (a method of memory-mapped files) to directly map it to the user space, making operations on NVM directly converted into loading and storing data in NVM, without the need to use page cache in the middle.

[0054] However, the starting point of these technologies is to bypass the OS and compress the software stack consumption to improve performance. Their objects are within the domain-specific scope and do not act on the OS. Moreover, all the above direct-pass technologies open up a new fast channel instead of changing the OS design on the OS side. On this basis, the OS continues to retain the traditional network protocol stack and storage protocol stack, etc., to be compatible with network and storage access, making the OS become increasingly redundant.

[0055] Based on this, an embodiment of the present application provides a data access method. This method is applied to the processor of the first computing node. The first computing node further includes a memory. The method includes: the processor obtains an access request of a first process, and then based on the access request, allocates an access memory in the memory and provides the physical address of the access memory to the first process; after the processor obtains the access operation of the first process on the access memory based on this physical address, it responds to this access operation. Among them, this access request indicates an access process other than memory access. That is, this access request indicates any type of access other than memory access.

[0056] In this data access method, the processor allocates an access memory for the first process, and the first process accesses the access memory, so that the first process can obtain the data indicated by the access request through accessing the access memory, and converts various types of access requirements of the first process into access operations on the access memory. For example, various types of accesses that need to use a storage protocol stack and a network protocol stack, etc. to implement access are all converted into accesses to the memory. In this way, when the operating system of the first computing node responds to this access request, it does not need to execute corresponding software processing such as protocol stacks according to the specific access requirements of the first process, simplifies the process of the operating system responding to the access request of the first process, reduces the computing power overhead generated by responding to the access request, and helps to improve the efficiency of responding to the access request and the computing efficiency of the first computing node.

[0057] In one implementation, this data access method can optionally be executed by an operating system running in the processor or the kernel of the operating system. At this time, the present application is equivalent to providing a new operating system or the kernel of the operating system. This operating system can convert the object of the access service and expose the ability to access the memory to the first process, so that the first process can achieve the access purpose by performing an access operation on the access memory. And this operating system can implement access access of types such as files and communications. When responding to the access, the kernel side can achieve no-copy and no-serialization conversion consumption, and can also decouple the hardware used for access (such as the storage medium used for file access and the network card used for network transmission). In this way, this operating system can convert various types of access processes such as the storage protocol stack, the network protocol stack, and the memory access process into memory access processes, which is equivalent to fusing the access processes such as the storage protocol stack, the network protocol stack, and the memory access process in the traditional operating system, and unifying the corresponding access processes into accesses to the memory, being compatible with the access acceleration of access processes such as the storage protocol stack, the network protocol stack, and the memory access process, being able to remove the redundancy of multiple operating systems caused by using protocol stacks, and helping the software stacks of traditional devices such as disks and network cards to move towards a more efficient software stack, so as to achieve the purpose of performance acceleration and simplifying the operating system.

[0058] The technical solution of this application will be introduced in detail from multiple perspectives such as implementation scenarios, method processes, hardware devices, software devices, etc. First, an example of the implementation scenario of the embodiments of this application will be given here.

[0059] Figure 1 It is a schematic structural diagram of an implementation scenario involved in a data access method provided by an embodiment of this application. As Figure 1 shown, this implementation scenario includes: a first computing node 10. The first computing node 10 includes a processor and a memory. Optionally, the first computing node 10 can be a physical machine, a cloud server, a bare metal server, etc. Exemplarily, Figure 1 the shown implementation scenario is a data center, and the first computing node 10 is a server in the data center.

[0060] In Figure 1 the shown implementation scenario, a first process A runs on the processor of the first computing node 10. When the first process A has an access requirement, it will trigger an access request. After the processor obtains the access request, it can allocate access memory in the memory of the first computing node 10 based on the data access method provided by the embodiment of this application, and provide the physical address of the access memory to the first process A, so that the first process A can access the access memory based on this physical address, and when the first process A performs an access operation on the access memory, respond to the access operation to achieve its access purpose. At this time, this implementation scenario can be regarded as a communication scenario within the first computing node 10. For example, a second process B also runs on the processor of the first computing node 10. When the first process A needs to transmit data to the second process B, the first process A can trigger an access request, and this access request indicates to transmit data to the second process B. After the processor obtains the access request, it allocates access memory based on this access request, and provides the physical address of the access memory to the first process A, so that the first process A uses this access memory to transmit data to the second process B. At this time, this implementation scenario can be regarded as a scenario where different processes in the first computing node 10 communicate with each other.

[0061] Figure 2 It is a schematic structural diagram of another implementation scenario involved in a data access method provided by an embodiment of this application. As Figure 2 shown, this implementation scenario includes: a first computing node 10 and at least one second computing node 20. Here Figure 2Schematic diagram of an implementation scenario including a first computing node 10 and a second computing node 20. Both the first computing node 10 and the second computing node 20 include a processor and a memory. A communication connection is established between the first computing node 10 and the second computing node 20. For example, a communication connection can be established between the first computing node 10 and the second computing node 20 through a network. Optionally, the network can be a local area network, the Internet, or other networks, which is not limited in the embodiments of the present application. Moreover, in order to ensure that the second computing node 20 can perform an access operation on the memory accessed by the first computing node 10, a communication bus supporting memory semantics is also connected between the first computing node 10 and the second computing node 20. Exemplarily, the communication bus can be optionally a compute express link (CXL) or a Lingqu bus (also known as UB bus) and other high-speed communication buses. Optionally, both the first computing node 10 and the second computing node 20 can be physical machines, cloud servers, bare metal servers, etc. Exemplarily, Figure 2 The shown implementation scenario is a data center, and both the first computing node 10 and the second computing node 20 are servers in the data center.

[0062] In Figure 2In the illustrated implementation scenario, a first process A is running on the processor of the second computing node 20. A second process B is running on the processor of the first computing node 10. When the first process A has an access requirement to access the first computing node 10, it will trigger an access request. After the processor of the first computing node obtains this access request, it can allocate access memory in the memory of the first computing node 10 based on the data access method provided by the embodiments of the present application, and provide the physical address of this access memory to the first process A, so that the first process A can access this access memory based on this physical address, and when the first process A performs an access operation on this access memory, respond to this access operation to achieve the purpose of the first process A accessing the first computing node 10. For example, when the first process A needs to transfer data with the second process B, the first process A can send an access request to the first computing node, and this access request indicates transferring data with the second process B. After the processor of the first computing node receives this access request, it allocates access memory based on this access request, and provides the physical address of this access memory to the first process A, so that the first process A uses this access memory to transfer data with the second process B. At this time, this implementation scenario can be regarded as a scenario for communication between computing nodes. Another example is that when the first process A needs to access a file stored in the first computing node 10, the first process A can send an access request to the first computing node, and this access request indicates accessing the file stored in the first computing node 10. After the processor of the first computing node receives this access request, it allocates access memory based on this access request, and provides the physical address of this access memory to the first process A, so that the first process A uses this access memory to access the file stored in the first computing node 10. At this time, this implementation scenario is a scenario where the second computing node 20 accesses the file stored in the first computing node 10.

[0063] In one implementation manner, the data access method provided by the embodiments of the present application can be implemented by a computing node running an executable program. For example, the executable program of this data access method can be presented in the form of an application installation package. After the application installation package is installed in the computing node, the data access method can be implemented by running this executable program.

[0064] Moreover, the data access method provided by the embodiments of the present application is specifically executed by an operating system running in the processor. At this time, the present application is equivalent to providing a new operating system. This new operating system can improve the efficiency of responding to access requests and the computing efficiency of computing nodes, and contribute to the improvement of computing power in the field of information, communication, and technology (ICT).

[0065] There are at least two implementation forms of the operating system. In one implementation form, the operating system of the present application is obtained by modifying a traditional operating system. In another implementation form, the operating system of the present application is redesigned according to the implementation idea of the data access method provided in the present application. When the operating system is obtained by redesign, there is no need to design network protocol stacks, storage protocol stacks, etc. in the traditional operating system in the operating system, which can simplify the operating system.

[0066] It should be understood that the above content is an exemplary description of the implementation scenario of the data access method provided in the embodiments of the present application, and does not constitute a limitation on the implementation scenario of the data access method. Those of ordinary skill in the art know that as the business requirements change, its implementation scenario can be adjusted according to application requirements. For example, the method can also be applied to accesses of non-hard disk network types, accesses to accelerators (such as encryption and decryption accelerators), and accesses to secure national cryptography chips, etc. The embodiments of the present application do not list them one by one.

[0067] Next, the data access method provided in the embodiments of the present application will be described. Figure 3 It is a flowchart of the data access method provided in the embodiments of the present application. This method is applied to the first computing node. The first computing node includes a processor and a memory. As Figure 3 shown, the data access method includes the following steps:

[0068] Step 301, the processor obtains an access request of the first process.

[0069] As mentioned above, the first process may optionally be a process running on the processor of the first computing node. At this time, the implementation scenario of this access method can be regarded as a communication scenario within the first computing node. For example, when a second process is also running on the processor of the first computing node, the access request is an access request sent by the first process to the second process, and the access request indicates that the first process and the second process transmit data. This implementation scenario can be regarded as a scenario of communication between different processes in the first computing node.

[0070] And / or, the first process may optionally be a process running in the second computing node. In this case, this implementation scenario can be regarded as a scenario where computing nodes access each other. For example, when the first process needs to transfer data with the second process, the access request is sent from the first process to the second process, and this access request indicates transferring data with the second process. In this case, this implementation scenario can be regarded as a scenario where computing nodes communicate with each other. Another example, when the first process needs to access a file stored in the first computing node, the access request is sent from the first process to the second process, and this access request indicates accessing the file stored in the first computing node. In this case, this implementation scenario is a scenario where the second computing node accesses the file stored in the first computing node. Among them, a communication connection is established between the first computing node and the second computing node. And, in order to ensure that the second computing node can perform access operations on the accessed memory of the first computing node, a communication bus supporting memory semantics is connected between the first computing node and the second computing node. Exemplarily, this communication bus may optionally be a high-speed communication bus such as a CXL or UB bus.

[0071] This access request indicates an access process other than memory access. That is to say, this access request indicates any type of access other than memory access. For example, according to the above example, the access request indicates accessing a file stored in the first computing node, and / or the access request indicates accessing the network card of the first computing node. In addition, the access request may also optionally indicate accesses other than hard disk networks, accesses to accelerators (such as encryption and decryption accelerators), and accesses to security national cryptography chips, etc., and the embodiments of the present application do not make specific limitations on them.

[0072] In one implementation manner, the access request can indicate the data requested to be accessed by the first process. This indication function can be reflected by a virtual address (VA). Optionally, the access request carries a virtual address, or the access request carries information indicating a virtual address. This virtual address is used to indicate the data requested to be accessed by the first process. For example, an access request indicating file access carries the inode number, file size, and start address of the file, and the inode number, file size, and start address can indicate a virtual address. In this way, after the processor obtains the access request, it can obtain the virtual address from this access request and determine the data requested to be accessed by the first process based on this virtual address.

[0073] Optionally, the access request may optionally be triggered by the first process calling the interface layer of the traditional operating system. For example, as Figure 4As shown, when the access request indicates that the first process accesses the file stored in the first computing node, the access request may be triggered by the first process calling the API of the virtual file system of the traditional operating system. At this time, it is equivalent to intercepting the read / write instructions of the traditional file access on the kernel side and responding to them using the data access method provided in the embodiments of the present application. Another example is, as Figure 5 As shown, when the access request indicates that the first process transfers data with the second process, the access request may be triggered by the first process calling the socket interface of the traditional operating system. At this time, it is equivalent to intercepting the send / receive instructions of the traditional network transmission on the kernel side and responding to them using the data access method provided in the embodiments of the present application. When the access request is triggered by the first process calling the interface layer of the traditional operating system, the first process can trigger the access request using the original API of the traditional operating system, which can ensure that the access trigger processes such as the traditional file reading and writing and network packet sending and receiving remain unchanged, enabling the application programs running on the operating system to not only achieve the decoupling of calls through the data access method provided in the present application, but also be compatible with the original API of the traditional operating system (such as read / write and other APIs).

[0074] Step 302: The processor allocates access memory in the memory based on the access request.

[0075] After obtaining the access request of the first process, the processor can allocate access memory in the memory of the first computing node based on the access request, so that the first process can achieve the access purpose indicated by the access request by accessing the access memory. Among them, the processor may first estimate the capacity of the access memory required to implement the access request based on the data carried in the access request, and then apply for the access memory of this capacity in the memory to achieve the allocation of the access memory. In one implementation, the access request carries a virtual address, and the processor can determine the physical address corresponding to the virtual address based on the mapping relationship between the virtual address and the physical address, and determine the capacity of the access memory based on the size of the data recorded in the physical address.

[0076] Optionally, after obtaining an access request, the processor may first perform a judgment process to determine whether it is necessary to allocate access memory. In one implementation, when the first process has the ability to perform an access operation on the access memory, based on the access request, the processor allocates the access memory in the memory. For example, when the first process is a process running in the first computing node, the processor determines that the first process has the ability to perform an access operation on the access memory. When the first process is a process running in the second computing node, if the first computing node and the second computing node are connected by a communication bus that supports memory semantics, and the first process can access the access memory based on this communication bus, the processor determines that the first process has the ability to perform an access operation on the access memory. When the first process has the ability to perform an access operation on the access memory, the processor determines to respond to the access request of the first process in the way of using the traditional operating system to respond to the access request, and does not allocate access memory based on the access request. For example, when there is no communication bus that supports memory semantics connected between the first computing node and the second computing node, the processor can determine that the first process does not have the ability to perform an access operation on the access memory. At this time, if the access request indicates that the first process transfers data with the second process, the access request is responded to in the current way of transferring data through the network protocol stack. If the access request indicates that the first process accesses a file stored in the first computing node, the access request is responded to in the current way of implementing file access through the file protocol stack. In one implementation scenario, when the processor is compatible with the traditional operating system and the operating system provided by the present application, or the operating system has both the functions of the traditional operating system and the data access method provided by the present application, after receiving the access request, the operating system needs to make a judgment according to the above logic, and respond to the access request according to the corresponding response method according to the judgment result.

[0077] Further, after the processor applies for access memory in the memory, the processor can also configure the access permission of the first process to the access memory to ensure the secure operation of the access memory. The access permission is used to indicate the operations that the first process can perform when accessing the access memory. For example, the access permission indicates that the first process can perform read and write operations on the access memory, and at this time the access permission is a borrowing permission. The access permission indicates that the first process can perform only read operations on the access memory, and at this time the access permission is a sharing permission.

[0078] In the first implementation, the access right can be determined by the inherent attributes of the first computing node. For example, when the first process triggers an access request by calling an access interface, if the access interface has inherent attributes, the processor can determine the access right of the first process to the accessed memory based on these inherent attributes. By way of example, when the inherent attributes of the access interface indicate the access right of the access implemented through this interface, the processor can determine the access right indicated by these inherent attributes as the access right of the first process to the accessed memory. Moreover, the attribute information used to indicate these inherent attributes can be carried in the access request.

[0079] In the second implementation, the access right can be determined based on the data indicated to be accessed by the access request. By way of example, when the data indicated to be accessed by the access request needs to be provided to multiple processes, there may be conflicts in the access of multiple processes to this data, then the processor can configure the first process to have shared access rights to the accessed memory. When the data indicated to be accessed by the access request needs to be provided to one process, there will be no access conflicts due to multiple processes accessing the accessed memory, then the processor can configure the first process to have borrowing access rights to the accessed memory. For example, when the accessed memory needs to be accessed by multiple processes, the physical address of the accessed memory needs to be provided to multiple processes. To avoid access conflicts in the access of multiple processes to the accessed memory, the processor can configure the first process to have shared access rights to the accessed memory. When the accessed memory needs to be accessed by one process, the physical address of the accessed memory needs to be provided to one process, and this accessed memory is used by one process, and there will be no access conflicts due to multiple processes accessing the accessed memory, then the processor can configure the first process to have borrowing access rights to the accessed memory.

[0080] It should be noted that the first implementation and the second implementation for determining the access right can be used separately or in combination. By way of example, when the first implementation and the second implementation are used in combination, the processor can preferentially determine the access right based on the inherent attributes of the first computing node. When these inherent attributes do not indicate the access right, the processor then determines the access right based on the second implementation. Moreover, the above first implementation and second implementation are examples of the implementation for determining the access right and are not used to limit its implementation. For example, the access right can also be determined based on factors such as the priority of the process accessing this accessed memory.

[0081] As an implementable manner, during the process of the processor allocating access to memory based on an access request, it may optionally perform unified management of the memory based on a mapping table. During the execution of step 302, the processor may first determine information such as the virtual address, physical address (PA), and access type indicated by the access request based on the access request, and then establish a mapping table based on this information. After the processor completes the allocation of access to memory, it may optionally implement the access mode of the access indicated by the access request and the ownership information (owner) of the memory for storing the data indicated by the access request based on the allocation situation of the access to memory, etc., to improve this mapping table. For example, after the processor obtains information such as the virtual address, physical address, and access type, it may apply for an independent page table and use this page table to record the corresponding relationship between these information. Exemplarily, as shown in Table 1, when the mapping table represents the corresponding relationship between the virtual address, physical address, access type, access mode, and ownership information, this corresponding relationship is represented by a five-dimensional page table. Among them, the physical address is used to indicate the physical memory block storing the data indicated by the virtual address. The access type is used to indicate the access requirement. For example, the type "file" in Table 1 indicates the access requirement that the first process needs to access the file stored in the first computing node. The type "socket" in Table 1 indicates the access request that the first process needs to transmit data. The access mode includes: responding to the access by sharing the accessed memory, responding to the access by borrowing the accessed memory, and responding to the access request by the traditional operating system. When responding to the access by accessing the memory, the access permission of this accessed memory is recorded in the mapping table, such as "shared" in the third column of the second and sixth rows and "borrowed" in the third column of the fifth row in Table 1.

[0082] Among them, since the physical address PA1 needs to be provided to two processes, its access mode is "shared". When responding to the access request by the traditional operating system, since this situation generally occurs during cross-node access, the network address (NA) of the second computing node is recorded in the mapping table, such as "NA1" and "NA2" in the third column of the third and fourth rows in Table 1. The network address is used to identify the computing node, and this network address may optionally be any identification information capable of representing the computing node. Exemplarily, this network address is an IP address.

[0083] Table 1

[0084] Virtual Address Physical Address Access Mode Ownership Information Access Type VA1 PA1 Shared First Compute Node file VA2 PA2 NA1 First Compute Node file VA3 PA3 NA2 First Compute Node socket VA4 PA4 Borrowed First Compute Node socket VA5 PA1 Shared First Compute Node socket

[0085] The processor can uniformly manage the memory based on the mapping table, map the cache pages on the kernel side, and achieve memory page mapping without the awareness of the service, which helps support the direct transfer of data through accessing the memory. Moreover, through this mapping table, various accesses can also be distinguished to achieve the distinction of different access requirements. At the same time, since the mapping table records the physical addresses of the physical memory blocks storing data and does not need to reflect the differences of different storage media, it can achieve the unified management of heterogeneous memory media.

[0086] Step 303: The processor stores the data indicated by the access request in the access memory.

[0087] After obtaining the access request, the processor can determine the data indicated by the access request based on the access request. Then, the processor can obtain the data from the first computing node and store the data in the access memory so that the first process can read the data in the access memory. The access request carries a virtual address, and the processor can determine the data indicated by the access request based on the virtual address. In one implementation, when the access request indicates accessing a file in the first computing node, the processor can optionally determine the metadata area of the file based on the virtual address carried by the access request, determine the data area of the file based on the metadata recorded in the metadata area, and obtain the data indicated by the access request from the data area. When the access request indicates that the first process transfers data with the second process, the processor can optionally determine the buffer used by the network card based on the virtual address carried by the access request and obtain the buffer data from the buffer, so as to obtain the data indicated by the access request.

[0088] It should be noted that this step 303 is an optional execution step in the access scenario. For example, when the access request indicates that the first process needs to obtain data through this access request, the processor can execute this step 303 to store the data indicated by the access request in the access memory. When the access request indicates that the first process needs to write data to the first computing node through this access request, the processor does not need to execute this step 303.

[0089] Step 304: The processor provides the physical address of the access memory to the first process.

[0090] There are multiple ways for the processor to provide the physical address to the first process. For example, when the first process is a process running in the first computing node, the processor can directly send the physical address to the first process through the network. Alternatively, the processor can optionally send the physical address to the first process through an inter-processor interrupt (IPI). An IPI is an inter-core notification message generated by an interrupt clearing register (ICR), and the IPI can be sent between processes through the system bus. The destination shorthand field of the ICR sets the overall target type as the destination field, and this destination field is used to indicate the destination of the IPI.

[0091] Similarly, when the first process is a process running in the second computing node, the processor can directly send the physical address to the first process through the network. Alternatively, the processor can optionally use IPI to provide the physical address to the first process. In one implementation, when the first process is a process running in the second computing node, before the processor provides the physical address to the first process, the second process is configured in the processor, and a communication connection is established between the second process and the first process. After the processor completes the allocation of memory access, it can optionally first send the physical address to the second process through IPI, and then send the physical address to the first process through the second process. As Figure 6 shown, configuring the second process in the processor is equivalent to creating a "shadow core" for the first process in the first computing node. This second process is used to obtain the message sent to the first process from the first computing node and deliver the message to the first process. Figure 6 In [the figure], "C" represents the processor core. The processor core represented by the solid line is the actual hardware of the computing node, and the processor core represented by the dashed line is virtual. It should be noted that after configuring the second process in the first computing node and establishing a communication connection between the second process and the first process, if it is necessary to send a message to the second process through IPI, the second process also needs to be included in the IPI notification interrupt service routine.

[0092] In one implementation, after receiving the physical address, the second process can immediately send the physical address to the first process. This implementation is equivalent to the second process actively sending the physical address to the first process. In another implementation, after receiving the physical address and the inquiry request sent by the first process, the second process sends the physical address to the first process. This implementation is equivalent to the second process passively sending the physical address to the first process. Optionally, the first process can request the physical address from the second process in a polling manner. Among them, the second process provides the physical address to the first process, which can be sent through a network or through a bus between the first computing node and the second computing node.

[0093] When the first process is a process running in the first computing node and the processor uses IPI to send the physical address to the first process, if the physical address is still sent to the first process running in the second computing node through IPI, it can achieve the compatibility and unification of intra-node communication and inter-node communication in terms of local node notification and cross-node notification. Moreover, when the compatibility and unification of intra-node communication and inter-node communication are achieved through IPI in a distributed system, it also helps with the horizontal expansion (scale horizontally, also known as scale out) and vertical expansion (scale vertically, also known as scale up) of the distributed system. Among them, horizontal expansion is used to add new nodes to the distributed system to expand the overall scale of the distributed system. For example, horizontal expansion of a distributed system includes adding a new computing node to a distributed system for implementing web or mail services. Vertical expansion is used to add hardware configurations to a single computing node in the distributed system to increase the service capabilities of a single node in the distributed system. For example, adding a CPU, memory, etc. to a computing node in the distributed system.

[0094] Step 305: The processor obtains the access operation of the first process to access the memory based on the physical address and responds to the access operation.

[0095] The processor's response to an access operation means that, for the access type indicated by the access request, the processor performs memory management according to the corresponding access type. By way of example, when the access request indicates reading a file in the first computing node, the processor's response to the access operation includes: the processor instructing the access memory to provide the data it needs to access to the first process. For example, when the access request indicates accessing a file stored in the first computing node, the processor's response to the access operation includes: the processor reading the file from the persistent storage medium into the access memory, performing the operation indicated by the access operation on the file stored in the access memory, and updating the file stored in the persistent storage medium based on the operation result. Among them, the operations indicated by the access request can be: adding a file, deleting a file, querying a file, and modifying a file. Another example is that when the access request indicates transferring data with a second process running on the processor, if the access operation indicates that the first process receives target data from the second process, the processor's response to the access operation includes: the processor instructing the second process to store the target data in the access memory and providing the target data to the first process based on the access operation. If the access operation indicates that the first process transfers target data to the second process, the processor's response to the access operation includes: the processor storing the target data in the access memory and providing the target data to the second process.

[0096] In addition, when the first computing node and the second computing node are connected by a communication bus that supports memory semantics, when the processor responds to the access operation, the processor can optionally respond to the access operation based on this communication bus. For example, the processor transmits the data stored in the access memory to the first process through this communication bus, or the processor receives the data written by the first process to the access memory through this communication bus. At the same time, when the processor configures the access permission of the first process to the access memory during the process of allocating the access memory, when the processor responds to the access operation, it also needs to verify whether the access operation of the first process conforms to this access permission. When the access operation is within the range permitted by the access permission, the processor executes the access operation. When the access operation is not within the range permitted by the access permission, the processor prohibits specifying this access operation.

[0097] The following uses a specific example to illustrate the implementation process of the data access method provided by the embodiments of the present application.

[0098] As Figure 7 shown, the first computing node and the second computing node are connected by a UB bus. When the first process in the second computing node needs to access the data in the first computing node, it can send an access request to the first computing node. After receiving the access request, the first computing node allocates access memory based on the access request and provides the physical address of the access memory to the first process. Figure 7The arrow labeled (1) therein indicates that the processor of the first computing node provides the first process with the physical address for accessing the memory. After receiving the physical address, the first process can regard the accessed memory as its own memory based on this physical address, thereby realizing the borrowing of the accessed memory. This process is as follows Figure 7 shown by the arrow labeled (2) therein. Then, the first process can write data into the accessed memory based on this physical address. This process is as follows Figure 7 shown by the arrow labeled (3) therein. After the first process completes the access to the accessed memory, it can send a message indicating the completion of the access to the first computing node. This process is as follows Figure 7 shown by the arrow labeled (4) therein. When the first computing node receives the message sent by the first process indicating the completion of the access, it can perform a synchronization operation in the first computing node based on the access result of the first process. For example, when the first process performs the operation indicated by the access operation on the file stored in the accessed memory, the synchronization operation performed by the processor includes: updating the file stored in the persistent storage medium based on the operation result of the first process. Then, the processor can query whether the accessed memory is still being used by other processes. If the accessed memory is not being used by other processes, the processor can release the accessed memory.

[0099] Figure 4 is a schematic diagram of the process of a traditional operating system using a storage protocol stack to respond to file access provided by an embodiment of the present application. As Figure 4 shown, after receiving an access request, the first computing node triggers the operating system to respond through the API of the file system. After receiving the request triggered by the first computing node, the operating system will sequentially pass the request to the virtual file system, file system, general block device layer (block device), disk driver (diskdriver), and disk (disk controller) according to the storage protocol stack, thereby realizing the access to the file stored on the hard disk.

[0100] Figure 5 is a schematic diagram of the process of a traditional operating system using a network protocol stack to send data provided by an embodiment of the present application. As Figure 5As shown, after the first computing node receives an access request indicating network writing, it transmits the data to be sent to the operating system through the socket interface to trigger the operating system to respond. The operating system constructs the TCP header and TCP segment used for transmission based on the TCP protocol according to the network protocol stack, adds the IP header to the packet and performs routing processing based on the IP protocol, etc. Then it transmits them to the network management, network driver, and network controller in sequence, and then performs data transmission according to the instructions of the network controller.

[0101] Figure 8 It is a schematic diagram of the access process using the data access method provided by the embodiments of the present application. When the second process in the first computing node receives an access request from the first process and needs to transmit data to the first process based on this access request, the second process first calls the socket interface, applies to access the memory through this socket interface, writes the data that needs to be transmitted to the first process in the access address, and then provides the physical address of this accessed memory to the first process through the socket interface. Then, the processor performs memory management on this accessed memory. As Figure 8 shown, after the processor receives the read operation of the first process, it reads the accessed memory based on this read operation through the virtual memory and the memory manager. Similarly, when the first process needs to access a file stored in the first computing node, the first computing node also responds according to a similar logic.

[0102] Will Figure 8 And Figure 4 And Figure 5By making a comparison, it can be seen that: the data access method provided by the embodiment of the present application converts the object of the access service and exposes the ability to access memory to the first process, enabling the first process to achieve the access purpose by performing access operations on the accessed memory, realizing access access for types such as files and communications, and being able to achieve zero-copy and zero-serialization conversion consumption on the kernel side when responding to access, and can also decouple the hardware used for access (such as the storage medium used for file access and the network card used for network transmission). Moreover, this method can convert various types of access processes such as the storage protocol stack, network protocol stack, and memory access process into memory access processes in the operating system under the condition that the access trigger processes such as traditional file reading and writing and network packet receiving and sending remain unchanged, which is equivalent to integrating the storage protocol stack, network protocol stack, and memory access process in the traditional operating system, unifying the corresponding access processes into memory access, being compatible with the access acceleration of access processes such as the storage protocol stack, network protocol stack, and memory access process, being able to remove the redundancy caused by using the protocol stack, and helping the software stacks of traditional devices such as hard disks and network cards to move towards a more efficient software stack, thereby achieving the purpose of performance acceleration and simplifying the operating system.

[0103] In the present application, when the first process is a process running in the second computing node, the data access method provided by the embodiment of the present application can be applied to a distributed scenario. At this time, different nodes in the distributed system can use the data access method provided by the embodiment of the present application to achieve access. In this way, different nodes in the distributed system can directly transfer data by accessing memory, converting various types of access requirements of the first process into access operations on memory. Further, it can also support the scale-up ability of the single-machine service process in the distributed system, realizing the unification of the programming models of single-machine and distributed processes, and greatly reducing the implementation difficulty of expanding the distributed system.

[0104] As can be seen from the above, in the data access method provided by the embodiment of the present application, the processor allocates accessed memory to the first process, and the first process accesses the accessed memory, enabling the first process to obtain the data indicated by the access request by accessing the memory, converting various types of access requirements of the first process into access operations on the accessed memory. For example, various types of accesses that need to use the storage protocol stack, network protocol stack, etc. to achieve access are all converted into accesses to memory. In this way, when the operating system of the first computing node responds to this access request, it does not need to execute corresponding software processing such as the protocol stack according to the specific access requirements of the first process, simplifying the process of the operating system responding to the access request of the first process, reducing the computing power overhead generated by responding to the access request, and helping to improve the efficiency of responding to the access request and the computing efficiency of the first computing node.

[0105] Moreover, this application can also use the same mode to respond to the access processes of single-node inter-process communication (IPC) and multi-node remote procedure call (RPC), enabling the integration and normalization of IPC and RPC, thereby simplifying the programming models of single-machine and distributed processes. At the same time, through the direct access of the first process to the access memory, regardless of the size, sparsity, and density of the data to be accessed, the access is achieved by operating on the access memory, which can ensure the access efficiency for different data sizes, sparsity, and density. When the access memory manages data in page granularity, this access method can also achieve page-granularity access and is compatible with the large-block data transfer of direct memory access (DMA), which is beneficial to the improvement of sparse random access efficiency. Among them, RPC, that is, remote procedure call, is a way to request services from a remote computer program through a network. Without understanding the protocol of the underlying network technology, data in a computer process can be obtained. RPC makes it easier to develop application programs including network-distributed multi-programs. IPC refers to the process of data interaction between processes.

[0106] In addition, the process in which the processor in this application allocates access memory to the first process can be regarded as the process of configuring the access memory as the direct access memory of the first process, which provides the ability to access the access memory to the processes within the node and other nodes. In this way, through the data access method provided by the embodiments of this application, the access process of the processor to other nodes can be regarded as the access to the memory. Compared with the current CPU in a computing node that can only access the memory in its own computing node, through the data access method provided by the embodiments of this application, the computing node can also access devices in other nodes by accessing the memory, and this access is not limited to the access of the CPU, but also applicable to the mutual access between other devices. For example, as Figure 9 shown, it can also achieve mutual access between any two of the CPU, data processing unit (DPU), graphics processing unit (GPU), dynamic random access memory (DRAM), and network card.

[0107] It should be noted that the order of the steps of the data access method provided by the embodiments of this application can be appropriately adjusted, and the steps can also be increased or decreased accordingly according to the situation. Any person skilled in the art can easily think of a changed method within the technical scope disclosed in this application, which should be covered by the protection scope of this application, so it will not be elaborated here.

[0108] The following is an example of the virtual device in the embodiments of the present application.

[0109] The data access method in the embodiments of the present application is introduced above. Corresponding to the above method, the embodiments of the present application also provide a data access device. Figure 10 It is a schematic structural diagram of a data access device provided by the embodiments of the present application. Based on Figure 10 the following multiple components shown, the Figure 10 data access device shown can perform all or part of the operations shown above. It should be understood that the device may include more additional components than those shown or omit some of the components shown, and the embodiments of the present application do not limit this. Optionally, the device is applied to the processor of the first computing node. The first computing node also includes a memory. As Figure 3 shown, the data access device 100 may include: Figure 10

[0110] An interaction module 101, configured to obtain an access request of a first process, where the access request indicates an access process other than memory access.

[0111] An allocation module 102, configured to allocate access memory in the memory based on the access request and provide the physical address of the access memory to the first process.

[0112] A response module 103, configured to obtain an access operation of the first process on the access memory based on the physical address and respond to the access operation.

[0113]

[0114] In a possible implementation, the first process is a process running on the processor, and / or the first process is a process running in the second computing node.

[0115]

[0116] In a possible implementation, in response to the first process being a process running in the second computing node, the allocation module 102 is specifically configured to: when the first computing node and the second computing node are connected by a communication bus supporting memory semantics, allocate access memory in the memory based on the access request.

[0117] In a possible implementation, the access request indicates accessing a file stored in the first computing node, and / or the access request indicates transmitting data with a second process running on the processor.

[0117] In a possible implementation, in response to an access request indicating access to a file stored in a first computing node, the response module 103 is specifically configured to: read the file from a persistent storage medium into an access memory, perform the operation indicated by the access operation on the file stored in the access memory, and update the file stored in the persistent storage medium based on the operation result.

[0118] In a possible implementation, in response to an access request indicating data transfer with a second process running on a processor, the response module 103 is specifically configured to: when the access operation indicates receiving target data from the second process, instruct the second process to store the target data in the access memory, and provide the target data to the first process based on the access operation; when the access operation indicates transferring target data to the second process, store the target data in the access memory and provide the target data to the second process.

[0119] In a possible implementation, in response to the first process being a process running in a second computing node, the allocation module 102 is specifically configured to: configure the second process and establish a communication connection between the second process and the first process; provide a physical address to the first process through the second process.

[0120] In a possible implementation, the allocation module 102 is specifically configured to: after receiving a physical address and receiving an inquiry request sent by the first process, send the physical address to the first process.

[0121] In a possible implementation, the allocation module 102 is specifically configured to: configure the access permission of the first process to the access memory. Then, the response module 103 is specifically configured to: respond to the access operation when the access operation meets the access permission.

[0122] In a possible implementation, when the physical address of the access memory is provided to multiple processes, the first process has read-only permission to the access memory; when the physical address of the access memory is provided to one process, the first process has read-write permission to the access memory.

[0123] In a possible implementation, the access permission is indicated by the attribute information of the access request.

[0124] Here, for the detailed working processes of the interaction module 101, the allocation module 102, and the response module 103, please refer to the descriptions in the foregoing method embodiments. For example, the interaction module 101 adopts the implementation manner described in step 301 of the method to obtain the access request of the first process. The allocation module 102 adopts the implementation manners described in steps 302 and 304 of the method to allocate access memory in the memory based on the access request and provide the physical address of the access memory to the first process. The response module 103 adopts the implementation manner described in step 305 of the method to obtain the access operation of the first process on the access memory based on the physical address and respond to the access operation. The embodiments of the present application will not be described repeatedly herein.

[0125] In summary, in the data access device provided in the embodiments of the present application, the allocation module allocates access memory for the first process, and the first process accesses the access memory, so that the first process can obtain the data indicated by the access request through accessing the access memory, and convert various types of access requirements of the first process into access operations on the access memory. For example, various types of accesses that need to use storage protocol stacks, network protocol stacks, etc. to implement access are all converted into accesses to the memory. In this way, when the operating system of the first computing node responds to the access request, it does not need to execute corresponding software processing such as protocol stacks according to the specific access requirements of the first process, simplifies the process of the operating system responding to the access request of the first process, reduces the computing power overhead generated by responding to the access request, and helps to improve the efficiency of responding to the access request and the computing efficiency of the first computing node.

[0126] Those skilled in the art can clearly understand that for the convenience and brevity of description, the specific working processes of the foregoing described respective components can refer to the corresponding content in the foregoing method embodiments, and will not be elaborated herein.

[0127] Next, a basic hardware structure related to the embodiments of the present application will be exemplified.

[0128] The embodiments of the present application provide a computing device. This computing device is used to implement some or all of the functions in the data access method provided in the embodiments of the present application. Figure 11 It is a schematic structural diagram of a computing device provided in the embodiments of the present application. As Figure 11 shown, the computing device 1100 includes a processor 1101, a memory 1102, a communication port 1103, and a bus 1104. Among them, the processor 1101, the memory 1102, and the communication port 1103 are communicatively connected to each other through the bus 1104.

[0129] The processor 1101 may include a general-purpose processor and / or a dedicated hardware chip. The general-purpose processor may include: a central processing unit (CPU), a microprocessor, or a graphics processing unit (GPU). The CPU is, for example, a single-core processor or a multi-core processor. The dedicated hardware chip is a high-performance processing hardware module. The dedicated hardware chip includes at least one of a digital signal processor, an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or a network processor (NP). The processor 1101 may also be an integrated circuit chip with signal processing capabilities. In the implementation process, part or all of the functions of the data access method of this application may be completed by the integrated logic circuit in the hardware of the processor 1101 or instructions in software form.

[0130] The memory 1102 is used to store computer programs, which include an operating system 1102a and executable code (i.e., program instructions) 1102b. The memory 1102 is, for example, a read-only memory or other types of static storage devices that can store static information and instructions, or a random access memory or other types of dynamic storage devices that can store information and instructions, or an electrically erasable programmable read-only memory, a compact disc read-only memory, or other optical disc storage (including compact discs, laser discs, optical discs, digital versatile discs, Blu-ray discs, etc.), a magnetic disk storage medium, or other magnetic storage devices, or any other medium that can be used to carry or store the desired executable code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. For example, the memory 1102 is used to store the outbound port queue, etc. The memory 1102 is, for example, independent and connected to the processor 1101 through a bus 1104. Or the memory 1102 and the processor 1101 are integrated together. The memory 1102 can store executable code. When the executable code stored in the memory 1102 is executed by the processor 1101, the processor 1101 is used to execute part or all of the functions of the data access method provided in the embodiments of this application. For the implementation manner of the processor 1101 to execute this process, please refer to the relevant descriptions in the foregoing embodiments. The memory 1102 may also include other software modules and data required for other running processes such as an operating system.

[0131] Communication port 1103 uses a transceiver module such as, but not limited to, a transceiver to implement communication with other devices or communication networks. For example, communication port 1103 can be any one or any combination of the following devices: a network interface (such as an Ethernet interface), a wireless network card, or other devices with network access functions.

[0132] Bus 1104 is of any type and is used to implement the interconnection of internal devices of a computing device (for example, memory 1102, processor 1101, communication port 1103), such as a system bus. In the embodiments of the present application, the above-mentioned devices inside the computing device are interconnected through bus of the present application, optionally, the above-mentioned devices inside computing device 1100 can also communicate with each other using other connection methods in addition to bus 1104. For example, the above-mentioned devices inside computing device 1100 are interconnected through an internal logical interface.

[0133] It should be noted that the above-mentioned multiple devices can be separately arranged on independent chips, or at least partially or entirely arranged on the same chip. Whether to separately arrange each device on different chips or integrate them on one or more chips often depends on the needs of product design. The embodiments of the present application do not limit the specific implementation forms of the above-mentioned devices. And the descriptions of the processes corresponding to the above-mentioned respective drawings have different focuses. For parts not detailed in a certain process, reference can be made to the relevant descriptions of other processes.

[0134] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product providing the program development platform includes one or more computer instructions. When these computer program instructions are loaded and executed on a computing device, the functions of the data access method provided by the embodiments of the present application are implemented in whole or in part.

[0135] Moreover, the computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center in a wired manner (such as coaxial cable, optical fiber, digital subscriber line) or a wireless manner (such as infrared, wireless, microwave, etc.). The computer-readable storage medium stores the computer program instructions providing the program development platform.

[0136] Embodiments of the present application also provide a computing device cluster. The computing device cluster includes at least one computing device. The computing device can be a server, such as a central server, an edge server, or a local server in a local data center. In some embodiments, the computing device can also be a terminal device such as a desktop computer, a laptop computer, or a smart phone.

[0137] Optionally, for the structure of at least one computing device included in the computing device cluster, reference can be made to Figure 11 the computing device 1100 shown. Instructions for executing a data access method that are the same can be stored in the memory 1102 of one or more of the computing devices 1100 in the computing device cluster.

[0138] In some possible implementation manners, partial instructions for executing a data access method can also be stored separately in the memory 1102 of one or more of the computing devices 1100 in the computing device cluster. In other words, a combination of one or more of the computing devices 1100 can jointly execute the instructions for executing the data access method.

[0139] In some possible implementation manners, one or more of the computing devices in the computing device cluster can be connected through a network. Among them, the network can be a wide area network or a local area network, etc. Figure 12 A possible implementation manner is shown. As Figure 12 shown, two computing devices 1200A and 1200B are connected through a network. Specifically, they are connected to the network through communication ports in each computing device. In this type of possible implementation manner, the computing devices 1200A and 1200B include a bus 1202, a processor 1204, a memory 1206, and a communication port 1208. Instructions for executing the functions of a first computing node are stored in the memory 1206 of the computing device 1200A. At the same time, instructions for executing the functions of a second computing node are stored in the memory 1206 of the computing device 1200B.

[0140] It should be understood that Figure 12 the functions of the computing device 1200A shown in

[0141] can also be completed by multiple computing devices 1200. Similarly, the functions of the computing device 1200B can also be completed by multiple computing devices 1200. And the deployment manner of the module for implementing the data access method in the computing device can also be adjusted according to application requirements.

[0142] The embodiments of the present application also provide a computer program product containing instructions. When the computer program product runs on a computer, it enables the computer to implement the data access method provided by the embodiments of the present application. In one implementation, the computer program product is an operating system running in the processor of a computer device.

[0143] Those of ordinary skill in the art can understand that all or part of the steps to implement the above embodiments can be completed by hardware or by a program instructing relevant hardware. The described program can be stored in a computer-readable storage medium. The above-mentioned storage medium can be a read-only memory, a magnetic disk, an optical disk, or the like.

[0144] It should be noted that the information (including but not limited to user device information, user personal information, etc.), data (including but not limited to data for analysis, stored data, displayed data, etc.), and signals involved in the present application are all authorized by the user or fully authorized by all parties. The collection, use, and processing of relevant data need to comply with the relevant laws, regulations, and standards of relevant countries and regions. For example, the raw data and executable code involved in the present application are obtained under full authorization.

[0145] In the embodiments of the present application, the terms "first", "second", and "third" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance. The term "at least one" means one or more, and the term "multiple" means two or more, unless otherwise clearly defined.

[0146] The term "and / or" in the present application is merely a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the character " / " in this article generally represents an "or" relationship between the associated objects before and after.

[0147] The above are only optional embodiments of the present application and are not intended to limit the present application. Any modifications, equivalent replacements, improvements, etc. made within the concept and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A data access method, characterized in that, The method is applied to a processor of a first computing node, and the first computing node further includes a memory. The method includes: The processor obtains an access request of a first process, and the access request indicates an access process other than memory access; Based on the access request, the processor allocates access memory in the memory and provides a physical address of the access memory to the first process; The processor obtains an access operation of the first process on the access memory based on the physical address and responds to the access operation.

2. The method according to claim 1, wherein The first process is a process running on the processor, and / or the first process is a process running in a second computing node.

3. The method according to claim 2, wherein In response to the first process being a process running in a second computing node, the processor allocates access memory in the memory based on the access request, including: When the first computing node and the second computing node are connected by a communication bus supporting memory semantics, the processor allocates access memory in the memory based on the access request.

4. The method according to claim 2 or 3, characterized in that, The first computing node and the second computing node are connected by a communication bus supporting memory semantics. The processor responds to the access operation, including: The processor responds to the access operation based on the communication bus.

5. The method according to any one of claims 1 to 4, characterized in that The access request indicates accessing a file stored in the first computing node, and / or the access request indicates transmitting data to a second process running on the processor.

6. The method according to claim 5, wherein In response to the access request indicating accessing a file stored in the first computing node, the processor responds to the access operation, including: The processor reads the file from a persistent storage medium into the access memory, performs an operation indicated by the access operation on the file stored in the access memory, and updates the file stored in the persistent storage medium based on the operation result.

7. The method according to claim 5, wherein In response to the access request indicating transmitting data to a second process running on the processor, the processor responds to the access operation, including: When the access operation indicates receiving target data from the second process, the processor instructs the second process to store the target data in the access memory and provides the target data to the first process based on the access operation; When the access operation indicates transmitting target data to the second process, the processor stores the target data in the access memory and provides the target data to the second process.

8. The method according to any one of claims 1 to 7, characterized in that In response to the first process being a process running in a second computing node, before the processor provides the physical address of the access memory to the first process, the method further includes: The processor configures a second process and establishes a communication connection between the second process and the first process; The processor provides the physical address of the access memory to the first process, including: The processor provides the physical address to the first process through the second process.

9. The method according to claim 8, wherein The second process provides the physical address to the first process, including: After receiving the physical address and the inquiry request sent by the first process, the second process sends the physical address to the first process.

10. The method according to any one of claims 1 to 9, characterized in that, After the processor allocates access memory in the memory, the method further includes: The processor configures the access permission of the first process to the access memory; The processor responds to the access operation, including: When the access operation meets the access permission, the processor responds to the access operation.

11. The method according to claim 10, wherein When the physical address of the access memory is provided to multiple processes, the first process has read-only permission to the access memory; When the physical address of the access memory is provided to one process, the first process has read-write permission to the access memory.

12. The method according to claim 10, wherein The access permission is indicated by the attribute information of the access request.

13. A data access device, characterized in that, The device is applied to the processor of the first computing node, and the first computing node further includes a memory. The device includes: An interaction module, configured to obtain an access request of a first process, where the access request indicates an access process other than memory access; An allocation module, configured to allocate access memory in the memory based on the access request, and provide the physical address of the access memory to the first process; A response module, configured to obtain an access operation of the first process on the access memory based on the physical address, and respond to the access operation.

14. The device according to claim 13, characterized in that, The first process is a process running on the processor, and / or the first process is a process running in a second computing node.

15. The device according to claim 14, wherein, In response to the first process being a process running in a second computing node, the allocation module is specifically configured to: When the first computing node and the second computing node are connected by a communication bus supporting memory semantics, allocate access memory in the memory based on the access request.

16. The device according to claim 14 or 15, characterized in that, The first computing node and the second computing node are connected by a communication bus supporting memory semantics. The response module is specifically configured to: Respond to the access operation based on the communication bus.

17. The device according to any one of claims 13 to 16, characterized in that, The access request indicates accessing a file stored in the first computing node, and / or the access request indicates transmitting data with a second process running on the processor.

18. The device according to claim 17, characterized in that, In response to the access request indicating accessing a file stored in the first computing node, the response module is specifically configured to: Read the file from a persistent storage medium into the access memory, perform an operation indicated by the access operation on the file stored in the access memory, and update the file stored in the persistent storage medium based on the operation result.

19. The device according to claim 17, characterized in that, In response to the access request indicating transmitting data with a second process running on the processor, the response module is specifically configured to: When the access operation indicates receiving target data from the second process, instruct the second process to store the target data in the access memory, and provide the target data to the first process based on the access operation; When the access operation indicates transferring target data to the second process, store the target data in the access memory and provide the target data to the second process.

20. The device according to any one of claims 13 to 19, characterized in that, In response to the first process being a process running in the second computing node, the allocation module is specifically configured to: Configure the second process and establish a communication connection between the second process and the first process; Provide the physical address to the first process through the second process.

21. The device according to claim 20, characterized in that, The allocation module is specifically configured to: After receiving the physical address and receiving an inquiry request sent by the first process, send the physical address to the first process.

22. The device according to any one of claims 13 to 21, characterized in that The allocation module is specifically configured to: Configure the access permission of the first process to the access memory; The response module is specifically configured to: Respond to the access operation when the access operation meets the access permission.

23. The apparatus according to claim 22, wherein: When the physical address of the access memory is provided to multiple processes, the first process has read-only permission to the access memory; When the physical address of the access memory is provided to one process, the first process has read-write permission to the access memory.

24. The device according to claim 22, characterized in that The access permission is indicated by the attribute information of the access request.

25. A computing device, characterized in that, Comprising a processor and a memory, wherein program instructions are stored in the memory, and the processor runs the program instructions to enable the computing device to execute the method according to any one of claims 1 to 12.

26. A computer-readable storage medium, characterized in that, Comprising program instructions, when the program instructions run on a computing device, enabling the computing device to execute the method according to any one of claims 1 to 12.

27. A computer program product comprising instructions, characterized in that, When the instruction is run on a computer device, enabling the computer device to execute the method according to any one of claims 1 to 12.

28. The computer program product according to claim 27, wherein The computer program product is an operating system running in the processor of the computer device.

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