Data processing device and method, electronic equipment and computer readable storage medium

Abstract

The invention provides a data processing device and method, electronic equipment and a computer readable storage medium. The device comprises a plurality of requesters and a reading control module, the requester is configured to send a data reading instruction to the reading control module, and the data return modes of return data of each requester to the data reading instruction are the same or different; the reading control module is configured to arbitrate a plurality of requesters and receive a first instruction of a first requestor obtaining an arbitration right; a layer of instruction entries are distributed for the first instruction in the instruction entry container, and instruction basic information is stored; sending the first instruction to a storage module; setting a data ready mark of the first instruction to be valid according to data ready information of the first instruction sent by the storage module; and according to the data return mode of the first requester, obtaining return data of the first instruction from the storage module and sending the return data to the first requester. According to the embodiment of the invention, the flexibility and adaptability of the system can be improved.

Description

Technical Field

[0001] The present disclosure relates to the field of computer technologies, and particularly to a data processing apparatus and method, an electronic device, and a computer-readable storage medium. Background Art

[0002] In the design of current hardware systems (such as chip systems), a front-end module (such as a requestor) in the hardware system sends data read instructions and data write instructions to a back-end module (such as a memory or a cache) to request to read data from the back-end module or write data to the back-end module.

[0003] Among them, the tasks being executed by the hardware system may have multiple requestors sending requests. Each requestor can send K instruction groups, each instruction group includes N instructions, each instruction includes M sub-requests, and each sub-request is used to read a set of data. The requestor can ensure that multiple instructions within the same instruction group are surely not sent to the back-end module in an interleaved and continuous manner. For a data read instruction that requires data to be returned, when the back-end module returns the data, the data corresponding to the M sub-requests in one instruction must be returned together after being collected.

[0004] However, between instructions and between instruction groups, the requestor may have different requirements for the order of data return, that is, there are different data return types. For example, the instructions can be returned in a completely out-of-order manner, the instructions must be returned in a completely in-order manner, and between instruction groups, they can be returned in a completely out-of-order manner, but the N instructions within an instruction group must be returned in a completely in-order manner.

[0005] In the related art, for the case where multiple requestors correspond to different data return types, a set of hardware logics needs to be independently designed for each data return type, or even for each requestor, which greatly increases the design complexity and chip area. Summary of the Invention

[0006] The present disclosure provides a data processing apparatus and method, an electronic device, and a computer-readable storage medium.

[0007] In a first aspect, the present disclosure provides a data processing apparatus, which includes: a plurality of requestors and a read control module, and the read control module is respectively connected to the plurality of requestors and a storage module.

[0008] The requestor is configured to: send a data read instruction to the read control module, and the data return types of the return data of the data read instruction for each requestor are the same or different.

[0009] The read control module is configured to: arbitrate among a plurality of the requesters, and receive a first instruction of a first requester that obtains arbitration rights among the plurality of requesters; allocate a layer of instruction entries for the first instruction in an instruction entry container of the read control module, and store instruction basic information of the first instruction in the instruction entries, the instruction entry container includes multiple layers of instruction entries, each layer of the instruction entries has an instruction identifier, and the instruction basic information includes a requester identifier and a data ready flag; send the first instruction to the storage module; set the data ready flag of the first instruction to be valid according to the data ready information of the first instruction sent by the storage module; and obtain return data of the first instruction from the storage module according to the data return mode of the first requester and send the return data to the first requester.

[0010] In a second aspect, the present disclosure provides a data processing method, which is applied to a read control module of a data processing device. The data processing device further includes a plurality of requesters. The read control module is respectively connected to the plurality of requesters and a storage module. The requesters are configured to send data read instructions to the read control module, and data return modes of return data of data read instructions for each requester are the same or different.

[0011] The method includes: arbitrating among a plurality of the requesters, and receiving a first instruction of a first requester that obtains arbitration rights among the plurality of requesters; allocate a layer of instruction entries for the first instruction in an instruction entry container of the read control module, and store instruction basic information of the first instruction in the instruction entries, the instruction entry container includes multiple layers of instruction entries, each layer of the instruction entries has an instruction identifier, and the instruction basic information includes a requester identifier and a data ready flag; send the first instruction to the storage module; set the data ready flag of the first instruction to be valid according to the data ready information of the first instruction sent by the storage module; and obtain return data of the first instruction from the storage module according to the data return mode of the first requester and send the return data to the first requester.

[0012] In a third aspect, the present disclosure provides an electronic device, which includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein, the memory stores one or more computer programs executable by the at least one processor, and the one or more computer programs are executed by the at least one processor so that the at least one processor can execute the above-mentioned data processing method.

[0013] In a fourth aspect, the present disclosure provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the above-mentioned data processing method is implemented.

[0014] In the embodiments provided by the present disclosure, a read control module is provided between the requester and the storage module, which can obtain relevant information of the data read instruction sent by the requester through the read control module, and obtain the return data of the instruction from the storage module according to the data return mode of the requester corresponding to the instruction and send it to the corresponding first requester. Thus, through the same set of hardware logic, any configuration of the data return modes of all front-end requesters is supported, improving the flexibility and adaptability of the system; at the same time, the complexity of chip design can be reduced, and chip area can be saved.

[0015] It should be understood that the content described in this part is not intended to identify the key or important features of the embodiments of the present disclosure, nor is it used to limit the scope of the present disclosure. Other features of the present disclosure will become easily understood through the following description. Description of the Drawings

[0016] The drawings are used to provide a further understanding of the present disclosure, and constitute a part of the specification. They are used to explain the present disclosure together with the embodiments of the present disclosure, and do not constitute a limitation to the present disclosure. By describing the detailed exemplary embodiments with reference to the drawings, the above and other features and advantages will become more obvious to those skilled in the art. In the drawings:

[0017] Figure 1 It is a block diagram of a data processing device provided by an embodiment of the present disclosure;

[0018] Figure 2 It is a schematic diagram of the configuration of the read control module provided by an embodiment of the present disclosure;

[0019] Figure 3 It is a block diagram of a data processing device provided by an embodiment of the present disclosure;

[0020] Figure 4 It is a schematic diagram of information storage in a read control module provided by an embodiment of the present disclosure;

[0021] Figure 5 It is a schematic diagram of an instruction linked list in a read control module provided by an embodiment of the present disclosure;

[0022] Figure 6 It is a schematic diagram of an instruction linked list in a read control module provided by an embodiment of the present disclosure;

[0023] Figure 7 It is a block diagram of an electronic device provided by an embodiment of the present disclosure. Detailed Embodiments

[0024] To enable those skilled in the art to better understand the technical solutions of the present disclosure, the following describes exemplary embodiments of the present disclosure with reference to the accompanying drawings. Various details of the embodiments of the present disclosure are included to facilitate understanding, and they should be considered merely exemplary. Therefore, those of ordinary skill in the art should recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the present disclosure. Similarly, for the sake of clarity and conciseness, descriptions of well-known functions and structures are omitted in the following description.

[0025] Without conflict, the embodiments of the present disclosure and the features in the embodiments can be combined with each other.

[0026] As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0027] The terms used herein are only for describing specific embodiments and are not intended to limit the present disclosure. As used herein, the singular forms "a" and "the" are also intended to include the plural forms unless the context clearly indicates otherwise. It will also be understood that when the terms "comprising" and / or "consisting of" are used in this specification, it specifies the presence of the stated features, wholes, steps, operations, elements, and / or components, but does not preclude the presence or addition of one or more other features, wholes, steps, operations, elements, components, and / or their groups. "Connection" or "connected" and similar words are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect.

[0028] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art. It will also be understood that terms such as those defined in common dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted as having an idealized or overly formal meaning unless expressly so defined herein.

[0029] As mentioned above, there may be multiple requesters issuing requests for the tasks being executed by the hardware system. Each requester can issue K groups of instructions, each group of instructions includes N instructions, each instruction includes M sub-requests, and each sub-request is used to read a set of data. The requester can ensure that multiple instructions within the same group of instructions are not sent to the backend module continuously in an interleaved manner. When the backend module returns data, the data corresponding to the M sub-requests in one instruction must be returned together after being collected.

[0030] Among them, the number of sub-requests M for one instruction is generally a fixed value, such as 32; the number of instructions N and the number of instruction groups K in one instruction group are uncertain and vary according to the situation of the task. For example, N can take values such as 2, 4, 8, 16, etc., and K takes integer values from 2 to 10. The present disclosure does not limit the specific values of the number of sub-requests M, the number of instructions N, and the number of instruction groups K.

[0031] Between instructions and between instruction groups, the requester may have different requirements for the order of data return, that is, it includes different data return types. For example, instructions can be returned completely out of order, hereinafter referred to as the first mode; instructions must be returned completely in order, hereinafter referred to as the second mode; and instruction groups can be returned completely out of order, but the N instructions within an instruction group must be returned completely in order, hereinafter referred to as the third mode.

[0032] In the related art, for the case where multiple requesters correspond to different data return modes, it is necessary to independently design a set of hardware logics for each data return mode, or even for each requester, which greatly increases the design complexity and chip area. At the same time, with the diversified development of upper-layer tasks, the same requester may need to set different data return modes under different tasks, and the related art cannot support the arbitrary configuration of the data return modes of each requester in the hardware system.

[0033] According to the data processing device of the embodiment of the present disclosure, a read control module is provided between the requester and the storage module (that is, the cache, cache), which can obtain the relevant information of the data read instruction sent by the requester through the read control module, and obtain the return data of the instruction from the storage module according to the data return mode of the requester corresponding to the instruction and send it to the corresponding first requester, so as to support the arbitrary configuration of the data return modes of all requesters in the front end through the same set of hardware logics, improving the flexibility and adaptability of the system; at the same time, it can reduce the design complexity of the chip and save the chip area.

[0034] The data processing device according to the embodiment of the present disclosure can be any chip system itself, or a device or component in the chip system. The chip system can be, for example, a central processing unit (CPU), a graphics processing unit (GPU), a data processing unit (DPU), etc. The present disclosure does not limit the specific type of the chip system corresponding to the data processing device.

[0035] The data processing device according to the embodiments of the present disclosure can execute a target task, and the target task can be any type of task such as a data calculation task, a graphics rendering task, etc. After receiving the target task, the data processing device can determine multiple instruction groups of the target task in the front-end module (multiple requesters) of the device. Each instruction group includes multiple data reading instructions, and each data reading instruction includes multiple sub-requests to read data from the storage module at the back end for subsequent processing.

[0036] The present disclosure does not limit the specific type of the target task. Among them, the target task may also include an instruction group with a data writing instruction, and the solution of the present disclosure does not process such an instruction group.

[0037] Figure 1 It is a block diagram of a data processing device provided by the embodiments of the present disclosure. As Figure 1 shown, the data processing device according to the embodiments of the present disclosure includes multiple requesters ( Figure 1 requester 1, requester 2,..., requester P in , where P is an integer greater than 1) and a read control module. The read control module is respectively connected to the multiple requesters and the storage module at the back end (i.e., cache).

[0038] In some possible implementation manners, each requester has a globally unique requester identifier (requestor_id), and the data return mode of each requester can be arbitrarily configured in advance and cannot be changed during the execution of the target task. It needs to be configured after restarting (reset) the chip system after the target task ends.

[0039] In some possible implementation manners, the read control module of the embodiments of the present disclosure needs to interact frequently with the storage module (cache), so it can be an independent module in the chip system or a sub-module of the storage module. The present disclosure does not limit this.

[0040] In some possible implementation manners, each requester is configured to: send a data reading instruction to the read control module. The data reading instruction belongs to the instruction group of the target task. The data reading instruction includes multiple sub-requests, and the data return modes of the return data of each requester for the data reading instruction are the same or different.

[0041] Among them, the requester can ensure that multiple data read instructions within the same instruction group are surely not continuously sent to the read control module in an interleaved manner. A group end flag (group_end) can be carried on the interface between the requester and the read control module, which is used to indicate whether the current instruction group has been sent completely. When the group end flag is valid, it means that the current instruction group has been sent completely; when the group end flag is invalid, it means that the current instruction group has not been sent completely. Herein, 1 can represent valid, and 0 can represent invalid; alternatively, 0 can represent valid, and 1 can represent invalid. The present disclosure does not limit this.

[0042] In some possible implementation manners, the requester can ensure that the same data read instruction is surely not continuously sent to the read control module in an interleaved manner. Among them, if it only takes one clock cycle for all requesters to send 1 instruction on the interface, then there is no need for an end_of_instruction flag; if it takes multiple clock cycles to send 1 instruction on the interface, then an instruction end flag needs to be carried on the interface. When the instruction end flag is valid, it means that the current instruction has been sent completely; when the instruction end flag is invalid, it means that the current instruction has not been sent completely. The present disclosure does not limit this.

[0043] Figure 2 Schematic diagram of the read control module provided for the embodiments of the present disclosure. As Figure 2 shown, the read control module is configured to perform the following steps:

[0044] Step S21: Arbitrate among multiple requesters, and receive the first instruction of the first requester that obtains the arbitration right among the multiple requesters;

[0045] Step S22: Allocate a layer of instruction entries for the first instruction in the instruction entry container of the read control module, and store the basic instruction information of the first instruction in the instruction entries. The instruction entry container includes multiple layers of instruction entries, each layer of instruction entries has an instruction identifier, and the basic instruction information includes a requester identifier and a data ready flag;

[0046] Step S23: Send the first instruction to the storage module;

[0047] Step S24: Set the data ready flag of the first instruction to valid according to the data ready information of the first instruction sent by the storage module;

[0048] Step S25: Obtain the return data of the first instruction from the storage module according to the data return mode of the first requester, and send it to the first requester.

[0049] For example, the read control module may be provided with an arbiter that arbitrates among multiple requesters in step S21, switches the arbitration grant on a per-instruction granularity, so that multiple requesters take turns to obtain the arbitration grant. After arbitration, the read control module may receive a first instruction from a first requester that has obtained the arbitration grant among multiple requesters. In this way, the situation where the arbitration grant is always occupied by a certain requester can be reduced or avoided. The present disclosure does not limit the specific arbitration strategy of the arbiter.

[0050] In some possible implementation manners, the instructions received by the read control module are a sequence interleaved with instructions of multiple requesters. In the example, the multiple requesters include requester A and requester B, and the instruction sequence may be:

[0051] requestor A, group_id (group identifier) 0, instruction 0;

[0052] requestor B, group_id 1, instruction 0;

[0053] requestor A, group_id 0, instruction 1;

[0054] requestor B, group_id 1, instruction 1.

[0055] In some possible implementation manners, an instruction entry container (instruction_buffer) shared by multiple requesters is provided in the read control module. The instruction entry container includes Q-level instruction entries. Each level of instruction entries can store all relevant information of an instruction. Each level of instruction entries has an instruction identifier (instruction_id), that is, the entry identifier (entry id) of this instruction entry, which is used to uniquely identify an instruction. Among them, the instruction entries in the instruction entry container can be allocated and released out of order, and the allocation and release of instruction entries can be implemented in a manner in related technologies; and Q can take values such as 128, 256, etc., and the present disclosure does not limit this.

[0056] In step S22, the instruction ID allocation logic in the read control module can allocate a layer of instruction entries for the received first instruction in the instruction entry container, that is, select an instruction entry from the released instruction entries (the entry valid information is invalid), set its entry valid information to valid, and store the instruction basic information of the first instruction in the instruction entry. The instruction basic information includes the requester ID (the ID of the requester corresponding to the first instruction) and the data ready flag (instruction_data_all_ready_flag), and may also include the group ID (the ID of the instruction group corresponding to the first instruction), the entry valid information (entry valid, used to indicate whether the entry is valid), etc. Among them, the data ready flag is used to indicate whether the return data of multiple sub-requests of the instruction is all ready. If the data ready flag is valid, it means that the return data of multiple sub-requests of the corresponding instruction is all ready; if the data ready flag is valid, it means that the return data of multiple sub-requests of the corresponding instruction is not all ready. The initial value of this data ready flag is invalid.

[0057] In step S23, the read control module also sends the received first instruction to the storage module so that the storage module can obtain the return data requested by the first instruction.

[0058] Among them, the storage module is configured to: obtain the return data of multiple sub-requests of the first instruction; and send the data ready information of the first instruction to the read control module when the return data of multiple sub-requests of the first instruction is all ready.

[0059] That is to say, after receiving the first instruction, the storage module can obtain the return data of multiple sub-requests respectively according to the request addresses of multiple sub-requests of the first instruction; if the return data of multiple sub-requests of the first instruction is all ready, it sends the data ready information of the first instruction to the read control module so that the read control module can update the data ready flag of the first instruction.

[0060] In step S24, when the read control module receives the data ready information of the first instruction, it can set the data ready flag in the instruction entry of the first instruction to valid, thereby indicating that the return data of multiple sub-requests of the first instruction is all ready.

[0061] In step S25, the read control module can determine the data return mode of the first requester corresponding to the first instruction according to the requester ID of the first instruction; and then, according to the data return mode, based on the instruction pick logic of the read control module, obtain the return data of the first instruction from the storage module and send it to the first requester.

[0062] In some possible implementation manners, if the data return mode is the first mode, that is, the return data of different instructions is returned in disorder, the return data of the first instruction can be sent after the data ready flag of the first instruction becomes valid; if the data return mode is the second mode, that is, the return data of different instructions is returned in order, when the data ready flag of the first instruction becomes valid, it is also necessary to send the return data of the first instruction after sending the return data of the previous instruction of the first instruction.

[0063] In some possible implementation manners, if the data return mode is the third mode, that is, the return data of different instruction groups is returned in disorder, and the return data of different instructions in the same instruction group is returned in order, when the data ready flag of the first instruction becomes valid, it is necessary to send the return data of the entire instruction group in order after the return data of the instruction group to which the first instruction belongs is all ready.

[0064] In some possible implementation manners, according to the data return mode, the read control module can read the return data of the selected instruction or instruction group from the storage module, and after certain processing, for example, collecting the return data of multiple sub-requests of the instruction and arranging them in order on the interface signal; then, through the selector in the read control module, the return data is sent to the corresponding requester.

[0065] According to the data processing device of the embodiments of the present disclosure, a read control module is provided between the requester and the storage module, which can obtain the relevant information of the data read instruction sent by the requester through the read control module, and according to the data return mode of the requester corresponding to the instruction, obtain the return data of the instruction from the storage module and send it to the corresponding first requester, so as to support any configuration of the data return modes of all front-end requesters through the same set of hardware logic, improve the flexibility and adaptability of the system; at the same time, it can reduce the complexity of chip design and save chip area.

[0066] The data processing device according to the embodiments of the present disclosure will be described in detail below.

[0067] Figure 3 is a block diagram of a data processing device provided by an embodiment of the present disclosure. As Figure 3 shown, the data processing device includes a plurality of requesters (requester 1, requester 2,..., requester P, where P is an integer greater than 1) and a read control module, and the read control module is respectively connected to the plurality of requesters and the storage module.

[0068] In some possible implementation manners, the read control module includes an arbiter 31, a request path processor 32, a central controller 33, a return path processor 34, and a selector 35. An instruction entry container (instruction_buffer) 331, a group entry container (group_buffer) 332, and an instruction selection table (instructionpick table) 333 are provided in the central controller 33, and an instruction selection logic 334 is also provided.

[0069] The arbiter 31 is connected to multiple requesters, and is used for arbitrating among the multiple requesters, and receiving a first instruction of a first requester that obtains the arbitration right among the multiple requesters; the arbiter 31 switches the arbitration right in units of one instruction;

[0070] The request path processor 32 is connected to the central controller 33 and the storage module, and is used for respectively sending the received first instruction to the central controller 33 and the storage module;

[0071] The central controller 33 is connected to the storage module and the return path processor 34, and is used for allocating an instruction entry for the first instruction and storing basic instruction information of the first instruction according to a data return mode of a first requester corresponding to the received first instruction; updating a data ready flag of the instruction according to the data ready information of the storage module; determining an instruction or an instruction group for returning data this time according to the data return mode of the requester, and controlling the storage module and the return path processor to return the return data of the instruction or the instruction group;

[0072] The return path processor 34 is connected to the storage module and the selector 35, and is used for obtaining information of the instruction or the instruction group for returning data this time sent by the central controller and receiving the return data of the instruction or the instruction group sent by the storage module; and sending the return data to the selector;

[0073] The selector 35 is connected to multiple requesters, and is used for sending the return data to the corresponding requesters.

[0074] In some possible implementation manners, in step S21, the read control module arbitrates among multiple requesters through the arbiter 31, switches the arbitration right (grant) in units of one instruction, so that the multiple requesters take turns to obtain the arbitration right. After arbitration, the request path processor 32 of the read control module can receive a first instruction of a first requester that obtains the arbitration right among the multiple requesters, and respectively send the first instruction to the central controller 33 and the downstream storage module.

[0075] In some possible implementations, a Q-layer instruction entry container 331 is provided in the central controller 33. Each layer of instruction entries can store all relevant information of an instruction. Each layer of instruction entries has an instruction identifier (instruction_id), which is also the entry identifier (entry id) of the instruction entry and is used to uniquely identify an instruction.

[0076] After receiving the first instruction, the instruction identifier allocation logic (not shown) in the central controller 33 can allocate a layer of instruction entries in the instruction entry container for the received first instruction, that is, select an instruction entry from the released instruction entries (the entry valid information is invalid), set its entry valid information to valid, and store the basic instruction information of the first instruction in this instruction entry. The basic instruction information includes the requester identifier (the ID of the requester corresponding to the first instruction), the group identifier (the ID of the instruction group corresponding to the first instruction), and the data ready flag (instruction_data_all_ready_flag), and may also include the entry valid information and other information required for the first instruction when data is returned, which varies according to different data return modes.

[0077] In some possible implementations, after receiving the first instruction, the storage module can obtain the return data of multiple sub-requests of the first instruction according to the request addresses of the multiple sub-requests of the first instruction; if the return data of the multiple sub-requests of the first instruction is all ready, it sends the data ready information of the first instruction to the central controller 33.

[0078] In some possible implementations, when the central controller 33 receives the data ready information of the first instruction, it sets the data ready flag of the first instruction in the instruction entry to valid to indicate that the return data of the multiple sub-requests of the first instruction is all ready. The central controller 33 can determine the data return mode of the first requester corresponding to the first instruction according to the requester identifier of the first instruction; and then, according to the data return mode, based on the instruction pick logic 334 of the read control module, the return data is sent in combination with the return path processor 34 and the selector 35.

[0079] In some possible implementations, the data return mode includes a first mode, and the first mode is used to represent that the return data of different instructions is returned in disorder.

[0080] An instruction selection table is provided in the read control module, and a valid entry mask is set for each layer of instruction entries in the instruction selection table to represent whether the return data of the instructions of the requester in the first mode is ready.

[0081] For example, an instruction selection table (Instructionpick table) can be set in the central controller 33 of the read control module. Multiple masks are set in the instruction selection table, corresponding to different data return modes respectively, and representing the instructions and instruction groups that can return data in each data return mode, so that the instruction selection logic 334 of the central controller 33 can select the instruction or instruction group for each data return.

[0082] Figure 4 FIG. is a schematic diagram of information storage in a read control module provided by an embodiment of the present disclosure.

[0083] Such as Figure 4 As shown, each layer of instruction entries in the instruction entry container (instruction_buffer) is used to store the relevant information of an instruction. The instruction identifier (instruction_id) is the identifier of the instruction entry. The instruction entry stores the basic instruction information (instruction basic info) of the instruction and other information, including the next instruction identifier (next_instruction_id, used in the second and third modes), the global group identifier (global_group_id, used in the third mode), etc.

[0084] Such as Figure 4 As shown, the instruction selection table (instruction pick table) is provided with multiple masks, including a valid entry mask (valid_entry_mask, used in the first mode), a valid requester mask (valid_requestor_mask, used in the second mode), and a valid group mask (valid_group_mask, used in the third mode), corresponding to different data return modes respectively.

[0085] In some possible implementation manners, for the first mode in the data return mode, that is, the mode in which the return data of different instructions is returned in disorder, a valid entry mask (valid_entry_mask) is set for each layer of instruction entries in the instruction selection table, used to represent whether the return data of the instruction of the requester in the first mode is ready. The instruction entry container 331 includes Q layers of instruction entries, then the instruction selection table includes Q valid entry masks, that is, the valid entry mask has Q bit positions. The initial value of the valid entry mask is invalid, for example, 0.

[0086] In some possible implementation manners, the read control module is further configured to:

[0087] When the data ready flag of the instruction of the requester in the first mode is valid, set the valid entry mask corresponding to the instruction to valid;

[0088] In the case where the requester of the first mode selected this time returns data, a second instruction is selected from the instructions in the instruction selection table whose valid entry masks are valid.

[0089] Obtain the return data of the second instruction from the storage module and send it to the requester corresponding to the second instruction.

[0090] For example, for the instruction of the requester in the first mode, if the data ready flag of the instruction is valid, indicating that all the return data of the instruction is ready, the valid entry mask corresponding to the instruction entry of the instruction can be set to valid, for example, set to 1. At the same time, multiple bits of the valid entry mask may be valid. It should be noted that for the instructions of the requesters in the second mode and the third mode, when their data ready flags are valid, the values of the corresponding valid entry masks will not be updated, that is, the valid entry masks of the instructions of the requesters in the second mode and the third mode are always invalid.

[0091] In some possible implementation manners, when returning data each time, if there is ready data in multiple data return modes, that is, there are valid masks among the multiple masks corresponding to the modes, the central controller 33 will first select the data return mode for this time (which will be described later); if the requester of the first mode selected this time returns data, a second instruction is selected from the instructions in the instruction selection table whose valid entry masks are valid. If there is one instruction with a valid entry mask, it is directly used as the second instruction; if there are multiple instructions with valid entry masks, one can be randomly selected as the second instruction, or it can be selected by other means.

[0092] In some possible implementation manners, the central controller 33 may request the data of the second instruction from the storage module and send the relevant information of the second instruction to the return path processor 34; in response to the request of the central controller 33, the storage module sends the return data of all sub-requests of the second instruction to the return path processor 34; the return path processor 34 arranges the return data in order on the interface signal and sends the return data to the corresponding requester via the selector 35.

[0093] After the return data of the second instruction is sent, set the entry valid information of the instruction entry corresponding to the second instruction to invalid, release the instruction entry for allocation to subsequent instructions; and set the valid entry mask corresponding to the second instruction to invalid, thus completing the data return process for this time.

[0094] In this way, by setting the valid entry mask to be valid when the data ready flag of the requester instruction in the first mode is valid, the data return of the requester instruction in the first mode can be achieved without affecting the processing of other modes, thereby improving the flexibility and adaptability of data return.

[0095] In some possible implementation manners, the data return mode includes a second mode, and the second mode is used to represent that the return data of different instructions is returned in order. To support all requesters being configured in the second mode, a global previous instruction identifier may be set for each requester in the instruction entry container, the initial value of the previous instruction identifier is a null value or an invalid value, and a next instruction identifier of the instruction is also set in each layer of instruction entries, and the initial value of the next instruction identifier is the instruction identifier of the instruction in this layer.

[0096] Such as Figure 4 As shown, P global previous instruction identifiers are set in the instruction entry container, corresponding to P requesters respectively. Since the second mode is to return the return data of different instructions in order, the previous instruction identifier can be set to assist in establishing a one-way instruction linked list between instructions to determine the order between instructions. The previous instruction identifier is used to indicate the ID of the previous instruction in the instruction linked list, and the initial value of the previous instruction identifier is a null value or an invalid value, such as 0 or the ID of an instruction entry with invalid entry valid information.

[0097] Such as Figure 4 As shown, a next instruction identifier of the instruction is also set in each layer of instruction entries in the instruction entry container, which is used to indicate the ID of the next corresponding instruction of this instruction to establish an instruction linked list structure. The initial value of the next instruction identifier is the instruction identifier of the instruction entry itself, including after the data processing device restarts or the instruction entry is released and re-allocated for use.

[0098] For a valid instruction entry (with valid entry valid information), if the next instruction identifier in the instruction entry is equal to the instruction identifier of itself, it means that this instruction is the end (tail) of the current instruction linked list. And for an instruction with the data return mode being the first mode, the return data of different instructions is returned in disorder, and there is no need to determine the order between instructions, and the next instruction identifier in its instruction entry is always equal to the instruction identifier of itself.

[0099] In some possible implementation manners, after the reading control module allocates a layer of instruction entries for the first instruction in the instruction entry container, it is further configured to:

[0100] When the data return mode of the first requester corresponding to the first instruction is the second mode, determine the previous instruction identifier of the first requester;

[0101] In the case where the previous instruction identifier is a null value or an invalid value, modify the previous instruction identifier to the first instruction identifier of the first instruction;

[0102] In the case where the previous instruction identifier is a valid value, set the subsequent instruction identifier in the instruction entry of the third instruction corresponding to the previous instruction identifier to the first instruction identifier; and modify the previous instruction identifier to the first instruction identifier.

[0103] For example, in step S22, the instruction identifier allocation logic (instruction_id allocate logic) in the read control module allocates a layer of instruction entries for the newly received first instruction in the instruction entry container, and stores the basic instruction information of the first instruction in the instruction entry. The first instruction identifier of the first instruction is the entry identifier of the instruction entry.

[0104] After step S22, if the data return mode of the first requester corresponding to the first instruction is the second mode, it is possible to read whether the current previous instruction identifier of the first requester is valid from the instruction entry container; if the current previous instruction identifier is a null value or an invalid value, it indicates that the first requester currently has no instruction with unreturned data, and the previous instruction identifier can be modified to the first instruction identifier, that is, the first instruction is used as the previous instruction of the next received instruction. The subsequent instruction identifier in the instruction entry of the first instruction remains the initial value, that is, its own first instruction identifier.

[0105] In some possible implementation manners, if the current previous instruction identifier is a valid value, it indicates that the first requester currently has an instruction with unreturned data. In this case, the subsequent instruction identifier in the instruction entry of the third instruction corresponding to the previous instruction identifier can be set to the first instruction identifier to indicate that the first instruction is the subsequent instruction of the third instruction. And, modify the previous instruction identifier to the first instruction identifier, that is, use the first instruction as the previous instruction of the next received instruction, so as to implement the establishment process of the instruction linked list.

[0106] In this way, it is possible to establish an instruction linked list for the requester in the second mode to determine the sequence between instructions, so as to achieve the ordered return of the returned data of different instructions in the second mode in subsequent processing and meet the data return requirements of the second mode. This processing method is implemented by a small amount of storage space in cooperation with the instruction identifier allocation logic, reducing the complexity of the processing.

[0107] In some possible implementation manners, a global header instruction identifier is also set for each requester in the instruction entry container, which is used to represent the instruction with the longest waiting time in each requester;

[0108] The read control module is provided with an instruction selection table, and in the instruction selection table, a valid requester mask is set for each requester, which is used to indicate whether the instruction with the longest waiting time in the requesters of the second mode is ready.

[0109] That is to say, for the second mode, the read control module also sets a global header instruction identifier for each requester in the instruction entry container, which is used to indicate the ID of the instruction with the longest waiting time that has not yet actually returned the instruction's return data to the upstream requester in each requester. As Figure 4 shown, P global header instruction identifiers are set, corresponding to P requesters respectively.

[0110] Moreover, for the second mode, a valid requester mask is set for each requester in the instruction selection table, as Figure 4 shown, P valid requester masks are set, that is, the valid requester mask has P bit positions, corresponding to P requesters respectively. The initial value of the valid requester mask is invalid.

[0111] In some possible implementation manners, the read control module is further configured to:

[0112] When the data ready flag of the instruction corresponding to the header instruction identifier of any requester in the second mode is valid, set the valid requester mask corresponding to this requester to be valid;

[0113] When the requester in the second mode is selected to return data this time, select a second requester from the requesters in the instruction selection table whose valid requester masks are valid;

[0114] Obtain the return data of the fourth instruction corresponding to the header instruction identifier of the second requester from the storage module, and send it to the second requester;

[0115] Modify the header instruction identifier of the second requester to the identifier of the instruction after the fourth instruction.

[0116] For example, for any requester in the second mode, if the data ready flag of the instruction corresponding to the header instruction identifier of this requester in the instruction entry container is valid, it indicates that the return data of multiple sub-requests of the instruction with the longest waiting time are all ready, then set the valid requester mask corresponding to this requester to be valid, indicating that the return data of the instruction corresponding to the part instruction identifier can be sent. It should be noted that only the valid requester masks of the requesters in the second mode may be valid, and the valid requester masks of the requesters in the first mode and the third mode are always invalid.

[0117] When returning data each time, similarly, if there is ready data in multiple data return modes, that is, there is a valid mask among multiple masks corresponding to the modes, the central controller 33 will first select the data return mode for this time; if the requester that selects the second mode this time returns data, then a second requester is selected from the instruction selection table from the requesters for which the valid requester mask is valid. If there is only one requester for which the valid requester mask is valid, it is directly used as the second requester; if there are multiple requesters for which the valid requester mask is valid, one can be randomly selected as the second requester, or it can be selected by other means.

[0118] In some possible implementation manners, the central controller 33 may request the storage module to return the data of the fourth instruction corresponding to the header instruction identifier of the second requester, and send the relevant information of the fourth instruction to the return path processor 34; in response to the request of the central controller 33, the storage module sends the return data of all sub-requests of the fourth instruction to the return path processor 34; the return path processor 34 arranges the return data on the interface signal in sequence, and sends the return data to the corresponding requester via the selector 35.

[0119] In some possible implementation manners, after the return data of the fourth instruction is sent, the header instruction identifier of the second requester is modified to the next instruction identifier in the instruction entry of the fourth instruction, that is, the next instruction of the fourth instruction is used as the instruction with the longest waiting time in the second requester.

[0120] In some possible implementation manners, the entry valid information corresponding to the fourth instruction is set to invalid, and the instruction entry is released for subsequent instruction allocation; and, the valid requester mask corresponding to the second requester is set to invalid, thereby completing the data return process for this time.

[0121] In this way, by setting a valid requester mask for each requester and setting the corresponding valid requester mask to valid when the data ready flag of the instruction with the longest waiting time of the requester in the second mode is valid, it can quickly identify whether the return data of the instruction of the requester in the second mode can be returned, so as to realize the ordered return of the return data of different instructions of the requester in the second mode without affecting the processing of other modes, and improve the flexibility of data return and the adaptability to various data return modes.

[0122] In some possible implementation manners, the data return mode includes a third mode, and the third mode is used to represent that the return data of different instruction groups is returned in disorder, and the return data of different instructions in the same instruction group is returned in order;

[0123] The reading control module further includes a group entry container, which includes multiple layers of group entries. Each layer of group entries is used to store group basic information, and the group basic information includes a header instruction identifier and the number of instructions. Each layer of group entries has a global group identifier;

[0124] Each layer of instruction entries is also provided with a global group identifier of the instruction;

[0125] The group entry container also sets a global previous group end bit and a previous global group identifier for each requester. The previous group end bit is used to indicate whether the group end flag of the previous instruction of the requester is valid, and the initial value is valid; the previous global group identifier is used to indicate the global group identifier corresponding to the previous instruction of the requester.

[0126] For example, in the third mode, the return data of different instruction groups is returned in disorder, and the return data of different instructions in the same instruction group is returned in order. For the third mode, a group entry container can be set in the reading control module, which includes G layers of group entries. Each layer of group entries is used to store group basic information, and the entry identifier of each layer of group entries is the global group identifier. G can take values such as 32 and 64, and the present disclosure does not limit the specific number of layers G of the group entries.

[0127] As Figure 4 shown, the group basic information of each layer of group entries includes a header instruction identifier (head_instruction_id) and the number of instructions (instruction_cnt), and may also include entry valid information, etc. The header instruction identifier is used to indicate the ID of the first instruction of the instruction group; the number of instructions is used to indicate the number of instructions in the instruction group that have not yet returned data to the upstream requester, and the initial value is 0. Among them, the value range of the number of instructions needs to consider the maximum number of instructions in one instruction group (such as 64) and the number of instructions that can be stored in the instruction entry container. Those skilled in the art can set the value range of the number of instructions according to the actual situation, and the present disclosure does not limit this.

[0128] As Figure 4 shown, for the third mode, each layer of instruction entries in the instruction entry container is also provided with a global group identifier of the instruction, corresponding to the global group identifier in the group entries.

[0129] As Figure 4As shown, for the third mode, a global previous group end bit (last_instruction_is_group_end) and a previous global group identifier (last_global_group_id) are also set for each requester in the group entry container. The previous group end bit is used to indicate whether the group end flag (end_group) of the previous instruction of the requester is valid, and the initial value is valid; the previous global group identifier is used to indicate the global group identifier corresponding to the previous instruction of the requester, and the initial value is a null value or an invalid value.

[0130] In actual processing, each instruction will have a group end flag (end_group). If the group end flag of an instruction is invalid, it indicates that the instruction is not the last instruction of the instruction group to which it belongs; conversely, if the group end flag of an instruction is valid, it indicates that the instruction is the last instruction of the instruction group to which it belongs. If the group end flag in the newly received instruction is valid, the previous group end bit of the corresponding requester in the group entry container is set to valid.

[0131] In some possible implementation manners, after the read control module allocates a layer of instruction entries for the first instruction in the instruction entry container, it is further configured to:

[0132] When the data return mode of the first requester corresponding to the first instruction is the third mode, determine the previous group end bit of the first requester;

[0133] When the previous group end bit of the first requester is valid, allocate a layer of group entries for the first instruction group corresponding to the first instruction in the group entry container, store the group basic information of the first instruction group in the group entry, and set the global group identifier of the first instruction in the instruction entry to the first global group identifier of the group entry; wherein, the header instruction identifier of the group basic information is the instruction identifier of the first instruction, and the value of the instruction quantity is set to 1;

[0134] Modify the previous group end bit of the first requester in the group entry container to invalid, and modify the previous global group identifier to the first global group identifier.

[0135] For example, in step S22, the instruction identifier allocation logic in the read control module allocates a layer of instruction entries for the newly received first instruction in the instruction entry container and stores the instruction basic information of the first instruction in the instruction entry.

[0136] After step S22, if the data return mode of the first requester corresponding to the first instruction is the third mode, determine whether the end bit of the previous group of the first requester is valid from the group entry container by reading the group ID allocation logic in the read control module; if the end bit of the previous group is valid, it indicates that all instructions in the instruction group before the first instruction have been received. In this case, allocate a layer of group entries for the first instruction group corresponding to the first instruction in the group entry container, that is, select a group entry from the released group entries (the entry valid information is invalid), set its entry valid information to valid, and store the group basic information of the first instruction group in this group entry. And, set the global group ID in the instruction entry of the first instruction to the first global group ID of this group entry.

[0137] In some possible implementation manners, the group basic information includes a head instruction identifier and the number of instructions. Since the first instruction is the first instruction of this instruction group, the head instruction identifier is set to the instruction identifier of the first instruction; the initial value of the number of instructions is 0, and currently one instruction has been received, so the number of instructions is incremented by 1, making the value of the number of instructions 1.

[0138] In some possible implementation manners, after allocating a layer of group entries for the first instruction group, the end bit of the previous group of the first requester in the group entry container can be modified to invalid, indicating that the instructions in the first instruction group have not been completely received and need to continue to be received; and, modify the previous global group ID of the first requester in the group entry container to the first global group ID, indicating that the first global group ID is the global group ID corresponding to the previous instruction of the new instruction next received by this requester.

[0139] In this way, the recording of the new instruction group in the third mode can be realized, so as to realize the ordered return of the returned data of the instructions within the instruction group subsequently, thereby improving the compatibility and adaptability of the system.

[0140] In some possible implementation manners, the read control module is further configured to:

[0141] When the end bit of the previous group of the first requester is invalid, set the global group ID of the first instruction to the second global group ID corresponding to the previous global group ID in the group entry container;

[0142] Increment the value of the number of instructions in the group entry corresponding to the second global group ID by 1;

[0143] When the group end flag of the first instruction is valid, modify the end bit of the previous group of the first requester to valid.

[0144] For example, after step S22, if the data return mode of the first requester corresponding to the first instruction is the third mode, determine whether the previous group end bit of the first requester is valid in the group entry container; if the previous group end bit is invalid, it indicates that the instructions in the instruction group before the first instruction have not been completely received, and the second global group identifier corresponding to the previous global group identifier in the group entry container is the global group identifier of the instruction group to which the first instruction belongs.

[0145] In this case, there is no need to allocate a new group entry, and the global group identifier of the first instruction can be directly set to this second global group identifier; moreover, increment the value of the number of instructions in the group entry corresponding to this second global group identifier by 1, indicating that the number of instructions in this instruction group that have not yet returned data to the upstream requester is incremented by 1.

[0146] In some possible implementation manners, if the group end flag of the first instruction is invalid, it indicates that the first instruction is not the last instruction in the instruction group to which it belongs, and no operation is performed or the previous group end bit of the first requester is updated to invalid; if the group end flag of the first instruction is valid, it indicates that the first instruction is the last instruction in the instruction group to which it belongs, and the previous group end bit of the first requester needs to be modified to valid, indicating that all the instructions in this instruction group have been received. In this way, the new instructions received subsequently are instructions of a new instruction group, and a new group entry can be allocated.

[0147] In this way, it is possible to record the new instructions in the received instruction group in the third mode, so as to subsequently implement the ordered return of the data returned by the instructions in the instruction group, thereby improving the compatibility and adaptability of the system.

[0148] In some possible implementation manners, a global previous instruction identifier is set for each requester in the instruction entry container, and the initial value of the previous instruction identifier is a null value or an invalid value.

[0149] A next instruction identifier of the instruction is also set in each layer of instruction entries, and the initial value of the next instruction identifier is the instruction identifier of the instruction in this layer.

[0150] As Figure 4 shown, P global previous instruction identifiers are set in the instruction entry container, corresponding to P requesters respectively. The third mode is to return the data of different instructions in the same instruction group in an ordered manner. Therefore, similar to the second mode, the previous instruction identifier can be set to assist in establishing a one-way instruction linked list between instructions, so as to determine the sequence between instructions. The previous instruction identifier is used to indicate the ID of the previous instruction in the same instruction group (certainly the same requester) of this instruction linked list. The initial value of the previous instruction identifier is a null value or an invalid value, such as 0 or the ID of an instruction entry with the entry valid being invalid.

[0151] AsFigure 4 As shown, in each instruction entry of the instruction entry container, there is also a next instruction identifier of the instruction, which is used to indicate the ID of the next corresponding instruction in the same instruction group (which must be the same requester) of this instruction, so as to establish an instruction linked list structure. The initial value of the next instruction identifier is the instruction identifier of the instruction entry itself, including when the data processing device restarts or the instruction entry is reallocated after being released. For a valid instruction entry (the entry valid information is valid), if the next instruction identifier in this instruction entry is equal to the instruction identifier of itself, it means that this instruction is the end (tail) of the current instruction linked list.

[0152] In some possible implementation manners, the read control module is further configured to:

[0153] When the global group identifier of the first instruction is the existing second global group identifier, set the next instruction identifier in the instruction entry of the fifth instruction corresponding to the previous instruction identifier of the first requester to the first instruction identifier of the first instruction;

[0154] Modify the previous instruction identifier to the first instruction identifier.

[0155] For example, if the data return mode of the first requester corresponding to the first instruction is the third mode, and the global group identifier of the first instruction is the existing second global group identifier, it indicates that the first instruction is the next instruction of the fifth instruction corresponding to the previous instruction identifier of the first requester currently, and belongs to the same instruction group as the fifth instruction. The next instruction identifier in the instruction entry of the fifth instruction can be set to the first instruction identifier of the first instruction to indicate that the first instruction is the next instruction of the fifth instruction.

[0156] And, modify the previous instruction identifier of the first requester to the first instruction identifier, that is, use the first instruction as the previous instruction of the next received instruction, so as to implement the establishment process of the instruction linked list.

[0157] In some possible implementation manners, if the global group identifier of the first instruction is the new first global group identifier, it indicates that the first instruction is the first instruction of the new first instruction group. There is no need to update the next instruction identifier in the instruction entry of the fifth instruction, and only the previous instruction identifier of the first requester needs to be modified to the first instruction identifier of the first instruction, so as to establish an instruction linked list when a new instruction of the first instruction group is received subsequently.

[0158] In this way, an instruction linked list for the requester in the third mode can be established to determine the order of instructions, so as to achieve the ordered return of the return data of different instructions in the same instruction group in the third mode in subsequent processing and meet the data return requirements of the third mode. This processing method is implemented by a small amount of storage space in cooperation with the instruction identifier allocation logic, reducing the complexity of processing.

[0159] In some possible implementation manners, an instruction selection table is set in the read control module, and a valid group mask is set for each instruction group in the instruction selection table, which is used to indicate whether the return data of all instructions in the instruction group in the third mode is ready.

[0160] That is to say, for the third mode, a valid group mask is set for each instruction group in the instruction selection table. As Figure 4 shown, G valid group masks are set, that is, the valid group mask has G bit positions, which respectively correspond to G layers of group entries in the group entry container. The initial value of the valid group mask is invalid.

[0161] In some possible implementation manners, after the read control module sets the data ready flag of the first instruction to be valid, it is further configured to:

[0162] Decrease the value of the number of instructions in the group entry corresponding to the global group identifier of the first instruction by 1;

[0163] When the value of the number of instructions in the group entry corresponding to the global group identifier of the first instruction is 0, set the valid group mask corresponding to the global group identifier of the first instruction to be valid;

[0164] When the requester in the third mode selected this time returns data, select a second instruction group from the instruction groups in the instruction selection table whose valid group masks are valid;

[0165] Obtain the return data of the second instruction group from the storage module and send it to the requester corresponding to the second instruction group.

[0166] For example, if the data ready flag of the first instruction is valid, it means that all the return data of the first instruction is ready; when the first instruction is an instruction of the requester in the third mode, the group entry corresponding to the global group identifier of the first instruction can be determined, and the value of the number of instructions in the group entry is decreased by 1.

[0167] In some possible implementation manners, when the value of the number of instructions in the group entry corresponding to the global group identifier of the first instruction is 0, it indicates that all the return data of all instructions in the first instruction group to which the first instruction belongs is ready; in this case, the valid group mask corresponding to the global group identifier of the first instruction can be set to be valid, indicating that the return data of this instruction group can be sent.

[0168] Similarly, each time data is returned, if there is prepared data in multiple data return modes, that is, there is a valid mask among multiple masks corresponding to the modes, the central controller 33 will first select the data return mode for this time; if the requester that selects the third mode returns data this time, then the second instruction group is selected from the instruction selection table from the instruction groups with valid group masks being valid. If there is only one instruction group with a valid group mask being valid, it is directly used as the second instruction group; if there are multiple instruction groups with valid group masks being valid, one can be randomly selected as the second instruction group, or it can be selected by other means.

[0169] In some possible implementation manners, the central controller 33 may request the storage module to return the data of the sixth instruction corresponding to the header instruction identifier of the second instruction group, and send the relevant information of the sixth instruction to the return path processor 34; in response to the request of the central controller 33, the storage module sends the return data of all sub-requests of the sixth instruction to the return path processor 34; the return path processor 34 arranges the return data in order on the interface signal and sends the return data to the corresponding requester via the selector 35.

[0170] In some possible implementation manners, after the return data of the sixth instruction is sent, according to the next instruction identifier in the instruction entry of the sixth instruction, the storage module is requested to return the data of the seventh instruction corresponding to the next instruction identifier, and it is sent to the corresponding requester in the above manner; and so on, until the instruction with the next instruction identifier being itself, that is, the last instruction of the second instruction group, is sent, so as to realize the in-order return of the return data of all instructions within the entire second instruction group.

[0171] In some possible implementation manners, the entry valid information of the group entry of the second instruction group is set to invalid, and the entry valid information of the instruction entries of all instructions of the second instruction group is set to invalid, so as to realize the release of the group entry and the instruction entry; and, the valid group mask corresponding to the group entry of the second instruction group is set to invalid, thereby completing the entire group data return process for this time.

[0172] In this way, by setting a valid group mask for each instruction group and setting the corresponding valid group mask to valid when the return data of all instructions in the instruction group in the third mode are all ready, it can be quickly identified whether the return data of all instructions in the instruction group in the third mode can be returned, so as to realize the in-order return of the return data of all instructions within the same instruction group in the third mode without affecting the processing of other modes, and improve the flexibility of data return and the adaptability to various data return modes.

[0173] The above respectively describes the processing manners of the requester for the data return modes of the instructions in the first mode, the second mode, and the third mode.

[0174] In addition, multiple masks are set in the instruction selection table of the read control module, including a valid entry mask set for each layer of instruction entries, a valid requester mask set for each requester, and a valid group mask set for each instruction group; the valid entry mask is used to indicate whether the instruction of the requester of the first mode is ready, the valid requester mask is used to indicate whether the instruction with the longest waiting time in the requester of the second mode is ready, and the valid group mask is used to indicate whether the return data of all instructions in the instruction group of the third mode is ready.

[0175] These masks are used to represent information on whether the instructions or instruction groups to return data are ready in the first mode, the second mode, and the third mode.

[0176] Each time data is returned, the central controller of the read control module needs to determine which requester's instruction or instruction group is returned. In this case, the read control module is also configured to:

[0177] If at least two of the valid entry masks, valid requester masks, and valid group masks in the instruction selection table have valid values, select a target mode for the currently returned data from the first mode, the second mode, and the third mode;

[0178] According to the value of the mask corresponding to the target mode, the instruction or instruction group for returning data this time is selected.

[0179] For example, after the previous return data is sent, the read control module needs to determine the instruction or instruction group sent this time through the instruction selection table; among the valid entry mask, valid requester mask and valid group mask of the instruction selection table, if only one mask has a valid value, the data return mode corresponding to this mask can be directly determined as the target mode

[0180] In some possible implementations, among the valid entry mask, valid requester mask and valid group mask of the instruction selection table, if at least two masks have valid values, the target mode of the returned data can be selected from the first mode, the second mode and the third mode first. The selection method can be random selection, or different modes can be selected in turn. The present disclosure does not impose any restrictions on this.

[0181] In some possible implementations, after determining the target mode, if there is only one valid mask corresponding to the target mode, the instruction or instruction group as the data returned this time is directly selected; if there are multiple valid masks corresponding to the target mode, the instruction or instruction group as the data returned this time can be randomly selected or selected by other means.

[0182] In this way, it is possible to first select a data return mode and then determine the instruction or instruction group of the data to be returned this time, so that the read control module can alternately return the return data of the requesters in different data return modes, avoiding always returning the data of a requester in a certain data return mode, thereby improving the efficiency of instruction data return.

[0183] The following shows an example of establishing an instruction linked list in the read control module provided by the embodiments of the present disclosure.

[0184] Suppose there are two requesters in the processing system, namely requester A and requester B; the arbiter of the read control module arbitrates between requester A and requester B, receives the instructions of the requester that obtains the arbitration right, and assigns a layer of instruction entries to each instruction. Instructions in the third mode may also be assigned group entries, thus obtaining the following instruction sequence (instruction pattern):

[0185] Instruction 0: instruction_id (instruction identifier) = 0, requestor_id (requester identifier) = A, group_end (group end flag) = 1; ----> global_group_id (global group identifier) = 0;

[0186] Instruction 1: instruction_id = 1, requestor_id = B, group_end = 0; ----> global_group_id = 1;

[0187] Instruction 2: instruction_id = 2, requestor_id = B, group_end = 1; ----> global_group_id = 1;

[0188] Instruction 3: instruction_id = 3, requestor_id = A, group_end = 0; ----> global_group_id = 2;

[0189] Instruction 4: instruction_id = 4, requestor_id = B, group_end = 1; ----> global_group_id = 3;

[0190] Instruction 5: instruction_id = 5, requestor_id = A, group_end = 0; ----> global_group_id = 2;

[0191] Instruction 6: instruction_id = 6, requestor_id = B, group_end = 1; ----> global_group_id = 4;

[0192] Instruction 7: instruction_id = 7, requestor_id = A, group_end = 1; ----> global_group_id = 2.

[0193] In the example, if the data return modes of both requestor A and requestor B are configured as the first mode, then the next instruction identifier (next_instruction_id) of the instruction in each layer of instruction entries in the instruction entry container is equal to its own instruction identifier.

[0194] Figure 5 and Figure 6 This is a schematic diagram of the instruction linked list in the read control module provided by the embodiment of the present disclosure.

[0195] In the example, if the data return modes of both requestor A and requestor B are configured as the second mode, then the instruction linked list established by the next instruction identifier (next_instruction_id) of the instruction in each layer of instruction entries in the instruction entry container is as Figure 5 shown. It can be seen that the instruction linked lists of requestor A and requestor B are obtained respectively.

[0196] In the example, in the instruction linked list of requestor A, when instruction 0 is received, the initial value of the next instruction identifier of instruction 0 is its own instruction identifier, and the global previous instruction identifier (not shown) is a null value or an invalid value, which needs to be updated to instruction_id = 0; when instruction 3 of requestor A is received, instruction 0 is found according to the current previous instruction identifier (instruction_id = 0), the next instruction identifier of instruction 0 is modified to instruction_id = 3, and the previous instruction identifier is updated to instruction_id = 3; and so on, the instruction linked list of instruction 0 - instruction 3 - instruction 5 - instruction 7 can be obtained.

[0197] In the example, the establishment process of the instruction linked list of requestor B is similar, and the instruction linked list of instruction 1 - instruction 2 - instruction 4 - instruction 6 can be obtained.

[0198] In the example, if the data return modes of requester A and requester B are both configured to the third mode, then according to whether the sub-end flag group_end is valid, a global group identifier is assigned to each instruction group in the group entries of the group entry container, and the global group identifier of the instruction is also recorded in the instruction entry. Instructions with the same global group identifier can establish an instruction linked list through the next instruction identifier (next_instruction_id) of the instruction, as Figure 6 shown. It can be seen that the instruction linked lists of instruction group 0 (global_group_id = 0) to instruction group 4 (global_group_id = 4) are obtained respectively.

[0199] In the example, for instruction group 0, there is only instruction 0, and the next instruction identifier of instruction 0 is the instruction identifier of itself; for instruction group 1, when instruction 1 of instruction group 1 is received, the initial value of the next instruction identifier of instruction 1 is the instruction identifier of itself, and the global previous instruction identifier (not shown) is a null value or an invalid value, and it needs to be updated to instruction_id = 1; when instruction 2 of instruction group 1 is received, according to the current previous instruction identifier (instruction_id = 1), instruction 1 is found, the next instruction identifier of instruction 1 is modified to instruction_id = 2, and the previous instruction identifier is updated to instruction_id = 2. In this way, the instruction linked list of instruction 1 - instruction 2 can be obtained.

[0200] In the example, similarly, the instruction linked list of instruction group 2 can be obtained: instruction 3 - instruction 5 - instruction 7; the instruction linked list of instruction group 3: instruction 4; the instruction linked list of instruction group 4: instruction 6.

[0201] Through the above processing method, it is possible to establish an instruction linked list for the requester in the second mode and an instruction linked list for the instruction group in the third mode respectively, so as to determine the order between instructions, so as to achieve the ordered return of the return data of different instructions in the second mode and the ordered return of the return data of different instructions in the same instruction group in the third mode in subsequent processing, meeting the data return requirements of the second mode and the third mode. This processing method is realized through a small amount of storage space in cooperation with the instruction identifier allocation logic, reducing the complexity of processing.

[0202] According to the data processing device of the embodiments of the present disclosure, a read control module is provided between the requester and the storage module, which can obtain the relevant information of the data read instruction sent by the requester through the read control module, and obtain the return data of the instruction from the storage module and send it to the corresponding first requester according to the data return mode of the requester corresponding to the instruction, so as to support any configuration of the data return modes of all front-end requesters through the same set of hardware logic, improving the flexibility and adaptability of the system; at the same time, it can reduce the complexity of chip design and save chip area.

[0203] It can be understood that the configuration steps of the above-mentioned devices mentioned in the present disclosure can be combined with each other to form combined embodiments without violating the principle logic. Due to space limitations, the present disclosure will not elaborate further. Those skilled in the art can understand that in the above-mentioned device in the specific implementation manner, the specific execution order of each configuration step should be determined according to its function and possible internal logic.

[0204] According to an embodiment of the present disclosure, a data processing method is further provided. This method is applied to the read control module of the data processing device. The data processing device further includes a plurality of requesters, and the read control module is respectively connected to the plurality of requesters and the storage module.

[0205] The requester is used to send a data read instruction to the read control module. The data read instruction belongs to the instruction set of the target task. The data read instruction includes a plurality of sub-requests, and the data return modes of the return data of the data read instruction for each requester are the same or different.

[0206] The method includes: arbitrating among the plurality of requesters, and receiving a first instruction of the first requester that obtains the arbitration right among the plurality of requesters; allocating a layer of instruction entries for the first instruction in the instruction entry container of the read control module, and storing the basic instruction information of the first instruction in the instruction entry. The instruction entry container includes multiple layers of instruction entries, each layer of the instruction entry has an instruction identifier, and the basic instruction information includes a requester identifier, a group identifier, and a data ready flag; sending the first instruction to the storage module; setting the data ready flag of the first instruction to valid according to the data ready information of the first instruction sent by the storage module; and obtaining the return data of the first instruction from the storage module according to the data return mode of the first requester and sending it to the first requester.

[0207] In addition, the present disclosure also provides an electronic device and a computer-readable storage medium, both of which can be used to implement the devices and methods provided by the present disclosure. For the corresponding technical solutions and descriptions, refer to the corresponding records in the device part and will not be elaborated further.

[0208] Figure 7Block diagram of an electronic device provided by an embodiment of the present disclosure.

[0209] Referring to Figure 7 , an embodiment of the present disclosure provides an electronic device, which includes: at least one processor 501; at least one memory 502, and one or more I / O interfaces 503 connected between the processor 501 and the memory 502; wherein, the memory 502 stores one or more computer programs executable by at least one processor 501, and the one or more computer programs are executed by at least one processor 501 so that at least one processor 501 can execute the above data processing method.

[0210] An embodiment of the present disclosure also provides a computer-readable storage medium, on which a computer program is stored, wherein the computer program implements the above data processing method when executed by a processor. The computer-readable storage medium may be a volatile or non-volatile computer-readable storage medium.

[0211] An embodiment of the present disclosure also provides a computer program product, including computer-readable code, or a non-volatile computer-readable storage medium carrying the computer-readable code. When the computer-readable code runs in the processor of the electronic device, the processor in the electronic device executes the above data processing method.

[0212] Those of ordinary skill in the art can understand that all or some of the steps in the above disclosed methods, and the functional modules / units in the systems and devices, can be implemented as software, firmware, hardware and their appropriate combinations. In the hardware implementation, the division of the functional modules / units mentioned above does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be executed by several physical components in cooperation. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, a digital signal processor or a microprocessor, or may be implemented as hardware, or may be implemented as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable storage medium, which may include a computer storage medium (or a non-transitory medium) and a communication medium (or a transitory medium).

[0213] As is well known to those of ordinary skill in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information such as computer-readable program instructions, data structures, program modules, or other data. Computer storage media includes, but is not limited to, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), static random access memory (SRAM), flash memory or other memory technologies, portable compact disc read-only memory (CD-ROM), digital versatile disc (DVD) or other optical disc storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and can be accessed by a computer. Additionally, as is well known to those of ordinary skill in the art, communication media typically embodies computer-readable program instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transmission mechanism, and can include any information delivery media.

[0214] The computer-readable program instructions described herein can be downloaded to each computing / processing device from a computer-readable storage medium or downloaded to an external computer or external storage device through a network, such as the Internet, a local area network, a wide area network, and / or a wireless network. The network can include copper transmission cables, optical fiber transmission, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions for storage in a computer-readable storage medium in each computing / processing device.

[0215] Computer program instructions for performing the operations of this disclosure may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine - related instructions, microcode, firmware instructions, state - setting data, or source code or object code written in any combination of one or more programming languages, including object - oriented programming languages such as Smalltalk, C++, etc., and conventional procedural programming languages such as the "C" language or similar programming languages. The computer - readable program instructions may be executed entirely on the user's computer, partially on the user's computer, executed as a stand - alone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., through the Internet using an Internet service provider). In some embodiments, by using the state information of the computer - readable program instructions to customize an electronic circuit, such as a programmable logic circuit, a field - programmable gate array (FPGA), or a programmable logic array (PLA), the electronic circuit can execute the computer - readable program instructions to implement various aspects of this disclosure.

[0216] The computer program product described herein may be implemented specifically in the form of hardware, software, or a combination thereof. In an alternative embodiment, the computer program product is embodied as a computer storage medium. In another alternative embodiment, the computer program product is embodied as a software product, such as a Software Development Kit (SDK), etc.

[0217] Aspects of the present disclosure are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the present disclosure. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer - readable program instructions.

[0218] These computer-readable program instructions may be provided to a processor of a general-purpose computer, special-purpose computer, or other programmable data processing apparatus to produce a machine such that the instructions, when executed by the processor of the computer or other programmable data processing apparatus, create means for implementing the functions / acts specified in one or more boxes of the flowchart and / or block diagram. These computer-readable program instructions may also be stored in a computer-readable storage medium that causes a computer, a programmable data processing apparatus, and / or other devices to function in a particular manner, such that the computer-readable medium storing the instructions comprises a manufacture, including instructions which implement various aspects of the functions / acts specified in one or more boxes of the flowchart and / or block diagram.

[0219] The computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operational steps to be performed on the computer, other programmable data processing apparatus, or other devices to produce a computer-implemented process such that the instructions which execute on the computer, other programmable data processing apparatus, or other devices implement the functions / acts specified in one or more boxes of the flowchart and / or block diagram.

[0220] The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagram may represent a module, a segment of code, or a portion of an instruction, which comprises one or more executable instructions for implementing the specified logical function. In some alternative implementations, the functions noted in the blocks may occur out of the order noted in the figures. For example, two consecutive blocks may in fact be executed substantially in parallel, or they may sometimes be executed in the reverse order, depending on the functionality involved. It should also be noted that each block of the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can be implemented by special-purpose hardware-based systems that perform the specified functions or acts, or by combinations of special-purpose hardware and computer instructions.

[0221] Example embodiments have been disclosed herein, and while specific terms are employed, they are used in a generic and descriptive sense only and not for purposes of limitation. In some instances, it will be apparent to those skilled in the art that, unless otherwise explicitly stated, the features, characteristics, and / or elements described in connection with a particular embodiment may be used singly or in combination with those described in connection with other embodiments. Accordingly, those skilled in the art will appreciate that various forms and details may be changed without departing from the scope of the present disclosure as set forth by the appended claims.

Claims

1. A data processing device, characterized in that, It includes multiple requesters and a read control module. The read control module is respectively connected to the multiple requesters and a storage module. The requesters are configured to: send data read instructions to the read control module, and the data return modes of the return data of each requester for the data read instructions are the same or different. The read control module is configured to: Arbitrate among the multiple requesters, and receive a first instruction of the first requester that obtains the arbitration right among the multiple requesters. Allocate a layer of instruction entries for the first instruction in the instruction entry container of the read control module, and store the basic instruction information of the first instruction in the instruction entry. The instruction entry container includes multiple layers of instruction entries, each layer of the instruction entries has an instruction identifier, and the basic instruction information includes a requester identifier and a data ready flag. Send the first instruction to the storage module. Set the data ready flag of the first instruction to be valid according to the data ready information of the first instruction sent by the storage module. Obtain the return data of the first instruction from the storage module according to the data return mode of the first requester, and send it to the first requester.

2. The device according to claim 1, characterized in that The data return mode includes a first mode, and the first mode is used to characterize that the return data of different instructions is returned in disorder. An instruction selection table is set in the read control module, and a valid entry mask is set for each layer of instruction entries in the instruction selection table, which is used to characterize whether the return data of the instructions of the requester in the first mode is ready. Among them, the read control module is further configured to: Set the valid entry mask corresponding to the instruction to be valid when the data ready flag of the instruction of the requester in the first mode is valid. When the requester in the first mode is selected to return data this time, select a second instruction from the instructions with valid entry masks in the instruction selection table. Obtain the return data of the second instruction from the storage module, and send it to the requester corresponding to the second instruction.

3. The device according to claim 1, characterized in that, The data return mode includes a second mode, and the second mode is used to characterize that the return data of different instructions is returned in order. A global previous instruction identifier is set for each requester in the instruction entry container, and the initial value of the previous instruction identifier is a null value or an invalid value. A next instruction identifier of the instruction is also set in each layer of instruction entries, and the initial value of the next instruction identifier is the instruction identifier of the instruction in this layer. Among them, after the read control module allocates a layer of instruction entries for the first instruction in the instruction entry container, it is further configured to: Determine the previous instruction identifier of the first requester when the data return mode of the first requester corresponding to the first instruction is the second mode. Modify the previous instruction identifier to the first instruction identifier of the first instruction when the previous instruction identifier is a null value or an invalid value. When the previous instruction identifier is a valid value, set the next instruction identifier in the instruction entry of the third instruction corresponding to the previous instruction identifier to the first instruction identifier; and modify the previous instruction identifier to the first instruction identifier.

4. The device according to claim 3, characterized in that A global header instruction identifier is also set for each requester in the instruction entry container, which is used to represent the instruction with the longest waiting time in each requester; An instruction selection table is set in the read control module. In the instruction selection table, a valid requester mask is set for each requester, which is used to represent whether the instruction with the longest waiting time in the requester in the second mode is ready; Among them, the read control module is further configured as follows: When the data ready flag of the instruction corresponding to the header instruction identifier of any requester in the second mode is valid, set the valid requester mask corresponding to this requester to valid; When the selected requester in the second mode returns data this time, select a second requester from the requesters in the instruction selection table whose valid requester masks are valid; Obtain the return data of the fourth instruction corresponding to the header instruction identifier of the second requester from the storage module and send it to the second requester; Modify the header instruction identifier of the second requester to the identifier of the instruction after the fourth instruction.

5. The device according to claim 1, characterized in that, The data return mode includes a third mode, which is used to represent that the return data of different instruction groups is returned in disorder, and the return data of different instructions in the same instruction group is returned in order; The read control module further includes a group entry container, which includes multiple layers of group entries. Each layer of group entries is used to store group basic information. The group basic information includes a header instruction identifier and the number of instructions. Each layer of group entries has a global group identifier; A global group identifier of the instruction is also set in each layer of instruction entries; A global previous group end bit and a previous global group identifier are also set for each requester in the group entry container. The previous group end bit is used to represent whether the group end flag of the previous instruction of this requester is valid, and the initial value is valid; the previous global group identifier is used to represent the global group identifier corresponding to the previous instruction of this requester; Among them, after the read control module allocates a layer of instruction entries for the first instruction in the instruction entry container, it is further configured as follows: When the data return mode of the first requester corresponding to the first instruction is the third mode, determine the previous group end bit of the first requester; When the previous group end bit of the first requester is valid, allocate a layer of group entries for the first instruction group corresponding to the first instruction in the group entry container, store the group basic information of the first instruction group in the group entry, and set the global group identifier of the first instruction in the instruction entry to the first global group identifier of the group entry; among them, the header instruction identifier of the group basic information is the instruction identifier of the first instruction, and the value of the number of instructions is set to 1; Modify the previous group end bit of the first requester in the group entry container to invalid, and modify the previous global group identifier to the first global group identifier.

6. The device according to claim 5, characterized in that, The read control module is further configured as follows: When the previous group end bit of the first requester is invalid, set the global group identifier of the first instruction to the second global group identifier corresponding to the previous global group identifier in the group entry container; Increment the value of the number of instructions in the group entry corresponding to the second global group identifier by 1; When the end flag of the group of the first instruction is valid, modify the previous group end bit of the first requester to be valid.

7. The device according to claim 6, characterized in that, In the instruction entry container, a global previous instruction identifier is set for each requester, and the initial value of the previous instruction identifier is a null value or an invalid value. In each layer of instruction entries, a next instruction identifier of the instruction is also set, and the initial value of the next instruction identifier is the instruction identifier of the instruction in this layer. Among them, the read control module is further configured to: When the global group identifier of the first instruction is the existing second global group identifier, set the next instruction identifier in the instruction entry of the fifth instruction corresponding to the previous instruction identifier of the first requester to the first instruction identifier of the first instruction. Modify the previous instruction identifier to the first instruction identifier.

8. The device according to claim 5, characterized in that, An instruction selection table is set in the read control module, and a valid group mask is set for each instruction group in the instruction selection table, which is used to represent whether the return data of all instructions in the instruction group of the third mode is ready. After the read control module sets the data ready flag of the first instruction to be valid, it is further configured to: Decrease the value of the number of instructions in the group entry corresponding to the global group identifier of the first instruction by 1. When the value of the number of instructions in the group entry corresponding to the global group identifier of the first instruction is 0, set the valid group mask corresponding to the global group identifier of the first instruction to be valid. When the requester that selects the third mode this time returns data, select a second instruction group from the instruction groups in the instruction selection table whose valid group masks are valid. Obtain the return data of the second instruction group from the storage module and send it to the requester corresponding to the second instruction group.

9. The device according to claim 2, 4 or 8, characterized in that The data return mode includes a first mode, a second mode, and a third mode. The first mode is used to represent that the return data of different instructions is returned in disorder, the second mode is used to represent that the return data of different instructions is returned in order, and the third mode is used to represent that the return data of different instruction groups is returned in disorder, and the return data of different instructions in the same instruction group is returned in order. An instruction selection table is set in the read control module, and multiple masks are set in the instruction selection table, including a valid entry mask set for each layer of instruction entries, a valid requester mask set for each requester, and a valid group mask set for each instruction group. The valid entry mask is used to represent whether the instruction of the requester in the first mode is ready, the valid requester mask is used to represent whether the instruction with the longest waiting time in the requester in the second mode is ready, and the valid group mask is used to represent whether the return data of all instructions in the instruction group of the third mode is ready. Among them, the read control module is further configured to: When at least two of the valid entry mask, the valid requester mask, and the valid group mask in the instruction selection table have a valid value, select the target mode for returning data this time from the first mode, the second mode, and the third mode. Select the instruction or instruction group for returning data this time according to the value of the mask corresponding to the target mode.

10. The device according to claim 1, characterized in that, The read control module includes an arbiter, a request path processor, a central controller, a return path processor, and a selector. The arbiter is connected to a plurality of the requesters and is configured to arbitrate among the plurality of requesters, and receive a first instruction from a first requester that has obtained the arbitration right among the plurality of requesters. The arbiter switches the arbitration right in units of one instruction. The request path processor is connected to the central controller and the storage module, and is configured to send the received first instruction to the central controller and the storage module respectively. The central controller is connected to the storage module and the return path processor, and is configured to allocate an instruction entry for the first instruction and store the basic instruction information of the first instruction according to the data return mode of the first requester corresponding to the received first instruction. Update the data ready flag of the instruction according to the data ready information of the storage module; determine the instruction or instruction group for which the data is to be returned this time according to the data return mode of the requester, and control the storage module and the return path processor to return the return data of the instruction or instruction group. The return path processor is connected to the storage module and the selector, and is configured to obtain the information of the instruction or instruction group for which the data is to be returned this time sent by the central controller and receive the return data of the instruction or instruction group sent by the storage module; and send the return data to the selector. The selector is connected to the plurality of the requesters and is configured to send the return data to the corresponding requester.

11. A data processing method, characterized in that A read control module applied to a data processing device, the data processing device further includes a plurality of requesters, and the read control module is respectively connected to the plurality of requesters and a storage module. The requesters are configured to send data read instructions to the read control module, and the data return modes of the return data of the data read instructions for each requester are the same or different. The method includes: Arbitrate among a plurality of the requesters, and receive a first instruction from a first requester that has obtained the arbitration right. Allocate a layer of instruction entry for the first instruction in the instruction entry container of the read control module, and store the basic instruction information of the first instruction in the instruction entry. The instruction entry container includes multiple layers of instruction entries, each layer of the instruction entries has an instruction identifier, and the basic instruction information includes a requester identifier and a data ready flag. Send the first instruction to the storage module. Set the data ready flag of the first instruction to valid according to the data ready information of the first instruction sent by the storage module. Obtain the return data of the first instruction from the storage module according to the data return mode of the first requester and send it to the first requester.

12. An electronic device, characterized in that, Includes: At least one processor; And A memory communicatively connected to the at least one processor; wherein, The memory stores one or more computer programs executable by the at least one processor, and the one or more computer programs are executed by the at least one processor so that the at least one processor can execute the data processing method as claimed in claim 11.

13. A computer-readable storage medium having a computer program stored thereon, characterized in that, The computer program, when executed by a processor, implements the data processing method as described in claim 11.

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