Amplifier, control method and device, electronic equipment and chip

Abstract

The invention discloses a low-noise amplifier, a control method and device, electronic equipment and a chip, and relates to the technical field of circuits, and the low-noise amplifier comprises a first carrier channel, a second carrier channel, a first switching circuit and a second switching circuit; the first end of the first carrier channel is connected with the first end of the second carrier channel, the second end of the first carrier channel is connected with the first end of the first switching circuit, and the second end of the second carrier channel is connected with the first end of the second switching circuit; the first switching circuit is used for being disconnected under the condition that the second carrier channel receives the target signal and controlling the first carrier channel not to work, and the second switching circuit is used for being disconnected under the condition that the first carrier channel receives the target signal and controlling the second carrier channel not to work. Compared with the prior art, the linearity of the low noise amplifier can be guaranteed.

Description

Technical Field

[0001] The present application relates to the field of circuit technologies, and in particular, to an amplifier, a control method, a device, an electronic device, and a chip. Background Art

[0002] A Low-Noise Amplifier (LNA) is a key component in a Radio Frequency (RF) circuit, mainly used to enhance the received weak signal while minimizing its own noise introduction. The amplifier is usually located at the front end of the receiver, and the quality of its linearity directly determines the quality of the received signal. Therefore, improving the linearity of the amplifier is a crucial design index for RF receivers.

[0003] In the related art, the low-noise amplifier includes two carrier paths. When one of the carrier paths receives a target signal, the other carrier path may be accidentally turned on, resulting in poor linearity of the amplifier. Summary of the Invention

[0004] In view of this, the present application provides an amplifier, a control method, a device, an electronic device, and a chip.

[0005] In a first aspect, the present application provides an amplifier, including: a first carrier path, a second carrier path, and a first switching circuit;

[0006] The first end of the first carrier path is connected to the first end of the second carrier path, and the second end of the first carrier path is connected to the first end of the first switching circuit;

[0007] The first switching circuit is configured to disconnect when the second carrier path receives a target signal, and control the first carrier path not to work.

[0008] Optionally, it further includes a second switching circuit. The second end of the second carrier path is connected to the first end of the second switching circuit. The second switching circuit is configured to disconnect when the first carrier path receives a target signal, and control the second carrier path not to work.

[0009] Optionally, the first end of the first carrier path is further connected to a signal input terminal, the first end of the first carrier path is further grounded through a first grounding inductor, the third end of the first carrier path is connected to a first bias voltage input terminal, the fourth end of the first carrier path is connected to a second bias voltage input terminal, the fifth end and the sixth end of the first carrier path are respectively connected to a power supply voltage, and the seventh end of the first carrier path is grounded;

[0010] The second end of the first switching circuit is grounded.

[0011] Optionally, the first end of the second carrier path is also connected to the signal input end, the first end of the second carrier path is also grounded through the first grounding inductor, the third end of the second carrier path is connected to the third bias voltage input end, the fourth end of the second carrier path is connected to the fourth bias voltage input end, the fifth end and the sixth end of the second carrier path are respectively connected to the power supply voltage, and the seventh end of the second carrier path is grounded;

[0012] The second end of the second switching circuit is grounded.

[0013] Optionally, the first carrier path includes a first input unit and a first output unit;

[0014] The first end of the first input unit is connected to the first end of the second carrier path, the first end of the first input unit is also connected to the signal input end, the first end of the first input unit is also grounded through the first grounding inductor, the second end of the first input unit is connected to the first end of the first switching circuit, the third end of the first input unit is connected to the first bias voltage input end, and the fourth end of the first input unit is connected to the first end of the first output unit;

[0015] The second end of the first output unit is connected to the second bias voltage input end, the third end and the fourth end of the first output unit are respectively connected to the power supply voltage, and the fifth end of the first output unit is grounded.

[0016] Optionally, the second carrier path includes a second input unit and a second output unit;

[0017] The first end of the second input unit is connected to the first end of the first input unit, the first end of the second input unit is also connected to the signal input end, the first end of the second input unit is also grounded through the first grounding inductor, the second end of the second input unit is connected to the first end of the second switching circuit, the third end of the second input unit is connected to the third bias voltage input end, and the fourth end of the second input unit is connected to the first end of the second output unit;

[0018] The second end of the second output unit is connected to the fourth bias voltage input end, the third end and the fourth end of the second output unit are respectively connected to the power supply voltage, and the fifth end of the second output unit is grounded.

[0019] Optionally, the first switching circuit is configured to disconnect when the second input unit receives a target signal, and control the first input unit not to work;

[0020] The second switch circuit is used to disconnect when the first input unit receives a target signal, and control the second input unit not to work.

[0021] Optionally, the first input unit includes a first capacitor, a first resistor, a first triode, a second triode, and a third triode;

[0022] A first end of the first capacitor is connected to a first end of the second input unit, the first end of the first capacitor is also connected to the signal input terminal, the first end of the first capacitor is also grounded through the first grounding inductor, and a second end of the first capacitor is connected to a first end of the first resistor, the base electrodes of the first triode, the second triode, and the third triode;

[0023] A second end of the first resistor is connected to the first bias voltage input terminal, a collector of the first triode is connected to a first end of the first output unit, a collector of the second triode, and a collector of the third triode, and an emitter of the first triode, an emitter of the second triode, and an emitter of the third triode are respectively connected to a first end of the first switch circuit.

[0024] Optionally, the first output unit includes a fourth triode, a fifth triode, a sixth triode, a first switch, a second switch, and a first mixer;

[0025] A base of the fourth triode is connected to the second bias voltage input terminal and a first end of the first switch, a collector of the fourth triode is connected to a collector of the fifth triode and a first end of the first mixer, and an emitter of the fourth triode is connected to a collector of the first triode, a collector of the second triode, a collector of the third triode, an emitter of the fifth triode, and an emitter of the sixth triode;

[0026] A second end of the first switch is connected to a base of the fifth triode, a second end of the first mixer is connected to the power supply voltage, a base of the sixth triode is connected to a first end of the second switch, a collector of the sixth triode is connected to the power supply voltage, and a second end of the second switch is grounded.

[0027] Optionally, the first switch circuit includes a third switch, a fourth switch, a fifth switch, and a second grounding inductor;

[0028] A first end of the third switch is connected to an emitter of the first triode, a first end of the fourth switch is connected to an emitter of the second triode, and a first end of the fifth switch is connected to an emitter of the third triode;

[0029] The second ends of the third switch, the fourth switch, and the fifth switch are respectively connected to the first end of the second grounding inductor, and the second end of the second grounding inductor is grounded.

[0030] Optionally, the third switch is configured to disconnect when the second input unit receives a target signal, and control the first triode to be non-conductive;

[0031] The fourth switch is configured to disconnect when the second input unit receives a target signal, and control the second triode to be non-conductive;

[0032] The fifth switch is configured to disconnect when the second input unit receives a target signal, and control the third triode to be non-conductive.

[0033] Optionally, the second input unit includes a second capacitor, a second resistor, a seventh triode, an eighth triode, and a ninth triode;

[0034] The first end of the second capacitor is connected to the first end of the first capacitor, the first end of the second capacitor is also connected to the signal input terminal, the first end of the second capacitor is also grounded through the first grounding inductor, and the second end of the second capacitor is connected to the first end of the second resistor, the bases of the seventh triode, the eighth triode, and the ninth triode;

[0035] The second end of the second resistor is connected to the third bias voltage input terminal, the collector of the seventh triode is connected to the first end of the second output unit, the collectors of the eighth triode and the ninth triode, and the emitters of the seventh triode, the eighth triode, and the ninth triode are respectively connected to the first end of the second switch circuit.

[0036] Optionally, the second output unit includes a thirteenth triode, an eleventh triode, a twelfth triode, a sixth switch, a seventh switch, and a second mixer;

[0037] The base of the thirteenth triode is connected to the fourth bias voltage input terminal and the first end of the sixth switch, the collector of the thirteenth triode is connected to the collector of the eleventh triode and the first end of the second mixer, and the emitter of the thirteenth triode is connected to the collector of the seventh triode, the collectors of the eighth triode and the ninth triode, the emitter of the eleventh triode, and the emitters of the twelfth triode.

[0038] The second terminal of the sixth switch is connected to the base of the eleventh triode, the second terminal of the second mixer is connected to the power supply voltage, the base of the twelfth triode is connected to the first terminal of the seventh switch, the collector of the twelfth triode is connected to the power supply voltage, and the second terminal of the seventh switch is grounded.

[0039] Optionally, the second switch circuit includes an eighth switch, a ninth switch, a tenth switch, and a third grounding inductor;

[0040] The first terminal of the eighth switch is connected to the emitter of the seventh triode, the first terminal of the ninth switch is connected to the emitter of the eighth triode, and the first terminal of the tenth switch is connected to the emitter of the ninth triode;

[0041] The second terminals of the eighth switch, the ninth switch, and the tenth switch are respectively connected to the first terminal of the third grounding inductor, and the second terminal of the third grounding inductor is grounded.

[0042] Optionally, the eighth switch is used to disconnect when the first input unit receives a target signal, and control the seventh triode not to conduct;

[0043] The ninth switch is used to disconnect when the first input unit receives a target signal, and control the eighth triode not to conduct;

[0044] The tenth switch is used to disconnect when the first input unit receives a target signal, and control the ninth triode not to conduct.

[0045] In a second aspect, the present application provides a control method, including:

[0046] When the first carrier path receives a target signal, control the second switch circuit to disconnect, so that the second carrier path does not work; and / or,

[0047] When the second carrier path receives a target signal, control the first switch circuit to disconnect, so that the first carrier path does not work.

[0048] Optionally, when the first carrier path receives a target signal, controlling the second switch circuit to disconnect so that the second carrier path does not work includes:

[0049] When the first input unit receives a target signal, control the second switch circuit to disconnect, so that the second input unit does not work;

[0050] When the second carrier path receives a target signal, controlling the first switch circuit to disconnect so that the first carrier path does not work includes:

[0051] When the target signal is received by the second input unit, control the first switch circuit to disconnect, so that the first input unit does not work.

[0052] Optionally, controlling the second switch circuit to disconnect so that the second input unit does not work includes:

[0053] Control the eighth switch, the ninth switch, and the tenth switch to disconnect, so that the seventh triode, the eighth triode, and the ninth triode are not conducting;

[0054] Controlling the first switch circuit to disconnect to control the first carrier path not to work includes:

[0055] Control the third switch, the fourth switch, and the fifth switch to disconnect, so that the first triode, the second triode, and the third triode are not conducting.

[0056] In a third aspect, the present application provides a control device, including:

[0057] A control module, configured to control the second switch circuit to disconnect when the target signal is received by the first carrier path, so that the second carrier path does not work; when the target signal is received by the second carrier path, control the first switch circuit to disconnect, so that the first carrier path does not work.

[0058] In a fourth aspect, the present application provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the control method described in the second aspect above is implemented.

[0059] In a fifth aspect, the present application provides an electronic device, characterized in that it includes a storage medium, a processor, and a computer program stored on the storage medium and executable on the processor, and when the processor executes the computer program, the control method described in the second aspect above is implemented.

[0060] In a sixth aspect, the present application provides a chip, including one or more interface circuits and one or more processors; the interface circuit is used to receive a signal from the memory of the electronic device and send the signal to the processor, and the signal includes computer instructions stored in the memory; when the processor executes the computer instructions, the electronic device is caused to execute the control method described in the second aspect above.

[0061] With the above technical solution, compared with the current existing technologies, an amplifier, a control method, a device, an electronic device, and a chip provided by the present application connect a first carrier path to a first switching circuit, enabling the first switching circuit to control the working state of the first carrier path. Specifically, when the second carrier path receives a target signal, the first switching circuit can control the first carrier path not to work, so that in the amplifier of the present application, when receiving the target signal through the first carrier path or the second carrier path, the other carrier path will not be accidentally turned on, thereby ensuring the linearity of the amplifier in the present application.

[0062] The above description is only an overview of the technical solution of the present application. In order to be able to understand the technical means of the present application more clearly, it can be implemented according to the content of the specification. And in order to make the above and other purposes, features, and advantages of the present application more obvious and understandable, the specific embodiments of the present application are specifically given below. BRIEF DESCRIPTION OF THE DRAWINGS

[0063] The drawings here are incorporated into the specification and form a part of this specification, showing the embodiments in line with the present application, and are used together with the specification to explain the principles of the present application.

[0064] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, for those of ordinary skill in the art, other drawings can also be obtained based on these drawings without creative efforts.

[0065] Figure 1 Shows a schematic structural diagram of an amplifier provided by an embodiment of the present application;

[0066] Figure 2 Shows a schematic structural diagram of an example provided by an embodiment of the present application;

[0067] Figure 3 Shows a schematic structural diagram of an example provided by an embodiment of the present application;

[0068] Figure 4 Shows a schematic flow diagram of a control method provided by an embodiment of the present application;

[0069] Figure 5 Shows a schematic structural diagram of a control device provided by an embodiment of the present application;

[0070] Figure 1 In which:

[0071] 1 - First carrier path, 11 - First input unit, 12 - First output unit;

[0072] 2 - Second carrier path, 21 - Second input unit, 22 - Second output unit;

[0073] 3 - First switching circuit;

[0074] 4 - Second switching circuit. Detailed implementation manners

[0075] In the description of the present application, it should be understood that the orientation or positional relationships indicated by the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc. are based on the orientation or positional relationships shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation to the present application.

[0076] In addition, the terms "first" and "second" are only used for descriptive purposes and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the present application, "a plurality of" means two or more unless otherwise specifically defined.

[0077] In the present application, unless otherwise clearly defined and limited, the terms "mounted", "connected", "connected to", "fixed", etc. should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or an integral connection; it may be a mechanical connection or an electrical connection; it may be directly connected or indirectly connected through an intermediate medium, and it may be the communication inside two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific circumstances.

[0078] The present application will be described in detail below with reference to the drawings and in combination with embodiments. It should be noted that, without conflict, the embodiments in the present application and the features in the embodiments can be combined with each other.

[0079] The following will be combined with Figure 1 Describe an amplifier according to some embodiments of the present application.

[0080] An amplifier provided by the present application, such as Figure 1As shown in the figure, it includes: a first carrier path 1, a second carrier path 2, and a first switching circuit 3; the first end of the first carrier path 1 is connected to the first end of the second carrier path 2, and the second end of the first carrier path 1 is connected to the first end of the first switching circuit 3; the first switching circuit 3 is configured to disconnect when the second carrier path 2 receives a target signal, and control the first carrier path 1 not to work.

[0081] The amplifier in the embodiment of the present application may be a low-noise amplifier. Specifically, a low-noise amplifier (LNA) is a key component in a radio frequency (RF) circuit, mainly used to enhance the received weak signal while minimizing its own noise introduction. The LNA is usually located at the front end of the receiver, immediately following the antenna, and its performance has a crucial impact on the sensitivity of the entire system.

[0082] In some examples, the LNA in the RF front end is usually placed between the antenna and the mixer. First, the weak RF signal captured by the antenna enters the LNA for preliminary amplification; then, the amplified signal is transmitted to the mixer and mixed with the signal generated by the local oscillator to be converted into an intermediate frequency signal for further processing.

[0083] For this embodiment, the first carrier path 1 may be a primary carrier component (PCC), and correspondingly, the second carrier path 2 may be a secondary carrier component (SCC); conversely, the first carrier path 1 may also be a secondary carrier path, and correspondingly, the second carrier path 2 may be a primary carrier path.

[0084] As an alternative, the primary carrier path generally refers to the part of the circuit or signal path that processes the main information transmission. It is responsible for processing the main carrier signal, which carries the key information stream or has a higher priority; correspondingly, the secondary carrier path generally refers to the part of the circuit or signal path that processes secondary information or provides additional bandwidth support. It can be used to enhance the total throughput of the system, improve the coverage area, or provide redundancy.

[0085] In the embodiment of the present application, if the amplifier is in an RF circuit, the target signal may be an RF signal; it should be noted that if the amplifier is in other circuits, the target signal may also be other signal types, and the specific type of the target signal is not limited in the embodiment of the present application.

[0086] Optionally, the amplifier according to the embodiment of the present application further includes a second switch circuit 4. The second end of the second carrier path 2 is connected to the first end of the second switch circuit 4. The second switch circuit 4 is configured to disconnect when the first carrier path 1 receives a target signal, and control the second carrier path 2 not to work.

[0087] In some examples, the first switch circuit 3 can be turned on when the first carrier path 1 receives a target signal, control the first carrier path 1 to work, and disconnect when the second carrier path 2 receives a target signal, control the first carrier path 1 not to work; correspondingly, the second switch circuit 4 can be disconnected when the first carrier path 1 receives a target signal, control the second carrier path 2 not to work, and close when the second carrier path 2 receives a target signal, control the second carrier path to work.

[0088] In this embodiment, by connecting the first carrier path to the first switch circuit, the first switch circuit can control the working state of the first carrier path, and connecting the second carrier path to the second switch circuit, the second switch circuit can control the working state of the second carrier path. Specifically, when the second carrier path receives a target signal, the first switch circuit can control the first carrier path not to work, and / or when the first carrier path receives a target signal, the second switch circuit can control the second carrier path not to work, so that in the amplifier of this embodiment, when receiving a target signal through the first carrier path or the second carrier path, the other carrier path will not be accidentally turned on, thereby ensuring the linearity of the amplifier in this embodiment.

[0089] Optionally, the first end of the first carrier path 1 is further connected to the signal input terminal RFIN, the first end of the first carrier path 1 is further grounded through the first grounding inductor L1, the third end of the first carrier path 1 is connected to the first bias voltage input terminal VB11, the fourth end of the first carrier path 1 is connected to the second bias voltage VB12 input terminal, the fifth end and the sixth end of the first carrier path 1 are respectively connected to the power supply voltage VDD, and the seventh end of the first carrier path 1 is grounded; the second end of the first switch circuit 3 is grounded.

[0090] In the embodiment of the present application, the signal input terminal RFIN can be used to receive a target signal. The grounding inductor L1 can help adjust the impedance of the circuit to match the impedance of the load or the source, thereby improving the signal transmission efficiency, reducing reflection and loss; the grounding inductor can also select signals within a specific frequency range, filter out unwanted frequency components, help improve the purity of the signal, and reduce interference; the grounding inductor L1 can also play a role in stabilizing the circuit, preventing high-frequency noise and oscillation, and ensuring the stable operation of the circuit.

[0091] In some examples, the first bias voltage VB11 and the second bias voltage VB12 can be used to control the operating state of the triode in the first carrier path 1.

[0092] Optionally, the first end of the second carrier path 2 is also connected to the signal input terminal RFIN. The first end of the second carrier path 2 is also grounded through the first grounding inductor L1. The third end of the second carrier path 2 is connected to the third bias voltage VB21 input terminal. The fourth end of the second carrier path 2 is connected to the fourth bias voltage VB22 input terminal. The fifth end and the sixth end of the second carrier path 2 are respectively connected to the power supply voltage VDD. The seventh end of the second carrier path is grounded. The second end of the second switching circuit 4 is grounded.

[0093] For this embodiment, the third bias voltage VB21 and the fourth bias voltage VB22 can be used to control the operating state of the triode in the second carrier path 2.

[0094] Optionally, the first carrier path 1 includes a first input unit 11 and a first output unit 12. The first end of the first input unit 11 is connected to the first end of the second carrier path 2. The first end of the first input unit 11 is also connected to the signal input terminal RFIN. The first end of the first input unit 11 is also grounded through the first grounding inductor L1. The second end of the first input unit 11 is connected to the first end of the first switching circuit 3. The third end of the first input unit 11 is connected to the first bias voltage VB11 input terminal. The fourth end of the first input unit 11 is connected to the first end of the first output unit 12. The second end of the first output unit 12 is connected to the second bias voltage VB12 input terminal. The third end and the fourth end of the first output unit 12 are respectively connected to the power supply voltage. The fifth end of the first output unit 12 is grounded.

[0095] Optionally, the second carrier path 2 includes a second input unit 21 and a second output unit 22. The first end of the second input unit 21 is connected to the first end of the first input unit 11. The first end of the second input unit 21 is also connected to the signal input terminal RFIN. The first end of the second input unit 21 is also grounded through the first grounding inductor L1. The second end of the second input unit 21 is connected to the first end of the second switching circuit 4. The third end of the second input unit 21 is connected to the third bias voltage VB21 input terminal. The fourth end of the second input unit 21 is connected to the first end of the second output unit 22. The second end of the second output unit 22 is connected to the fourth bias voltage VB22 input terminal. The third end and the fourth end of the second output unit 22 are respectively connected to the power supply voltage. The fifth end of the second output unit 22 is grounded.

[0096] Optionally, the first switch circuit 3 is used to disconnect when the second input unit 21 receives a target signal, controlling the first input unit 11 not to work; the second switch circuit 4 is used to disconnect when the first input unit 11 receives a target signal, controlling the second input unit 21 not to work.

[0097] In the embodiment of the present application, the first switch circuit 3 closes when the first input unit 11 receives a target signal through the signal input terminal RFIN, controlling the first input unit 11 and the first output unit 12 to work, and disconnects when the second input unit 21 receives a target signal through the signal input terminal RFIN, controlling the first input unit 11 and the first output unit 12 not to work.

[0098] In some examples, the second switch circuit 4 disconnects when the first input unit 11 receives a target signal through the signal input terminal RFIN, controlling the second input unit 21 and the second output unit 22 not to work, and closes when the second input unit 21 receives a target signal through the signal input terminal RFIN, controlling the second input unit 21 and the second output unit 22 to work.

[0099] Optionally, the first input unit 11 includes a first capacitor C1, a first resistor R1, a first triode M11, a second triode M12, and a third triode M13; the first end of the first capacitor C1 is connected to the first end of the second input unit 21, the first end of the first capacitor C1 is also connected to the signal input terminal RFIN, the first end of the first capacitor C1 is also grounded through a first grounding inductor L1, the second end of the first capacitor C1 is connected to the first end of the first resistor R1, the bases of the first triode M11, the second triode M12, and the third triode M13; the second end of the first resistor R1 is connected to the first bias voltage VB11 input terminal, the collector of the first triode M11 is connected to the first end of the first output unit 12, the collectors of the second triode M12 and the third triode M13, and the emitters of the first triode M11, the second triode M12, and the third triode M13 are respectively connected to the first end of the first switch circuit 3.

[0100] Optionally, the first output unit 12 includes a fourth triode M14, a fifth triode M15, a sixth triode M16, a first switch K14, a second switch K15, and a first mixer To Mixer1; the base of the fourth triode M14 is connected to the input terminal of the second bias voltage VB12 and the first terminal of the first switch K14, the collector of the fourth triode M14 is connected to the collector of the fifth triode M15 and the first terminal of the first mixer To Mixer1, and the emitter of the fourth triode M14 is connected to the collector of the first triode M11, the collector of the second triode M12, the collector of the third triode M13, the emitter of the fifth triode M15, and the emitter of the sixth triode M16; the second terminal of the first switch M11 is connected to the base of the fifth triode M15, the second terminal of the first mixer ToMixer1 is connected to the power supply voltage VDD, the base of the sixth triode M16 is connected to the first terminal of the second switch K15, the collector of the sixth triode M16 is connected to the power supply voltage VDD, and the second terminal of the second switch K15 is grounded.

[0101] Optionally, the first switch circuit 3 includes a third switch K11, a fourth switch K12, a fifth switch K13, and a second grounding inductor L2; the first terminal of the third switch K11 is connected to the emitter of the first triode M11, the first terminal of the fourth switch K12 is connected to the emitter of the second triode M12, and the first terminal of the fifth switch K13 is connected to the emitter of the third triode M13; the second terminals of the third switch K11, the fourth switch K12, and the fifth switch K13 are respectively connected to the first terminal of the second grounding inductor L2, and the second terminal of the second grounding inductor L2 is grounded.

[0102] Optionally, the third switch K11 is configured to disconnect when the second input unit 21 receives a target signal, and control the first triode M11 not to conduct; the fourth switch K12 is configured to disconnect when the second input unit 21 receives a target signal, and control the second triode M12 not to conduct; the fifth switch K13 is configured to disconnect when the second input unit 21 receives a target signal, and control the third triode M13 not to conduct.

[0103] In the embodiment of the present application, the third switch K11 can be closed when the first input unit 11 receives a target signal to control the first triode M11 to conduct, and can also be disconnected when the second input unit 21 receives a target signal to control the first triode M11 not to conduct.

[0104] In some examples, the fourth switch K12 can be closed when the first input unit 11 receives a target signal to control the second triode M12 to conduct, and can also be disconnected when the second input unit 21 receives a target signal to control the second triode M12 not to conduct.

[0105] As an alternative, the fifth switch K13 can be closed when the first input unit 11 receives the target signal to control the third triode M13 to conduct, and can also be opened when the second input unit 21 receives the target signal to control the third triode M13 not to conduct.

[0106] Optionally, the second input unit 21 includes a second capacitor C2, a second resistor R2, a seventh triode M21, an eighth triode M22, and a ninth triode M23; the first end of the second capacitor C2 is connected to the first end of the first capacitor C1, the first end of the second capacitor C2 is also connected to the signal input terminal RFIN, the first end of the second capacitor C2 is also grounded through a first grounding inductor L1, and the second end of the second capacitor C2 is connected to the first end of the second resistor R2, the bases of the seventh triode M21, the eighth triode M22, and the ninth triode M23; the second end of the second resistor R2 is connected to the input terminal of the third bias voltage VB21, the collector of the seventh triode M21 is connected to the first end of the second output unit 22, the collectors of the eighth triode M22, and the ninth triode M23, and the emitters of the seventh triode M21, the eighth triode M22, and the ninth triode M23 are respectively connected to the first end of the second switch circuit 4.

[0107] Optionally, the second output unit 21 includes a thirteenth triode M24, an eleventh triode M25, a twelfth triode M26, a sixth switch K24, a seventh switch K25, and a second mixer To Mixer2; the base of the thirteenth triode M24 is connected to the input terminal of the fourth bias voltage VB22 and the first end of the sixth switch K24, the collector of the thirteenth triode M24 is connected to the collector of the eleventh triode M25 and the first end of the second mixer To Mixer2, and the emitter of the thirteenth triode M24 is connected to the collector of the seventh triode M21, the collectors of the eighth triode M22, the ninth triode M23, the emitter of the eleventh triode M25, and the emitter of the twelfth triode M26; the second end of the sixth switch K24 is connected to the base of the eleventh triode M25, the second end of the second mixer To Mixer2 is connected to the power supply voltage VDD, the base of the twelfth triode M26 is connected to the first end of the seventh switch K25, the collector of the twelfth triode M26 is connected to the power supply voltage VDD, and the second end of the seventh switch K25 is grounded.

[0108] Optionally, the second switch circuit 4 includes an eighth switch K21, a ninth switch K22, a tenth switch K23, and a third grounding inductor L3; a first end of the eighth switch K21 is connected to an emitter of a seventh triode M21, a first end of the ninth switch K22 is connected to an emitter of an eighth triode M22, and a first end of the tenth switch K23 is connected to an emitter of a ninth triode M23; a second end of the eighth switch K21, a second end of the ninth switch K22, and a second end of the tenth switch K23 are respectively connected to a first end of the third grounding inductor L3, and a second end of the third grounding inductor L3 is grounded.

[0109] Optionally, the eighth switch K21 is used to disconnect when the first input unit 11 receives a target signal, and control the seventh triode M21 not to conduct; the ninth switch K22 is used to disconnect when the first input unit 11 receives a target signal, and control the eighth triode M22 not to conduct; the tenth switch K23 is used to disconnect when the first input unit 11 receives a target signal, and control the ninth triode M24 not to conduct.

[0110] In an embodiment of the present application, the eighth switch K21 can disconnect when the first input unit 11 receives a target signal, control the seventh triode M21 to conduct, and can also close when the second input unit 21 receives a target signal, control the seventh triode M21 not to conduct.

[0111] In some examples, the ninth switch K22 can disconnect when the first input unit 11 receives a target signal, control the eighth triode M22 to conduct, and can also close when the second input unit 21 receives a target signal, control the eighth triode M22 not to conduct.

[0112] As an optional manner, the ninth switch K23 can disconnect when the first input unit 11 receives a target signal, control the ninth triode M23 to conduct, and can also close when the second input unit 21 receives a target signal, control the ninth triode M23 not to conduct.

[0113] Exemplarily, as Figure 2 shown, taking the amplifier of the embodiment of the present application being connected to a radio frequency receiver as an example, the receiver receives a radio frequency signal from a receiving antenna, and after being amplified by a low-noise amplifier, the mixer mixes it with a local clock provided by a phase-locked loop. After mixing, the radio frequency signal is down-converted to an intermediate frequency signal, and after passing through a low-frequency filter, it is converted into a digital signal by an analog-to-digital converter. The amplifier is located at the very front end of the radio frequency receiver, and the quality of its linearity directly determines the quality of the received signal. Therefore, improving the linearity of the amplifier is a crucial design index for the radio frequency receiver.

[0114] Exemplarily, Figure 3It is an LNA conventionally applied to a radio frequency receiver. The left and right paths are the Primary Carrier Component (PCC) and the Secondary Carrier Component (SCC) respectively. When a signal is received by one of the paths, if the received signal is higher than a certain value, the amplifying MOS transistor in the other path is erroneously turned on, which will cause the linearity of the receiving path to deteriorate.

[0115] Compared with the current existing technologies, in this embodiment, by connecting the first carrier path to the first switching circuit, the first switching circuit can control the working state of the first carrier path, and by connecting the second carrier path to the second switching circuit, the second switching circuit can control the working state of the second carrier path. Specifically, when the second carrier path receives a target signal, the first switching circuit can control the first carrier path not to work, and when the first carrier path receives a target signal, the second switching circuit can control the second carrier path not to work, so that in the amplifier of this embodiment, when receiving a target signal through the first carrier path or the second carrier path, the other carrier path will not have the situation of erroneous turn-on, thereby ensuring the linearity of the amplifier in this embodiment.

[0116] This application also provides a control method, as Figure 4 shown. The method includes:

[0117] Step 101, when the first carrier path receives a target signal, control the second switching circuit to disconnect so that the second carrier path does not work.

[0118] In the embodiment of this application, the first carrier path can be the Primary Carrier Component (PCC), and correspondingly, the second carrier path can be the Secondary Carrier Component (SCC); conversely, the first carrier path can also be the Secondary Carrier Component, and correspondingly, the second carrier path can be the Primary Carrier Component.

[0119] It should be noted that if the amplifier is in a radio frequency circuit, the target signal can be a radio frequency signal; it should be noted that if the amplifier is in other circuits, the target signal can also be other signal types, and the specific type of the target signal is not limited in the embodiment of this application.

[0120] In some examples, the first switch circuit can be closed when the target signal is received on the first carrier path to control the operation of the first carrier path, and can be opened when the target signal is received on the second carrier path to control the non-operation of the first carrier path. Correspondingly, the second switch circuit can be opened when the target signal is received on the first carrier path to control the non-operation of the second carrier path, and can be closed when the target signal is received on the second carrier path to control the operation of the second carrier path.

[0121] Optionally, step 101 may specifically include: when the target signal is received by the first input unit, controlling the second switch circuit to open so that the second input unit does not operate.

[0122] For this embodiment, the second switch circuit can be opened when the target signal is received by the first input unit through the signal input terminal RFIN to control the non-operation of the second input unit and the second output unit, and can be closed when the target signal is received by the second input unit through the signal input terminal to control the operation of the second input unit 21 and the second output unit.

[0123] Optionally, step 101 may further specifically include: controlling the eighth switch, the ninth switch, and the tenth switch to open so that the seventh triode, the eighth triode, and the ninth triode are not conducting.

[0124] In the embodiments of the present application, the eighth switch can be opened when the target signal is received by the first input unit to control the seventh triode to conduct, and can also be closed when the target signal is received by the second input unit to control the seventh triode not to conduct.

[0125] In some examples, the ninth switch can be opened when the target signal is received by the first input unit to control the eighth triode to conduct, and can also be closed when the target signal is received by the second input unit to control the eighth triode not to conduct.

[0126] As an alternative, the ninth switch can be opened when the target signal is received by the first input unit to control the ninth triode to conduct, and can also be closed when the target signal is received by the second input unit to control the ninth triode not to conduct.

[0127] Step 102, when the target signal is received on the second carrier path, control the first switch circuit to open so that the first carrier path does not operate.

[0128] Optionally, step 102 may specifically include: when the target signal is received by the second input unit, controlling the first switch circuit to open so that the first input unit does not operate.

[0129] In some examples, the first switch circuit 3 closes when the first input unit 11 receives a target signal through the signal input terminal RFIN, controls the first input unit 11 and the first output unit 12 to operate, and disconnects when the second input unit 21 receives a target signal through the signal input terminal RFIN, controlling the first input unit 11 and the first output unit 12 not to operate.

[0130] Optionally, step 102 specifically further includes: controlling the third switch, the fourth switch, and the fifth switch to disconnect, so that the first diode, the second triode, and the third triode are not conducting.

[0131] In the embodiment of the present application, the third switch can close when the first input unit receives a target signal, controlling the first triode to conduct, and can also disconnect when the second input unit receives a target signal, controlling the first triode not to conduct.

[0132] In some examples, the fourth switch can close when the first input unit receives a target signal, controlling the second triode to conduct, and can also disconnect when the second input unit receives a target signal, controlling the second triode not to conduct.

[0133] As an alternative, the fifth switch can close when the first input unit receives a target signal, controlling the third triode to conduct, and can also disconnect when the second input unit receives a target signal, controlling the third triode not to conduct.

[0134] Compared with the current existing technologies, in this embodiment, by connecting the first carrier path to the first switch circuit, the first switch circuit can control the operating state of the first carrier path, and by connecting the second carrier path to the second switch circuit, the second switch circuit can control the operating state of the second carrier path. Specifically, when the second carrier path receives a target signal, the first switch circuit can control the first carrier path not to operate, and when the first carrier path receives a target signal, the second switch circuit can control the second carrier path not to operate, so that in the amplifier of this embodiment, when receiving a target signal through the first carrier path or the second carrier path, the other carrier path will not be erroneously turned on, thereby ensuring the linearity of the amplifier in this embodiment.

[0135] Further, as Figure 4 a specific implementation of the method shown, this embodiment provides a control device, as Figure 5 shown, the device includes: a control module 21.

[0136] The control module 21 is configured to control the second switch circuit to disconnect when a target signal is received on the first carrier path, so that the second carrier path does not work; when a target signal is received on the second carrier path, control the first switch circuit to disconnect, so that the first carrier path does not work.

[0137] In some examples of this embodiment, the control module 21 is specifically configured to control the second switch circuit to disconnect when the first input unit receives a target signal, so that the second input unit does not work; when the second input unit receives a target signal, control the first switch circuit to disconnect, so that the first input unit does not work.

[0138] In some examples of this embodiment, the control module 21 is further specifically configured to control the eighth switch, the ninth switch, and the tenth switch to disconnect, so that the seventh triode, the eighth triode, and the ninth triode are not conducting; control the third switch, the fourth switch, and the fifth switch to disconnect, so that the first diode, the second triode, and the third triode are not conducting.

[0139] It should be noted that for other corresponding descriptions of each functional unit involved in the control device provided in this embodiment, reference can be made to Figure 4 the corresponding description in, which will not be elaborated here.

[0140] Based on the method as shown above in Figure 4 Correspondingly, this embodiment further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the method as shown above in Figure 4 is implemented.

[0141] Based on such an understanding, the technical solution of this application can be embodied in the form of a software product. The software product can be stored in a non-volatile storage medium (which can be a CD-ROM, a USB flash drive, a mobile hard disk, etc.), and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods in various implementation scenarios of this application.

[0142] Based on the method as shown above in Figure 4 and Figure 5 the virtual device embodiment as shown in, for the purpose of achieving the above object, this embodiment of the application further provides an electronic device, such as an intelligent terminal such as a personal computer, a server, a laptop computer, a smart phone, a smart robot, etc. The device includes a storage medium and a processor; the storage medium is used to store a computer program; the processor is used to execute the computer program to implement the method as shown above in Figure 4 is implemented.

[0143] Optionally, the above-mentioned entity device may further include a user interface, a network interface, a camera, a Radio Frequency (RF) circuit, sensors, an audio circuit, a WI-FI module, etc. The user interface may include a display screen (Display) and an input unit such as a keyboard (Keyboard), etc. Optionally, the user interface may further include a USB interface, a card reader interface, etc. The network interface may optionally include a standard wired interface, a wireless interface (such as a WI-FI interface), etc.

[0144] Those skilled in the art can understand that the above-mentioned structure of the entity device provided in this embodiment does not constitute a limitation on the entity device, and it may include more or fewer components, or combine certain components, or have different component arrangements.

[0145] The storage medium may further include an operating system and a network communication module. The operating system is a program for managing the hardware and software resources of the above-mentioned entity device, and supports the operation of information processing programs and other software and / or programs. The network communication module is used to implement communication between components inside the storage medium, and communication between other hardware and software in the information processing entity device.

[0146] Based on the method as Figure 4 shown above, this embodiment further provides a chip, including one or more interface circuits and one or more processors; the interface circuit is used to receive a signal from the memory of the electronic device and send the signal to the processor, and the signal includes computer instructions stored in the memory; when the processor executes the computer instructions, the electronic device is caused to execute the method as Figure 4 shown above.

[0147] Through the description of the above embodiments, those skilled in the art can clearly understand that this application can be implemented by means of software plus a necessary general hardware platform, or can also be implemented by hardware. By applying the solution of this embodiment, compared with the current existing technologies, in this embodiment, by connecting the first carrier path to the first switching circuit, the first switching circuit can control the working state of the first carrier path, and by connecting the second carrier path to the second switching circuit, the second switching circuit can control the working state of the second carrier path. Specifically, when the second carrier path receives a target signal, the first switching circuit can control the first carrier path not to work, and when the first carrier path receives a target signal, the second switching circuit can control the second carrier path not to work, so that in the amplifier of this embodiment, when receiving a target signal through the first carrier path or the second carrier path, the other carrier path will not be accidentally turned on, thereby ensuring the linearity of the amplifier in this embodiment.

[0148] It should be noted that in this document, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, such that a process, method, article or device comprising a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising an..." does not exclude the presence of additional identical elements in the process, method, article or device comprising said element.

[0149] The above are only specific embodiments of the present application, enabling those skilled in the art to understand or implement the present application. Various modifications to these embodiments will be obvious to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to these embodiments described herein, but rather will conform to the broadest scope consistent with the principles and novel features claimed herein.

Claims

1. An amplifier, characterized in that, Comprising: A first carrier path, a second carrier path, and a first switching circuit; A first end of the first carrier path is connected to a first end of the second carrier path, and a second end of the first carrier path is connected to a first end of the first switching circuit; The first switching circuit is configured to disconnect when the second carrier path receives a target signal, and control the first carrier path not to operate.

2. The amplifier according to claim 1, characterized in that, It further includes a second switching circuit. A second end of the second carrier path is connected to a first end of the second switching circuit. The second switching circuit is configured to disconnect when the first carrier path receives a target signal, and control the second carrier path not to operate.

3. The amplifier according to claim 2, wherein The first end of the first carrier path is further connected to a signal input terminal, the first end of the first carrier path is further grounded through a first grounding inductor, a third end of the first carrier path is connected to a first bias voltage input terminal, a fourth end of the first carrier path is connected to a second bias voltage input terminal, fifth and sixth ends of the first carrier path are respectively connected to a power supply voltage, and a seventh end of the first carrier path is grounded; A second end of the first switching circuit is grounded.

4. The amplifier according to claim 3, wherein The first end of the second carrier path is further connected to the signal input terminal, the first end of the second carrier path is further grounded through the first grounding inductor, a third end of the second carrier path is connected to a third bias voltage input terminal, a fourth end of the second carrier path is connected to a fourth bias voltage input terminal, fifth and sixth ends of the second carrier path are respectively connected to the power supply voltage, and a seventh end of the second carrier path is grounded; A second end of the second switching circuit is grounded.

5. The amplifier according to claim 4, characterized in that, The first carrier path includes a first input unit and a first output unit; A first end of the first input unit is connected to a first end of the second carrier path, the first end of the first input unit is further connected to the signal input terminal, the first end of the first input unit is further grounded through the first grounding inductor, a second end of the first input unit is connected to a first end of the first switching circuit, a third end of the first input unit is connected to the first bias voltage input terminal, and a fourth end of the first input unit is connected to a first end of the first output unit; A second end of the first output unit is connected to the second bias voltage input terminal, third and fourth ends of the first output unit are respectively connected to the power supply voltage, and a fifth end of the first output unit is grounded.

6. The amplifier according to claim 5, characterized in that, The second carrier path includes a second input unit and a second output unit; The first end of the second input unit is connected to the first end of the first input unit. The first end of the second input unit is also connected to the signal input terminal. The first end of the second input unit is also grounded through the first grounding inductor. The second end of the second input unit is connected to the first end of the second switch circuit. The third end of the second input unit is connected to the third bias voltage input terminal. The fourth end of the second input unit is connected to the first end of the second output unit; The second end of the second output unit is connected to the fourth bias voltage input terminal. The third and fourth ends of the second output unit are respectively connected to the power supply voltage. The fifth end of the second output unit is grounded.

7. The amplifier according to claim 6, wherein The first switch circuit is configured to disconnect when the second input unit receives a target signal, and control the first input unit not to work; The second switch circuit is configured to disconnect when the first input unit receives a target signal, and control the second input unit not to work.

8. The amplifier according to claim 7, wherein The first input unit includes a first capacitor, a first resistor, a first triode, a second triode, and a third triode; The first end of the first capacitor is connected to the first end of the second input unit. The first end of the first capacitor is also connected to the signal input terminal. The first end of the first capacitor is also grounded through the first grounding inductor. The second end of the first capacitor is connected to the first end of the first resistor, the bases of the first triode, the second triode, and the third triode; The second end of the first resistor is connected to the first bias voltage input terminal. The collector of the first triode is connected to the first end of the first output unit, the collectors of the second triode and the third triode. The emitters of the first triode, the second triode, and the third triode are respectively connected to the first end of the first switch circuit.

9. The amplifier according to claim 8, wherein The first output unit includes a fourth triode, a fifth triode, a sixth triode, a first switch, a second switch, and a first mixer; The base of the fourth triode is connected to the second bias voltage input terminal and the first end of the first switch. The collector of the fourth triode is connected to the collectors of the fifth triode and the first end of the first mixer. The emitter of the fourth triode is connected to the collector of the first triode, the collectors of the second triode and the third triode, the emitter of the fifth triode, and the emitter of the sixth triode; The second end of the first switch is connected to the base of the fifth triode. The second end of the first mixer is connected to the power supply voltage. The base of the sixth triode is connected to the first end of the second switch. The collector of the sixth triode is connected to the power supply voltage. The second end of the second switch is grounded.

10. The amplifier according to claim 8, characterized in that, The first switch circuit includes a third switch, a fourth switch, a fifth switch, and a second grounding inductor; The first terminal of the third switch is connected to the emitter of the first triode, the first terminal of the fourth switch is connected to the emitter of the second triode, and the first terminal of the fifth switch is connected to the emitter of the third triode; The second terminals of the third switch, the fourth switch, and the fifth switch are respectively connected to the first terminal of the second grounding inductor, and the second terminal of the second grounding inductor is grounded.

11. The amplifier according to claim 10, wherein the third switch is configured to disconnect when the second input unit receives a target signal, and control the first triode not to conduct; the fourth switch is configured to disconnect when the second input unit receives a target signal, and control the second triode not to conduct; the fifth switch is configured to disconnect when the second input unit receives a target signal, and control the third triode not to conduct.

12. The amplifier according to claim 7, wherein The second input unit includes a second capacitor, a second resistor, a seventh triode, an eighth triode, and a ninth triode; The first terminal of the second capacitor is connected to the first terminal of the first capacitor, the first terminal of the second capacitor is further connected to the signal input terminal, the first terminal of the second capacitor is further grounded through the first grounding inductor, and the second terminal of the second capacitor is connected to the first terminal of the second resistor, the bases of the seventh triode, the eighth triode, and the ninth triode; The second terminal of the second resistor is connected to the third bias voltage input terminal, the collector of the seventh triode is connected to the first terminal of the second output unit, the collectors of the eighth triode and the ninth triode, and the emitters of the seventh triode, the eighth triode, and the ninth triode are respectively connected to the first terminal of the second switch circuit.

13. The amplifier according to claim 12, characterized in that, The second output unit includes a thirteenth triode, an eleventh triode, a twelfth triode, a sixth switch, a seventh switch, and a second mixer; The base of the thirteenth triode is connected to the fourth bias voltage input terminal and the first terminal of the sixth switch, the collector of the thirteenth triode is connected to the collector of the eleventh triode and the first terminal of the second mixer, and the emitter of the thirteenth triode is connected to the collectors of the seventh triode, the eighth triode, the ninth triode, the emitter of the eleventh triode, and the emitter of the twelfth triode; The second terminal of the sixth switch is connected to the base of the eleventh triode, the second terminal of the second mixer is connected to the power supply voltage, the base of the twelfth triode is connected to the first terminal of the seventh switch, the collector of the twelfth triode is connected to the power supply voltage, and the second terminal of the seventh switch is grounded.

14. The amplifier according to claim 12, characterized in that, The second switch circuit includes an eighth switch, a ninth switch, a tenth switch, and a third grounding inductor; The first terminal of the eighth switch is connected to the emitter of the seventh triode, the first terminal of the ninth switch is connected to the emitter of the eighth triode, and the first terminal of the tenth switch is connected to the emitter of the ninth triode; The second terminal of the eighth switch, the second terminal of the ninth switch, and the second terminal of the tenth switch are respectively connected to the first terminal of the third grounding inductor, and the second terminal of the third grounding inductor is grounded.

15. The amplifier according to claim 14, wherein the eighth switch is used to disconnect when the first input unit receives a target signal, and control the seventh triode to be non-conductive; the ninth switch is used to disconnect when the first input unit receives a target signal, and control the eighth triode to be non-conductive; the tenth switch is used to disconnect when the first input unit receives a target signal, and control the ninth triode to be non-conductive.

16. A control method, characterized in that, The control method is used for the amplifier according to any one of claims 1-15, and includes: when the first carrier path receives a target signal, controlling the second switch circuit to disconnect so that the second carrier path does not work; and / or, when the second carrier path receives a target signal, controlling the first switch circuit to disconnect so that the first carrier path does not work.

17. The control method according to claim 16, characterized in that, Controlling the second switch circuit to disconnect so that the second carrier path does not work when the first carrier path receives a target signal includes: when the first input unit receives a target signal, controlling the second switch circuit to disconnect so that the second input unit does not work; Controlling the first switch circuit to disconnect so that the first carrier path does not work when the second carrier path receives a target signal includes: when the second input unit receives a target signal, controlling the first switch circuit to disconnect so that the first input unit does not work.

18. The control method according to claim 17, characterized in that Controlling the second switch circuit to disconnect so that the second input unit does not work includes: controlling the eighth switch, the ninth switch, and the tenth switch to disconnect so that the seventh triode, the eighth triode, and the ninth triode are non-conductive; Controlling the first switch circuit to disconnect to control the first carrier path not to work includes: controlling the third switch, the fourth switch, and the fifth switch to disconnect so that the first triode, the second triode, and the third triode are non-conductive.

19. A signal control device, characterized in that, including: a control module configured to control the second switch circuit to disconnect when the first carrier path receives a target signal so that the second carrier path does not work; when the second carrier path receives a target signal, controlling the first switch circuit to disconnect so that the first carrier path does not work.

20. A computer-readable storage medium having a computer program stored thereon, characterized in that, The computer program, when executed by a processor, implements the method according to any one of claims 16 to 18.

21. An electronic device, characterized in that, It includes a storage medium, a processor, and a computer program stored on the storage medium and executable on the processor, wherein the processor, when executing the computer program, implements the method according to any one of claims 16 to 18.

22. A chip, characterized in that, Comprising one or more interface circuits and one or more processors; the interface circuits are configured to receive signals from a memory of an electronic device and send the signals to the processors, the signals including computer instructions stored in the memory; when the processors execute the computer instructions, the electronic device is caused to perform the method according to any one of claims 15 to 17.

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