Method and apparatus for coding configuration

Abstract

The application provides a method and device for encoding configuration. The method comprises: an optical network unit receiving first information, the first information being used for indicating a change amount of forward error correction code word information relative to a first forward error correction mother code; and the optical network unit determining the forward error correction code word information according to the first information. According to the technical scheme provided by the application, by indicating the change amount of the forward error correction code word information relative to the first forward error correction mother code, flexible configuration of the forward error correction code word information is facilitated.

Description

[0001] This application is a divisional application. The original application has the application number 202210015997.2 and the original application date is January 7, 2022. The entire contents of the original application are incorporated herein by reference. Technical Field

[0002] This application relates to the field of optical communications, and more specifically, to a method and apparatus for encoding configuration. Background Technology

[0003] In passive optical network (PON) systems, the transmission distance from different optical network units (ONUs) to the optical line termination (OLT) or the different splitters they pass through results in varying link losses between different ONUs and the OLT. Forward error correction (FEC) is used to address the link losses and transmission costs introduced by splitters and fiber optic transmission. This technique significantly reduces the optical signal-to-noise ratio (OSNR) tolerance at the receiver, and decreases the bit error rate and transmit power by adding redundant error-correcting codes to the transmission code.

[0004] Currently, to ensure transmission performance, the OLT and ONU define an FEC coding method based on the maximum possible link loss and use a unified FEC coding. Typically, in a PON system, some ONUs have high link loss to the OLT, while others have low link loss. For ONUs with low link loss, they do not require FEC coding with strong error correction capabilities, but they still need to use the same FEC coding method as the ONUs with high link loss. However, such FEC coding is usually costly or complex, leading to some waste.

[0005] Therefore, there is an urgent need for an encoding configuration method that can enable flexible configuration of forward error correction (FEC) codeword information. Summary of the Invention

[0006] This application provides a method and apparatus for encoding configuration, which helps to achieve flexible configuration of forward error correction codeword information.

[0007] In a first aspect, a method for encoding configuration is provided. This includes: an optical network unit receiving first information, the first information indicating the amount of change in forward error correction codeword information relative to a first forward error correction master code; and the optical network unit determining the forward error correction codeword information based on the first information.

[0008] The technical solution provided in this application helps to achieve flexible configuration of the forward error correction codeword information by indicating the amount of change of the forward error correction codeword information relative to the first forward error correction master code.

[0009] In conjunction with the first aspect, in some implementations of the first aspect, before receiving the first information, the method further includes: the optical network unit sending capability reporting information, the capability reporting information being used to indicate the forward error correction master code supported by the optical network unit, the forward error correction master code supported by the optical network unit including the first forward error correction master code.

[0010] The technical solution provided in this application allows the optical line terminal (OLT) to determine a first forward error correction (FEC) code from the FEC code supported by the optical network unit (ONU). The OLT can then process the first FEC code to determine suitable FEC codeword information for the ONU. Furthermore, it eliminates the need for standard-defined codeword information, facilitating flexible configuration of the FEC codeword information.

[0011] In conjunction with the first aspect, in some implementations of the first aspect, before sending the capability reporting information, the above method further includes: the optical network unit receiving capability query information, which is used to query the forward error correction master code supported by the optical network unit.

[0012] In conjunction with the first aspect, in some other implementations of the first aspect, the first information includes second information, which indicates the amount of change in the payload information of the forward error correction codeword information relative to the payload information of the first forward error correction master code via a bit sequence.

[0013] In conjunction with the first aspect, in some other implementations of the first aspect, the bit sequence of the second information includes a first sequence, the value of which is 0, to indicate that 256 or 128 bits of the first forward error correction code corresponding to the first sequence are truncated. In this case, the bit sequence of the second information may also include a second sequence, the value of which is 1, to indicate that 256 or 128 bits of the first forward error correction code corresponding to the second sequence are not truncated. Alternatively, the bit sequence of the second information includes a first sequence, the value of which is 1, to indicate that 256 or 128 bits of the first forward error correction code corresponding to the second sequence are truncated. In this case, the bit sequence of the second information may also include a second sequence, the value of which is 0, to indicate that 256 or 128 bits of the first forward error correction code corresponding to the second sequence are not truncated.

[0014] One bit of the bit sequence corresponds to one column (half a column) of the mother code matrix, which corresponds to 256 (128) bits of the mother code codeword information.

[0015] In conjunction with the first aspect, in some other implementations of the first aspect, the first information also includes third information, which indicates the amount of change in the check bit information of the forward error correction codeword information relative to the check information of the first forward error correction mother code through a bit sequence.

[0016] In conjunction with the first aspect, in some other implementations of the first aspect, the bit sequence of the third information includes a third sequence, the value of which is 0, to indicate that 256 or 128 bits of the first forward error correction code corresponding to the third sequence are punctured; in this case, the bit sequence of the third information may also include a fourth sequence, the value of which is 1, to indicate that 256 or 128 bits of the first forward error correction code corresponding to the fourth sequence are not punctured. Alternatively, the bit sequence of the third information includes a third sequence, the value of which is 1, to indicate that 256 or 128 bits of the first forward error correction code corresponding to the third sequence are punctured; in this case, the bit sequence of the third information may also include a fourth sequence, the value of which is 0, to indicate that 256 or 128 bits of the first forward error correction code corresponding to the fourth sequence are not punctured.

[0017] The technical solution of this application uses bit sequences to represent specific forward error correction codeword information. The first forward error correction master code can be processed in units of one column or half column of the encoded matrix to obtain the forward error correction codeword information, which helps to realize the flexible configuration of the forward error correction codeword information.

[0018] In conjunction with the first aspect, in some other implementations of the first aspect, the first information includes a first value indicating that the payload information of the first forward error correction mother code is truncated to the Mth bit in a first order to obtain the payload information of the forward error correction codeword information, where M is obtained by multiplying the first value by 256 or 128.

[0019] In conjunction with the first aspect, in some other implementations of the first aspect, the first information includes a second value indicating that the check bit information of the forward error correction codeword information is obtained by punching N bits of the check bit information of the first forward error correction mother code in a second order, where N is obtained by multiplying the second value by 256 or 128.

[0020] The technical solution of this application uses numerical values ​​to represent the processing of the mother code matrix corresponding to the first forward error correction mother code to obtain specific forward error correction codeword information, which helps to realize the flexible configuration of forward error correction codeword information.

[0021] The first order and / or the second order include either from back to front or from front to back.

[0022] In conjunction with the first aspect, in some implementations of the first aspect, the first information further includes a fourth information, which is used to indicate that the first information is effective.

[0023] The first information is carried in the first message, which includes at least one of the following: physical layer operation management and maintenance PLOAM message, optical network terminal management and control interface OMCI message, and operation management and maintenance OAM message.

[0024] Secondly, a method for encoding configuration is provided. This includes: an optical line terminal (OLT) determining first information, the first information indicating the amount of change in forward error correction codeword information relative to a first forward error correction master code; the OLT sending the first information to an optical network unit (ONU), wherein the first information is used by the ONU to determine the forward error correction codeword information.

[0025] The technical solution provided in this application helps to achieve flexible configuration of the forward error correction codeword information by indicating the amount of change of the forward error correction codeword information relative to the first forward error correction master code.

[0026] In conjunction with the second aspect, in some implementations of the second aspect, before sending the first information, the above method further includes: the optical line terminal receiving capability reporting information, the capability reporting information being used to indicate the forward error correction master code supported by the optical network unit, the forward error correction master code supported by the optical network unit including the first forward error correction master code.

[0027] The technical solution provided in this application allows the optical line terminal (OLT) to determine a first forward error correction (FEC) code from the FEC code supported by the optical network unit (ONU). The OLT can then process the first FEC code to determine suitable FEC codeword information for the ONU. Furthermore, it eliminates the need for standard-defined codeword information, facilitating flexible configuration of the FEC codeword information.

[0028] In conjunction with the second aspect, in some implementations of the second aspect, before receiving the capability reporting information, the above method further includes: the optical line terminal sending capability query information, which is used to query the forward error correction master code supported by the optical network unit.

[0029] In conjunction with the second aspect, in some other implementations of the second aspect, the first information includes the second information, which indicates the amount of change in the payload information of the forward error correction codeword information relative to the payload information of the first forward error correction master code via a bit sequence.

[0030] In conjunction with the second aspect, in some other implementations of the second aspect, the bit sequence of the second information includes a first sequence, the value of which is 0, to indicate that 256 or 128 bits of the first forward error correction code corresponding to the first sequence are truncated. In this case, the bit sequence of the second information may also include a second sequence, the value of which is 1, to indicate that 256 or 128 bits of the first forward error correction code corresponding to the second sequence are not truncated. Alternatively, the bit sequence of the second information includes a first sequence, the value of which is 1, to indicate that 256 or 128 bits of the first forward error correction code corresponding to the second sequence are truncated. In this case, the bit sequence of the second information may also include a second sequence, the value of which is 0, to indicate that 256 or 128 bits of the first forward error correction code corresponding to the second sequence are not truncated.

[0031] One bit of the bit sequence corresponds to one column (half a column) of the mother code matrix, which corresponds to 256 (128) bits of the mother code codeword information.

[0032] In conjunction with the second aspect, in some other implementations of the second aspect, the first information also includes a third information, which indicates the amount of change in the check bit information of the forward error correction codeword information relative to the check information of the first forward error correction mother code through a bit sequence.

[0033] In conjunction with the second aspect, in some other implementations of the second aspect, the bit sequence of the third information includes a third sequence, where the value of the third sequence is 0, indicating that 256 or 128 bits of the first forward error correction code corresponding to the third sequence are punctured. In this case, the bit sequence of the third information may also include a fourth sequence, where the value of the fourth sequence is 1, indicating that 256 or 128 bits of the first forward error correction code corresponding to the fourth sequence are not punctured. Alternatively, the bit sequence of the third information includes a fourth sequence, where the value of the fourth sequence is 1, indicating that 256 or 128 bits of the first forward error correction code corresponding to the fourth sequence are punctured. In this case, the bit sequence of the third information may also include a fourth sequence, where the value of the fourth sequence is 0, indicating that 256 or 128 bits of the first forward error correction code corresponding to the fourth sequence are not punctured.

[0034] The technical solution of this application uses bit sequences to represent specific forward error correction codeword information. The first forward error correction master code can be processed in units of one column or half column of the encoded matrix to obtain the forward error correction codeword information, which helps to realize the flexible configuration of the forward error correction codeword information.

[0035] In conjunction with the second aspect, in some other implementations of the second aspect, the first information includes a first value indicating that the payload information of the first forward error correction mother code is truncated to the Mth bit in a first order to obtain the payload information of the forward error correction codeword information, where M is obtained by multiplying the first value by 256 or 128.

[0036] In conjunction with the second aspect, in some further implementations of the second aspect, the first information includes a second value indicating that the check bit information of the forward error correction codeword information is obtained by punching N bits of the check bit information of the first forward error correction mother code in a second order, where N is obtained by multiplying the second value by 256 or 128.

[0037] The technical solution of this application uses numerical values ​​to represent the processing of the mother code matrix corresponding to the first forward error correction mother code to obtain specific forward error correction codeword information, which helps to realize the flexible configuration of forward error correction codeword information.

[0038] The first order and / or the second order include either from back to front or from front to back.

[0039] In conjunction with the second aspect, in some implementations of the second aspect, the first information further includes a fourth information, which is used to indicate that the first information is effective.

[0040] The first information is carried in the first message, which includes at least one of the following: physical layer operation management and maintenance PLOAM message, optical network terminal management and control interface OMCI message, and operation management and maintenance OAM message.

[0041] Thirdly, an apparatus for encoding configuration is provided. The apparatus includes: a transceiver unit for receiving first information, the first information indicating a change in forward error correction codeword information relative to a first forward error correction master code; and a processing unit for determining the forward error correction codeword information based on the first information.

[0042] In conjunction with the third aspect, in some implementations of the third aspect, the transceiver unit is also used to send capability reporting information, which is used to indicate the forward error correction master code supported by the optical network unit, and the forward error correction master code supported by the optical network unit includes a first forward error correction master code.

[0043] In conjunction with the third aspect, in some implementations of the third aspect, the transceiver unit is also used to receive capability query information, which is used to query the forward error correction master code supported by the optical network unit.

[0044] Fourthly, an apparatus for encoding configuration is provided. The apparatus includes: a processing unit for determining first information, the first information indicating a change in forward error correction codeword information relative to a first forward error correction master code; and a transceiver unit for transmitting the first information to an optical network unit.

[0045] In conjunction with the fourth aspect, in some implementations of the fourth aspect, the transceiver unit is also used to receive capability reporting information, which is used to indicate the forward error correction master code supported by the optical network unit, and the forward error correction master code supported by the optical network unit includes a first forward error correction master code.

[0046] In conjunction with the fourth aspect, in some implementations of the fourth aspect, the transceiver unit is also used to send capability query information, which is used to query the forward error correction master code supported by the optical network unit.

[0047] Fifthly, a communication device is provided, comprising: a processor; the processor being coupled to a memory, and after reading instructions from the memory, executing the method as described in any of the preceding aspects according to the instructions. The communication device may be an optical network unit entity as described in the first aspect, or a device comprising the optical network unit entity; or, the communication device may be an optical line terminal entity as described in the second aspect, or a device comprising the optical line terminal entity.

[0048] In conjunction with the fifth aspect above, in one possible implementation, the communication device further includes a memory for storing necessary program instructions and data.

[0049] In conjunction with the fifth aspect above, in one possible implementation, the communication device is a chip or a chip system. Optionally, when the communication device is a chip system, it can be composed of chips or may include chips and other discrete components.

[0050] A sixth aspect provides a communication device, comprising: a processor and an interface circuit; the interface circuit being configured to receive a computer program or instructions and transmit them to the processor; the processor being configured to execute the computer program or instructions to cause the communication device to perform the methods described in the first or second aspect above.

[0051] In conjunction with the sixth aspect above, in one possible implementation, the communication device is a chip or a chip system. Optionally, when the billing device is a chip system, it can be composed of chips or may include chips and other discrete components.

[0052] In a seventh aspect, a communication system is provided, including the optical network unit described in the first and second aspects above, and an optical line terminal.

[0053] The optical network unit is used to perform the method described in the first aspect, and the optical line terminal is used to perform the method described in the second aspect.

[0054] Eighthly, a computer program product is provided, the computer program product comprising: computer program code, which, when run on a computer, causes the computer to perform the methods described in the preceding aspects.

[0055] It should be noted that the above-mentioned computer program code can be stored in whole or in part on the first storage medium, wherein the first storage medium can be packaged together with the processor or packaged separately from the processor. This application embodiment does not specifically limit this.

[0056] Ninthly, a computer-readable medium is provided that stores program code, which, when run on a computer, causes the computer to perform the methods described in the preceding aspects.

[0057] In a tenth aspect, a chip system is provided, including a memory and a processor, the memory for storing a computer program and the processor for calling and running the computer program from the memory, such that a communication device equipped with the chip system performs the methods of any of the first to second aspects and their possible implementations described above.

[0058] The chip system may include an input chip or interface for transmitting information or data, and an output chip or interface for receiving information or data. Attached Figure Description

[0059] Figure 1 This is a schematic diagram of uplink and downlink transmission in a PON system.

[0060] Figure 2 This is a schematic diagram of the encoding configuration method provided in the embodiments of this application.

[0061] Figure 3 This is a schematic diagram illustrating a specific example of the encoding configuration method provided in the embodiments of this application.

[0062] Figure 4 This is a schematic diagram illustrating the forward error correction codeword information indicated by a bit sequence, as provided in an embodiment of this application.

[0063] Figure 5 This is a schematic diagram illustrating forward error correction codeword information indicated by numerical values, provided in an embodiment of this application.

[0064] Figure 6 This is a schematic diagram of the encoding configuration device provided in the embodiments of this application.

[0065] Figure 7 This is a schematic diagram of the encoding configuration device provided in the embodiments of this application. Detailed Implementation

[0066] The technical solutions in this application will now be described with reference to the accompanying drawings.

[0067] With the increasing sophistication of telecommunications services, users' demand for bandwidth is also growing. Domestic and international operators have made Fiber to the Home (FTTH) an inevitable choice for access networks, and PON systems have become the mainstream choice for FTTH. In a PON network, this access technology allows only passive optical devices such as optical fibers and optical splitters between the central office (OLT) and the user (ONU), eliminating the need for leased equipment rooms and power supplies; hence, it is called a passive optical network. In PON networks, downlink transmission is broadcast, while uplink transmission is unicast.

[0068] Figure 1 A schematic diagram of uplink and downlink transmission in a PON system is shown.

[0069] like Figure 1 As shown, during downlink transmission, the 1 signal sent by the OLT is split into N signals by a splitter and sent to all ONUs simultaneously. The ONUs selectively receive downlink data with the same ID number as themselves and discard other data.

[0070] During uplink transmission, the optical signals from N ONUs are combined into a single optical signal group using time division multiplexing (TDM). The principle is to divide the uplink transmission time into several time slots Ti (i = 1, 2, 3, ..., 32, ...). Within each time slot, only one ONU is scheduled to send packet information to the OLT in a packet-based manner. Each ONU sends its packet sequentially according to the order specified by the OLT. TDM requires the OLT to determine its distance from each ONU and then strictly time the transmission of each ONU. Each ONU obtains timing information from the downlink signal sent by the OLT and transmits its uplink packet signal within the time slot specified by the OLT, thus avoiding collisions between ONUs. PON based on this principle is called Time Division Multiplexing Passive Optical Network (TDM-PON).

[0071] In PON systems, the transmission distance from different ONUs to the OLT or the optical splitters they pass through varies, resulting in different link losses between different ONUs and the OLT. FEC (Fiber Optic Error Correction) technology is used to address the link losses and transmission costs introduced by optical splitters and fiber optic transmission. This technology significantly reduces the OSNR tolerance at the receiver, lowers the bit error rate, and reduces transmit power by adding redundant error correction codes to the transmission code sequence. Simultaneously, this technology effectively improves the channel performance of fiber optic signal transmission. Signals inevitably experience various types of distortion and non-uniform time delays during transmission through different media, contributing to the bit error rate and jitter, which are ultimately reflected in the system's bit error rate. FEC technology can address fiber dispersion, signal attenuation, channel noise, and interference between multiple fibers in long-distance, ultra-long-distance, and high-capacity dense wavelength division multiplexing (DWDM) fiber optic communication systems, significantly reducing the performance degradation between different systems.

[0072] In 10G PON, Reed-solomon (RS) coding for FEC is used. In 50G PON, low-density parity check (LDPC) coding is chosen. The performance and implementation costs of different FEC coding methods vary; more complex FEC coding methods often yield greater coding benefits. Conversely, the same coding method can introduce more overhead, which can also lead to greater coding benefits.

[0073] Currently, to ensure transmission performance, the OLT and ONU define an FEC coding method based on the maximum possible link loss and use a unified FEC coding. Typically, in a PON system, some ONUs have high link loss to the OLT, while others have low link loss. For ONUs with low link loss, they do not require FEC coding with strong error correction capabilities, but they still need to use the same FEC coding method as the ONUs with high link loss. However, such FEC coding is usually costly or complex, leading to some waste.

[0074] Based on this, this application proposes a method and apparatus for encoding configuration, aiming to achieve flexible configuration of forward error correction (FEC) codeword information. The technical solution of this application will be described in detail below using the interaction between the optical line terminal 110 and the optical network unit 120 as an example.

[0075] Figure 2 A schematic diagram of the encoding configuration method provided in an embodiment of this application is shown.

[0076] S21 0, the optical network unit 120 receives first information, which is used to indicate the amount of change of the forward error correction codeword information relative to the first forward error correction master code.

[0077] The first information is determined by the optical line terminal 110, which can determine the forward error correction codeword information suitable for the optical network unit 120 based on the signal quality, transmission power, etc. of the optical network unit 120. The first information indicates the amount of change of the forward error correction codeword information relative to the first forward error correction master code, thereby enabling the optical network unit 120 to accurately obtain the forward error correction codeword information.

[0078] Before receiving the first information, the optical network unit 120 may send capability reporting information to the optical line terminal 110. The capability reporting information is used to indicate the forward error correction master code supported by the optical network unit 120. The forward error correction master code supported by the optical network unit 120 includes the first forward error correction master code.

[0079] In this way, the optical line terminal 110 determines the first forward error correction code from the forward error correction code supported by the optical network unit 120, and can process the first forward error correction code to determine the forward error correction codeword information suitable for the optical network unit 120. Furthermore, without the need for standard-defined codeword information, it is possible to achieve flexible configuration of the forward error correction codeword information.

[0080] Optionally, before sending capability reporting information, the optical network unit 120 may receive capability query information sent by the optical line terminal 110. The capability query information is used to query the forward error correction master code supported by the optical network unit 120.

[0081] The first information is carried in the first message, which includes at least one of the following: physical layer operation management and maintenance PLOAM message, optical network terminal management and control interface OMCI message, and operation management and maintenance OAM message.

[0082] S220, the optical network unit 120 determines the forward error correction codeword information based on the first information.

[0083] As one possible implementation, the first information may include second information, which indicates the amount of change in the payload information of the forward error correction codeword information relative to the payload information of the first forward error correction master code via a bit sequence.

[0084] The bit sequence of the second information includes a first sequence, the value of which is 0, which indicates that 256 or 128 bits of the first forward error correction mother code corresponding to the first sequence are truncated; at this time, the bit sequence of the second information may also include a second sequence, the value of which is 1, which indicates that 256 or 128 bits of the first forward error correction mother code corresponding to the second sequence are not truncated.

[0085] Alternatively, the bit sequence of the second information may include the first sequence, with a value of 1, which indicates that 256 or 128 bits of the first forward error correction code corresponding to the second sequence are truncated. In this case, the bit sequence of the second information may also include the second sequence, with a value of 0, which indicates that 256 or 128 bits of the first forward error correction code corresponding to the second sequence are not truncated.

[0086] One bit of the bit sequence corresponds to one column (half a column) of the mother code matrix, which corresponds to 256 (128) bits of the mother code codeword information.

[0087] Optionally, the first information may also include third information, which indicates the amount of change in the check bit information of the forward error correction codeword information relative to the check information of the first forward error correction mother code through a bit sequence.

[0088] The third information bit sequence includes a third sequence, with a value of 0, which indicates that 256 or 128 bits of the first forward error correction code corresponding to the third sequence are punctured. At this time, the third information bit sequence may also include a fourth sequence, with a value of 1, which indicates that 256 or 128 bits of the first forward error correction code corresponding to the fourth sequence are not punctured.

[0089] Alternatively, the bit sequence of the third information may include a third sequence, with a value of 1, which indicates that 256 or 128 bits of the first forward error correction code corresponding to the third sequence are punctured; in this case, the bit sequence of the third information may also include a fourth sequence, with a value of 0, which indicates that 256 or 128 bits of the first forward error correction code corresponding to the fourth sequence are not punctured.

[0090] The technical solution of this application uses bit sequences to represent specific forward error correction codeword information. The first forward error correction master code can be processed in units of one column or half column of the encoded matrix to obtain the forward error correction codeword information, which helps to realize the flexible configuration of the forward error correction codeword information.

[0091] As another possible implementation, the first information may include a first value, which indicates that the payload information of the first forward error correction mother code is truncated by M bits in a first order to obtain the payload information of the forward error correction codeword information, where M is obtained by multiplying the first value by 256 or 128.

[0092] Optionally, the first information may also include a second value, indicating the check bit information of the forward error correction codeword information obtained by punching N bits of the check bit information of the first forward error correction mother code in a second order, where N is obtained by multiplying the second value by 256 or 128.

[0093] The first order and / or the second order include either from back to front or from front to back.

[0094] The technical solution of this application uses numerical values ​​to represent the processing of the mother code matrix corresponding to the first forward error correction mother code to obtain specific forward error correction codeword information, which helps to realize the flexible configuration of forward error correction codeword information.

[0095] Optionally, the first information may also include a fourth information, which is used to indicate that the first information is effective.

[0096] The technical solution provided in this application helps to achieve flexible configuration of the forward error correction codeword information by indicating the amount of change of the forward error correction codeword information relative to the first forward error correction master code.

[0097] Figure 3 A schematic diagram illustrating a specific example of the encoding configuration method provided in the embodiments of this application is shown.

[0098] S310, the optical network unit 120 receives capability query information sent by the optical line terminal 110.

[0099] The capability query information is used to query the forward error correction master code supported by the optical network unit 120. This capability query information can be carried in a first message, which includes at least one of the following: a physical layer operation, management, and maintenance (PLOAM) message, an optical network terminal management and control interface (OMCI) message, and an operation, management, and maintenance (OAM) message.

[0100] As an example, and not a limitation, when capability query information is carried in a PLOAM message, its specific form and content can be shown in Table 1 below. The bolded portion, "FEC capability query," indicates that the optical line terminal 110 is querying or inquiring about the type of forward error correction master code supported by the optical network unit 120.

[0101] Table 1. Format and Content of Capability Query Information

[0102]

[0103] S320, Optical Network Unit 120 transmits capability reporting information.

[0104] As examples, and not limitations, when capability reporting information is carried in a PLOAM message, its specific form can be shown in Tables 2 and 3 below. The bolded section "FEC code Capability" indicates the type of forward error correction (FEC) master code supported by the optical network unit 120. In Table 2, the FEC master codes supported by the optical network unit 120 include LDPC. In Table 3, the optical network unit 120 supports truncating and puncturing the FEC master code.

[0105] Table 2. Forms and Contents of Capability Reporting Information

[0106]

[0107] Table 3. Forms and Contents of Capability Reporting Information

[0108]

[0109] S330, the optical line terminal 110 determines the first information, which is used to indicate the amount of change of the forward error correction codeword information relative to the first forward error correction master code.

[0110] Forward error correction codeword information includes payload information and parity bit information. In the embodiments of this application, the first information can indicate the amount of change in the forward error correction codeword information relative to the first forward error correction master code through bit sequences and / or numerical values. In 50G PON, a 12*69 encoding matrix is ​​used. When generating a new codeword structure based on this encoding matrix, the columns of the matrix are typically pruned in units of one column or half a column. Figure 4 As shown, the default codeword LDPC(17280, 14592) uses the first 57 columns + 12 columns of this matrix during encoding. Depending on the content of the first piece of information, this can be divided into the following four cases.

[0111] Scenario 1:

[0112] The payload and parity bits of the forward error correction codeword information are indicated by the bit sequence.

[0113] Specifically, the aforementioned first information may simultaneously include second and third information. The second information indicates, through a bit sequence, the change in the payload information of the forward error correction codeword information relative to the payload information of the first forward error correction master code. The third information indicates, through a bit sequence, the change in the check bit information of the forward error correction codeword information relative to the check bit information of the first forward error correction master code. Thus, the forward error correction codeword information configured for the optical network unit 120 is represented by a bit sequence.

[0114] As an example, and not a limitation, when the first information is carried in a PLOAM message, its specific form can be as shown in Table 4 below. The bold text "FEC capability set" indicates that the message configures forward error correction codeword information for the optical network unit 120, and the bold text "FEC code selection" indicates that the message includes a bit sequence.

[0115] Table 4: Form and Content of the First Message in Scenario 1

[0116]

[0117] like Figure 4As shown, the 12*69 master code matrix has 69 columns, of which 57 columns are payload information and 12 columns are parity information. Taking the forward error correction codeword information represented by bit sequence A as an example, one column of the master code matrix corresponds to 256 bits of codeword information, which corresponds to one bit of bit sequence A. Bit sequence A includes bit sequence A1 and bit sequence A2. Bit sequence A contains 69 bits, bit sequence A1 contains 57 bits, and bit sequence A2 contains 12 bits. Bit sequence A1 represents the change in the payload information of the forward error correction codeword information relative to the payload information of the first forward error correction master code, and bit sequence A2 represents the change in the parity information of the forward error correction codeword information relative to the parity information of the first forward error correction master code. That is, the first information is bit sequence A, the second information is bit sequence A1, and the third information is bit sequence A2. The bit sequence A1 includes a first sequence (e.g., columns 1 and 2), where a value of 0 indicates that the 256 bits of the first forward error correction codename corresponding to the first sequence are truncated. At this time, the bit sequence A1 also includes a second sequence (e.g., columns 3 to 57), where a value of 0 indicates that the 256 bits of the first forward error correction codename corresponding to the second sequence are not truncated. This completes the process of indicating the change in the payload information of the forward error correction codeword information relative to the payload information of the first forward error correction codename through the bit sequence A1. After receiving this second information (i.e., bit sequence A1), the optical network unit 120 can truncate the payload information of the first forward error correction codename according to the indication of the bit sequence, thereby obtaining the payload information of the forward error correction codeword information configured by the optical network unit 120. In this scenario, bit sequence A2 includes a third sequence (e.g., columns 1 to 3 from the end), with a value of 0, indicating that 256 bits of the first forward error correction codename corresponding to the third sequence are punctured. Bit sequence A2 also includes a fourth sequence (e.g., columns 4 to 12 from the end), with a value of 1, indicating that 256 bits of the first forward error correction codename corresponding to the fourth sequence are not punctured. This completes the process of indicating the change in the parity information of the forward error correction codeword information relative to the parity information of the first forward error correction codename through bit sequence A2. Upon receiving this third information (i.e., bit sequence A2), optical network unit 120 can puncture the parity information of the first forward error correction codename according to the bit sequence indication, thereby obtaining the parity information of the forward error correction codeword information configured by optical network unit 120.

[0118] Correspondingly, taking the representation of forward error correction codeword information using bit sequence B as an example, half a column of the mother code matrix corresponds to 128 bits of the codeword information, which in turn corresponds to one bit of bit sequence B. Bit sequence B includes bit sequence B1 and bit sequence B2. Unlike bit sequence A mentioned above, bit sequence B includes 69 * 2 = 138 bits, bit sequence B1 includes 57 * 2 = 114 bits, and bit sequence B2 includes 12 * 2 = 24 bits. For further details, please refer to the above description of bit sequence A; it will not be repeated here.

[0119] It should be understood that in the embodiments of this application, setting the value corresponding to the sequence to 0 can indicate that the 256 or 128 bits of the first forward error correction mother code corresponding to the sequence are truncated or punctured, or setting the value corresponding to the sequence to 1 can indicate that the 256 or 128 bits of the first forward error correction mother code corresponding to the sequence are truncated or punctured. This application does not limit the specific implementation of these methods.

[0120] In this scenario, when the bit sequence is in half-column units, it can contain a maximum of 69*2=138 bits, meaning that 18 bytes (144 bits) are needed to complete the indication. When the bit sequence is in column units, it can contain a maximum of 69 bits, meaning that 9 bytes (72 bits) are needed to complete the indication. This helps to reduce signaling overhead and save transmission resources.

[0121] Optionally, to ensure the validity of the codeword, not all columns are typically punched or truncated; only some columns can be punched or truncated. For example, a maximum of 32 columns can be truncated and 8 columns punched. Therefore, when using half-columns as units, the bit sequence can include a maximum of (32+8)*2 = 80 bits, meaning 10 bytes (80 bits) are needed to complete the indication. When using columns as units, the bit sequence can include a maximum of 32+8 = 40 bits, meaning 5 bytes (40 bits) are needed to complete the indication, further reducing signaling overhead and saving transmission resources.

[0122] Optionally, the priority order for truncation can be to start from the last column. For example, to truncate 3 columns, start truncation from column 57, then truncate columns 57, 56, and 55 in sequence. When punching holes, you can punch holes in the order of column 59, 60, 61, 62, 67, and so on.

[0123] According to the technical solution described in Scenario 1, the specific forward error correction codeword information is represented by a bit sequence. The first forward error correction master code can be processed in units of one column or half column of the encoded matrix to obtain the forward error correction codeword information, which helps to realize the flexible configuration of the forward error correction codeword information.

[0124] Scenario 2:

[0125] The payload and check bits of the forward error correction codeword information are indicated by numerical values.

[0126] Specifically, the aforementioned first information may simultaneously include a first value and a second value. The first value indicates that the payload information of the first forward error correction master code is truncated by the Mth bit in a first order to obtain the payload information of the forward error correction codeword. The second value indicates that the check bit information of the first forward error correction master code is punched with N bits in a second order to obtain the check bit information of the forward error correction codeword. Here, M is obtained by multiplying the first value by 256 or 128, and N is obtained by multiplying the second value by 256 or 128.

[0127] As an example, and not a limitation, when the first information is carried in a PLOAM message, its specific form can be as shown in Table 5 below. In this table, the bold text “FEC capability set” indicates that the message configures forward error correction codeword information for the optical network unit 120, the bold text “Shortened columns number” represents the first value, and the bold text “Puncturedcolumnsnumber” represents the second value.

[0128] Table 5: Form and content of the first information in scenario 2

[0129]

[0130] like Figure 5 As shown, the 12*69 mother code matrix has 69 columns, of which 57 columns are payload information and 12 columns are parity information.

[0131] In one possible implementation, one column of the mother code matrix corresponds to 256 bits of codeword information, and one bit of the first value. When the first value is 3 and the first order is from back to front, it means that the payload information of the first forward error correction mother code is truncated by the Mth bit from back to front to obtain the payload information of the forward error correction codeword information. Here, M is obtained by multiplying the first value by 256, i.e., M = 3 * 256 = 768. Thus, after receiving this first value, the optical network unit 120 can process the payload information of the first forward error correction mother code to obtain the payload information of the forward error correction codeword information.

[0132] When the second value is 2 and the second order is from back to front, it means that the check bit information of the first forward error correction master code is punctured by N bits from back to front to obtain the check bit information of the forward error correction codeword. Here, N is obtained by multiplying the second value by 256, i.e., N = 2 * 256 = 512. Thus, after receiving this second value, the optical network unit 120 can process the check bit information of the first forward error correction master code to obtain the check bit information of the forward error correction codeword.

[0133] As another possible implementation, half a column of the mother code matrix corresponds to 128 bits of codeword information, corresponding to one bit of the first value. When the first value is 3 and the first order is from back to front, it means that the payload information of the first forward error correction mother code is truncated by the Mth bit from back to front to obtain the payload information of the forward error correction codeword. Here, M is obtained by multiplying the first value by 128, i.e., M = 3 * 128 = 384. Thus, after receiving this first value, the optical network unit 120 can process the payload information of the first forward error correction mother code to obtain the payload information of the forward error correction codeword. When the second value is 2 and the second order is from back to front, it means that the check bit information of the first forward error correction mother code is punctured by N bits from back to front to obtain the check bit information of the forward error correction codeword. Here, N is obtained by multiplying the second value by 128, i.e., N = 2 * 128 = 256. In this way, after receiving the second value, the optical network unit 120 can process the check bit information of the first forward error correction mother code to obtain the check bit information of the forward error correction codeword information.

[0134] It should be understood that, in the embodiments of this application, the first order and / or the second order may include from back to front or from front to back. The first order and the second order may be the same or different. Optionally, the first order and / or the second order may also be an order stipulated by negotiation or agreement, such as starting from a certain middle column, etc., which is not limited in this application. The first order and / or the second order may be continuous; for example, when the first value is 3, three consecutive columns (or half a column) are processed. Optionally, the first order and / or the second order may also be non-continuous; for example, when the first value is 3, according to the order stipulated by negotiation or agreement, the processing may be carried out in the order of odd-numbered columns or even-numbered columns, etc., which is not limited in this application.

[0135] Optionally, the priority order for truncation can be to start from the last column. For example, to truncate 3 columns, start truncation from column 57, then truncate columns 57, 56, and 55 in sequence. When punching holes, you can punch holes in the order of column 59, 60, 61, 62, 67, and so on.

[0136] In this scenario, when measured in half-column units, the payload portion has 57*2 possibilities, and the parity bit has 12*2 possibilities. The payload portion requires a minimum of 7 bits, and the parity bit only requires 5 bits, which helps reduce signaling overhead and save transmission resources.

[0137] Optionally, to ensure the validity of the codewords, not all columns are typically punched or truncated; only a portion of the columns can be punched or truncated. For example, a maximum of 32 columns can be truncated and 8 columns punched. When using half-columns as units, only 6 bits are needed to represent the payload and 4 bits to represent the checksum, further reducing signaling overhead and saving transmission resources.

[0138] According to the technical solution described in scenario 2, the processing of the mother code matrix corresponding to the first forward error correction mother code is represented by numerical values ​​to obtain specific forward error correction codeword information, which helps to realize flexible configuration of forward error correction codeword information.

[0139] Scenario 3:

[0140] The payload portion of the forward error correction codeword information is indicated by the bit sequence, and the parity portion is indicated by the numerical value.

[0141] Specifically, the aforementioned first information may simultaneously include second information and a second numerical value. The second information, through a bit sequence, indicates the change in the payload information of the forward error correction codeword relative to the payload information of the first forward error correction master code. The second numerical value indicates the check bit information of the forward error correction codeword obtained by punching N bits in a second order from the check bit information of the first forward error correction master code. Here, N is obtained by multiplying the second numerical value by 256 or 128. For example, the second information includes a bit sequence A1. When measured in half-column units, bit sequence A1 includes 57*2 = 114 bits. In this case, the check bit portion can be indicated using only 5 bits by representing it numerically.

[0142] It should be understood that the specific representation of the second information and the second value, as well as their beneficial effects, can be referred to the descriptions in Situations 1 and 2 above, and will not be repeated here.

[0143] According to the technical solution described in scenario 3, the payload information of the forward error correction codeword information is represented by a bit sequence, and the check bit information of the forward error correction codeword information is represented by a numerical value. The first forward error correction mother code can be processed in units of one column or half column of the encoded matrix to obtain the forward error correction codeword information, which helps to realize the flexible configuration of the forward error correction codeword information.

[0144] Scenario 4:

[0145] The payload portion of the forward error correction codeword information is indicated by numerical values, and the parity portion of the forward error correction codeword information is indicated by bit sequences.

[0146] Specifically, the aforementioned first information may simultaneously include third information and a first numerical value. The first numerical value indicates the payload information of the forward error correction codeword information obtained by truncating the M-th bit of the payload information of the first forward error correction master code according to a first order. Here, M is obtained by multiplying the first numerical value by 256 or 128. The third information indicates the amount of change in the check bit information of the forward error correction codeword information relative to the check information of the first forward error correction master code through a bit sequence. For example, when using columns as units, the payload portion is represented by 7 bits, and the third information includes a bit sequence A2, which includes 12 bits.

[0147] It should be understood that the specific representation of the third information and the first value, as well as their beneficial effects, can be referred to in the descriptions of Situations 1 and 2 above, and will not be repeated here.

[0148] According to the technical solution described in scenario 4, the payload information of the forward error correction codeword information is represented by numerical values, and the check bit information of the forward error correction codeword information is represented by bit sequences. The first forward error correction mother code can be processed in units of one column or half column of the encoded matrix to obtain the forward error correction codeword information, which helps to realize the flexible configuration of the forward error correction codeword information.

[0149] S340, the optical line terminal 110 sends the first information to the optical network unit 120.

[0150] The first information is carried in the first message, which includes at least one of the following: physical layer operation management and maintenance PLOAM message, optical network terminal management and control interface OMCI message, and operation management and maintenance OAM message.

[0151] S350, the optical network unit 120 determines the forward error correction codeword information based on the first information.

[0152] Specifically, corresponding to the description in S330, the optical network unit 120 processes the first forward error correction master code according to the content of the first information, the bit sequence and / or the value, and in units of one column or half column of the encoded matrix, to obtain forward error correction codeword information.

[0153] The technical solution provided in this application helps to achieve flexible configuration of the forward error correction codeword information by indicating the amount of change of the forward error correction codeword information relative to the first forward error correction master code.

[0154] It should be understood that the sequence number of each process does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0155] It should also be understood that, in the various embodiments of this application, unless otherwise specified or in case of logical conflict, the terms and / or descriptions between different embodiments are consistent and can be referenced by each other, and the technical features in different embodiments can be combined to form new embodiments according to their inherent logical relationships.

[0156] It is understood that the method implemented by the communication device in the above embodiments of this application can also be implemented by a component (such as a chip or circuit) that can be configured inside the communication device.

[0157] The above, combined with Figure 2 , Figure 3 , Figure 4 as well as Figure 5 The encoding configuration method provided in the embodiments of this application is described in detail. The above-described encoding configuration method is mainly introduced from the perspective of interaction between various network elements. It is understood that each device, in order to achieve the above functions, includes corresponding hardware structures and / or software modules for executing each function. Those skilled in the art should recognize that, based on the units and algorithm steps of the examples described in conjunction with the embodiments disclosed herein, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed by hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0158] The following, combined with Figure 6 and Figure 7 This application provides a detailed description of the encoding configuration apparatus provided in the embodiments. It should be understood that the descriptions of the apparatus embodiments correspond to the descriptions of the method embodiments; therefore, any content not described in detail can be found in the above method embodiments. For brevity, some content is omitted.

[0159] This application embodiment can divide the transmitting or receiving device into functional modules according to the above method examples. For example, each function can be divided into its own functional modules, or two or more functions can be integrated into one processing module. The integrated module can be implemented in hardware or as a software functional module. It should be noted that the module division in this application embodiment is illustrative and only represents one logical functional division. In actual implementation, there may be other division methods. The following description uses the division of functional modules according to each function as an example.

[0160] Figure 6A schematic structural diagram of an example of the encoding configuration of this application is shown. Any device involved in any of the methods 200 to 400 described above, such as an optical line terminal (OLT) or an optical network unit (ONU), can be... Figure 6 The device with the encoding configuration shown is used for implementation.

[0161] It should be understood that the device 600 for encoding configuration can be a physical device, a component of a physical device (e.g., an integrated circuit, a chip, etc.), or a functional module within a physical device.

[0162] like Figure 6 As shown, the device 600 with this encoding configuration includes one or more processors 610. The processor 610 can store execution instructions for performing the methods of the embodiments of this application. Optionally, the processor 610 can invoke an interface to implement receiving and transmitting functions. The interface can be a logical interface or a physical interface, without limitation. For example, the interface can be a transceiver circuit or an interface circuit. The transceiver circuit or interface circuit used to implement receiving and transmitting functions can be separate or integrated together. The aforementioned transceiver circuit or interface circuit can be used for reading and writing code / data, or it can be used for transmitting or relaying signals.

[0163] Optionally, the interface can be implemented using a transceiver. Optionally, the device 600 with this encoding configuration may also include a transceiver 630. The transceiver 630 may be referred to as a transceiver unit, transceiver, transceiver circuit, or transceiver, etc., and is used to implement transceiver functions.

[0164] Optionally, the coded configuration device 600 may further include a memory 620. This application embodiment does not specifically limit the deployment location of the memory 620; the memory may be integrated into the processor or may be independent of the processor. In the case where the coded configuration device 600 does not include a memory, the coded configuration device 600 only needs to have processing capabilities, and the memory can be deployed in other locations (e.g., a cloud system).

[0165] The processor 610, memory 620 and transceiver 630 communicate with each other through internal connection paths to transmit control and / or data signals.

[0166] It is understood that, although not shown, the coded configuration device 600 may also include other devices, such as input devices, output devices, batteries, etc.

[0167] Optionally, in some embodiments, memory 620 may store execution instructions for performing the methods of the embodiments of this application. Processor 610 may execute the instructions stored in memory 620 in conjunction with other hardware (e.g., transceiver 630) to complete the steps of the method execution shown below. For specific working processes and beneficial effects, please refer to the description in the above method embodiments.

[0168] The methods disclosed in the embodiments of this application can be applied to, or implemented by, processor 610. Processor 610 may be an integrated circuit chip with signal processing capabilities. During implementation, each step of the method can be completed by integrated logic circuits in the processor's hardware or by instructions in software form. The aforementioned processor can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this application can be directly manifested as execution by a hardware decoding processor, or execution by a combination of hardware and software modules in the decoding processor. The software module can reside in a mature storage medium in the field, such as random access memory (RAM), flash memory, read-only memory (ROM), programmable read-only memory, electrically erasable programmable memory, or registers. This storage medium is located in memory, and the processor reads instructions from the memory and, in conjunction with its hardware, completes the steps of the above method.

[0169] It is understood that memory 620 can be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. Non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. Volatile memory can be random access memory (RAM), which serves as an external cache. By way of example, but not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous linked dynamic random access memory (SLDRAM), and direct rambus RAM (DR RAM). It should be noted that the memory of the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0170] Figure 7 A schematic structural diagram of an example of the encoding configuration of this application is shown.

[0171] Optionally, the specific form of the encoding configuration device 700 may be a general-purpose computer device or a chip in a general-purpose computer device; this application embodiment does not limit this. For example... Figure 7 As shown, the device with this encoding configuration includes a processing unit 710 and a transceiver unit 720.

[0172] Specifically, the encoding configuration device 700 can be any of the devices involved in this application, and can implement the functions that the device can perform. It should be understood that the encoding configuration device 700 can be a physical device, a component of a physical device (e.g., an integrated circuit, a chip, etc.), or a functional module in a physical device.

[0173] In one possible design, the encoding configuration device 700 can be an optical line terminal in the above method embodiment, or it can be a chip used to implement the functions of the optical line terminal in the above method embodiment.

[0174] For example, processing unit 710 is used to determine first information, which indicates the amount of change of forward error correction codeword information relative to the first forward error correction master code; transceiver unit 720 is used to send the first information to optical network unit.

[0175] Optionally, the transceiver unit 720 is also used to receive capability reporting information, which is used to indicate the forward error correction master code supported by the optical network unit, and the forward error correction master code supported by the optical network unit includes a first forward error correction master code.

[0176] Optionally, the transceiver unit 720 is also used to send capability query information, which is used to query the forward error correction master code supported by the optical network unit.

[0177] It should also be understood that when the encoding configuration device 700 is an optical line terminal equipment, the transceiver unit 720 in the encoding configuration device 700 can be implemented through a communication interface (such as a transceiver or input / output interface), and the processing unit 710 in the encoding configuration device 700 can be implemented through at least one processor, for example, corresponding to... Figure 6 The processor 610 shown in the figure.

[0178] Optionally, the encoding configuration device 700 may further include a storage unit, which can be used to store instructions or data. The processing unit can call the instructions or data stored in the storage unit to perform the corresponding operation.

[0179] It should be understood that the specific process of each unit performing the above-mentioned corresponding steps has been described in detail in the above method embodiments, and will not be repeated here for the sake of brevity.

[0180] In another possible design, the encoding configuration device 700 can be an optical network unit device in the above method embodiment, or it can be a chip used to implement the optical network unit function in the above method embodiment.

[0181] For example, the transceiver unit 720 is used to receive first information, which indicates the amount of change of the forward error correction codeword information relative to the first forward error correction master code; the processing unit 710 is used to determine the forward error correction codeword information based on the first information.

[0182] Optionally, the transceiver unit 720 is also used to send capability reporting information, which is used to indicate the forward error correction master code supported by the optical network unit, and the forward error correction master code supported by the optical network unit includes a first forward error correction master code.

[0183] Optionally, the transceiver unit 720 is also used to receive capability query information, which is used to query the forward error correction master code supported by the optical network unit.

[0184] It should also be understood that when the coded configuration device 700 is an optical network unit device, the transceiver unit 720 in the coded configuration device 700 can be implemented through a communication interface (such as a transceiver or input / output interface), for example, it can correspond to... Figure 6 The communication interface 630 shown in the figure, the processing unit 710 in the coded configuration device 700 can be implemented by at least one processor, for example, corresponding to Figure 6 The processor 610 shown in the figure.

[0185] Optionally, the encoding configuration device 700 may further include a storage unit, which can be used to store instructions or data. The processing unit can call the instructions or data stored in the storage unit to perform the corresponding operation.

[0186] It should be understood that the specific process of each unit performing the above-mentioned corresponding steps has been described in detail in the above method embodiments, and will not be repeated here for the sake of brevity.

[0187] It should also be understood that the device 700 can also be used to implement the functions of the optical line terminal and the optical network unit in the above method embodiments. The transceiver unit 720 can be used to implement operations related to receiving and transmitting, and the processing unit 710 can be used to implement other operations besides receiving and transmitting. For details, please refer to the description in the above method embodiments, which will not be listed here.

[0188] Furthermore, in this application, the encoding configuration device 700 is presented in the form of a functional module. Here, "module" can refer to an application-specific integrated circuit (ASIC), circuit, processor and memory executing one or more software or firmware programs, integrated logic circuit, and / or other devices that can provide the aforementioned functions. In a simple embodiment, those skilled in the art will understand that device 700 can employ... Figure 7 The processing unit 710 can be in the form shown. Figure 6 The processor 610 shown is used for implementation. Optionally, if Figure 6 The computer device shown includes a memory 620, and a processing unit 710 can be implemented using a processor 610 and a memory 620. A transceiver unit 720 can be implemented using... Figure 6 The transceiver 630 shown is used for implementation. The transceiver 630 includes receiving and transmitting functions. Specifically, the processor implements this by executing a computer program stored in memory. Optionally, when the device 700 is a chip, the function and / or implementation process of the transceiver unit 720 can also be implemented through pins or circuits, etc. Optionally, the memory can be a storage unit within the chip, such as a register or cache, or the storage unit can be a storage unit located outside the chip within the computer device, such as... Figure 6The memory 620 may be a storage unit deployed in other systems or devices, and is not located within the computer device.

[0189] Various aspects or features of this application can be implemented as methods, apparatus, or articles of manufacture using standard programming and / or engineering techniques. As used herein, the term "article of manufacture" encompasses a computer program accessible from any computer-readable device, carrier, or medium. For example, computer-readable media may include, but are not limited to: magnetic storage devices (e.g., hard disks, floppy disks, or magnetic tapes), optical discs (e.g., compact discs (CDs), digital versatile discs (DVDs), etc.), smart cards, and flash memory devices (e.g., erasable programmable read-only memory (EPROMs), cards, sticks, or key drives, etc.). Additionally, the various storage media described herein may represent one or more devices and / or other machine-readable media for storing information. The term "machine-readable medium" may include, but is not limited to, wireless channels and various other media capable of storing, containing, and / or carrying instructions and / or data.

[0190] According to the method provided in the embodiments of this application, this application also provides a computer program product, which includes: computer program code, which, when run on a computer, causes the computer to execute... Figure 2 Pass Figure 3 The method of any one of the embodiments shown.

[0191] According to the method provided in the embodiments of this application, this application also provides a computer-readable medium storing program code, which, when run on a computer, causes the computer to perform... Figure 2 or Figure 3 The method of any one of the embodiments shown.

[0192] According to the method provided in the embodiments of this application, this application also provides a system that includes the aforementioned apparatus or device.

[0193] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented in software, it can be implemented, in whole or in part, as a computer program product. The computer program product includes one or more computer instructions. When the computer instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium accessible to a computer or a data storage device such as a server or data center that integrates one or more available media. The available media may be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., high-density digital video discs (DVDs)), or semiconductor media (e.g., solid-state disks (SSDs)).

[0194] The terms “component,” “module,” “system,” etc., used in this specification are used to refer to computer-related entities, hardware, firmware, combinations of hardware and software, software, or software in execution. For example, a component can be, but is not limited to, a process running on a processor, a processor, an object, an executable file, an execution thread, a program, and / or a computer. As illustrated, applications running on computing devices and computing devices can both be components. One or more components may reside in a process and / or an execution thread, and components may be located on a single computer and / or distributed among two or more computers. Furthermore, these components can be executed from various computer-readable media on which various data structures are stored. Components can communicate, for example, via local and / or remote processes based on signals having one or more data packets (e.g., data from two components interacting with another component between a local system, a distributed system, and / or a network, such as the Internet interacting with other systems via signals).

[0195] It should also be understood that the term "and / or" in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0196] It should also be understood that the use of the designations "first", "second", etc., in the embodiments of this application is only to distinguish different objects, such as different "information", "device", or "unit". The understanding of specific objects and the correspondence between different objects should be determined by their functions and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0197] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0198] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0199] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0200] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0201] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0202] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A method of encoding configuration, characterized by, The method comprises: The optical network unit receives first information, the first information being used for indicating a change amount of forward error correction code word information relative to a first forward error correction mother code; The optical network unit determines the forward error correction code word information according to the first information, the first information comprising a first value, indicating that payload information of the first forward error correction mother code is truncated by M bits in a first order to obtain payload information of the forward error correction code word information, the M being obtained by multiplying the first value by 256 or 128.

2. The method of claim 1, wherein, The first order comprises from back to front or from front to back.

3. The method of claim 1, wherein, The first information further comprises fourth information, the fourth information being used for indicating that the first information takes effect.

4. The method of claim 1, wherein, The first information comprises a second value, indicating that check bit information of the first forward error correction mother code is punctured by N bits in a second order to obtain check bit information of the forward error correction code word information, the N being obtained by multiplying the second value by 256 or 128.

5. The method according to any one of claims 1 to 4, characterized in that, The first information is carried in a first message, the first message comprising at least one of the following: A physical layer operation administration and maintenance (PLOAM) message, an optical network terminal management control interface (OMCI) message, and an operation administration and maintenance (OAM) message.

6. The method according to any one of claims 1 to 4, characterized in that, The method further comprises: The optical network unit sends capability reporting information, the capability reporting information indicating whether the optical network unit supports truncation processing on the forward error correction mother code.

7. The method according to any one of claims 1 to 4, characterized in that, The method further comprises: The optical network unit receives capability query information, the capability query information being used for querying the forward error correction mother code supported by the optical network unit.

8. A method of encoding configuration, characterized by, The method comprises: The optical line terminal determines first information, the first information being used for indicating a change amount of forward error correction code word information relative to a first forward error correction mother code; The optical line terminal sends the first information to an optical network unit, the first information comprising a first value, indicating that payload information of the first forward error correction mother code is truncated by M bits in a first order to obtain payload information of the forward error correction code word information, the M being obtained by multiplying the first value by 256 or 128.

9. The method of claim 8, wherein, The first information comprises a second value, indicating that check bit information of the first forward error correction mother code is punctured by N bits in a second order to obtain check bit information of the forward error correction code word information, the N being obtained by multiplying the second value by 256 or 128.

10. The method of claim 8, wherein, The first order comprises from back to front or from front to back.

11. The method according to any one of claims 8 to 10, characterized in that, The first information further comprises fourth information, the fourth information being used for indicating that the first information takes effect.

12. The method according to any one of claims 8 to 10, characterized in that, The first information is carried in a first message, the first message comprising at least one of the following: A physical layer operation administration and maintenance (PLOAM) message, an optical network terminal management control interface (OMCI) message, and an operation administration and maintenance (OAM) message.

13. The method according to any one of claims 8 to 10, characterized in that, The method further comprises: The optical line terminal receives capability reporting information, the capability reporting information indicating whether the optical network unit supports truncation processing on the forward error correction mother code.

14. The method of any one of claims 8-10, wherein, The method further comprises: The optical line terminal sends capability query information, the capability query information being used for querying the forward error correction mother code supported by the optical network unit.

15. A communications device, characterized by The method comprises: a processor configured to execute the method of any one of claims 1 to 7 after reading instructions from the memory; or, a processor configured to execute the method of any one of claims 8 to 14.

16. A chip system, characterized by including a processor configured to call and run a computer program from a memory, so that a communication device installed with the chip system executes the method of any one of claims 1 to 7; or, a processor configured to call and run a computer program from a memory, so that a communication device installed with the chip system executes the method of any one of claims 8 to 14.

17. A communication system, characterized by including an optical line terminal and an optical network unit, the optical network unit is configured to execute the method of any one of claims 1 to 7; the optical line terminal is configured to execute the method of any one of claims 8 to 14.

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