Semiconductor packaging process
By using a dip flux to protect the tin cap before flip-chip soldering, the poor soldering problem caused by the collapse of the tin cap is solved, and a higher welding success rate and production efficiency are achieved.
Patent Information
- Application Number
- CN202510885945.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-30
- Publication Date
- 2025-07-29
AI Technical Summary
During semiconductor packaging, the problem of tin cap collapse is serious, resulting in inconsistent height of tin caps, affecting the success rate of welding, reducing production efficiency and increasing costs, making it difficult to meet the strict production needs.
Before flip chip soldering, protect the tin cap and PCB board pads with a dip flux to prevent oxidation and restore the tin cap to its original state during the reflow process to ensure effective contact and good soldering.
Effectively prevent oxidation of tin caps, improve wetting properties, enhance welding strength, reduce problems such as dummy welding and open circuits, and improve welding success rate and production efficiency.
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Figure CN120390370A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor packaging technology, and particularly provides a semiconductor packaging process. Background Art
[0002] In the field of semiconductor packaging, with the continuous development of ultra-fine pitch flip chip technology, the sizes of solder caps and gaps are getting smaller and smaller. This poses extremely high requirements for the coplanarity and consistency of the solder caps of bare chips. However, at present, the problem of solder cap collapse is very serious, which will lead to inconsistent solder cap heights. During the flip chip soldering process, good electrical and mechanical connections cannot be achieved, greatly affecting the soldering success rate of flip chips, reducing production efficiency, increasing production costs, and making it difficult to meet the increasingly stringent production requirements. Summary of the Invention
[0003] The purpose of the embodiments of this application is to provide a semiconductor packaging process, aiming to solve the problem that the soldering success rate is affected due to solder cap collapse during the soldering process of flip chips.
[0004] To achieve the above purpose, the technical solution adopted in the embodiments of this application is: The embodiments of this application provide a semiconductor packaging process, and the process includes: Obtain a circuit board and perform pre-treatment on the circuit board; Perform SMT assembly operation on the bottom surface of the circuit board; Screen-print solder paste on the top surface of the circuit board; Dip the solder cap of the flip chip in flux; Mount the flip chip and other components on the top surface of the circuit board; Perform reflow soldering operation on the top surface of the circuit board.
[0005] Advantageous effects of the embodiments of this application: For the semiconductor packaging process provided by the embodiments of this application, before performing the confluence soldering operation on the flip chip, the solder cap of the flip chip can be dipped in flux. In this way, during the reflow soldering process, the flux can effectively protect the solder cap and the PCB pad from oxidation, and the collapsed solder cap can be restored to its original state to the greatest extent during reflow soldering, which is beneficial for the solder cap to more effectively contact the PCB pad, form good soldering and improve wettability, reduce oxidation, enhance soldering strength, reduce problems such as solder bridging and open circuit.
[0006] In some embodiments, the step of screen-printing solder paste on the top surface of the circuit board includes: Use an electroformed steel mesh to screen-print the first solder paste, and the first solder paste is used for soldering the flip chip; Use a stepped steel mesh to screen-print the second solder paste at a position avoiding the first solder paste.
[0007] In some embodiments, after using an electroformed stencil to screen-print the first solder paste for soldering a flip chip, the following steps are further included: Perform ultra-high-precision 3um three-dimensional inspection on the first solder paste.
[0008] In some embodiments, before the step of performing reflow soldering on the top surface of the circuit board, the following steps are further included: Automatically inspect for defects on the top surface of the circuit board using a camera and an optical sensor before soldering; Visually inspect the top surface of the circuit board before soldering.
[0009] In some embodiments, after the step of performing reflow soldering on the top surface of the circuit board, the following steps are further included: Automatically test the soldering quality of the top surface of the circuit board using three-dimensional X-ray online; Detect the soldering quality of the flip chip on the top and bottom surfaces of the circuit board using five-dimensional X-ray.
[0010] In some embodiments, the step of performing reflow soldering on the top surface of the circuit board includes: The reflow soldering operation uses helium as the protective gas, the number of heating zones is 17 zones, and the oxygen content is less than or equal to 0.005%.
[0011] In some embodiments, the step of performing SMT assembly on the bottom surface of the circuit board includes: Screen-print solder paste on the bottom surface of the circuit board; Place components on the bottom surface of the circuit board; Perform reflow soldering on the bottom surface of the circuit board.
[0012] In some embodiments, after the step of screen-printing solder paste on the bottom surface of the circuit board, the following steps are further included: Detect the volume of the solder paste screen-printed on the bottom surface of the circuit board.
[0013] In some embodiments, before the step of performing reflow soldering on the bottom surface of the circuit board, the following steps are further included: Automatically inspect for defects on the bottom surface of the circuit board using a camera and an optical sensor before soldering; Visually inspect the bottom surface of the circuit board before soldering.
[0014] In some embodiments, after the step of performing reflow soldering on the bottom surface of the circuit board, the following steps are further included: Automatically inspect for defects on the bottom surface of the circuit board using a camera and an optical sensor after soldering; Visually inspect the bottom surface of the circuit board after soldering. Description of the Drawings
[0015] To more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required for use in the embodiments or related technical descriptions. Obviously, the drawings described below are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.
[0016] Figure 1 It is a flowchart of the steps of the semiconductor packaging process provided by the embodiments of the present application; Figure 2 It is a specific flowchart of the steps for screen-printing solder paste on the top surface of the circuit board provided by the embodiments of the present application; Figure 3 It is a flowchart of the steps before the reflow soldering operation on the top surface of the circuit board provided by the embodiments of the present application; Figure 4 It is a flowchart of the steps after the reflow soldering operation on the top surface of the circuit board provided by the embodiments of the present application; Figure 5 It is a specific flowchart of the steps for SMT assembly operation on the bottom surface of the circuit board provided by the embodiments of the present application; Figure 6 It is a flowchart of the steps before the reflow soldering operation on the bottom surface of the circuit board provided by the embodiments of the present application; Figure 7 It is a flowchart of the steps after the reflow soldering operation on the bottom surface of the circuit board provided by the embodiments of the present application. Detailed implementation manners
[0017] The following details the embodiments of the present application. The examples of the embodiments are shown in the drawings, where the same or similar reference numerals represent the same or similar elements or elements with the same or similar functions throughout. The embodiments described below with reference to the drawings are exemplary and are intended to explain the present application, and should not be construed as a limitation of the present application.
[0018] In the description of the present application, it should be understood that the orientation or positional relationships indicated by the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. are based on the orientation or positional relationships shown in the drawings. These are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation of the present application.
[0019] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of this application, "a plurality of" means two or more unless otherwise specifically defined.
[0020] In this application, unless otherwise clearly specified and defined, terms such as "mounted", "connected", "joined", "fixed", etc. shall be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or integrated; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the communication inside two components or the interaction relationship between two components. For those of ordinary skill in the art, the specific meanings of the above terms in this application can be understood according to specific circumstances.
[0021] In the field of semiconductor packaging, with the continuous development of the ultra-fine pitch flip chip technology, the sizes of solder caps and gaps are getting smaller and smaller. This poses extremely high requirements for the coplanarity and consistency of the solder caps of the die. However, currently, the problem of solder cap collapse is very serious, which will result in inconsistent solder cap heights. During the flip chip soldering process, good electrical and mechanical connections cannot be achieved, greatly affecting the soldering success rate of the flip chip, reducing production efficiency, increasing production costs, and making it difficult to meet the increasingly stringent production requirements.
[0022] Based on the above considerations, in order to solve the problem that the soldering success rate of flip chips is affected due to solder cap collapse during the soldering process, a semiconductor packaging process is designed. Before performing the bus soldering operation on the flip chip, the solder caps of the flip chip can be dipped in flux. In this way, during the reflow soldering process, the flux can effectively protect the solder caps and the PCB pads from oxidation, and the collapsed solder caps can be restored to their original state to the greatest extent during reflow soldering, which is beneficial for the solder caps to more effectively contact the PCB pads, form good soldering, improve wettability, reduce oxidation, enhance soldering strength, reduce problems such as solder bridging and open circuits.
[0023] Next, the semiconductor packaging process provided by this application will be introduced in detail according to specific embodiments.
[0024] Please refer to Figure 1 , an embodiment of this application provides a semiconductor packaging process, and the process includes: S100. Obtain a circuit board and perform preprocessing on the circuit board; S200. Perform SMT assembly operations on the bottom surface of the circuit board; S300. Screen-print solder paste on the top surface of the circuit board; S400, dipping the tin cap of the flip chip into flux; S500, mounting the flip chip and other components on the top surface of the circuit board; S600 , performing a reflow soldering operation on the top surface of the circuit board.
[0025] In step S100, pre-processing the circuit board refers to performing operations such as inspection, cleaning, and protection on the circuit board.
[0026] Exemplarily, in some embodiments, the steps of pre-processing the circuit board include but are not limited to: optical inspection, such as AOI inspection (Automated Optical Inspection, i.e., automatically checking whether there are defects on the PCB surface by using a camera and an optical sensor), bare wafer defects of flip-chips, etc.; affixing a unique code, such as laser coding, etc., to achieve full process traceability; gold finger measurement, contact impedance test (≤10mΩ) to ensure that the gold plating layer thickness meets the standard; plasma deoxidation, Ar / O2 mixed gas glow discharge, to remove nano-level oxides on the pads; 3M adhesive protection, high-temperature tape (resistant to 260°C) to shield the gold fingers / binding pads to prevent solder paste contamination; cleaning and placement, a Class 100 clean bench and anti-static fixtures to avoid particle adsorption, etc.
[0027] In step S200, an SMT assembly operation is performed on the bottom surface of the circuit board, wherein the SMT assembly operation refers to surface mount technology, that is, a standard SMT assembly is performed on the bottom surface of the circuit board, components are mounted on the bottom surface of the circuit board and soldered.
[0028] In step S300, solder paste is screen-printed on the top surface of the circuit board, for example, by using an electroformed steel mesh; optionally, the electroformed steel mesh may be an ultra-thin electroformed steel mesh, for example, a 20 μm electroformed steel mesh.
[0029] In step S400, the flip chip cap is dipped in flux. It should be understood that the flip chip cap may collapse. The collapsed cap forms a flat structure with a larger surface area, which may prevent the solder paste from completely and effectively covering the cap. Consequently, during the reflow process, the uncovered portion of the cap is susceptible to oxidation, forming a pillow effect or a solder joint defect, which in turn leads to a higher incidence of solder joint defects.
[0030] Among them, the pillow effect refers to the lack of effective solder paste filling between the tin cap and the pad, which causes vertical displacement under the action of surface tension during the melting stage, forming a "false welding" state in which the solder joint is suspended on the pad; the empty solder defect refers to the defect in which the bottom of the collapsed tin cap is completely separated from the solder paste contact plane, there is no metallurgical bonding after cooling, and the pad is visually exposed or there is a clear gap between the tin cap and the solder paste.
[0031] Therefore, the collapse of the tin caps will significantly increase the coplanarity discreteness of all the tin cap arrays of the flip chip. When the height difference between the locally collapsed tin caps and the normal tin caps exceeds the solder paste thickness tolerance, some tin caps will not be able to contact the solder paste due to the "height drop". The specific manifestations are as follows: the risk of random open circuits, where the collapsed tin caps are intermittently separated from the solder paste plane under the action of the reflow soldering thermal stress or the deformation of the circuit board, forming latent open circuits that are difficult to capture by conventional inspections; reliability hazards, where the un-soldered tin caps become mechanical weak links and may cause fatigue fractures of adjacent solder joints during subsequent assembly or use, resulting in intermittent functional failures.
[0032] In this embodiment, by applying flux to the tin caps of the flip chip, the flux can effectively protect the tin caps and the PCB pads from oxidation; and the collapsed tin caps can be restored to their original state to the greatest extent during reflow soldering, which is beneficial for the tin caps to more effectively contact the pads of the circuit board and form good soldering. At the same time, applying flux can also improve the wettability and reduce the occurrence of oxidation; thus, it can enhance the soldering strength and reduce phenomena such as solder bridging and open soldering.
[0033] After the operation of applying flux to the tin caps is completed, the chip mounting operation can be carried out through step S500 to mount the flip chip and other components on the top surface of the circuit board, and then the soldering operation can be carried out through step S600 to solder the flip chip and other components on the top surface of the circuit board. Among them, the other components include but are not limited to capacitors, resistors, chips, etc.
[0034] In the semiconductor packaging process provided by the embodiment of the present application, before the bus bar soldering operation of the flip chip, flux can be applied to the tin caps of the flip chip. In this way, during the reflow soldering process, the flux can effectively protect the tin caps and the PCB pads from oxidation, and the collapsed tin caps can be restored to their original state to the greatest extent during reflow soldering, which is beneficial for the tin caps to more effectively contact the PCB pads, form good soldering, improve the wettability, reduce oxidation, enhance the soldering strength, and reduce problems such as solder bridging and open circuits.
[0035] Please refer to Figure 1 and Figure 2 , in some embodiments, the steps of screen-printing solder paste on the top surface of the circuit board include: S310: Screen-print the first solder paste using an electroformed stencil, and the first solder paste is used for soldering the flip chip; S320: Screen-print the second solder paste using a stepped stencil to avoid the position of the first solder paste.
[0036] In this embodiment, an ultra-thin electroformed stencil can be used to screen-print the first solder paste to improve the accuracy of screen-printing the first solder paste. Among them, the first solder paste refers to a paste-like substance formed by mixing solder powder and flux to help achieve good electrical and mechanical connections during the soldering process. When printing the first solder paste, it is necessary to ensure the uniformity of the solder paste to reduce defective soldering and other problems in subsequent soldering.
[0037] Optionally, the first solder paste can be selected as No. 7 powder solder paste, that is, the solder paste with a particle size ranging from 20μm to 38μm.
[0038] At the same time, a stepped stencil is used, and the stencil is locally thickened to avoid the area where the first solder paste has been printed to print peripheral components.
[0039] Please refer to Figure 1 and Figure 2 , in some embodiments, after using the electroformed stencil to screen-print the first solder paste, and after the step where the first solder paste is used for soldering the flip chip, it further includes: Performing ultra-high-precision 3μm three-dimensional detection on the first solder paste.
[0040] In this embodiment, after using the electroformed stencil to screen-print the first solder paste, it is also necessary to detect the screen-printed first solder paste to ensure its printing quality and prevent phenomena such as bridging and insufficient solder; this can effectively reduce the defective rate of subsequent soldering.
[0041] Please refer to Figure 1 and Figure 3 , in some embodiments, before the step of performing reflow soldering on the top surface of the circuit board, it further includes: S601. Automatically inspecting for defects on the top surface of the circuit board using a camera and an optical sensor before soldering; S602. Visually inspecting the top surface of the circuit board before soldering.
[0042] In step S601, before soldering, automatically inspecting for defects on the top surface of the circuit board using a camera and an optical sensor. For example, AOI (Automated Optical Inspection) can be performed, that is, by using a camera and an optical sensor, automatically inspecting whether there are defects on the surface of the circuit board. This technology can identify problems such as uneven solder paste printing, misalignment of components, defective soldering, and void soldering.
[0043] At the same time, in step S602, it is also necessary to visually inspect the top surface of the circuit board before soldering to check whether the solder paste printing is uniform and whether the solder joints are sufficient, etc.
[0044] Please refer to Figure 1 , Figure 3 and Figure 4, in some embodiments, after the step of performing reflow soldering on the top surface of the circuit board, it further includes: S603. Automatically and online test the soldering quality of the top surface of the circuit board using three-dimensional X-ray; S604. Detect the soldering quality of the flip chip on both the top and bottom surfaces of the circuit board using five-dimensional X-ray.
[0045] It should be understood that after the soldering operation, it is also necessary to use X-ray to check the soldering state of the flip chip soldered to the circuit board to check its soldering quality, whether there is poor soldering, etc. This can further ensure the soldering quality of the flip chip and further reduce the defective rate of the product.
[0046] Meanwhile, in step S604, it is also necessary to use five-dimensional X-ray to detect both the top and bottom surfaces of the circuit board, that is, through the X-axis, Y-axis, Z-axis, rotational tilt, and energy spectrum analysis, to perform three-dimensional modeling and analysis on the solder cap fusion state of the flip chip to ensure the soldering quality.
[0047] Please refer to Figure 1 , in some embodiments, the step of performing reflow soldering on the top surface of the circuit board includes: The reflow soldering operation uses helium as the protective gas, the number of heating zones is 17 zones, and the oxygen content is less than or equal to 0.005%.
[0048] In this embodiment, helium (He) is used to replace nitrogen (N2) as the protective gas, and the heat conduction efficiency can be greatly improved. In this way, the microstructure of the solder joints can be homogenized to improve the soldering quality.
[0049] Meanwhile, by setting the number of heating zones to 17 zones, the number of heating zones is relatively large, so the temperature curve control accuracy is higher. The oxygen content ≤ 0.005%, and significantly reducing the oxygen content can further reduce the oxidation of the solder joints to reduce the void rate.
[0050] Please refer to Figure 1 and Figure 5 , in some embodiments, the step of performing SMT assembly on the bottom surface of the circuit board includes: S210. Screen-print solder paste on the bottom surface of the circuit board; S220. Mount components on the bottom surface of the circuit board; S230. Perform reflow soldering on the bottom surface of the circuit board.
[0051] In this embodiment, by screen-printing solder paste on the bottom surface of the circuit board, then mounting components on the bottom surface of the circuit board, and finally performing reflow soldering to solder the components to the bottom surface of the circuit board.
[0052] Among them, the components can refer to capacitors, resistors, chips, etc.
[0053] Please refer to Figure 1 and Figure 5 , in some embodiments, after the step of screen-printing solder paste on the bottom surface of the circuit board, the following steps are further included: Perform volume detection on the solder paste screen-printed on the bottom surface of the circuit board.
[0054] It should be understood that after the operation of screen-printing solder paste on the bottom surface of the circuit board, volume detection of the solder paste is required, including but not limited to detecting the thickness, distribution, accuracy, etc. of the solder paste to ensure that the solder paste meets the requirements and reduce the defect rate of component placement and soldering.
[0055] Please refer to Figure 1 , Figure 5 and Figure 6 , in some embodiments, before the step of performing reflow soldering on the bottom surface of the circuit board, the following steps are further included: S231. Automatically inspect for defects on the bottom surface of the circuit board using a camera and an optical sensor before soldering; S232. Visually inspect the bottom surface of the circuit board before soldering.
[0056] In step S231, before soldering, automatically inspect for defects on the bottom surface of the circuit board using a camera and an optical sensor. For example, AOI (Automated Optical Inspection) can be performed, that is, by using a camera and an optical sensor, automatically inspect whether there are defects on the surface of the circuit board. This technology can identify problems such as uneven solder paste printing, misalignment of components, false soldering, and void soldering.
[0057] At the same time, in step S232, it is also necessary to visually inspect the bottom surface of the circuit board before soldering to check whether the solder paste printing is uniform and whether the solder joints are sufficient, etc.
[0058] Please refer to Figure 1 , Figures 5 to 7 , in some embodiments, after the step of performing reflow soldering on the bottom surface of the circuit board, the following steps are further included: S233. Automatically inspect for defects on the bottom surface of the circuit board using a camera and an optical sensor after soldering; S234. Visually inspect the bottom surface of the circuit board after soldering.
[0059] Automatically inspect for defects on the bottom surface of the circuit board using a camera and an optical sensor after soldering. For example, perform AOI inspection to further inspect and identify problems such as uneven solder paste printing, misalignment of components, false soldering, and void soldering on the soldered circuit board.
[0060] Meanwhile, in step S234, it is also necessary to visually inspect the bottom surface of the circuit board after welding to check whether the solder paste printing is uniform, whether the solder joints are sufficient, and whether there are welding defects (such as dry joints, short circuits, voids, etc.).
[0061] The above are only the preferred embodiments of the present application and are not intended to limit the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims
1. A semiconductor packaging process, characterized in that: The process includes: Obtaining a circuit board and performing pretreatment on the circuit board; Performing SMT assembly operation on the bottom surface of the circuit board; Screen printing solder paste on the top surface of the circuit board; Dipping the solder cap of the flip chip in flux; Mounting the flip chip and other components on the top surface of the circuit board; Performing reflow soldering operation on the top surface of the circuit board.
2. The semiconductor packaging process according to claim 1, wherein: The step of screen printing solder paste on the top surface of the circuit board includes: Screen printing a first solder paste using an electroformed stencil, where the first solder paste is used for soldering the flip chip; Screen printing a second solder paste using a stepped stencil while avoiding the position of the first solder paste.
3. The semiconductor packaging process according to claim 2, wherein: After the step of screen printing the first solder paste using an electroformed stencil, where the first solder paste is used for soldering the flip chip, it further includes: Performing ultra-high-precision 3um three-dimensional inspection on the first solder paste.
4. The semiconductor packaging process according to claim 3, wherein: Before the step of performing reflow soldering operation on the top surface of the circuit board, it further includes: Automatically inspecting for defects on the top surface of the circuit board using a camera and an optical sensor before soldering; Performing visual inspection on the top surface of the circuit board before soldering.
5. The semiconductor packaging process according to claim 4, wherein: After the step of performing reflow soldering operation on the top surface of the circuit board, it further includes: Automatically testing the soldering quality of the top surface of the circuit board using three-dimensional X-ray online; Inspecting the soldering quality of the flip chip on the top and bottom surfaces of the circuit board using five-dimensional X-ray.
6. The semiconductor packaging process according to any one of claims 1 to 5, characterized in that: The step of performing reflow soldering operation on the top surface of the circuit board includes: The reflow soldering operation uses helium as the protective gas, the number of heating zones is 17 zones, and the oxygen content is less than or equal to 0.005%.
7. The semiconductor packaging process according to any one of claims 1 to 5, characterized in that: The step of performing SMT assembly operation on the bottom surface of the circuit board includes: Screen printing solder paste on the bottom surface of the circuit board; Performing component placement on the bottom surface of the circuit board; Performing reflow soldering operation on the bottom surface of the circuit board.
8. The semiconductor packaging process according to claim 7, wherein: After the step of screen printing solder paste on the bottom surface of the circuit board, it further includes: Performing volume inspection on the solder paste screen printed on the bottom surface of the circuit board.
9. The semiconductor packaging process according to claim 8, characterized in that: Before the step of performing reflow soldering operation on the bottom surface of the circuit board, it further includes: Automatically inspecting for defects on the bottom surface of the circuit board using a camera and an optical sensor before soldering; Performing visual inspection on the bottom surface of the circuit board before soldering.
10. The semiconductor packaging process according to claim 9, wherein: After the step of performing reflow soldering operation on the bottom surface of the circuit board, it further includes: Automatically inspecting for defects on the bottom surface of the circuit board using a camera and an optical sensor after soldering; Performing visual inspection on the bottom surface of the circuit board after soldering.
Citation Information
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Method for soldering solder paste on semiconductor chip
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Gold ball and tin cap flip-chip bonding method based on separated single chip
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