A cholesteric liquid crystal electronic paper display panel and a driving method thereof

Abstract

The present invention relates to the field of cholesteric liquid crystal electronic paper display technology. The present invention discloses a cholesteric liquid crystal electronic paper display panel and a driving method thereof, comprising an upper substrate, a lower substrate, a gate scan line, and a signal line. The upper substrate is provided with a plurality of electrode strips that together form a common electrode. The electrode strips extend continuously in the direction of the gate scan line. Each electrode strip corresponds to a row of pixels, and a single pixel corresponds to a pixel electrode. The electrode strips corresponding to each row of pixels are electrically connected to the ITO electrodes of the corresponding row via conductive spacers. The ITO electrodes are located at the periphery of the display area of ​​the display panel. In the direction of the signal line, the size of a single pixel is greater than the width L of the electrode strip and greater than the width L′ of the pixel electrode. The spacing S between two adjacent electrode strips is greater than the width W of the gate scan line. The display panel and the driving method of the present application significantly improve the display performance and refresh efficiency of cholesteric liquid crystal electronic paper by optimizing the common electrode structure and driving timing.

Description

Technical Field

[0001] The present invention relates to the technical field of cholesteric liquid crystal electronic paper display, and in particular to a cholesteric liquid crystal electronic paper display panel and a driving method thereof. Background Art

[0002] As an electronic device that simulates the display characteristics of paper, electronic paper uses cholesteric liquid crystal display technology to achieve a bi-stable display effect through the selective reflection of the twisted liquid crystal layer. Figure 1 As shown, a typical active cholesteric liquid crystal display device adopts an upper and lower substrate structure, wherein a common electrode is provided on the upper substrate and is connected to an AC common-level signal of the lower substrate through conductive particles, and the lower substrate integrates a thin film switch array to control the pixel electrode. Figure 2 This is a common driving principle diagram of active cholesteric liquid crystal display. The gate scan line controls the opening and closing of the membrane switch, and the signal line charges the pixel electrode to the required corresponding voltage. During the driving process, a high voltage is first applied to make the liquid crystal enter the vertical state, and then the voltage is returned to zero to convert it to the planar state to achieve color display, and then a medium voltage is adjusted to form a black display. However, the common refresh timing is as follows Figure 3 As shown, the existing progressive scan drive method, controlled by gate scan lines, suffers from inherent voltage conversion defects due to timing differences between pixels in different rows. While the pixels in the first row complete their high-voltage to zero-voltage transition and enter the planar state, the pixels in the last row remain at high voltage, subjecting them to subsequent transitions that experience intermediate voltage interference related to the scan timing. This asynchronous voltage change hinders the complete transition of the liquid crystal molecules to the planar state, resulting in color distortion and reduced contrast, severely impacting the uniformity and color reproduction accuracy of the displayed image. Summary of the Invention

[0003] In order to solve the technical problems existing in the background technology, the present invention provides a cholesteric liquid crystal electronic paper display panel and a driving method thereof.

[0004] The present invention proposes a cholesteric liquid crystal electronic paper display panel, comprising an upper substrate, a lower substrate, gate scanning lines, and signal lines. The upper substrate is provided with a plurality of electrode strips that together form a common electrode. The electrode strips extend continuously in the direction of the gate scanning lines. Each electrode strip corresponds to a row of pixels, and a single pixel corresponds to a pixel electrode. The electrode strips corresponding to each row of pixels are electrically connected to the ITO electrodes of the corresponding row via conductive spacers. The ITO electrodes are located on the periphery of the display area of ​​the display panel. In the direction of the signal lines, the size of a single pixel is greater than the width L of the electrode strip and is greater than the width L′ of the pixel electrode. The spacing S between two adjacent electrode strips is greater than the width W of the gate scanning line.

[0005] Preferably, each ITO electrode corresponds to a row of pixels and is aligned with the gate scanning line direction, and the ITO electrodes of any row of pixels are disconnected from the ITO electrodes of the remaining rows of pixels.

[0006] Preferably, the ITO electrode is connected to a common-end AC common-level input signal via a membrane switch, and the gate of the membrane switch and the gate scanning line of the pixel in the row corresponding to the ITO electrode are connected to the same driving signal.

[0007] Preferably, the voltage change of the electrode strips corresponding to each row of pixels is synchronized with the voltage change of the corresponding pixel electrodes.

[0008] Preferably, the conductive spacer is made by exposing and developing a conductive photoresist material.

[0009] The present invention provides a driving method for a cholesteric liquid crystal electronic paper display panel, which is applied to any of the above-mentioned cholesteric liquid crystal electronic paper display panels. The driving method includes:

[0010] placing the cholesteric liquid crystal electronic paper display panel into a vertical state;

[0011] Reduce the common-end AC common-level input signal to 0V;

[0012] Turn on the gate scan line signal row by row to control the membrane switch of the corresponding row to turn on, so that the AC common voltage of the common electrode of each row of pixels is synchronized with the voltage change of the pixel electrode;

[0013] A pulse voltage is applied to the pixel electrode to directly drive the liquid crystal to switch from the vertical state to the target display state, which includes a planar state, a focal conic state or a multi-level grayscale display.

[0014] Preferably, the pulse voltage is applied to the pixel electrode to directly drive the liquid crystal to switch to the target display state in the vertical state, specifically:

[0015] When the display switches from vertical state to planar state, the AC common voltage of the pixels in the nth row is controlled by the gate scan line signal in the nth row. Only when the corresponding gate scan line is turned on, the AC common voltage drops to 0V, so that the electrode blocks corresponding to the pixels in the nth row and the pixel electrode voltage are synchronized to zero, and the liquid crystal enters the planar state.

[0016] Preferably, the pulse voltage is applied to the pixel electrode to directly drive the liquid crystal to switch to the target display state in the vertical state, specifically:

[0017] When the cholesteric liquid crystal enters the vertical state, the AC common voltage is directly reduced to 0V in the vertical state, and a pulse voltage is applied to the pixel electrode. According to the amplitude of the pulse voltage, the liquid crystal is controlled to enter the planar state, focal conic state or multi-level grayscale display.

[0018] Preferably, the voltage range of the pulse voltage applied is 0V~20V, and the pulse time of the pulse voltage is between 50ms~500ms.

[0019] The cholesteric liquid crystal electronic paper display panel and its driving method proposed in this invention significantly improve the display performance and refresh efficiency of cholesteric liquid crystal electronic paper by optimizing the common electrode structure and drive timing. The strip-shaped common electrode design, combined with row-level synchronous control, ensures that the common electrode voltage and the pixel electrode voltage of each row of pixels are strictly synchronized and reset to zero, avoiding the residual intermediate voltage caused by progressive scanning. Direct vertical drive eliminates the switching step, shortens the refresh cycle, and avoids the white flicker phenomenon during the refresh process. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 Schematic diagram of the structure of a single-layer cholesteric display device in the prior art;

[0021] Figure 2 A driving principle diagram of an active cholesteric liquid crystal display in the prior art;

[0022] Figure 3 It is a refresh timing diagram of the prior art;

[0023] Figure 4 This is a driving principle diagram of a cholesteric liquid crystal electronic paper display panel proposed by the present invention;

[0024] Figure 5 A cross-sectional view of a cholesteric liquid crystal electronic paper display panel proposed by the present invention Figure 1 ;

[0025] Figure 6 A cross-sectional view of a cholesteric liquid crystal electronic paper display panel proposed by the present invention Figure 2 ;

[0026] Figure 7 A schematic diagram of the refresh timing of a cholesteric liquid crystal electronic paper display panel proposed by the present invention Figure 1 ;

[0027] Figure 8 A schematic diagram of the refresh timing of a cholesteric liquid crystal electronic paper display panel proposed by the present invention Figure 2 ;

[0028] Figure 9 This is a schematic diagram of the working process of a driving method for a cholesteric liquid crystal electronic paper display panel proposed in the present invention.

[0029] Legend:

[0030] 1. Upper substrate; 2. Lower substrate; 3. Common electrode; 4. Pixel electrode; 5. Insulation layer 1; 6. Insulation layer 2; 7. Black matrix; 8. Gate scan line; 9. Support structure; 10. Liquid crystal molecules; 11. Black ink; 12. ITO electrode; 13. Conductive spacer; 14. Membrane switch; 15. Signal line. DETAILED DESCRIPTION

[0031] Reference Figure 4-8 The present invention proposes a cholesteric liquid crystal electronic paper display panel, comprising an upper substrate 1, a lower substrate 2, a gate scan line 8, and a signal line 15. A plurality of electrode strips that together form a common electrode 3 are provided on the upper substrate 1. The electrode strips extend continuously in the direction of the gate scan line 8. Each electrode strip corresponds to a row of pixels, and a single pixel corresponds to a pixel electrode 4. The electrode strips corresponding to each row of pixels are electrically connected to the ITO electrodes 12 of the corresponding row through conductive spacers 13. The ITO electrodes 12 are located on the periphery of the display area of ​​the display panel. In the direction of the signal line 15, the size of a single pixel is greater than the width L of the electrode strip and greater than the width L′ of the pixel electrode 4. The spacing S between two adjacent electrode strips is greater than the width W of the gate scan line 8.

[0032] It should be noted that cholesteric liquid crystal (CLC) can present multiple states under different conditions, the most common of which include H state, P state and FC state. The following is a detailed description of these states:

[0033] 1. H state (Homeotropic State)

[0034] Features: The liquid crystal molecules are arranged perpendicular to the substrate surface, the spiral structure is destroyed, and the spiral axis of the cholesteric phase disappears.

[0035] Formation conditions: Usually formed under the action of strong electric field or surface treatment (such as vertical alignment layer).

[0036] Optical properties: It appears transparent because the molecules are arranged evenly and light passes through without scattering or selective reflection.

[0037] Applications: Used in electrically controlled optical devices, such as fast-switching transparent / scattering state displays.

[0038] 2. P state (Planar State)

[0039] Features: Liquid crystal molecules are arranged in a plane parallel to the substrate, the spiral axis is perpendicular to the substrate surface, and the spiral structure is complete.

[0040] Formation conditions: The state in which cholesteric liquid crystal naturally appears in the absence of an external electric field or in a weak electric field.

[0041] Optical properties: Exhibits selective reflection, with the wavelength of reflected light determined by the pitch, usually appearing in bright colors.

[0042] Applications: Used in reflective displays, optical filters and color display devices.

[0043] Specifically, if Figure 4 As shown, S1, S2, ..., Sm are signal lines 15 arranged in m columns, and G1, G2, ..., Gn are gate scanning lines 8 arranged in n rows.

[0044] Specifically, if Figure 5 As shown, the common electrode 3 of the upper substrate 1 is divided into strips. The common electrode 3 remains unchanged in the direction of the gate scan line 8, but is disconnected in the direction of the signal line 15. In the direction of the signal line 15, the size of a single pixel is greater than the width L of the common electrode 3 and greater than the width L' of the pixel electrode 4; and the spacing S between the common electrodes 3 is greater than the width W of the gate scan line 8.

[0045] In this embodiment, each ITO electrode 12 corresponds to a row of pixels and is aligned with the gate scanning line 8 . The ITO electrodes 12 of any row of pixels are disconnected from the ITO electrodes 12 of the remaining rows of pixels.

[0046] In this embodiment, the ITO electrode 12 is connected to the common-end AC common-level input signal through the membrane switch 14 , and the gate of the membrane switch 14 and the gate scanning line 8 of the pixel in the corresponding row of the ITO electrode 12 are connected to the same driving signal.

[0047] In this embodiment, the voltage change of the electrode strips corresponding to each row of pixels is synchronized with the voltage change of the corresponding pixel electrodes 4 .

[0048] In this embodiment, the conductive spacers 13 are formed by exposing and developing a conductive photoresist material.

[0049] Specifically, if Figure 6 As shown, the common electrode 3 corresponding to each row of pixels is electrically connected to the ITO electrode 12 of the lower substrate 2 via a conductive spacer 13. Conductive spacers 13 can be formed by exposing and developing a conductive photoresist material, or by sputtering an ITO film onto a conventional PS photoresist material. The ITO electrodes 12 are located outside the display area and are disconnected from the ITO electrodes 12 of other rows of pixels. They are connected to the AC common input signal via a membrane switch 14, whose gate is aligned with the gate scan line 8 signal for that row of pixels.

[0050] Reference Figure 4-9 The present invention proposes a driving method for a cholesteric liquid crystal electronic paper display panel, which is applied to any of the above-mentioned cholesteric liquid crystal electronic paper display panels. The driving method comprises the following steps:

[0051] S1, placing the cholesteric liquid crystal electronic paper display panel into a vertical state;

[0052] S2, reduce the common-end AC common-level input signal to 0V;

[0053] S3, turning on the gate scan line signal row by row to control the membrane switch 14 of the corresponding row to be turned on, so that the AC common voltage of the common electrode of each row of pixels is synchronized with the voltage change of the pixel electrode 4;

[0054] S4. Apply a pulse voltage to the pixel electrode 4 to directly drive the liquid crystal to switch from the vertical state to the target display state. The target display state includes a planar state, a focal conic state or a multi-level grayscale display.

[0055] Example 1

[0056] In this embodiment, a pulse voltage is applied to the pixel electrode 4 to directly drive the liquid crystal to switch to the target display state in the vertical state, specifically:

[0057] When the display switches from vertical state to planar state, the AC common voltage of the pixels in the nth row is controlled by the signal of the gate scan line 8 in the nth row. Only when the corresponding gate scan line 8 is turned on, the AC common voltage drops to 0V, so that the electrode blocks corresponding to the pixels in the nth row and the voltage of the pixel electrode 4 are synchronously returned to zero, and the liquid crystal enters the planar state.

[0058] Specifically, if Figure 7 As shown, when the display switches from the vertical state to the planar state, the source drive signals of the m signal lines 15 corresponding to the gate scan line 8 of the G1 row change from a high voltage to 0V to charge the pixel electrode 4. At the same time, the AC common input signal 1 also changes from a high voltage to 0V, and the voltage across the liquid crystal in the pixel of the G1 row changes from a high voltage to 0V, and the liquid crystal changes to a planar state.

[0059] The voltage change of the AC common input signal n is controlled by the signal of the gate scan line 8 of the Gn row, so only when the gate scan line 8 of the Gn row is turned on, the voltage of the AC common input signal n will drop to 0V. The voltage change of the common electrode 3 of each row of pixels can be synchronized with the voltage change of the pixel electrode 4, the planar state effect is better, and the picture display effect is better.

[0060] Example 2

[0061] In this embodiment, a pulse voltage is applied to the pixel electrode 4 to directly drive the liquid crystal to switch to the target display state in the vertical state, specifically:

[0062] When the cholesteric liquid crystal enters the vertical state, the AC common voltage is directly reduced to 0V in the vertical state, and a pulse voltage is applied to the pixel electrode 4. The liquid crystal is controlled to enter the planar state, focal conic state or multi-level grayscale display according to the amplitude of the pulse voltage.

[0063] In this embodiment, the voltage range of the pulse voltage is 0V to 20V, and the pulse time of the pulse voltage is between 50ms and 500ms.

[0064] Specifically, after the cholesteric liquid crystal enters the vertical state, it enters the planar state without being refreshed, and the AC common voltage is directly reduced to 0V in the vertical state.

[0065] Specifically, taking 655nm liquid crystal as an example, the corresponding relationship between the amplitude of the pulse voltage and the target display state is:

[0066] When the amplitude of the pulse voltage is 0V~6V, the liquid crystal is driven into a planar state;

[0067] When the amplitude of the pulse voltage is 7V~15V, the liquid crystal is driven to realize grayscale display;

[0068] When the amplitude of the pulse voltage is 16V~20V, the liquid crystal is driven into the focal conic state and displays black.

[0069] Taking 655nm cholesteric liquid crystal as an example, Figure 8 As shown, when a voltage in the range of 0~6V is applied in the vertical state, the liquid crystal can enter the planar state; when a voltage in the range of 16~18V is applied, the liquid crystal can enter the focal conic state; and when a voltage in the range of 7~15V is applied, different grayscale displays can be achieved.

[0070] like Figure 8 As shown, compared with the original driving method, this driving method can reduce the P-state refresh time, increase the screen refresh speed, and avoid the white flash problem during the screen refresh process.

[0071] The above description is only a preferred specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any technician familiar with the technical field, within the technical scope disclosed by the present invention, who makes equivalent replacements or changes based on the technical solution and inventive concept of the present invention, should be covered by the scope of protection of the present invention.

Claims

1. A cholesteric liquid crystal electronic paper display panel, comprising an upper substrate (1), a lower substrate (2), a gate scanning line (8) and a signal line (15), characterized in that: The upper substrate (1) is provided with a plurality of electrode strips that together form a common electrode (3), the electrode strips continuously extending in the direction of the gate scanning line (8), each electrode strip corresponding to a row of pixels, a single pixel corresponding to a pixel electrode (4), the electrode strip corresponding to each row of pixels is connected to the ITO electrode (12) of the corresponding row through a conductive spacer (13), the ITO electrode (12) is located at the periphery of the display area of ​​the display panel, wherein, in the direction of the signal line (15), the size of a single pixel is greater than the width L of the electrode strip ≥ the width L′ of the pixel electrode (4), and the spacing S between two adjacent electrode strips is greater than the width W of the gate scanning line (8); The ITO electrode (12) is connected to a common-end AC common-level input signal via a membrane switch (14), and the gate of the membrane switch (14) and the gate scanning line (8) of the pixel in the corresponding row of the ITO electrode (12) are connected to the same drive signal; The voltage change of the electrode strip corresponding to each row of pixels is synchronized with the voltage change of the corresponding pixel electrode (4).

2. The cholesteric liquid crystal electronic paper display panel according to claim 1, wherein: Each ITO electrode (12) corresponds to a row of pixels and is aligned with the direction of the gate scanning line (8), and the ITO electrodes (12) of any row of pixels are disconnected from the ITO electrodes (12) of the remaining rows of pixels.

3. The cholesteric liquid crystal electronic paper display panel according to claim 1, wherein: The conductive spacer (13) is made by exposing and developing a conductive photoresist material.

4. A method for driving a cholesteric liquid crystal electronic paper display panel, characterized in that: Applied to the cholesteric liquid crystal electronic paper display panel according to any one of claims 1 to 3, the driving method comprises: placing the cholesteric liquid crystal electronic paper display panel into a vertical state; Reduce the common-end AC common-level input signal to 0V; Turning on the gate scan line signal row by row to control the membrane switch (14) of the corresponding row to be turned on, so that the AC common voltage of the common electrode of each row of pixels is synchronized with the voltage change of the pixel electrode (4); A pulse voltage is applied to the pixel electrode (4) to directly drive the liquid crystal to switch from a vertical state to a target display state, wherein the target display state includes a planar state, a focal conic state or a multi-level grayscale display.

5. The driving method of the cholesteric liquid crystal electronic paper display panel according to claim 4, characterized in that: The pulse voltage is applied to the pixel electrode (4) to directly drive the liquid crystal to switch to the target display state in the vertical state, specifically: When the display switches from the vertical state to the planar state, the AC common voltage of the n-th row of pixels is controlled by the signal of the n-th row of gate scanning line (8). Only when the corresponding gate scanning line (8) is turned on, the AC common voltage drops to 0V, so that the voltage of the electrode block corresponding to the n-th row of pixels and the pixel electrode (4) are synchronously returned to zero, and the liquid crystal enters the planar state.

6. The driving method of a cholesteric liquid crystal electronic paper display panel according to claim 4, wherein: The pulse voltage is applied to the pixel electrode (4) to directly drive the liquid crystal to switch to the target display state in the vertical state, specifically: When the cholesteric liquid crystal enters the vertical state, the AC common voltage is directly reduced to 0V in the vertical state, and a pulse voltage is applied to the pixel electrode (4). The liquid crystal is controlled to enter the planar state, the focal conic state or the multi-level grayscale display according to the amplitude of the pulse voltage.

7. The driving method of a cholesteric liquid crystal electronic paper display panel according to claim 6, wherein: The voltage range of the pulse voltage applied is 0V~20V, and the pulse time of the pulse voltage is between 50ms~500ms.

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