Supercomputing system thermodynamic data processing method and device based on memory mapping
By converting three-dimensional thermodynamic data into one-dimensional arrays and using memory mapping technology to map data files to the kernel cache area, the problem of memory limitation in domestic supercomputing environment is solved and efficient data processing and storage is achieved.
Patent Information
- Application Number
- CN202510508122.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-22
- Publication Date
- 2025-08-01
- Estimated Expiration
- 2045-04-22
AI Technical Summary
In the domestic supercomputing environment, when traditional MPI method generates three-dimensional thermodynamic data, each computing node needs to store a complete three-dimensional array, resulting in memory limitations, unable to generate super-large-scale data, and memory bottlenecks occur.
Memory mapping technology is adopted to convert three-dimensional thermodynamic data into one-dimensional arrays, and the user buffer is shared through the kernel cache area. The memory mapping mechanism is used to map data files to hardware devices, reducing the number of I/O accesses and optimizing data management and access.
It effectively overcomes the memory bottleneck of ultra-large-scale data generation, improves computing and storage efficiency, and significantly optimizes data access speed and system performance.
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Figure CN120406842A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the technical field of computer devices, and particularly to a method and device for processing thermodynamic data of a supercomputer system based on memory mapping. Background Art
[0002] Thermodynamic 3D data refers to a high-dimensional data set used to describe the distribution of thermodynamic state variables (such as temperature, pressure, density, internal energy, entropy, etc.) in a three-dimensional space. This type of data usually comes from high-precision numerical simulations, experimental measurements, or theoretical calculations, and is widely used in research fields such as heat conduction analysis, computational fluid dynamics (CFD), and phase change process modeling. Due to the growth of computing requirements and the improvement of experimental resolution, the scale of thermodynamic 3D data usually reaches the terabyte level and relies on efficient data storage and processing technologies.
[0003] Common data storage formats include HDF5, NetCDF, and custom binary formats to ensure high-throughput data reading and writing performance. In terms of data processing, technologies such as MPI (Message Passing Interface) parallel computing and CUDA (Compute Unified Device Architecture) acceleration are usually used to optimize the access, calculation, and visualization efficiency of large-scale data. In the domestic supercomputer environment, when generating three-dimensional thermodynamic data in the traditional MPI way, each computing node needs to create a complete three-dimensional array containing boundary temperatures, and calculate the temperature at the next moment of each point using six-neighbor temperatures during the traversal until it converges to the external constant temperature. However, since each node needs to store the complete three-dimensional array, the data scale is limited by memory and can only generate data up to the megabyte level at most. Further expansion will lead to memory overflow. How to overcome the memory bottleneck in the generation of ultra-large-scale data is an urgent problem to be solved. Summary of the Invention
[0004] Based on this, in view of the above problems, it is necessary to provide a method, device, equipment, and storage medium for processing thermodynamic data of a supercomputer system based on memory mapping that can overcome the memory bottleneck in the generation of ultra-large-scale data.
[0005] The first aspect of this application provides a method for processing thermodynamic data of a supercomputer system based on memory mapping, including:
[0006] Obtain a one-dimensional array obtained by converting three-dimensional thermodynamic data in a user buffer, as well as the array start address and one-dimensional index of the one-dimensional array;
[0007] Use a process to perform a memory mapping call on the corresponding partial data file in the one-dimensional array according to the array start address and one-dimensional index, and map the data file to the kernel buffer; the kernel buffer shares the user buffer;
[0008] Perform data transmission with a hardware device based on the data file mapped in the kernel buffer.
[0009] In one embodiment, the usage process makes a memory mapping call to the corresponding partial data file in the one-dimensional array according to the head address of the array and the one-dimensional index, and maps the data file to the kernel buffer, including:
[0010] Determine the corresponding data file to be converted in the one-dimensional array according to the head address of the array, the one-dimensional index, and the preset process processing amount;
[0011] Divide the data file to be converted into multiple data blocks according to the preset buffer capacity, sequentially perform data conversion on each data block in series, and map the converted data file to the kernel buffer.
[0012] In one embodiment, the buffer capacity is the buffer capacities of the input buffer and the output buffer; the sequentially performing data conversion on each data block in series and mapping the converted data file to the kernel buffer includes:
[0013] Analyze the boundary data and internal data of the current data block in the input buffer by using a sliding window strategy according to the one-dimensional index, transfer the boundary data amplitude to the corresponding position in the output buffer, and after reading adjacent data for the internal data, calculate and output to the corresponding position in the output buffer through a thermodynamic calculation formula, and map the data file obtained by converting the output buffer to the kernel buffer.
[0014] In one embodiment, the memory mapping triggers a page table query at a page fault through a demand paging mechanism, dynamically loads the required file pages into the kernel buffer, and dynamically evicts low-priority pages when the kernel buffer overflows based on a page replacement algorithm.
[0015] In one embodiment, the number of processes is multiple. Each process determines the corresponding data file to be converted in the one-dimensional array according to the head address of the array, the one-dimensional index, and the offset. Each process makes a memory mapping call to the corresponding data file to be converted in parallel and maps the data file to the kernel buffer; wherein, the offset is determined according to the process processing amount.
[0016] In one embodiment, the method further includes:
[0017] When the calculation step gap between different processes reaches a preset maximum calculation step threshold, a delayed synchronization parallel mechanism is used to adjust each process, and an error compensation mechanism is introduced for data compensation.
[0018] In one embodiment, introducing an error compensation mechanism for data compensation includes: after each process reads adjacent data from internal data, obtaining the approximate true values of the current data and the adjacent data at the same moment through an error compensation formula, and then writing the obtained data and the newly calculated step synthesis data into the corresponding positions of the buffer according to the thermodynamic calculation formula.
[0019] In one embodiment, the thermodynamic calculation formula adopted by the error compensation mechanism is:
[0020]
[0021] Where κ, Δt, h x 、h y 、h z are constants, and θ n [i][j][k] represents the temperature at the point (i, j, k) at time n, and θ n+1 [i][j][k] represents the temperature at the point (i, j, k) at time n + 1.
[0022] In one embodiment, the error compensation formula adopted by the error compensation mechanism is:
[0023] θ n+m [i][j][k] = α m ·θ n [i][j][k]
[0024] α = W x ·(2 + dx) + W y (2 + dy) + W z (2 + dz)
[0025]
[0026] Where α is a constant, and θ n+m [i][j][k] represents the temperature at the point (i, j, k) at time n + m; m is the time difference before and after compensation.
[0027] The second aspect of the present application provides a thermodynamic data processing device for a supercomputer system based on memory mapping, including:
[0028] A data acquisition module, configured to acquire a one-dimensional array obtained by converting three-dimensional thermodynamic data in a user buffer, as well as the array start address and one-dimensional index of the one-dimensional array;
[0029] A data mapping module, configured to use a process to perform a memory mapping call on the corresponding partial data file in the one-dimensional array according to the array start address and one-dimensional index, and map the data file to the kernel buffer; the kernel buffer shares the user buffer;
[0030] A data transmission module for performing data transmission with a hardware device based on the data file mapped in the kernel buffer.
[0031] A third aspect of the present application provides a computer device, including a memory and a processor. The memory stores a computer program, and when the processor executes the computer program, the steps of the above method are implemented.
[0032] A fourth aspect of the present application provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the above method are implemented.
[0033] The above method, device, equipment, and storage medium for processing thermodynamic data of a supercomputer system based on memory mapping use a process to perform a memory mapping call on the corresponding partial data file in a one-dimensional array according to the array start address and one-dimensional index in the user buffer, map the data file to the kernel buffer of the shared user buffer, and perform data transmission with the hardware device based on the data file mapped in the kernel buffer. By performing a partial data file memory mapping call on the one-dimensional array by the process according to the array start address and one-dimensional index, memory congestion is avoided, the memory bottleneck caused by ultra-large-scale data generation can be overcome, the number of I / O accesses is reduced, data management and access are optimized, and computing and storage efficiency are improved. BRIEF DESCRIPTION OF THE DRAWINGS
[0034] Figure 1 It is a flowchart of a method for processing thermodynamic data of a supercomputer system based on memory mapping in an embodiment;
[0035] Figure 2 It is a schematic diagram of the composition of thermodynamic 3D data in three dimensions X, Y, and Z in an embodiment;
[0036] Figure 3 It is a schematic diagram of the process of converting three-dimensional data into one-dimensional data in an embodiment;
[0037] Figure 4 It is a schematic diagram of partial file mapping in an embodiment;
[0038] Figure 5 It is a schematic diagram of the mmap I / O operation process in an embodiment;
[0039] Figure 6 It is a flowchart of using a process to perform a memory mapping call on the corresponding partial data file in a one-dimensional array according to the array start address and one-dimensional index, and map the data file to the kernel buffer in an embodiment;
[0040] Figure 7Schematic diagram of the process of generating thermodynamic data based on memory mapping combined with a buffer in a single computational step and a single process in one embodiment;
[0041] Figure 8 Schematic diagram of the composition of all the time for generating thermodynamic data under the BSP framework in one embodiment;
[0042] Figure 9 Schematic diagram of the composition of all the time for generating thermodynamic data under the SSP framework in one embodiment;
[0043] Figure 10 Schematic diagram of the comparison of the thermodynamic data generation time between adding the mmap + SSP + error compensation mechanism and only using mmap in one embodiment;
[0044] Figure 11 Schematic diagram of the process of generating thermodynamic data based on memory mapping + SSP + error compensation in a single computational step and a single process in one embodiment;
[0045] Figure 12 Block diagram of the structure of a thermodynamic data processing device for a supercomputer system based on memory mapping in one embodiment;
[0046] Figure 13 Internal structure diagram of a computer device in one embodiment. Specific implementation manners
[0047] In order to make the objectives, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.
[0048] In a domestic supercomputer environment, due to the limited memory of a single node, using MPI parallel computing combined with a buffer will generate a large number of I / O (input / output) requests. To efficiently generate and store ultra-large-scale 3D thermodynamic data, the thermodynamic data processing method for a supercomputer system based on memory mapping provided by the present application uses a process to perform a memory mapping call on the corresponding partial data file in a one-dimensional array according to the array start address and one-dimensional index in the user buffer, maps the data file to the kernel buffer area of the shared user buffer, and performs data transmission with the hardware device based on the mapped data file in the kernel buffer area. By the process performing a memory mapping call on the converted one-dimensional array for the partial data file according to the array start address and one-dimensional index, memory congestion can be avoided, the memory bottleneck in the generation of ultra-large-scale data can be overcome, the number of I / O accesses can be reduced, data management and access can be optimized, and the computing and storage efficiency can be improved.
[0049] In one embodiment, as Figure 1As shown in the figure, a method for processing thermodynamic data of a supercomputer system based on memory mapping is provided, including:
[0050] Step S110: Obtain a one-dimensional array obtained by converting three-dimensional thermodynamic data in the user buffer, as well as the starting address of the one-dimensional array and the one-dimensional index.
[0051] Among them, the starting address of the array (mapped_data_input / output) is the starting address of the storage location of the one-dimensional array in the user buffer, which is used for subsequent data reading. Each data in the one-dimensional array corresponds to a one-dimensional index (Index_one_dimension), which is used to determine whether the data belongs to boundary data or internal data in the future. As Figure 2 shown, the three-dimensional thermodynamic data is based on a regular cubic grid. Each grid point corresponds to a physical position in space and stores the temperature value at that point. Usually, the data of these grid points is stored in single-precision or double-precision floating-point numbers. In Figure 2 the example shown, the grid consists of 2×4×2 = 16 unit blocks, and each unit block contains a temperature data value. Since the calculation of each data point depends on six adjacent points, generating x * y * z-scale data requires 6 * x * y * z data accesses. However, the disk I / O latency is large, and the traditional I / O mode frequently switches between the user mode and the kernel mode, resulting in limited computing efficiency. On the new generation of Tianhe supercomputer system, the traditional method uses 100 nodes and 1600 cores to generate 5TB of data. Due to the limited memory of a single node, using MPI parallel computing combined with a buffer will generate a large number of I / O requests, resulting in each step of the calculation taking 13 hours, seriously restricting the generation speed of large-scale data.
[0052] To break through the memory bottleneck of generating ultra-large-scale data, a buffer mechanism is adopted to store the data in a one-dimensional manner, and the memory occupancy is controlled in a block streaming input manner, thereby avoiding memory explosion and enabling the program to run stably. Figure 3Schematic diagram for converting three-dimensional data into one-dimensional storage: Taking a 3*3*3 data block as an example, the numbers 0 to 26 represent the one-dimensional indexes of the corresponding blocks, arranged in the order of Z direction first, then Y direction, and finally X direction. Except for the data corresponding to index 13 which is internal data, the rest are boundaries (constant room temperature). If the generated three-dimensional data is x_size*y_size*z_size, considering the boundary conditions, the actual calculated data size is (x_glo = x_size + 2)*(y_glo = y_size + 2)*(z_glo = z_size + 2). Therefore, the formula for converting the three-dimensional array index data[i][j][k] into a one-dimensional index Index_one_dimension is:
[0053] Index_one_dimension = k + j * z_glo + i * z_glo * y_glo
[0054] For example, the one-dimensional index corresponding to the first data data[0][0][0] is 0, and the one corresponding to the last data data[2][2][2] is 26. Similarly, the three-dimensional array index can also be retrieved from the one-dimensional index.
[0055] Among them, the one-dimensional array data stores index information. data[0] stores the indexes in the x dimension, data[1] stores the indexes in the y dimension, and data[2] stores the indexes in the z dimension. By converting from one-dimensional index to three-dimensional, it is easy to determine whether the data is boundary data, that is, if data[0] is equal to 0 or x_glo, or data[1] is equal to 0 or y_glo, or data[2] is equal to 0 or z_glo, it is boundary data and can be directly placed in the output buffer without any further processing. Otherwise, the data of the six adjacent points in the three-dimensional space of this point needs to be combined with the thermodynamic formula and output to the output buffer. In the one-dimensional index, the distances are ±z_glo*y_glo, ±z_glo, and ±1 respectively.
[0056] Step S120: Use a process to perform a memory mapping call on the corresponding partial data file in the one-dimensional array according to the array start address and the one-dimensional index, and map the data file to the kernel buffer.
[0057] Among them, the kernel buffer shares the user buffer. Mmap (Memory Mapping) means directly mapping a memory area in the user space to the kernel space to achieve data sharing between the user mode and the kernel mode. Memory mapping is an efficient I / O mechanism. Based on the virtual memory management of the operating system, it provides a transparent and high-performance way to access files. Through the mmap() system call, the file content can be directly mapped to the process address space logically, enabling the process to read and write file data as if accessing memory without explicitly calling read() and write() for data transfer. This mechanism greatly optimizes the I / O processing efficiency and is especially suitable for large-scale data computing and high-performance computing (HPC) scenarios. As Figure 4 shown, after the memory mapping is successful, the modifications made by the user to this memory area can be directly synchronized to the kernel space, and vice versa, thus avoiding the data copy overhead in the traditional read / write method. In scenarios where large-scale data transmission is required frequently, memory mapping can significantly improve the data access efficiency and reduce the system overhead.
[0058] By implementing this memory mapping, the process can directly read and write to the mapped memory area, which is suitable for reading and writing the one-dimensional three-dimensional data mentioned above. The system automatically writes back the dirty pages (Page Cache) to the disk file to complete the file operation without explicitly calling system calls such as read / write. In addition, memory mapping not only improves the I / O efficiency of a single process but also supports multiple processes to share the same file mapping area. The modifications made by the kernel to this mapping area can be directly synchronized to the user space of all processes, thus supporting efficient file sharing between different processes and achieving efficient inter-process communication (IPC). This makes it particularly suitable for distributed computing and parallel computing applications, such as data exchange on HPC systems.
[0059] Specifically, the memory mapping technology can map extremely large files to memory because it relies on virtual memory technology at the bottom layer. The addressing ability of a 64-bit operating system can cover data in the terabyte range. Even if the physical memory cannot fully accommodate it, through the demand paging mechanism, when a page fault occurs, the page table can be queried to load the external memory page into memory, dynamically loading the required file pages into memory instead of loading the entire file at once. This method greatly reduces the I / O access overhead, enabling even extremely large files in the terabyte range to be accessed efficiently without occupying too much physical memory. In addition, the page replacement algorithm dynamically swaps out low-priority pages when the memory overflows to ensure the stable operation of the system and provide a speed close to memory access.
[0060] In one embodiment, the number of processes is multiple. Each process determines the corresponding data file to be converted in the one-dimensional array according to the array starting address, one-dimensional index, and offset. Each process makes a memory mapping call to the corresponding data file to be converted in parallel, and maps the data file to the kernel buffer.
[0061] Among them, the offset is determined according to the process processing amount, and the process processing amount is determined according to the total size of the one-dimensional array and the number of processes. For example, if the total size of the one-dimensional array is M and the number of processes is N, then the process processing amount of a single process is M / N, and the offsets of the starting addresses for N processes to read data are 0, M / N, 2M / N, …, M respectively. That is, the first process is responsible for the memory mapping call of the data file from the "array starting address" to "array starting address + M / N - 1" in the one-dimensional array, the second process is responsible for the memory mapping call of the data file from "array starting address + M / N" to "array starting address + 2M / N - 1" in the one-dimensional array, the third process is responsible for the memory mapping call of the data file from "array starting address + 2M / N" to "array starting address + 3M / N - 1" in the one-dimensional array, and so on. The data files of the one-dimensional array are evenly distributed to multiple processes for memory mapping calls, and each process can execute in parallel, improving the data processing efficiency. Further, in each process, the corresponding data file to be converted can also be divided into multiple data blocks according to the capacity of the internal buffer, and the memory mapping calls to each data block are sequentially performed serially in combination with the internal buffer, avoiding memory congestion due to excessive data.
[0062] It can be understood that in other embodiments, it is not necessarily to evenly distribute the data files of the one-dimensional array to each process. The process processing amount can be allocated according to actual needs, and the memory mapping calls can also be performed in parallel using multiple processes.
[0063] Step S130: Transmit data between the mapped data file in the kernel buffer and the hardware device. Since the kernel buffer shares the user buffer, the mapped data file can be directly transmitted from the kernel buffer to the hardware device storage by the CPU, without repeatedly reading and writing the data file from the user buffer to move it to the kernel buffer, reducing the number of I / O accesses.
[0064] Specifically, as Figure 5As shown, the hardware device is a disk, and the kernel storage area uses a dirty page cache. In the traditional I / O mechanism, the data transfer path is: hard disk (DMA) - kernel buffer (CPU) - user buffer (CPU). In the cache I / O system of Linux, data needs to be first copied from the disk to the kernel space buffer, managed by the Page Cache page cache, and then copied from the kernel buffer to the application address space for numerical calculations in the user state. During this process, the data is copied multiple times between the application address space and the cache, resulting in a significant increase in CPU and memory overhead. In the scenario of ultra-large-scale data processing, the I / O bottleneck is particularly prominent, seriously affecting the computing efficiency.
[0065] In the mmap mechanism, the data transfer path is optimized as: hard disk (DMA) - kernel buffer (shared user buffer) (CPU). First, only one mmap() system call is required to map the file to the process address space. Subsequent access is like operating on memory, without frequent read / write calls, thus avoiding frequent switching between the user state and the kernel state. Second, since the system kernel buffer and the user buffer are shared, the mmap access to hard disk data reduces one copy operation from the system cache to the application cache. It is equivalent to directly transferring disk data from DMA to the user buffer, reducing CPU overhead, improving data access efficiency, and significantly optimizing system performance.
[0066] The application and optimization of mmap in large-scale data computing have significant advantages, reducing the I / O bottleneck and improving the computing efficiency. In ultra-large data computing tasks, due to the small memory of each node, the traditional I / O method has frequent data copying and system calls, which are extremely likely to become the performance bottleneck of computing. After using mmap(), the CPU and memory overhead of data transfer can be significantly reduced, and the throughput of computing nodes can be improved. It is applicable to high-performance parallel computing. In the domestic supercomputer environment, large-scale data often needs to be processed in parallel across multiple computing nodes. Combining mmap() with MPI parallel programming can reduce the data exchange overhead between processes, improve the data loading speed, and optimize the multi-node data sharing mechanism. It can support efficient one-dimensional storage of three-dimensional data. In fields such as scientific computing and visualization rendering, three-dimensional data usually needs to be flattened into a one-dimensional array for storage and calculation. mmap() can map an ultra-large file to a continuous virtual address space, making the access mode of three-dimensional data closer to memory operations, improving data locality, and optimizing cache performance.
[0067] In one embodiment, as Figure 6 shown, step S120 includes step S122 and step S124.
[0068] Step S122: Determine the corresponding data file to be converted in the one-dimensional array according to the array start address, one-dimensional index, and preset process processing amount. For the convenience of understanding, take the first process as an example. The total size of the one-dimensional array is M, and the number of processes is N. Then, according to the array start address, one-dimensional index, and preset process processing amount, the data file to be converted for the first process can be determined as the data files from "array start address" to "array start address + M / N - 1" in the one-dimensional array.
[0069] Step S124: Divide the data file to be converted into multiple data blocks according to the preset buffer capacity, and sequentially perform data conversion on each data block in series, and map the converted data file to the kernel buffer. Among them, as Figure 7 shown, the buffer capacity n is the buffer capacities of the input buffer buffer0 and the output buffer buffer1. Also take the first process as an example. The data file to be converted can be divided into multiple data blocks according to the buffer capacity n. Each time, data conversion is performed on one data block in the input buffer buffer0, and the converted data file is output to the output buffer buffer1. Then, data conversion is performed on the next data block in the input buffer buffer0. In this way of serial conversion processing, each process divides the mapped part (old) of the file in the extremely large one-dimensional array (old) in the external memory into data blocks and converts them sequentially, and finally obtains the corresponding mapped part (new) of the file. The mapped parts (new) obtained by all processes performing operations in parallel are merged as the extremely large one-dimensional data (new) in the external memory, that is, the converted file of the one-dimensional array is obtained in the user buffer and synchronously mapped to the kernel buffer, so as to perform data transmission with the hardware device based on the data file mapped in the kernel buffer.
[0070] Further, in step S124, sequentially performing data conversion on each data block in series and mapping the converted data file to the kernel buffer includes: analyzing the boundary data and internal data of the current data block in the input buffer by using a sliding window strategy according to the one-dimensional index, mapping the boundary data amplitude to the corresponding position in the output buffer, and after reading adjacent data for the internal data, calculating and outputting to the corresponding position in the output buffer through a thermodynamic calculation formula, and mapping the data file converted in the output buffer to the kernel buffer.
[0071] Continue to refer to Figure 7, whether for reading or writing, operations are performed on the one-dimensional arrays mapped_data_read / write, achieving the same processing of large files in external storage as that of arrays in memory. First, the entire three-dimensional thermodynamic data is logically mapped to a one-dimensional array, and the starting address of the array (mapped_data_input / output) is returned. Only one mmap call is required for a single computational step to map the file to the process address space. Subsequent access is like a memory operation, eliminating the need for frequent read / write calls and avoiding frequent switching between user mode and kernel mode. Each process uses a proprietary one-dimensional index index_one_dimension to judge boundary conditions. When processing internal data, instead of repeatedly reading from external storage, it directly accesses memory, improving the reading efficiency. The input buffer buffer0 and the output buffer buffer1 adopt a sliding window strategy (buffer0 / 1 = mapped_data_input / output + index_one_dimension), ensuring dynamic adjustment at the end of traversal to avoid memory overflow.
[0072] Among them, taking the first process as an example again, the buffer capacities of the input buffer buffer0 and the output buffer buffer1 are n. In this process, the one-dimensional index index_one_dimension is used to judge whether it is boundary data. The data blocks in the input buffer buffer0 are traversed from 0 to n - 1, and index_one_dimension is incremented by 1 for each traversal. The process converts the one-dimensional index index_one_dimension to a three-dimensional index to judge whether the data at the corresponding position is boundary data. For boundary data, it is directly copied to the corresponding position in the output buffer buffer1. When it is judged as internal data, for example Figure 7 the data corresponding to the one-dimensional index i - 2 to j in red in is internal data. Then, the adjacent data at Index_one_dimension ± z_glo * y_glo, ± z_glo, ± 1 corresponding to the distance from the one-dimensional index i - 2 (according to the current internal data index) is read from the one-dimensional array returned by mmap. The result is calculated through the thermodynamic calculation formula and output to the position i - 2 in the output buffer buffer1. The same applies to other internal data. After mmap mapping, modifying the data in the output buffer buffer1 can be directly mapped to external storage.
[0073] In one embodiment, the method further includes: when the computational step gap between different processes reaches a preset maximum computational step threshold, a delayed synchronization parallel mechanism is adopted to adjust each process, and an error compensation mechanism is introduced for data compensation.
[0074] Such as Figure 8As shown in the figure, the total time consumed to generate thermodynamic data consists of the single-step calculation time (Tc) and the synchronization barrier time (Tb). Under the Bulk Synchronous Parallel (BSP) framework, the single-step calculation time Tc is determined by the cask effect, that is, the global progress is limited by the slowest process (e.g., Rank2 among processes Rank0 to Rank3). When a large number of processes are allocated, such as when tens of thousands of cores are allocated, the communication time of the synchronization barrier time Tb cannot be ignored. Tb results from the communication overhead generated by all processes aligning their states through an explicit synchronization barrier (such as MPI_Barrier) after each calculation step. To address the performance bottleneck, this application first uses the memory mapping (mmap) technology to optimize the local calculation efficiency of the slowest process, reducing its single-step time consumption Tc by reducing disk I / O operations. Furthermore, a Stale Synchronous Parallel (SSP) mechanism is introduced, allowing a controllable step delay between processes, thereby significantly reducing the number of trigger times and time consumption Tb of the synchronization barrier. At the same time, by merging high-frequency mmap operations, Tc is further compressed. In addition, the SSP framework incorporates an error compensation algorithm to offset the potential accuracy loss of asynchronous calculations. Finally, through the collaborative optimization of mmap and SSP, the system achieves a secondary acceleration on the basis of the memory mapping technology, taking into account both calculation efficiency and convergence accuracy, and is particularly suitable for distributed thermodynamic modeling in heterogeneous hardware environments.
[0075] The Stale Synchronous Parallel (SSP) mechanism is a parallel computing paradigm derived from distributed machine learning training, which constructs an elastic coordination model between Bulk Synchronous Parallel (BSP) and Asynchronous Parallel (ASP) at the synchronization mechanism level. The core mechanism of SSP is achieved by defining the maximum staleness threshold: the maximum calculation step threshold Threshold strictly stipulates the upper limit of the maximum calculation step length that any worker can exceed the globally slowest node. When the step difference between the calculation progress of a certain node and the slowest node reaches the maximum calculation step threshold Threshold, the node will actively enter the blocking state until the lagging node catches up and the step difference falls back within the maximum calculation step threshold Threshold.
[0076] Specifically, SSP exhibits compatibility with classical models: when threshold = 0, SSP degrades to a strict BSP mode, requiring all nodes to align at the synchronization barrier; when threshold → +∞, SSP degrades to the ASP mode, completely eliminating the waiting overhead between nodes.
[0077] As Figure 9 shown in the time series decomposition of thermodynamic data based on the SSP framework, this mechanism significantly optimizes the negative impact of straggler nodes on the overall throughput in long-term tasks by dynamically balancing computational efficiency and consistency error. When the computational steps of this process exceed the maximum computational step threshold Threshold of the slowest process, it is necessary to wait until the slowest process catches up. It can be seen that except for the final synchronization time, the SSP framework does not require frequent synchronization like the BSP framework, greatly reducing Tb.
[0078] From Figure 7 it can be seen that if N computational steps are required, N mmap calls are needed. Its essence is still an I / O operation, and the time overhead cannot be ignored. However, using the SSP framework and the error compensation mechanism can reduce the N mmap calls to one mmap call, greatly reducing Tc_i for each process, thereby reducing Tc.
[0079] Although the SSP framework can improve the computational speed, there is an inevitable problem that is asynchronous computing between each process. At computational step S, data of six adjacent points in three dimensions are required for the current point. However, the data of these six points may be the data calculated at computational step S - m in a slower process, or the data calculated at computational step S + m in a faster process (m is any integer value). Then, directly calculating data at different times will result in a large precision deviation and incorrect data. At this time, an error compensation mechanism needs to be introduced to ensure the accuracy of the data.
[0080] Specifically, an error compensation mechanism is introduced for data compensation, including: after each process reads adjacent data from internal data, the approximate true values of the current data and adjacent data at the same moment are obtained through the error compensation formula, and then the data obtained and the new computational step combined data are written into the corresponding positions in the buffer according to the thermodynamic calculation formula.
[0081] Among them, the thermodynamic calculation formula adopted by the error compensation mechanism is:
[0082]
[0083] Among them, κ, Δt, h x 、h y 、h z are constants, θn [i][j][k] represents the temperature at the point (i, j, k) at time n, θ n+1 [i][j][k] represents the temperature at the point (i, j, k) at time n + 1. It can be understood that θ n [i + 1][j][k] represents the temperature at the point (i + 1, j, k) at time n, θ n [i - 1][j][k] represents the temperature at the point (i - 1, j, k) at time n, θ n [i][j + 1][k] represents the temperature at the point (i, j + 1, k) at time n, θ n [i][j - 1][k] represents the temperature at the point (i, j - 1, k) at time n, θ n [i][j][k + 1] represents the temperature at the point (i, j, k + 1) at time n, θ n [i][j][k - 1] represents the temperature at the point (i, j, k - 1) at time n.
[0084] From the spatial continuity, it can be known that when the spatial division is infinitely fine, the temperatures of adjacent points can be approximately regarded as equal, that is, θ n [i][j][k] ≈ θ n [i - 1][j][k] ≈ θ n [i + 1][j][k] ≈ θ n [i][j - 1][k] ≈ θ n [i][j + 1][k] ≈ θ n [i][j][k - 1] ≈ θ n [i][j][k + 1], then the above formula can be simplified into the following form:
[0085] θ n+1 [i][j][k] = α · θ n [i][j][k]
[0086] where the constant α:
[0087] α = W x ·(2 + dx) + W y (2 + dy) + W z (2 + dz)
[0088]
[0089] Furthermore, the error compensation formula adopted by the error compensation mechanism can be obtained as:
[0090] θ n+m [i][j][k] = α m · θn [i][j][k]
[0091] where θ n+m [i][j][k] represents the temperature at the point (i, j, k) at the moment of n + m; m is the time difference before and after compensation. From this formula, the values of the adjacent six data of the current position data of the current process at any calculation step can be converted into the value corresponding to the calculation step S (at the same moment) of the current position data. When selecting the appropriate maximum calculation step threshold Threshold in the SSP framework, the absolute value of m is not too large, ensuring the accuracy and precision of the data. The above is the principle of error compensation.
[0092] Then, it is necessary to store the temperature floating-point data f and the calculation step integer data s of each point. The floating-point data is 32-bit float, and the integer data is 32-bit int. When storing, they are combined into 64-bit data, with float occupying the high 32 bits and int occupying the low 32 bits. They can be decomposed during calculation; this ensures that the process can read and modify the data and the calculation step count simultaneously, avoiding the problem of read-write inconsistency. At the same time, it can be seen that only one file initialization is required, that is, one mmap mapping is performed, and then only data needs to be read and written on this file. There is no need for N mmap mappings corresponding to N calculation steps. Although the time for combining and decomposing data is required, it is all carried out in memory, and compared with the I / O external memory operation time in mmap, it can be almost ignored. Therefore, Tc is greatly reduced.
[0093] Figure 10 To compare the thermodynamic data generation time of adding the mmap + SSP + error compensation mechanism and using only mmap, it can be seen that the method of mmap + SSP + error compensation only has one global barrier time and one mmap initialization call time. In the original mmap method, if N calculation steps are required, N global barriers and N mmap calls are needed. Therefore, the method of mmap + SSP + error compensation is better.
[0094] Therefore, by optimizing on the basis of the Figure 7 scheme, such as Figure 11As shown. The boundary data corresponding to the white one-dimensional index is not processed. For the internal data corresponding to the red one-dimensional index: In the one-dimensional array returned by mmap, read the neighboring data at Index_one_dimension±z_glo*y_glo, ±z_glo, ±1 corresponding to the distance one-dimensional index i - 2 (according to the current internal data index). After decomposing the 64-bit data, obtain the temperature data and the number of calculation steps. Through the error compensation formula, obtain the approximate true values of the current data and the adjacent data at the same moment. Then calculate through the thermodynamic calculation formula, and merge the obtained data and the new calculation step into a 64-bit data and write it to the i - 2 position in the output buffer buffer1. The same applies to other internal data.
[0095] In the scenario of domestic supercomputers, using memory-mapped files avoids the frequent conversion between user mode and kernel mode (frequent I / O) due to the small memory of each node, reduces the copy between system cache and application cache, realizes efficient interaction between the user area and the system kernel, and at the same time provides a mutual communication method for shared memory between processes, which is suitable for writing parallel programs, making the file regarded as a part of memory, and each process can read and write the file like accessing ordinary memory, realizing efficient large-scale data parallel transmission.
[0096] At the same time, further introduce the delayed synchronization parallel mechanism SSP, which allows a controllable number of steps delay between processes, thereby greatly reducing the triggering times and time consumption Tb of the synchronization barrier, and at the same time further compressing Tc by merging high-frequency mmap operations. In addition, the SSP framework embeds an error compensation algorithm to offset the potential accuracy loss of asynchronous calculation. Finally, through the collaborative optimization of mmap and SSP, the system realizes secondary acceleration on the basis of memory mapping technology, taking into account both calculation efficiency and convergence accuracy.
[0097] To verify the performance improvement effect of memory mapping technology in domestic supercomputers, a super-large data generation test was carried out on the Tianhe new generation supercomputer system, and the experimental parameters are as follows:
[0098] Computing resources: 100 computing nodes (a total of 1600 CPU cores)
[0099] Data scale: 5TB
[0100] Total number of calculation steps: 100
[0101] Before optimization (traditional read() / write() method): Time consumption 1300h
[0102] After optimization (using mmap() + SSP(Threshold = 10) + error compensation mechanism): Time consumption 250h
[0103] At the same time, its average data error was tested to be 0.024556%, and the loss of precision was negligible and within an acceptable range.
[0104] Experiments show that after adopting the memory mapping technology combined with the SSP + error compensation mechanism, the calculation time is shortened to 20% of the original, the I / O efficiency is significantly improved, the CPU load is reduced at the same time, and the system throughput is increased, providing a more efficient solution for large-scale data calculation. It optimizes the bottleneck problem caused by the small memory of domestic supercomputers, which requires frequent I / O operations and synchronization barriers.
[0105] It should be understood that although the steps in the flowcharts involved in the above-described embodiments are sequentially shown in the direction of the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless there is a clear description in this article, the execution of these steps has no strict order limit, and these steps can be executed in other orders. Moreover, at least some of the steps in the flowcharts involved in the above-described embodiments may include multiple steps or multiple stages. These steps or stages are not necessarily executed at the same moment, but can be executed at different moments. The execution order of these steps or stages is not necessarily sequential, but can be executed alternately or in turn with at least some of the steps or stages in other steps or other steps.
[0106] Based on the same inventive concept, the embodiments of the present application also provide a memory mapping-based supercomputer system thermodynamic data processing device for implementing the above-mentioned memory mapping-based supercomputer system thermodynamic data processing method. The solution provided by this device to solve the problem is similar to the solution described in the above method. Therefore, the specific limitations in one or more embodiments of the memory mapping-based supercomputer system thermodynamic data processing device provided below can refer to the limitations on the memory mapping-based supercomputer system thermodynamic data processing method in the above text, and will not be repeated here.
[0107] In one embodiment, as Figure 12 shown, a memory mapping-based supercomputer system thermodynamic data processing device is also provided, including: a data acquisition module 110, a data mapping module 120, and a data transmission module 130, where:
[0108] The data acquisition module 110 is used to acquire the one-dimensional array obtained by converting the three-dimensional thermodynamic data in the user buffer, as well as the array start address and one-dimensional index of the one-dimensional array.
[0109] The data mapping module 120 is used to use the process to perform a memory mapping call on the corresponding partial data file in the one-dimensional array according to the array start address and one-dimensional index, and map the data file to the kernel buffer; the kernel buffer shares the user buffer.
[0110] A data transmission module 1310 for performing data transmission with a hardware device based on a data file mapped in a kernel buffer.
[0111] In one embodiment, a data mapping module 120 determines a corresponding data file to be converted in a one-dimensional array according to the array start address, one-dimensional index, and a preset process processing amount; divides the data file to be converted into multiple data blocks according to a preset buffer capacity, serially converts each data block in sequence, and maps the converted data file to the kernel buffer.
[0112] In one embodiment, the data mapping module 120 analyzes the boundary data and internal data of the current data block in the input buffer using a sliding window strategy according to the one-dimensional index, maps the boundary data amplitude to the corresponding position in the output buffer, and after reading adjacent data for the internal data, calculates and outputs to the corresponding position in the output buffer through a thermodynamic calculation formula, and maps the data file obtained by converting the output buffer to the kernel buffer.
[0113] In one embodiment, the device further includes: a synchronization compensation module for, when the calculation step gap between different processes reaches a preset maximum calculation step threshold, adjusting each process using a delayed synchronization parallel mechanism and introducing an error compensation mechanism for data compensation.
[0114] Each module in the above thermodynamics data processing device based on memory mapping can be implemented in whole or in part by software, hardware, and their combination. The above modules can be embedded in the processor in the computer device in hardware form or independent of it, or stored in the memory in the computer device in software form, so as to facilitate the processor to call and execute the operations corresponding to each of the above modules.
[0115] In one embodiment, a computer device is provided. The computer device can be a terminal, and its internal structure diagram can be as Figure 13As shown in the figure. The computer device includes a processor, a memory, an input / output interface, a communication interface, a display unit, and an input device. Among them, the processor, the memory, and the input / output interface are connected through a system bus, and the communication interface, the display unit, and the input device are connected to the system bus through the input / output interface. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage medium. The input / output interface of the computer device is used to exchange information between the processor and external devices. The communication interface of the computer device is used to communicate with external terminals in a wired or wireless manner, and the wireless manner can be achieved through WIFI, a mobile cellular network, NFC (Near Field Communication), or other technologies. When the computer program is executed by the processor, it implements a method for processing thermodynamic data of a supercomputing system based on memory mapping. The display unit of the computer device is used to form a visually visible picture, which can be a display screen, a projection device, or a virtual reality imaging device. The display screen can be a liquid crystal display screen or an electronic ink display screen. The input device of the computer device can be a touch layer covering the display screen, or a button, a trackball, or a touchpad provided on the outer shell of the computer device, or an external keyboard, touchpad, or mouse, etc.
[0116] Those skilled in the art can understand that Figure 13 the structure shown in the figure is only a block diagram of some structures related to the solution of this application, and does not constitute a limitation on the computer device to which the solution of this application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine some components, or have different component arrangements.
[0117] In one embodiment, a computer device is provided, including a memory and a processor. A computer program is stored in the memory, and when the processor executes the computer program, the steps in the above method embodiments are implemented.
[0118] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by the processor, the steps in the above method embodiments are implemented.
[0119] In one embodiment, a computer program product is provided, including a computer program. When the computer program is executed by the processor, the steps in the above method embodiments are implemented.
[0120] Those of ordinary skill in the art can understand that all or part of the processes in the methods of the above embodiments can be completed by instructing relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above methods. Among them, any reference to a memory, database, or other medium used in the embodiments provided in the present application can include at least one of non-volatile and volatile memories. Non-volatile memories can include read-only memory (ROM), magnetic tapes, floppy disks, flash memories, optical memories, high-density embedded non-volatile memories, resistive random-access memories (ReRAM), magnetoresistive random-access memories (MRAM), ferroelectric random-access memories (FRAM), phase change memories (PCM), graphene memories, etc. Volatile memories can include random access memory (RAM) or external cache memories, etc. By way of illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM), etc. The databases involved in the embodiments provided in the present application can include at least one of relational databases and non-relational databases. Non-relational databases can include distributed databases based on blockchain, etc., without limitation. The processors involved in the embodiments provided in the present application can be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logics, data processing logics based on quantum computing, etc., without limitation.
[0121] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.
[0122] The above embodiments only represent several implementation manners of the present application. The description is relatively specific and detailed, but it should not be construed as a limitation on the scope of the invention patent. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application should be subject to the appended claims.
Claims
1. A method for processing thermodynamic data of a supercomputer system based on memory mapping, characterized in that, Including: Obtain a one-dimensional array obtained by converting three-dimensional thermodynamic data in a user buffer, as well as the array start address and one-dimensional index of the one-dimensional array; Use a process to perform a memory mapping call on the corresponding partial data file in the one-dimensional array according to the array start address and one-dimensional index, and map the data file to the kernel buffer; the kernel buffer shares the user buffer; Perform data transmission with a hardware device based on the data file mapped in the kernel buffer.
2. The method according to claim 1, wherein The use of the process to perform a memory mapping call on the corresponding partial data file in the one-dimensional array according to the array start address and one-dimensional index, and map the data file to the kernel buffer, includes: Determine the corresponding data file to be converted in the one-dimensional array according to the array start address, the one-dimensional index, and a preset process processing amount; Divide the data file to be converted into multiple data blocks according to a preset buffer capacity, and sequentially perform data conversion on each data block in series, and map the converted data file to the kernel buffer.
3. The method according to claim 2, wherein The buffer capacity is the buffer capacity of the input buffer and the output buffer; the sequentially performing data conversion on each data block in series and mapping the converted data file to the kernel buffer includes: Analyze the boundary data and internal data of the current data block in the input buffer using a sliding window strategy according to the one-dimensional index, map the boundary data amplitude to the corresponding position in the output buffer, and after reading adjacent data for the internal data, calculate and output to the corresponding position in the output buffer through a thermodynamic calculation formula, and map the data file obtained by converting the output buffer to the kernel buffer.
4. The method according to claim 1, wherein The memory mapping triggers a page table query during a page fault through a demand paging mechanism, dynamically loads the required file pages into the kernel buffer, and dynamically swaps out low-priority pages when the kernel buffer overflows based on a page replacement algorithm.
5. The method according to any one of claims 1-4, characterized in that The number of the processes is multiple, and each process determines the corresponding data file to be converted in the one-dimensional array according to the array start address, the one-dimensional index, and an offset, and each process performs a memory mapping call on the corresponding data file to be converted in parallel, and maps the data file to the kernel buffer; wherein, the offset is determined according to the process processing amount.
6. The method according to claim 5, characterized in that Also including: When the calculation step gap between different processes reaches a preset maximum calculation step threshold, adopt a delayed synchronization parallel mechanism to adjust each process, and introduce an error compensation mechanism for data compensation.
7. The method according to claim 6, wherein The introducing an error compensation mechanism for data compensation includes: after each process reads adjacent data for the internal data, obtain the approximate true values of the current data and the adjacent data at the same moment through an error compensation formula, and then write the obtained data and the new calculation step combined data into the corresponding position of the buffer according to the thermodynamic calculation formula.
8. The method according to claim 7, characterized in that The thermodynamic calculation formula adopted by the error compensation mechanism is: where κ, Δt, h x , h y , h z are constants, θ n [i][j][k] represents the temperature at the point (i, j, k) at time n, and θ n+1 [i][j][k] represents the temperature at the point (i, j, k) at time n + 1.
9. The method according to claim 8, wherein The error compensation formula adopted by the error compensation mechanism is: θ n+m [i][j][k] = α m ·θ n [i][j][k] α = W x ·(2 + dx) + W y (2 + dy) + W z (2 + dz) where α is a constant, and θ n+m [i][j][k] represents the temperature at the point (i, j, k) at the moment of n + m; m is the time difference before and after compensation.
10. A thermodynamic data processing device for a supercomputer system based on memory mapping, characterized in that, Including: A data acquisition module, configured to obtain a one-dimensional array obtained by converting three-dimensional thermodynamic data in a user buffer, as well as the array start address and one-dimensional index of the one-dimensional array; A data mapping module, which is used to perform a memory mapping call on the corresponding partial data file in the one-dimensional array according to the array start address and the one-dimensional index by using a process, and map the data file to the kernel buffer; the kernel buffer shares the user buffer; A data transmission module, which is used to perform data transmission with a hardware device based on the data file mapped in the kernel buffer.
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