Fixed cache implementation method, system and equipment and readable storage medium

Abstract

The invention discloses a fixed cache implementation method, system and device and a readable storage medium. The method comprises the following steps: creating a global lock-free queue and a local cache queue; in the local cache queue, selecting a local active BUF; in response to a cache application instruction of a user, an available cache unit is returned based on the local active BUF and is used for storing to-be-cached data; if the local active BUF has no available cache unit, marking the local BUF without the available cache unit as a used BUF, and re-electing the local active BUF; and if the BUFs in the local cache queue are marked as used BUFs, obtaining an available BUF based on the global lock-free queue, putting the available BUFs into the local cache queue, and defining the obtained available BUFs as new local active BUFs. Compared with the prior art, the method has the advantages that the competition for global resources is reduced while locking is not needed, and the lock contention during global resource access is reduced. Meanwhile, the threads are ensured to run on the same core all the time, and the cache hit rate can be increased.

Description

Technical Field

[0001] The present invention belongs to the technical field of computer storage, and particularly relates to a method, system, device and readable storage medium for implementing a fixed cache. Background Art

[0002] A cache is a buffer for data exchange (referred to as Cache), which is a temporary place for storing data (frequently used data). The setting of the cache is one of the important factors for all modern computer systems to achieve high performance. When a user queries data, it is first searched in the cache. If found, it is directly executed. If not found, it is searched in the database.

[0003] The essence of the cache is to exchange space for time, sacrificing the real-time nature of the data, temporarily replacing the latest data read from the database with the data in the server memory, reducing database I / O, alleviating the server pressure, reducing network latency, and accelerating the page opening speed.

[0004] Traditional caches are usually based on global queues and locks. In concurrent programming, queues and locks are often used together. To ensure that only one thread can operate on the queue at the same time, in this model where multiple threads need to obtain and release the cache for concurrent access, locks may conflict, and threads usually need to sleep to wait in line to obtain the lock, which will greatly affect the performance. In this model, the performance of the cache has a bottleneck and cannot be scaled by core. In addition, the allocation and release usually access global resources, resulting in a low hit rate of the CPU hardware cache.

[0005] Therefore, in view of the above technical problems, it is necessary to provide a method, system, device and readable storage medium for implementing a fixed cache.

[0006] The information disclosed in this background art section is only intended to enhance the overall understanding of the present invention and should not be regarded as an admission or any form of suggestion that this information constitutes prior art already known to those of ordinary skill in the art. Summary of the Invention

[0007] The object of the present invention is to provide a method, system, device and readable storage medium for implementing a fixed cache, which can avoid the problem of performance degradation caused by using locks, reduce the access to global resources, and improve the system performance.

[0008] To achieve the above object, the technical solution provided by a specific embodiment of the present invention is as follows:

[0009] In a first aspect, the present invention provides a method for implementing a fixed cache, which includes:

[0010] Create a global lock-free queue and a local cache queue, and the global lock-free queue and the local cache queue include multiple BUFs;

[0011] In the local cache queue, based on the number of available cache units in each BUF, elect a local active BUF; in response to a cache application instruction from a user, return an available cache unit based on the local active BUF for storing data to be cached.

[0012] If there is no available cache unit in the local active BUF, update the local active BUF with no available cache unit to a used-up BUF, and re-elect a local active BUF.

[0013] If all BUFs in the local cache queue are marked as used-up BUFs, obtain an available BUF from the global lock-free queue and put it into the local cache queue, and define the obtained available BUF as the new local active BUF.

[0014] In one or more embodiments of the present invention, the method further includes:

[0015] Apply for memory from the system based on the memory occupancy of an expected single cache unit and the number of expected cache units, and the applied memory is greater than or equal to the product of the memory occupancy of the expected single cache unit and the number of expected cache units.

[0016] Divide the applied memory into multiple BUFs, and divide one or more of the cache units in each BUF.

[0017] In one or more embodiments of the present invention, the electing a local active BUF based on the number of available cache units in each BUF includes:

[0018] Traverse the number of remaining available cache units in each BUF in the local cache queue.

[0019] Elect the BUF with the largest number of remaining available cache units in the local cache queue as the local active BUF.

[0020] In one or more embodiments of the present invention, the obtaining a BUF from the global lock-free queue and putting it into the local cache queue includes:

[0021] Obtain an available BUF from the global lock-free queue.

[0022] Based on the number of cache units in each BUF in the local cache queue, divide the obtained BUF into multiple cache units.

[0023] Put the divided BUF into the local cache queue.

[0024] In a second aspect, the present invention provides a fixed cache implementation method, which includes:

[0025] In response to the user's cache release instruction, release the data stored in the corresponding cache unit memory;

[0026] Based on the metadata at the back end of the cache unit, obtain the BUF information to which the cache unit belongs and put the cache unit into the BUF to which the cache unit belongs;

[0027] Based on the state of the BUF to which the cache unit belongs before the cache unit is put in, update the mark information of the BUF;

[0028] Based on the number of BUFs in the current local cache queue, return the BUF to the global lock-free queue.

[0029] In one or more embodiments of the present invention, based on the state of the BUF to which the cache unit belongs before the cache unit is put in, updating the mark information of the BUF includes:

[0030] If there are available cache units in the memory of the BUF to which the cache unit belongs, skip the BUF mark update;

[0031] If the BUF to which the cache unit belongs is a used-up BUF, update the mark of the BUF to which the cache unit belongs from a used-up BUF to an available BUF.

[0032] In one or more embodiments of the present invention, the returning the BUF to the global lock-free queue based on the number of BUFs in the current local cache queue includes:

[0033] If all the cache units in the BUF are available after the cache unit is put into the BUF to which it belongs, and the local BUF number is greater than the preset threshold, put the BUF to which the cache unit belongs into the global lock-free queue;

[0034] If there are unavailable cache units in the BUF after the cache unit is put into the BUF to which it belongs, or the local BUF number is less than or equal to the preset threshold, do not return the BUF to the global lock-free queue.

[0035] In a third aspect, the present invention provides a fixed cache implementation system, which includes:

[0036] A creation module, configured to create a global lock-free queue and a local cache queue, where the global lock-free queue and the local cache queue include multiple BUFs;

[0037] A response module, configured to elect local active BUFs in the local cache queue based on the number of available cache units in each BUF; in response to the user's cache application instruction, return an available cache unit based on the local active BUFs for storing data to be cached;

[0038] An election module, configured to update the local active BUF with no available cache unit to a used-up BUF when there is no available cache unit in the local active BUF, and re-elect a local active BUF;

[0039] A migration module, configured to, when all BUFs in the local cache queue are marked as used-up BUFs, obtain a BUF from the global lock-free queue and put it into the local cache queue, and define the obtained BUF as the new local active BUF.

[0040] In a fourth aspect, the present invention provides a computer device, which includes: a memory and a processor, the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the computer instructions to implement the fixed cache implementation method described above.

[0041] In a fifth aspect, the present invention provides a computer-readable storage medium, which stores computer instructions for causing a computer to execute the fixed cache implementation method.

[0042] Compared with the prior art, the fixed cache implementation method provided by the present invention establishes a local cache queue based on the central processing unit core, so that each CPU core has its own independent data structure, and most operations only need to access the data local to the core without the need for locking. At the same time, each core has an independent L1 cache, and preferentially obtains / returns buffers from the local cache, reducing competition for global resources. A lock-free circular queue is used to manage the central buffer, reducing lock contention when accessing global resources. On the other hand, the present invention allocates multiple buffers at one time, which can reduce the allocation frequency. Instead of immediately updating the global state, it accumulates to a certain extent and then updates, reducing frequent access to global resources. At the same time, ensuring that the thread always runs on the same core can improve the cache hit rate. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings described below are only some embodiments recorded in the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0044] Figure 1 is a schematic diagram of a fixed cache implementation scenario in an embodiment of the present invention;

[0045] Figure 2 is a flowchart of a fixed cache implementation method in an embodiment of the present invention;

[0046] Figure 3It is a schematic flowchart of a method for implementing a fixed cache in another embodiment of the present invention;

[0047] Figure 4 It is a block diagram of a system for implementing a fixed cache in one embodiment of the present invention;

[0048] Figure 5 It is a block diagram of a system for implementing a fixed cache in another embodiment of the present invention;

[0049] Figure 6 It is a block diagram of an electronic device in one embodiment of the present invention. Specific embodiments

[0050] In order to enable those skilled in the art to better understand the technical solutions in the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0051] Unless otherwise clearly stated, in the whole specification and claims, the term "comprising" or its variations such as "including" or "having" etc. will be understood to include the stated elements or components, without excluding other elements or other components.

[0052] The implementation of the cache in the prior art is usually based on the cooperation of a global queue and a lock. As a data structure, the queue follows the principle of first in first out. In a computer, tasks or data can be stored in the queue and processed in order. A lock is a synchronization mechanism. In a multi-threaded or multi-process environment, to ensure data consistency and integrity, when a thread or process accesses a shared resource, a lock will be added. At this time, if other threads or processes want to access this resource, they need to wait for the lock to be released.

[0053] When multiple threads need to obtain and release the cache for concurrent access in this model, lock conflicts may occur, and the threads usually need to sleep to wait in line to obtain the lock, which will greatly affect the performance. In this model, the performance of the cache has a bottleneck and cannot be scaled by core. In addition, the allocation and release usually access global resources, resulting in a low hit rate of the CPU hardware cache.

[0054] The inventors of the present invention have discovered the main drawbacks of the prior art and, based on these drawbacks, proposed a new technical implementation idea: expanding the cache queue by CPU cores so that each core has an independent cache queue without the need for locking. At the same time, a global lock-free queue is additionally set up to supply additional BUFs when local cache resources are insufficient. This not only reduces the competition and conflicts of global resources but also improves the cache hit rate and utilization rate.

[0055] Please refer to Figure 1 , which shows a schematic diagram of the application scenario of the fixed cache implemented by the present invention under an embodiment. This scenario specifically includes: a global lock-free queue 101, a local cache queue 102, and a user terminal 103.

[0056] Both the global lock-free queue 101 and the local cache queue 102 include multiple BUFs. In particular, the local cache queue is established based on CPU cores, and each CPU core has an independent local cache queue. At the same time, in order to implement the fixed cache, each BUF of the local cache queue includes multiple cache units for storing data.

[0057] The local cache queue can elect a local active BUF for preferentially executing cache tasks based on the number of available cache units in each BUF. If all local BUFs are used up, a BUF is obtained from the global lock-free queue, split into the format of cache units in the local cache queue, and the split BUF is placed in the local cache queue as the local active BUF. After receiving a cache request, the local active BUF provides an available cache unit to store the corresponding data.

[0058] When the user program running on the CPU core releases a cache unit, it obtains the BUF to which the cache unit belongs from the metadata at the back end of the cache unit and places the cache unit in the local queue of the belonging BUF. When the returned BUF is in the active BUF state or there are available cache units, it is directly returned; when the BUF is in the used-up state, the BUF is updated to the available state. If all cache units in the BUF are available and the number of local BUFs of the current CPU core is greater than or equal to a constant X (X is configured according to the actual business test situation), the BUF is placed in the global lock-free queue.

[0059] It should be noted that the user terminal 103 is installed with a computer software program that matches the fixed cache implementation method provided by the present method; the user terminal 103 may include, but is not limited to, portable electronic devices such as desktop computers (PCs), desktop computers, smart phones, handheld computers, tablet computers, personal digital assistants (PDAs), etc., or wearable electronic devices. The embodiments of the present invention do not limit the above contents.

[0060] It should also be noted that the fixed cache implementation method of the embodiments of the present invention can be applied to the fixed cache implementation system of the embodiments of the present invention. This fixed cache implementation system can be configured in a terminal. The terminal can include, but is not limited to, a PC (Personal Computer), a PDA (tablet computer), a smart phone, a smart wearable device, and so on.

[0061] Please refer to Figure 2 As shown, it is a schematic flowchart of the fixed cache implementation in an embodiment of the present invention. This fixed cache implementation method specifically includes the following steps:

[0062] S201: Create a global lock-free queue and a local cache queue, where the global lock-free queue and the local cache queue include multiple BUFs;

[0063] It should be noted that in the embodiments of the present invention, the establishment of the local cache queue needs to be based on the CPU core. That is, it is necessary to create a corresponding local cache queue for each CPU core so that each core has an independent cache. Through this fine-grained resource partitioning mechanism, a physically isolated cache space is formed. When each processor core performs a memory access operation, it preferentially operates on its bound local queue. Based on the queue binding mechanism of CPU affinity, the lock competition problem of cross-core operations is naturally avoided. This not only reduces the competition for global resources but also avoids the reduction of cache performance caused by frequent acquisition / release of locks.

[0064] Specifically, the independent cache queue set based on the CPU core can be lock-free for mainly two reasons. First, the independent design ensures non-competitive access. Each CPU core maintains a proprietary cache queue. This architectural design completely isolates the cache operations between different cores. Since there is no concurrent access scenario for shared resources, each core can independently read and write to its own queue, fundamentally eliminating the possibility of data competition. Therefore, there is no need to introduce a lock mechanism to ensure data consistency.

[0065] Second, this design makes full use of the locality principle of CPU access. The access mode of modern CPUs has significant spatial locality and temporal locality characteristics, that is, the processor tends to concentrate on accessing the data used recently and its adjacent data. By storing related data centrally in the local queue of the same core, the independent cache queue not only optimizes the data access efficiency but also greatly reduces the need for cross-core data interaction. This design not only avoids the performance overhead brought by lock operations but also simplifies the complexity of system implementation, thus achieving efficient lock-free concurrent processing.

[0066] In the embodiments of the present invention, a global lock-free queue is used to provide additional available BUFs when the local cache is insufficient. Managing the central cache area based on a lock-free queue can reduce the lock contention phenomenon during global resource access. Specifically, for the selection of the global lock-free queue, it can be dynamically adjusted based on the actual usage scenario, including but not limited to: a lock-free queue based on an array (circular buffer queue), a lock-free queue based on a linked list (Michael-Scott queue), or a sharded / segmented queue, etc. The embodiments of the present invention do not make specific limitations on this.

[0067] Further, a BUF (Buffer) is a memory area in a computer system used for temporarily storing data, mainly used to solve the data transfer problem between devices or components with different speeds or different timings. In an exemplary embodiment of the present invention, configuring the BUF structure in the local cache queue specifically includes: applying for memory from the system based on the memory occupation of an expected single cache unit and the number of expected cache units; dividing the applied memory into multiple BUFs, and partitioning one or more of the cache units in each BUF.

[0068] It can be understood that the applied memory should be greater than or equal to the product of the memory occupation of the expected single cache unit and the number of expected cache units to meet the establishment of the expected BUF. For example, in a specific embodiment, the cache unit includes a cache application unit and cache unit metadata. The expected size of the cache application unit is UN, the expected size of the cache unit metadata is UM, and the number of expected cache units is N. Then the total cache size to be applied for is (UN + UM) * N. After applying for memory greater than or equal to (UN + UM) * N, it is further divided into M parts, each part is named a BUF, and each BUF contains N / M cache application units. Among them, in this embodiment, the value of M can be configured to be divisible by N, or automatically rounded after calculating N / M through code.

[0069] S202: In the local cache queue, select the local active BUF based on the number of available cache units in each BUF; in response to the user's cache application instruction, return an available cache unit based on the local active BUF for storing the data to be cached;

[0070] As can be seen from the above, in the embodiments of the present invention, a BUF includes multiple cache units and cache unit metadata. Among them, the cache unit is the basic storage unit for storing the actual data loaded from the main memory or the upper-level cache; the cache metadata is applicable to managing the data of the cache unit, such as tags (Tag), valid bits (Valid Bit), dirty bits (Dirty Bit), etc.

[0071] In an exemplary embodiment of the present invention, the election of the local active BUF based on the number of available cache units in each BUF includes: traversing the number of remaining available cache units in each BUF in the local cache queue; electing the BUF with the largest number of remaining available cache units in the local cache queue as the local active BUF.

[0072] It can be understood that since the physical existence of available cache units is the basic condition for executing cache tasks, as the local active BUF that preferentially executes cache tasks, it must meet the basic criterion of cache unit availability. At the same time, from the perspective of resource availability, only nodes with valid cache units can be included in the task allocation candidate set; secondly, by selecting the BUF node with the largest cache unit holding capacity as the main execution unit, the efficiency of the system's election mechanism can be significantly optimized, and the resource overhead caused by frequent elections can be reduced. In addition, by maximizing the utilization of the cache capacity of high-load nodes, the resource fragmentation phenomenon can be effectively reduced, while the cache hit rate and data throughput can be improved.

[0073] It should be noted that the local cache queue of the present invention is independently set based on different central processing unit cores, aiming to enable cache tasks to be executed on the corresponding core, and only need to access local data without locking. In a multi-core processor, the core number is the unique identifier of each physical or logical processing core in the multi-core CPU. When executing cache tasks, the core number of the corresponding central processing unit core should be obtained to ensure that the thread always runs on the same core and improve the cache hit rate.

[0074] S203: If the local active BUF has no available cache units, update the local active BUF with no available cache units to a used-up BUF, and re-elect the local active BUF;

[0075] As described above, in order to reduce the load overhead and maximize the cache capacity of the node. It is preferable to configure the local BUF with the largest remaining available cache units as the local active BUF to preferentially execute cache tasks. Further, when the available cache units in the local active BUF are exhausted, it no longer has the objective conditions to execute cache tasks, so it needs to be marked and a new local active BUF is re-elected. The election strategy is as described above. It is preferable to elect the local BUF with the largest remaining available cache units among the remaining local BUFs as the new local active BUF.

[0076] In a specific embodiment, the local active BUF with exhausted available cache units is marked as an exhausted BUF, which specifically includes: establishing a linked list of exhausted BUFs, and adding the local active BUF with exhausted available cache units to the corresponding linked list of exhausted BUFs. Similarly, a linked list of available BUFs and a linked list of local active BUFs can also be correspondingly configured to classify and mark local BUFs.

[0077] S204: If all the BUFs in the local cache queue are marked as exhausted BUFs, obtain an available BUF from the global lock-free queue and put it into the local cache queue, and define the obtained available BUF as a new local active BUF.

[0078] It can be understood that when all the BUFs in the local cache queue are marked as exhausted BUFs, in fact, the local cache corresponding to the current central processing unit core can no longer continue to execute the cache task. At this time, the global cache queue can put its available BUFs into the local cache queue to support it to continue to execute the corresponding cache function.

[0079] It should be noted that the present invention aims to implement fixed caching. That is, the storage space size of each cache unit in the BUF of the cache queue is configured by the user terminal and has relatively fixed memory. Therefore, the BUF sent from the global lock-free queue to the local cache queue should also be divided into cache units according to the configuration of the local cache queue. That is, in an exemplary embodiment of the present invention, obtaining a BUF from the global lock-free queue and putting it into the local cache queue includes: obtaining an available BUF from the global lock-free queue; dividing the obtained BUF into multiple cache units based on the number of cache units in the local BUF; and putting the divided BUF into the local cache queue.

[0080] Please refer to Figure 3 shown in the flowchart of the implementation of fixed caching in an embodiment of the present invention. The method for implementing fixed caching specifically includes the following steps:

[0081] S301: In response to the user's cache release instruction, release the data stored in the corresponding cache unit's memory;

[0082] It should be noted that releasing the information in the cache unit is an important operation for managing memory and data access efficiency in a computer system, which means clearing or releasing the temporary data stored in the cache unit to reclaim memory or storage space to ensure the efficient operation of the system or application.

[0083] In an embodiment of the present invention, the cache release instruction is interpreted in an extended manner. That is, the cache release instruction in the present invention not only includes that the user directly deletes a specific cache item through a programming instruction to release the cache unit, but also includes automatically clearing time-limited cache data based on the survival time set by the user for the cache data; and for other purposes such as protecting data consistency, releasing the cache unit based on a pre-configured algorithm, etc.

[0084] S302: Based on the metadata at the back end of the cache unit, obtain the BUF information to which the cache unit belongs and put the cache unit into the BUF to which the cache unit belongs;

[0085] As can be seen from the above, in the embodiment of the present invention, the BUF includes a plurality of the cache units and cache unit metadata. Among them, the cache unit is the basic storage unit for storing the actual data loaded from the main memory or the upper-level cache; the cache metadata is applicable to managing the data of the cache unit, such as tags, valid bits, dirty bits, etc. In particular, the cache unit metadata in the present invention further includes recording the BUF information to which the cache unit belongs to realize the orderly return after the cache unit is released. The present invention does not limit the recording form of the BUF information to which it belongs in the cache unit metadata.

[0086] S303: Update the mark information of the BUF based on the state of the BUF to which the cache unit belongs before the cache unit is put in;

[0087] In an exemplary embodiment of the present invention, if there is an available cache unit in the BUF to which the cache unit belongs, skip the BUF mark update; if the BUF to which the cache unit belongs is a used-up BUF, release the BUF to which the cache unit belongs and update the mark of the BUF to which the cache unit belongs from a used-up BUF to an available BUF.

[0088] It should be noted that when the cache unit is released and put back to the BUF to which it belongs, then at this time the BUF has at least one available cache unit. That is, if the BUF is marked as a used-up BUF before the released cache unit is put in, then it should be updated to an available BUF at this time. On the other hand, if there is an available cache unit in the BUF before the released cache unit is put in, then putting in an available cache unit will not change the current state of the BUF. Therefore, the corresponding mark information update process can be skipped.

[0089] In a specific embodiment, when updating the tag information of the BUF, it is necessary to make a judgment. If the BUF of the cache unit after release is a local active BUF or an available BUF, it is skipped. If the BUF is an exhausted BUF, it is removed from the corresponding exhausted linked list. If there is an available linked list, it is moved to the available linked list.

[0090] S304: Return the BUF to the global lock-free queue based on the number of BUFs in the current local cache queue.

[0091] To ensure the efficient and stable operation of the global lock-free queue, each CPU core must follow a preset resource return mechanism after obtaining a BUF from the global lock-free queue. At the same time, when the core completes the operation on the BUF and returns it to the global cache queue, it must ensure that all cache units in the BUF are in a valid state that can be immediately allocated and used. This mandatory verification mechanism not only guarantees the integrity of memory resources but also serves as an important foundation for maintaining the high-performance characteristics of the lock-free queue.

[0092] On the other hand, to meet the cache processing requirements of the local cache queue while preventing resource redundancy. That is, to avoid requesting a BUF from the global lock-free queue again due to insufficient local cache resources caused by returning the BUF, and also to avoid wasting cache resources due to excessive local cache resources. In an embodiment of the present invention, a preset threshold can be set. Only when the number of BUFs in the local cache queue is greater than the preset threshold and there is a BUF with all cache units available, the BUF is returned to the global lock-free queue. The specific value of the preset threshold can be dynamically changed based on the estimated cache data volume size of the current central processing unit core, and the embodiments of the present invention do not limit this.

[0093] For example, in one embodiment, the preset threshold adopts an elastic calculation method, and its value is adaptively adjusted according to the real-time load characteristics and estimated data processing volume of the current CPU core. This dynamic adjustment process can be completed through the sliding window algorithm implemented by the monitoring module to ensure that the threshold setting is synchronized with the system operation state.

[0094] Please refer to Figure 4 As shown, based on the same inventive concept as the foregoing fixed cache implementation method, an embodiment of the present invention provides a fixed cache implementation system 400, which includes: a creation module 401, a response module 402, an election module 403, and a migration module 404

[0095] Specifically, a creation module 401 is configured to create a global lock-free queue and a local cache queue, where the global lock-free queue and the local cache queue include multiple BUFs; a response module 402 is configured to elect a local active BUF in the local cache queue based on the number of available cache units in each BUF; in response to a cache application instruction from a user, return an available cache unit based on the local active BUF for storing data to be cached; an election module 403 is configured to, when there is no available cache unit in the local active BUF, mark the local BUF without available cache units as a used-up BUF and re-elect a local active BUF; a migration module 404 is configured to, when all BUFs in the local cache queue are marked as used-up BUFs, obtain a BUF from the global lock-free queue and put it into the local cache queue, and define the obtained BUF as a new local active BUF.

[0096] Please refer to Figure 5 As shown, based on the same inventive concept as the foregoing fixed cache implementation method, in another embodiment of the present invention, a fixed cache implementation system 500 is provided, which includes: a release module 501, an acquisition module 502, an update module 503, and a return module 504.

[0097] Specifically, the release module 501 is configured to release the data stored in the corresponding cache unit in response to a cache release instruction from a user; the acquisition module 502 is configured to obtain the BUF information to which the cache unit belongs based on the metadata at the back end of the cache unit and put the cache unit into the BUF to which the cache unit belongs; the update module 503 is configured to update the marking information of the BUF based on the state of the BUF to which the cache unit belongs before the cache unit is put in; the return module 504 is configured to return a BUF to the global lock-free queue based on the number of BUFs in the current local cache queue.

[0098] Please refer to Figure 6 As shown, an embodiment of the present invention further provides an electronic device 600, which includes at least one processor 601, a memory 602 (such as a non-volatile memory), a memory 603, and a communication interface 604, and at least one processor 601, the memory 602, the memory 603, and the communication interface 604 are connected together via an internal bus 605. The at least one processor 601 is configured to call at least one program instruction stored or encoded in the memory 602 so that the at least one processor 601 performs various operations and functions of the fixed cache implementation method described in each embodiment of this specification.

[0099] In the embodiments of this specification, the electronic device 600 may include, but is not limited to: personal computers, server computers, workstations, desktop computers, laptop computers, notebook computers, mobile electronic devices, smart phones, tablet computers, cellular phones, personal digital assistants (PDAs), handheld devices, messaging devices, wearable electronic devices, consumer electronic devices, and so on.

[0100] Embodiments of the present invention also provide a computer-readable medium having computer-executable instructions stored thereon. When the computer-executable instructions are executed by a processor, they can be used to implement various operations and functions of the fixed cache implementation method described in the various embodiments of this specification.

[0101] The computer-readable medium in the present invention can be a computer-readable signal medium, a computer-readable storage medium, or any combination of the two. A computer-readable storage medium can be, for example, but is not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the above. More specific examples of a computer-readable storage medium can include, but are not limited to: an electrical connection having one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In the present invention, a computer-readable storage medium can be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, apparatus, or device.

[0102] In the present invention, a computer-readable signal medium can include a data signal propagated in a baseband or as part of a carrier wave, which carries computer-readable program code. Such a propagated data signal can take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. A computer-readable signal medium can also be any computer-readable medium other than a computer-readable storage medium, which can send, propagate, or transmit a program for use by or in conjunction with an instruction execution system, apparatus, or device. The program code contained on a computer-readable medium can be transmitted using any appropriate medium, including but not limited to: wireless, wire, optical fiber, RF, and so on, or any suitable combination of the above.

[0103] Those skilled in the art should understand that the embodiments of the present invention can be provided as a method, a system, or a computer program product. Therefore, the present invention can take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present invention can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code.

[0104] The present invention is described with reference to the flowcharts and / or block diagrams of methods, apparatuses, systems, and computer program products according to embodiments of the present invention. It should be understood that each flow and / or block in the flowcharts and / or block diagrams, as well as the combination of flows and / or blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing devices to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing devices generate means for implementing the functions specified in one Figure 1 one flow or multiple flows and / or blocks Figure 1 means for implementing the functions specified in one block or multiple blocks.

[0105] The foregoing description of the specific exemplary embodiments of the present invention is for the purpose of illustration and exemplification. These descriptions are not intended to limit the present invention to the precise forms disclosed, and it is obvious that many changes and variations can be made according to the above teachings. The purpose of selecting and describing the exemplary embodiments is to explain the specific principles of the present invention and its practical applications, so that those skilled in the art can implement and utilize various different exemplary embodiments of the present invention, as well as various different selections and changes. The scope of the present invention is intended to be defined by the claims and their equivalents.

[0106] For those skilled in the art, it is obvious that the present invention is not limited to the details of the above exemplary embodiments, and the present invention can be implemented in other specific forms without departing from the spirit or basic characteristics of the present invention. Therefore, from any point of view, the embodiments should be regarded as exemplary and non-limiting. The scope of the present invention is defined by the appended claims rather than the above description. Therefore, all changes falling within the meaning and scope of the equivalent elements of the claims are intended to be included in the present invention. Any reference signs in the claims should not be regarded as limiting the claims involved.

[0107] In addition, it should be understood that although this specification is described according to embodiments, not every embodiment only contains an independent technical solution. This narrative way of the specification is only for clarity. Those skilled in the art should regard the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A method for implementing a fixed cache, characterized in that, Including: Create a global lock-free queue and a local cache queue, where the global lock-free queue and the local cache queue include multiple BUFs; In the local cache queue, elect a local active BUF based on the number of available cache units in each BUF; in response to a user's cache application instruction, return an available cache unit based on the local active BUF for storing data to be cached; If there are no available cache units in the local active BUF, update the local active BUF without available cache units to a used-up BUF and re-elect a local active BUF; If all BUFs in the local cache queue are marked as used-up BUFs, obtain an available BUF from the global lock-free queue and put the obtained available BUF into the local cache queue, and define the obtained available BUF as the new local active BUF.

2. The fixed cache implementation method according to claim 1, wherein The method further includes: Apply for memory from the system based on the memory occupancy of an expected single cache unit and the number of expected cache units, and the applied memory is greater than or equal to the product of the memory occupancy of the expected single cache unit and the number of expected cache units; Divide the applied memory into multiple BUFs, and divide one or more of the cache units in each BUF.

3. The fixed cache implementation method according to claim 1, wherein The electing a local active BUF based on the number of available cache units in each BUF includes: Traverse the number of remaining available cache units in each BUF in the local cache queue; Elect the BUF with the largest number of remaining available cache units in the local cache queue as the local active BUF.

4. The fixed cache implementation method according to claim 1, characterized in that The obtaining a BUF from the global lock-free queue and putting it into the local cache queue includes: Obtain an available BUF from the global lock-free queue; Based on the number of cache units in each BUF in the local cache queue, divide the obtained BUF into multiple cache units; Put the divided BUF into the local cache queue.

5. A method for implementing a fixed cache, characterized in that, Including: In response to a user's cache release instruction, release the data stored in the corresponding cache unit memory; Based on the metadata at the back end of the cache unit, obtain the BUF information to which the cache unit belongs and put the cache unit into the BUF to which the cache unit belongs; Update the marking information of the BUF based on the state of the BUF to which the cache unit belongs before putting the cache unit; Return a BUF to the global lock-free queue based on the number of BUFs in the current local cache queue.

6. The fixed cache implementation method according to claim 5, wherein The updating the marking information of the BUF based on the state of the BUF to which the cache unit belongs before putting the cache unit includes: If there are available cache units in the BUF to which the cache unit belongs, skip the BUF marking update; If the BUF to which the cache unit belongs is a used-up BUF, update the marking of the BUF to which the cache unit belongs from a used-up BUF to an available BUF.

7. The fixed cache implementation method according to claim 1, wherein The returning a BUF to the global lock-free queue based on the number of BUFs in the current local cache queue includes: If after putting the cache unit into the BUF to which it belongs, all cache units in the BUF are available and the number of local BUFs is greater than a preset threshold, put the BUF to which the cache unit belongs into the global lock-free queue; If, after the cache unit is placed into its corresponding BUF, there are unavailable cache units in the BUF or the number of local BUFs is less than or equal to a preset threshold, the BUF will not be returned to the global lock-free queue.

8. A fixed cache implementation system, characterized in that, It includes: A creation module for creating a global lock-free queue and a local cache queue, where the global lock-free queue and the local cache queue include multiple BUFs; A response module for electing local active BUFs in the local cache queue based on the number of available cache units in each BUF; in response to a cache application instruction from a user, returning an available cache unit based on the local active BUFs for storing data to be cached; An election module for, when there are no available cache units in a local active BUF, updating the local active BUF with no available cache units to a used-up BUF and re-electing local active BUFs; A migration module for, when all BUFs in the local cache queue are marked as used-up BUFs, obtaining a BUF from the global lock-free queue and placing it into the local cache queue, and defining the obtained BUF as a new local active BUF.

9. A computer device, characterized in that, It includes: A memory and a processor, which are communicatively connected to each other. The memory stores computer instructions, and the processor executes the computer instructions to implement the fixed cache implementation method according to any one of claims 1-7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions for causing a computer to execute the fixed cache implementation method according to any one of claims 1-7.

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