Power supply control circuit, method and device and power supply system

Abstract

The invention discloses a power supply control circuit, method and device and a power supply system. The power supply control circuit is used for automatically starting an embedded system chip when a power supply is recovered after power failure, and comprises a power supply circuit, a storage circuit and a control circuit, the power supply circuit is configured to be coupled with a first power supply and the control circuit and provide a first power supply signal for the control circuit and the storage circuit; the storage circuit is configured to be coupled with the first power supply and the control circuit, and is configured to maintain the stored state parameters when the first power supply is powered down; and the control circuit is configured to be coupled with the first signal source and control the embedded system chip to be started on the basis of one or more of the state parameters, the first power supply signal or a first signal provided by the first signal source. The method has the technical effects that the power supply reliability of the chip of the embedded system is improved, manual reset is not needed after normal startup and power failure, automatic startup of the power supply recovery embedded system can be realized, and the working efficiency of the system is improved.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to the field of circuit technologies, and particularly to a power control circuit, method, device, and power system. Background Art

[0002] An embedded system is a dedicated computer system, usually embedded in a device or system to perform specific tasks such as industrial control, Internet of Things devices, medical devices, and automotive electronics. As the core of data storage and control, the embedded system has extremely high requirements for the stability, reliability, and real-time performance of the system. Therefore, it is necessary to ensure its stable operation in various complex environments. In practical applications, the embedded system often faces unforeseen situations such as power failures and sudden power outages. When the system suddenly loses power, the traditional method usually requires manual intervention, such as restarting the system by pressing the power button to restore the normal operation of the embedded system. Therefore, the power management problem of the embedded system deserves attention. Summary of the Invention

[0003] In view of this, embodiments of the present disclosure provide a power control circuit, method, device, and power system, in order to improve the reliability of power management of the embedded system. In a first aspect, a power control circuit is provided, which is used to automatically power on the embedded system chip when the power supply recovers from an abnormal power failure, and includes: a power supply circuit, a storage circuit, and a control circuit; the power supply circuit is configured to be coupled to a first power supply and the control circuit, and provide a first power supply signal to the control circuit and the storage circuit; the storage circuit is configured to be coupled to the first power supply and the control circuit, and is configured to maintain the stored state parameters when the first power supply loses power; the control circuit is configured to be coupled to a first signal source, and based on one or more of the state parameters, the first power supply signal, or a first signal provided by the first signal source, control the embedded system chip to power on.

[0004] The above power control circuit, by setting a non-volatile storage circuit, effectively saves the state parameters before power failure, ensures that the control circuit continues to read the stored state parameters when the power is restored, helps the embedded system chip without BIOS function to also implement the power failure recovery function, improves the reliability of power supply in the power management function, and effectively saves production costs. There is no need for manual reset to power on, improving the system working efficiency.

[0005] Optionally, the storage circuit includes: a first register and a second register, and the state parameters include a first state value and a second state value; the first register is configured to store the first state value; the second register is configured to store the second state value.

[0006] In a second aspect, a power control method is provided for the power control circuit in the first aspect, including: when the first power supply powers the power supply circuit and the storage circuit, based on the first state parameter of the storage circuit and the first power signal, sending a first shutdown signal and adjusting the first state parameter to a second state parameter, where the first shutdown signal is used to guide the embedded system chip to wait for startup; based on the first signal and the second state parameter, sending a startup signal and adjusting the second state parameter to a third state parameter; when the first power supply resumes power supply after power failure, based on the third state parameter and the first power signal, adjusting the third state parameter to a fourth state parameter and, based on the fourth state parameter, sending a startup signal.

[0007] Optionally, it further includes: based on the second signal, sending a second shutdown signal and adjusting the third state parameter to the second state parameter, where the first signal and the second signal are provided by a first signal source.

[0008] Optionally, configure the first state value in the first state parameter to be "1" and the second state value in the first state parameter to be "0".

[0009] Optionally, based on the first state parameter of the storage circuit and the first power signal, sending a first shutdown signal and adjusting the first state parameter to a second state parameter includes: when the first power signal is acquired, reading the first state value in the first state parameter; when the first state value in the first state parameter is equal to a first preset value, reading the second state value in the first state parameter; when the second state value in the first state parameter is equal to a second preset value, sending the first shutdown signal and adjusting the first state value in the first state parameter to the second preset value.

[0010] Optionally, based on the first signal and the second state parameter, sending a startup signal and adjusting the second state parameter to a third state parameter includes: when the first signal is acquired, reading the first state value in the second state parameter; when the first state value in the second state parameter is not equal to the first preset value, sending the startup signal; based on the startup signal, adjusting the second state value in the second state parameter to the first preset value.

[0011] Optionally, when the first power supply resumes power supply after power failure, based on the third state parameter and the first power signal, adjusting the third state parameter to a fourth state parameter and, based on the fourth state parameter, sending a startup signal includes: when the first power signal is acquired, adjusting the first state value in the third state parameter to the first preset value; reading the first state value in the fourth state parameter; when the first state value in the fourth state parameter is equal to the first preset value, reading the second state value in the fourth state parameter; when the second state value in the fourth state parameter is not equal to the second preset value, sending the startup signal.

[0012] In a third aspect, a power control device is provided, including: a startup unit, configured to send a first shutdown signal based on a first state parameter of a storage circuit and a first power signal when a first power supply powers a power supply circuit and the storage circuit; an adjustment unit, configured to adjust the first state parameter to a second state parameter, wherein the first shutdown signal is used to guide an embedded system chip to wait for startup; a startup unit, configured to send a startup signal based on a first signal and the second state parameter; the adjustment unit is further configured to adjust the second state parameter to a third state parameter, and when the first power supply resumes power supply after a power failure, adjust the third state parameter to a fourth state parameter based on the third state parameter and the first power signal; a recovery unit, configured to send a startup signal based on the fourth state parameter.

[0013] In a fourth aspect, a power supply system is provided, including: the power control circuit provided in the first aspect, a power adapter, and a power button; the power adapter is configured to provide a first power signal to the power supply circuit and the storage circuit of the power control circuit; the power button is configured to provide a first signal to the power control circuit; the power control circuit is configured to control the startup of an embedded system chip according to the power control method provided in the second aspect, and control the startup of the embedded system chip when the power adapter loses power.

[0014] In a fifth aspect, an electronic device is provided, including the power supply system in the fourth aspect. Description of the Drawings

[0015] The following briefly introduces the drawings used in the description of the embodiments of the present disclosure:

[0016] Figure 1 It shows a schematic circuit diagram of a power control circuit provided in some embodiments of the present application;

[0017] Figure 2 It shows a schematic flowchart of a power control method provided in some embodiments of the present application;

[0018] Figure 3 It shows a schematic flowchart of sending a first shutdown signal provided in some embodiments of the present application;

[0019] Figure 4 It shows a schematic flowchart of sending a startup signal provided in some embodiments of the present application;

[0020] Figure 5 It shows a schematic flowchart of another method of sending a startup signal provided in some embodiments of the present application;

[0021] Figure 6 It shows a schematic flowchart of another power control method provided in some embodiments of the present application;

[0022] Figure 7 The structural schematic diagram of a power control device provided in some embodiments of the present application is shown. Detailed implementation manners

[0023] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the exemplary embodiments of the present disclosure will be described below with reference to the accompanying drawings. The accompanying drawings in the following description are only some embodiments of the present disclosure. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained according to these drawings, and other embodiments can be obtained. Adjustments and improvements made without departing from the concept of the present disclosure all fall within the protection scope of the present disclosure.

[0024] To make the drawings concise, each drawing only schematically shows the parts related to the embodiments, and they do not represent the actual structure of the product. In addition, to make the drawings concise and easy to understand, in some drawings, parts with the same structure or function are only schematically shown partially, and there may actually be more or fewer parts with the same structure or function.

[0025] In the present disclosure, unless otherwise clearly specified and limited, ordinal numbers, such as "first", "second", etc. are only used to distinguish and describe related objects, and cannot be understood as indicating or implying the relative importance or order between related objects; in addition, they do not represent the quantity of related objects. "A plurality" includes two or more, and other quantifiers are similar. " / " is used to describe the relationship between related objects, which means the "or" relationship between related objects. "And / or" is used to describe the relationship between related objects, which includes any combination relationship between related objects. For example, "a and / or b" includes: "a alone", "b alone", or "a and b". "One or more" or "at least one" among a plurality of objects refers to any object or any combination of a plurality of objects. For example, "one or more of a1, a2, a3" or "at least one of a1, a2, a3" includes: "a1 alone", "a2 alone", "a3 alone", "a1 and a2", "a1 and a3", "a2 and a3", or "a1, a2 and a3".

[0026] As the center of the entire data storage and control, the embedded system has extremely high requirements for the stability of system operation. Inevitably, sudden problems such as power failures exist in actual applications, resulting in the entire embedded system being powered off; when the power comes back on again, the embedded system needs to start and run quickly and smoothly. If the operation and maintenance personnel press the power button to turn on the machine, it will take a long time, or if the operation and maintenance personnel cannot arrive in time to press the power button, it will cause the embedded system to fail to turn on in time, affecting the process. To solve the above problems, the AC loss function can be implemented in the Advanced Power Management (APM) of the embedded system. APM is a system power management solution based on the Basic Input / Output System (BIOS) and is widely used in x86 systems. The BIOS can determine in which state the system starts when the power is restored after abnormal power loss according to the user's custom selection, including: automatically turning on the machine (Power on) after the power comes back on, turning off the machine (Power off) after the power comes back on, and restoring the state before the power failure (Last State) after the power comes back on, so as to implement the AC Loss function. At present, the application of the APM power management function is relatively limited and can only be applied in the BIOS system of the x86 platform. However, the high power consumption of the x86 platform has always been an issue that cannot be ignored. With the popularization and wide application of electronic products, users are increasingly fond of low-power products, forcing some products to abandon the x86 platform and choose an embedded system with lower power consumption. However, the embedded system does not have a complex BIOS system, resulting in a relatively single power management solution and making it difficult to implement the basic function of AC Loss. In the implementation solution of this application, in the embedded system, after the power adapter is connected to the embedded system, first obtain the status value of a certain register in the power-off non-erasable memory to determine whether the system has abnormal power loss; secondly, obtain the status value of another register of the power-off non-erasable memory to determine whether the embedded system needs to automatically turn on the machine, thereby optimizing the power management of the embedded system and improving the automatic startup efficiency and reliability of the embedded system.

[0027] Figure 1The schematic circuit diagram of a power control circuit provided in some embodiments of the present application is shown. The power control circuit 100 is used to automatically power on the embedded system chip when the power supply is restored after power failure, and includes: a power supply circuit 110, a storage circuit 120, and a control circuit 130; the power supply circuit 110 is configured to be coupled to the first power supply 10 and the control circuit 130, and provide a first power supply signal to the control circuit 130 and the storage circuit 120; the storage circuit 120 is configured to be coupled to the first power supply 10 and the control circuit 130, and is configured to maintain the stored state parameters when the first power supply 10 loses power; the control circuit 130 is configured to be coupled to the first signal source 20, and control the power on of the embedded system chip based on one or more of the state parameters, the first power supply signal, or the first signal provided by the first signal source 20.

[0028] In the above power control circuit, the power supply circuit 110 can obtain electrical energy from the first power supply 10, and through the power conversion of the circuit itself, such as stepping down and rectifying the electrical energy provided by the first power supply 10 to meet the input voltage requirements of the control circuit 130 and the embedded system chip. Or perform functions such as filtering and overload protection to improve power supply reliability and ensure power quality. The storage circuit 130 can be composed of a non-volatile memory, such as a non-volatile memory (Non-Volatile Memory, NVM), which can retain data even after power-off. Non-volatility ensures that the stored data will not be lost even in the event of a power-off, and can be erased and rewritten through electrical signals, supporting multiple programming operations. The storage circuit 120 stores pre-written state parameters, and the state parameters can be an array composed of a set of binary numbers, such as a binary number composed of "0" and "1". When the control circuit 130 reads the state parameters, it can make corresponding power-on controls in combination with the first power supply signal or the first signal received. Exemplarily, the embedded chip can be powered on by the first power supply signal, the first signal, and the state parameters. For example, when the first power supply 10 first supplies power to the embedded system chip, the power supply circuit 110 can provide the first power supply signal to the control circuit 130, and at the same time, the storage circuit 120 is powered on. At this time, the control circuit 130 that receives the first power supply signal can read the state parameters in the storage circuit 120 for judgment. In this state, the pre-written state parameters in the storage circuit 120 indicate that this is the first power supply and the system has not been started yet. Therefore, the control circuit 130 controls the embedded system to prepare for power-on according to the current state parameters and the first power supply signal, and adjusts the state parameters in the storage circuit 120 to the parameters indicating preparation for power-on. When the power button 20 provides the first signal indicating power-on to the control circuit 130, the control circuit 130 reads the state parameters in the storage circuit 120 for detection, controls the embedded system to power on accordingly according to the detection result, and adjusts the state parameters in the storage circuit to the parameters indicating the power-on state. On the other hand, the embedded chip can be powered on by the first power supply signal and the state parameters. When the first power supply 10 loses power and then resumes power supply, due to the non-volatile characteristics of the storage circuit 120, the parameters indicating the power-on state are continuously maintained. After the control circuit 130 is powered on after receiving the first power supply signal, it can read the state parameters of the storage circuit 120. After the detected parameters indicating the power-on state stored before the power-off meet the power-on requirements, it can send a power-on instruction again to control the embedded system to power on, realizing the power reset function of the embedded system to restore the state before the power-off after the power-off.The above power control circuit, through a non-volatile storage circuit, effectively preserves the state parameters before power-off, ensures that the control circuit continues to read when powered on again, helps the embedded system chip without BIOS function to also achieve the power-off recovery function, improves the reliability of power supply in the power management function, and effectively saves the production cost. There is no need for manual reset to power on, which improves the system working efficiency.

[0029] Continue to refer to Figure 1 , the storage circuit 120 includes: a first register 121 and a second register 122, and the state parameters include a first state value and a second state value; the first register 121 is configured to store the first state value; the second register 122 is configured to store the second state value. In the above power control circuit 100, the storage circuit 120 can be composed of multiple registers. Among them, the first register 121 and the second register 122 can work in parallel to store different data in each register, which is convenient for the control circuit 130 to write the corresponding state value, avoids data conflicts, and improves the flexibility of data reading and writing.

[0030] In Figure 1 , the first power supply 10 can be implemented by a power adapter to connect to an external power supply through the power adapter. The first signal source 20 can be a power button, which provides a first signal for power-on startup or a second signal for power-off through the indication of the power button. The control circuit 130 can be integrated with the embedded system chip. For example, the embedded system chip can be a microcontroller (MCU), a digital signal processor (DSP), or a system on chip (SoC), etc., thus forming a complete power system.

[0031] Figure 2 The flowchart shows a power control method provided in some embodiments of the present application for the power control circuit 100, which at least includes the steps:

[0032] S210: When the first power supply 10 supplies power to the power supply circuit 110 and the storage circuit 120;

[0033] S211: Based on the first power signal and the first state parameter of the storage circuit 120, send a first power-off signal and adjust the first state parameter to a second state parameter, where the first power-off signal is used to guide the embedded system chip to wait for power-on;

[0034] S212: Based on the first signal and the second state parameter, send a power-on signal and adjust the second state parameter to a third state parameter;

[0035] S220: When the first power supply resumes power after a power failure;

[0036] S221: Based on the third state parameter and the first power supply signal, adjust the third state parameter to a fourth state parameter, and based on the fourth state parameter, send a power-on signal.

[0037] In the embodiments of the above power supply control method, when the first power supply 10 supplies power for the first time to the power supply control circuit 100, the control circuit 130 cannot determine whether the current first power supply 10 is powered on normally or re-powered on after an abnormal power failure. Therefore, a fake shutdown can be set once, and after waiting for the user to press the power button, the system can be powered on again. The storage circuit 120 can pre-store the first state parameter. After the control circuit 130 obtains the first power supply signal and powers on, it reads the first state parameter of the storage circuit 120. After determining that the first state parameter meets the requirements, it sends a first shutdown signal. The first shutdown signal is not a signal that actually controls the embedded system chip to shut down, but a power-on preparation signal. For example, the system shutdown can be set in the uboot of the control circuit 130. This process is very short, and there is no power indicator, buzzer or fan that can indicate the system power-on situation. The user does not perceive that the system has been set to shut down in the uboot when the system powers on, which can also be called the fake shutdown stage. After sending the first shutdown signal, the control circuit 130 can further adjust the first state parameter in the storage circuit to a second state parameter through a control signal. The second state parameter can be used to indicate that the power supply control circuit is ready to control the power-on of the embedded system chip. When the user presses the power button, the first signal source 20 provides a first signal to the control circuit 130. After receiving the first signal, the control circuit 130 obtains the second state parameter from the storage circuit 120. After determining that the second state parameter meets the requirements, it sends a power-on signal, which can drive the embedded system chip to power on. Then the control circuit 130 adjusts the second state parameter stored in the storage circuit 120 to a third state parameter, indicating that the embedded system chip is powered on and started normally at this time, and prepares for possible power failure situations in the future. When the first power supply 10 loses power and then resumes power, after the control circuit 130 obtains the first power supply signal, it immediately adjusts the third state parameter stored in the storage circuit 130 to a fourth state parameter, indicating the circuit state after power failure recovery. When the fourth state parameter meets the requirements, it sends a power-on signal to implement the power failure recovery function of the embedded system chip, improve the reliability of power supply in the power management function, eliminate the need for manual reset power-on, and improve the system working efficiency.

[0038] In some embodiments, it further includes: based on the second signal, sending a second shutdown signal and adjusting the third state parameter to the second state parameter, where the first signal and the second signal are provided by the first signal source.

[0039] In this embodiment, the second signal may be an instruction for controlling the shutdown of the embedded system chip. When the control circuit 130 receives the second signal, it may adjust the third state parameter to the second state parameter to achieve a closed loop with the startup process of the above step S212. Thus, the power control method of the present application can implement the complete processes of power-on, power-off, and restart after power loss recovery of the embedded system chip, and can implement ACLoss in an embedded system without BIOS function at a relatively low cost, which can be flexibly applied to various embedded system developments and help improve the reliability of power supply.

[0040] In some embodiments, the first state value in the first state parameter is configured as "1", and the second state value in the first state parameter is configured as "0". By representing the state parameters stored in the storage circuit 120 with binary numbers, the state indications required by the control circuit 130 can be covered with a relatively small data storage requirement. For example, to represent the state when the first power supply 10 is first connected to the power control circuit 100, only a binary number combination of the first state parameter configured as "10" is required, or a binary number combination of "00" representing the second state parameter in the ready-to-power-on state. When adjusting the first state parameter to the second state parameter, only by changing the first state value "1" to "0", the state adjustment can be achieved. Exemplarily, the third state parameter may be "01", and the fourth state parameter may be "11", covering all the required states, saving the circuit design of the storage circuit 120. For example, only 2 registers are used, and each register has a capacity to store 1 bit of data, greatly reducing the production cost of the power control circuit. The present application does not limit the specific data composition of the state parameters. For example, octal, decimal, or hexadecimal methods can be used, in cooperation with other functions or data transmission requirements that the power control circuit needs to achieve, and are not specifically limited herein.

[0041] In some embodiments, Figure 3 The flowchart of a process for sending a first shutdown signal provided in some embodiments of the present application is shown. Step S211, based on the first state parameter of the storage circuit and the first power signal, sends the first shutdown signal and adjusts the first state parameter to the second state parameter, including:

[0042] S310: When the first power signal is obtained, read the first state value in the first state parameter;

[0043] S320: When the first state value in the first state parameter is equal to the first preset value, read the second state value in the first state parameter;

[0044] S330: When the second state value in the first state parameter is equal to the second preset value, send the first shutdown signal and adjust the first state value in the first state parameter to the second preset value.

[0045] In the above embodiments, the control circuit 130 may first read the first state value in the first state parameter, and when the first state value meets the first preset value, then read the second state value in the first state parameter. By making two-step judgments, it is determined that the first state parameter meets the preset parameter requirements, and it is determined that the first shutdown signal can be sent currently, and the embedded system chip is controlled to prepare for startup. For example, the first preset value may be "1", the second preset value may be "0", and if the preset first state parameter is "10", it meets the above requirements.

[0046] In some embodiments, Figure 4 FIG. shows a schematic flowchart of a process for sending a startup signal provided in some embodiments of the present application. Step S212 sends a startup signal based on the first signal and the second state parameter, and adjusts the second state parameter to a third state parameter, including:

[0047] S410: When the first signal is acquired, read the first state value in the second state parameter;

[0048] S420: When the first state value in the second state parameter is not equal to the first preset value, send a startup signal;

[0049] S430: Based on the startup signal, adjust the second state value in the second state parameter to the first preset value.

[0050] In the above embodiments, the second state parameter is determined by adjusting the first state value in the first state parameter. For example, the second state parameter is "00". When the control circuit 130 receives the indication of the first signal for controlling startup, it reads the first state value of the second state parameter. At this time, the first state value is "0", which is not equal to the first preset value "1". At this time, a startup signal is sent, causing the embedded system chip to directly start up, and adjusting the second state value in the second state parameter to the first preset value, forming a state parameter of "01", making it form a third state parameter indicating that the embedded system chip has started up.

[0051] In some embodiments, Figure 5 FIG. shows another schematic flowchart of a process for sending a startup signal provided in some embodiments of the present application. Step S221, when the first power supply is restored after power failure, adjusts the third state parameter to a fourth state parameter based on the third state parameter and the first power supply signal, and sends a startup signal based on the fourth state parameter, including:

[0052] S510: When the first power supply signal is acquired, determine that the first state value in the third state parameter is the first preset value;

[0053] S520: Read the first state value in the fourth state parameter;

[0054] S530: When the first state value in the fourth state parameter is equal to the first preset value, read the second state value in the fourth state parameter;

[0055] S540: When the second state value in the fourth state parameter is not equal to the second preset value, send a power-on signal.

[0056] In the above embodiments, when the first power supply 10 loses power and then resumes, the non-volatile storage circuit 120 continues to store the third state parameter. After the control circuit 130 is powered on, it adjusts the first state value in the third state parameter, that is, adjusts "01" to "11", indicating that the circuit has lost power during the normal power supply process and is ready to resume power-on. The control circuit 130 respectively judges the first state value and the second state value, and sends a power-on signal when the power-on condition is met, so that the embedded system chip resumes the power-on state before the power loss.

[0057] Figure 6 The flowchart shows another power control method provided in some embodiments of the present application. The power control method includes three main processes: first power-on, power-off after normal power-on, and power-on after abnormal power loss. The steps include:

[0058] S1: Connect the power adapter. At this time, the storage circuit 120 is powered on;

[0059] S2: The control circuit 130 reads whether the state value of the first register in the storage circuit 120 is "1"; if "yes", go to step S3;

[0060] S3: The control circuit 130 reads whether the state value of the first register in the storage circuit 120 is "0"; if "yes", go to step S4;

[0061] S4: The control circuit 130 sets the system to shut down in uboot, and sets the state value of the second register to "0";

[0062] S5: The system shuts down, the state value of the first register is "0", and the state value of the second register is "0";

[0063] S6: Press the power button to power on;

[0064] S7: After system reset, the state value of the first register is "0", and the state value of the second register is "0"; at this time, the control circuit continues to read the state value of the first register. If the state value of the first register is not "1", go to step S8;

[0065] S8: The system powers on, the state value of the first register is "0", and the state value of the second register is "1";

[0066] If step S9: pressing the power button to shut down is executed at this time, then step S10 is entered;

[0067] S10: Set the status value of the first register to "0" and set the status value of the second register to "0"; thus, step S5 is entered to complete the system shutdown process.

[0068] If step S11: abnormal power failure occurs after step S8; then step S12 is entered;

[0069] S12: After abnormal power failure, the storage circuit 120 cannot be erased, the status value of the first register is maintained as "0", and the status value of the second register is "1", waiting for the occurrence of step S1. When the power adapter is connected again in step S1, the status value of the first register is adjusted to "1", step S2 is continued to be executed, the status value of the first register is determined to be "1", and then step S3 is continued to be executed. It is determined that the status value of the second register is not "0", and step S8 is entered to turn on the system, completing the power-on process after power failure recovery.

[0070] In the above embodiments, in the first power-on stage, the power adapter is first connected to the power control circuit, and then the power button needs to be pressed to turn on the machine, realizing the complete process of step S1 → S2 → S3 → S4 → S5 → S6 → S7 → S2 → S8. During the process of pressing the power-off button to shut down, steps S8 → S9 → S10 → S5 are realized. If it is necessary to continue to turn on the machine, steps S6 → S7 → S2 → S8 are executed in sequence. When abnormal power failure occurs during normal power-on, steps S8 → S11 → S12 → S1 → S2 → S3 → S8 are realized in sequence, achieving the purpose of turning on the machine again after power failure recovery power supply.

[0071] Based on the same technical concept, Figure 7 The structural schematic diagram of a power control device provided in some embodiments of the present application is shown. The power control device 700 includes: a startup unit 710, configured to send a first shutdown signal based on the first state parameter of the storage circuit and the first power signal when the first power supplies power to the power supply circuit and the storage circuit; an adjustment unit 720, configured to adjust the first state parameter to a second state parameter, wherein the first shutdown signal is used to guide the embedded system chip to wait for power-on; a power-on unit 730, configured to send a power-on signal based on the first signal and the second state parameter; the adjustment unit 720 is further configured to adjust the second state parameter to a third state parameter, and is configured to, when the first power recovers power supply after power failure, adjust the third state parameter to a fourth state parameter based on the third state parameter and the first power signal; a recovery unit 740, configured to send a power-on signal based on the fourth state parameter.

[0072] The division of the above units is only a division of logical functions. In actual implementation, they can be fully or partially integrated into a physical entity, or physically separated. In addition, the above units can be implemented in the form of a processor calling software. For example, the power control device includes a processor, the processor is connected to a memory, and instructions are stored in the memory. The processor calls the instructions stored in the memory to implement the power control method provided in the above embodiments or to implement the functions of each unit. The processor is, for example, a general-purpose processor, such as a central processing unit (CPU), and the memory is a memory inside or outside the device. Alternatively, the above units can be implemented in the form of a hardware circuit, and the functions of some or all of the units can be implemented by designing the hardware circuit. The hardware circuit can be understood as one or more processors. For example, in some embodiments, the hardware circuit is an application specific integrated circuit (ASIC), and the functions of some or all of the above units are implemented by designing the logical relationship between the components in the circuit. Again, in another implementation, the hardware circuit can be implemented by a programmable logic device (PLD), which can include a large number of logic gate circuits, and the logical relationship between the logic gate circuits is configured through a configuration file to implement the functions of some or all of the above units. All units of the above device can be implemented entirely in the form of a processor calling a program, or entirely in the form of a hardware circuit, or partially in the form of a processor calling a program, and the remaining part in the form of a hardware circuit.

[0073] Based on the same technical concept, the present application also provides an electronic device, including the power supply system provided in the above embodiments.

[0074] In the above embodiments, the descriptions of the respective embodiments have their own emphases. For parts not described or recorded in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments. In addition, the above embodiments can be freely combined as needed.

Claims

1. A power control circuit, characterized in that, For automatically powering on an embedded system chip during recovery after a power failure, including: a power supply circuit, a storage circuit, and a control circuit; The power supply circuit is configured to be coupled to a first power supply and the control circuit, and provide a first power supply signal to the control circuit and the storage circuit; The storage circuit is configured to be coupled to the first power supply and the control circuit, and is configured to maintain stored state parameters when the first power supply fails; The control circuit is configured to be coupled to a first signal source, and based on one or more of the state parameters, the first power supply signal, or a first signal provided by the first signal source, control the embedded system chip to power on.

2. The power-down recovery circuit according to claim 1, wherein The storage circuit includes: a first register and a second register, and the state parameters include a first state value and a second state value; The first register is configured to store the first state value; The second register is configured to store the second state value.

3. A power control method, characterized in that, A power supply control circuit according to any one of claims 1 or 2, including: When the first power supply supplies power to the power supply circuit and the storage circuit, based on the first power supply signal and a first state parameter of the storage circuit, send a first shutdown signal, and adjust the first state parameter to a second state parameter, where the first shutdown signal is used to guide the embedded system chip to wait for power on; Based on a first signal and the second state parameter, send a power-on signal, and adjust the second state parameter to a third state parameter; When the first power supply resumes power supply after a power failure, based on the third state parameter and the first power supply signal, adjust the third state parameter to a fourth state parameter, and based on the fourth state parameter, send the power-on signal.

4. The power control method according to claim 3, wherein Further includes: Based on a second signal, send a second shutdown signal, and adjust the third state parameter to the second state parameter, where the first signal and the second signal are provided by the first signal source.

5. The power supply control method according to claim 4, characterized in that Configure the first state value in the first state parameter to be "1", and the second state value in the first state parameter to be "0".

6. The power control method according to claim 4, wherein The sending the first shutdown signal based on the first state parameter of the storage circuit and the first power supply signal, and adjusting the first state parameter to a second state parameter includes: When obtaining the first power supply signal, read the first state value in the first state parameter; When the first state value in the first state parameter is equal to a first preset value, read the second state value in the first state parameter; When the second state value in the first state parameter is equal to a second preset value, send the first shutdown signal, and adjust the first state value in the first state parameter to the second preset value.

7. The power control method according to claim 6, wherein The sending the power-on signal based on a first signal and the second state parameter, and adjusting the second state parameter to a third state parameter includes: When obtaining the first signal, read the first state value in the second state parameter; When the first state value in the second state parameter is not equal to the first preset value, send the power-on signal; Based on the power-on signal, adjust the second state value in the second state parameter to the first preset value.

8. The power control method according to claim 7, wherein When the first power supply resumes power supply after a power failure, based on the third state parameter and the first power supply signal, adjust the third state parameter to the fourth state parameter, and based on the fourth state parameter, send the power-on signal, including: When the first power supply signal is acquired, determine that the first state value in the third state parameter is the first preset value; Read the first state value in the fourth state parameter; When the first state value in the fourth state parameter is equal to the first preset value, read the second state value in the fourth state parameter; When the second state value in the fourth state parameter is not equal to the second preset value, send the power-on signal.

9. A power control device, characterized in that, Including: A startup unit, configured to send a first power-off signal based on the first state parameter of the storage circuit and the first power supply signal when the first power supply supplies power to the power supply circuit and the storage circuit; An adjustment unit, configured to adjust the first state parameter to a second state parameter, where the first power-off signal is used to guide the embedded system chip to wait for power-on; A power-on unit, configured to send a power-on signal based on the first signal and the second state parameter; The adjustment unit is further configured to adjust the second state parameter to a third state parameter, and when the first power supply resumes power supply after a power failure, based on the third state parameter and the first power supply signal, adjust the third state parameter to a fourth state parameter; A recovery unit, configured to send the power-on signal based on the fourth state parameter.

10. A power supply system, characterized in that, Including: The power supply control circuit, power adapter, and power button provided in Claims 1-2; The power adapter is configured to provide a first power supply signal to the power supply circuit and the storage circuit of the power supply control circuit; The power button is configured to provide a first signal to the power supply control circuit; The power supply control circuit is configured to control the embedded system chip to power on according to the power supply control method described in any one of Claims 3-8, and control the embedded system chip to power on when the power adapter loses power.

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