Power module with low switching loss
By setting a flexible circuit board and converter circuit in the power module, the problem of single power module function and insufficient integration is solved, and a power module design with low switching losses and high integration is realized.
Patent Information
- Application Number
- CN202510551164.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-28
- Publication Date
- 2025-08-01
AI Technical Summary
The existing power module packaging structure has a relatively single function, insufficient integration, and high switching losses.
A first flexible circuit board is arranged in the power module, and the transformer primary edge layer and the secondary edge layer are directly in contact with the secondary edge layer through the flexible circuit board, optimizing the switching performance of the chip, and reducing switching losses by setting up a converter circuit composed of the transformer primary edge layer, secondary edge layer, absorption capacitor and secondary edge diode.
The coupling coefficient between the primary and secondary edge layers of the transformer is improved, energy loss and voltage spikes are reduced, the functional diversification of the power module and the integration of the device are improved, and switching losses are reduced.
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Figure CN120415136A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor technology, and more particularly to a power module with low switching losses. Background Art
[0002] The existing power module packaging structures have relatively single functions and insufficient integration. Specifically, in the related art, a power module usually only encapsulates a power switch and an antiparallel diode. However, structures such as circuits and sensors connected to the power switch are usually arranged outside the power module rather than integrated within the power module. Summary of the Invention
[0003] This application provides a power module with low switching losses, including:
[0004] A chip, including a control electrode, a first electrode, and a second electrode;
[0005] A substrate located on one side of the chip;
[0006] A primary transformer layer, at least partially located on the side of the substrate away from the chip, and the primary transformer layer is electrically connected to the first electrode of the chip;
[0007] A first flexible circuit board located on the side of the primary transformer layer away from the substrate. The first flexible circuit board includes a flexible substrate and a secondary transformer layer located on the side of the flexible substrate away from the substrate; the flexible substrate is in direct contact with the part of the primary transformer layer located on the side of the substrate facing the first flexible circuit board; the orthographic projection of the primary transformer layer on the substrate and the orthographic projection of the secondary transformer layer on the substrate at least partially overlap;
[0008] Secondary components located on the side of the first flexible circuit board away from the substrate, and the secondary components are connected to the secondary transformer layer;
[0009] Primary components located on the side of the substrate away from the first flexible circuit board, and the primary components are respectively connected to the second electrode of the chip and the primary transformer layer.
[0010] In some embodiments, the primary components include a snubber capacitor, and the secondary components include a secondary capacitor and a secondary diode connected to each other.
[0011] In some embodiments, the power module is provided with a cavity penetrating through the substrate and the first flexible circuit board, and the primary transformer layer and the secondary transformer layer are arranged around the cavity.
[0012] In some embodiments, the substrate is provided with a first conductive via and a second conductive via penetrating through the substrate. The primary winding layer of the transformer is electrically connected to the primary components through the first conductive via; the second pole of the chip is connected to the primary components through the second conductive via.
[0013] In some embodiments, the power module further includes a second flexible circuit board, which includes a first overlapping portion, a bending portion, and a second overlapping portion connected in sequence; the second pole is disposed on a surface of the chip facing the first flexible circuit board; the first overlapping portion is electrically connected to a surface of the second conductive via close to the first flexible circuit board, the bending portion penetrates through the substrate, and the second overlapping portion is electrically connected to the second pole.
[0014] In some embodiments, the power module further includes a heat sink on a side of the chip away from the first flexible circuit board, and the chip is mounted on the heat sink.
[0015] In some embodiments, the heat sink includes an insulating layer and a metal layer on a side of the insulating layer facing the substrate. The primary winding layer of the transformer includes a first part and a second part that are electrically connected. The metal layer includes the first part of the primary winding layer of the transformer, and the second part of the primary winding layer of the transformer is located on a side of the substrate away from the chip.
[0016] In some embodiments, the substrate is provided with a third conductive via penetrating through the substrate. A surface of the third conductive via away from the heat sink is connected to the second part of the primary winding layer of the transformer, a surface of the third conductive via close to the heat sink is connected to the first part of the primary winding layer of the transformer, and the first part is electrically connected to the first pole of the chip.
[0017] In some embodiments, the power module further includes a current sensor located inside the substrate. A positive projection of the current sensor on the substrate surrounds a positive projection of the chip on the substrate, and the current sensor is used to measure the current of the chip.
[0018] In some embodiments, a first circuit layer, a second circuit layer, and a third circuit layer are sequentially stacked in the substrate; the current sensor includes a Rogowski coil, and the Rogowski coil includes a plurality of first conductive parts arranged at intervals on the first circuit layer, a plurality of fourth conductive vias, a plurality of second conductive parts arranged at intervals on the third circuit layer, and a third conductive part on the second circuit layer. The fourth conductive vias penetrate through the part of the substrate between the first circuit layer and the third circuit layer; the orthographic projections of the plurality of first conductive parts on the substrate surround the orthographic projection of the chip on the substrate, the orthographic projections of the plurality of second conductive parts on the substrate surround the orthographic projection of the chip on the substrate, and the orthographic projection of the third conductive part on the substrate surrounds the orthographic projection of the chip on the substrate. The orthographic projection of the third conductive part on the substrate overlaps at least part of the orthographic projection of the first conductive parts on the substrate and at least part of the orthographic projection of the second conductive parts on the substrate;
[0019] The orthographic projection of the first conductive part on the substrate is located between the orthographic projections of two adjacent second conductive parts on the substrate, and two ends of the first conductive part are respectively connected to opposite sides of two adjacent second conductive parts through the fourth conductive vias; one end of the third conductive part is connected to one of the fourth conductive vias.
[0020] In some embodiments, the power module further includes a heat dissipation plate on a side of the chip away from the substrate, and the chip is mounted on the heat dissipation plate; the heat dissipation plate includes an insulating layer and a metal layer on a side of the insulating layer facing the chip. A recess is provided on a surface of the metal layer facing the current sensor, and the orthographic projection of the current sensor on the insulating layer falls within the orthographic projection of the recess on the insulating layer.
[0021] The beneficial effects of the present application include:
[0022] In this embodiment, by providing a first flexible circuit board in the power module, the first flexible circuit board includes a secondary transformer layer. Since the first flexible circuit board is flexible, the part of the primary transformer layer on the side of the substrate away from the chip can be directly in contact with the flexible substrate of the first flexible circuit board. Furthermore, the distance between the part of the primary transformer layer on the side of the substrate away from the chip and the secondary transformer layer is approximately the thickness of the flexible substrate; since the thickness of the flexible substrate is usually small, the distance between the part of the primary transformer layer on the side of the substrate away from the chip and the secondary transformer layer is small. Therefore, the coupling coefficient between the primary transformer layer and the secondary transformer layer can be increased, and the leakage inductance of the primary transformer layer can be reduced, thereby further reducing energy loss, avoiding voltage spikes or device breakdowns.
[0023] Additional aspects and advantages of the present application will be given in part in the following description, will become apparent from the following description, or will be learned through the practice of the present application. Description of the Drawings
[0024] The drawings herein are incorporated into and constitute a part of this specification, showing embodiments consistent with the present application, and are used together with the specification to explain the principles of the present application.
[0025] Figure 1 Shown is a cross-sectional view of a power module provided by an exemplary embodiment of the present application corresponding to Figure 2 and Figure 5 a cross-sectional view taken along section line AA in
[0026] Figure 2 Shown is a top view of a power module provided by an exemplary embodiment of the present application;
[0027] Figure 3 Shown is a bottom view of a power module provided by an exemplary embodiment of the present application;
[0028] Figure 4 Shown is a perspective view of a power module provided by an exemplary embodiment of the present application;
[0029] Figure 5 Shown is a top view of a partial structure of a power module provided by an exemplary embodiment of the present application;
[0030] Figure 6 Shown is a circuit topology diagram of an integrated partial structure in a power module provided by an exemplary embodiment of the present application;
[0031] Figure 7 Shown is a perspective view of a partial structure of a power module provided by an exemplary embodiment of the present application;
[0032] Figure 8 Shown is an exploded view of a power module provided by an exemplary embodiment of the present application;
[0033] Figure 9 Shown is a top view of a partial structure of a power module provided by an exemplary embodiment of the present application;
[0034] Figure 10 Shown is Figure 9 an enlarged view of part A in
[0035] Figure 11 Shown is a perspective view of a partial structure of a power module provided by an exemplary embodiment of the present application;
[0036] Figure 12 Shown is Figure 11 an enlarged view of part B in
[0037] Figure 13 The figure shows a perspective view of another angle of a partial structure of a power module provided by an exemplary embodiment of the present application;
[0038] Figure 14 As shown Figure 13 The enlarged view at position C in
[0039] In the figure: 1 - chip; 101 - first pole; 102 - second pole; 2 - substrate; 21 - first conductive via; 22 - second conductive via; 23 - third conductive via; 24 - fourth conductive via; 201 - first circuit layer; 202 - second circuit layer; 203 - third circuit layer; 204 - fourth circuit layer; 3 - primary transformer layer; 31 - first part; 32 - second part; 301 - first conductive layer; 302 - second conductive layer; 4 - first flexible circuit board; 41 - flexible substrate; 42 - secondary transformer layer; 401 - third conductive layer; 5 - secondary components; 51 - secondary diode; 52 - secondary capacitor; 6 - primary components; 61 - absorption capacitor; 62 - DC bus capacitor; 7 - second flexible circuit board; 71 - first overlapping part; 72 - bent part; 73 - second overlapping part; 8 - heat sink; 81 - insulating layer; 82 - metal layer; 821 - depression; 83 - heat dissipation layer; 9 - current sensor (Rogowski coil); 91 - first conductive part; 92 - second conductive part; 93 - third conductive part; 11 - third flexible circuit board; 100 - cavity; 100a - first opening; 100b - second opening; 200 - support plate. Detailed implementation manners
[0040] Next, with reference to the accompanying drawings, the low - switching - loss power module in the embodiments of the present application will be described in detail.
[0041] It should be noted that when an element A such as a layer, film, or region is referred to as "on the side of element B away from element C", it means that element A can be directly on the surface of element B away from element C, or there may be an intermediate layer, intermediate region, or intermediate element between element B and element A. When an element A such as a layer, film, or region is referred to as "between element B and element C", it means that only element A exists between element B and element C, or there may be an intermediate layer, intermediate region, or intermediate element between element A and element B, and between element A and element C.
[0042] Although terms such as "first", "second", etc. can be used to describe various components, such components are not limited by the above terms. These terms are only used to distinguish one component from another component and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first", "second", etc. may explicitly or implicitly include one or more of the features. In the description of this application, unless otherwise stated, "plurality" means two or more. In the absence of conflict, the features in the embodiments described below in this application can complement or combine with each other.
[0043] In the accompanying drawings, the symbols "x," "y," and "z" are used to indicate directions. The x, y, and z directions are not limited to three mutually perpendicular directions of a rectangular coordinate system and can be interpreted in a broader sense. For example, the x, y, and z directions can be perpendicular to each other, or can represent different directions that are not perpendicular to each other. For example, x is used to indicate a first direction, y is used to indicate a second direction perpendicular to the first direction, and z is used to indicate a third direction perpendicular to the first and second directions. In this embodiment, the z direction can represent the thickness direction of the power module, and both the x and y directions are perpendicular to the z direction.
[0044] In the accompanying drawings, the sizes and thicknesses of elements may be exaggerated for better understanding, clarity, and ease of description. However, the present application is not limited to the sizes and thicknesses shown in the accompanying drawings. In the accompanying drawings, the thicknesses of layers, films, panels, regions, and other elements may be exaggerated for clarity. Example embodiments are shown in the accompanying drawings, wherein like reference numerals represent like elements.
[0045] An embodiment of the present application provides a power module with low switching loss. Figure 1 The cross-sectional view shown is Figure 2 as well as Figure 5 The cross-sectional view of the structure is obtained by cutting along the section line AA. Figure 1As shown, the power module includes a chip 1, a substrate 2, a primary transformer layer 3, a first flexible circuit board 4, primary components 6, and secondary components 5. Among them, the chip 1 includes a control electrode (not shown in the figure), a first pole 101, and a second pole 102; the substrate 2 is located on one side of the chip 1; at least a part of the primary transformer layer 3 is located on the side of the substrate 2 away from the chip 1, and the primary transformer layer 3 is electrically connected to the first pole 101 of the chip 1; the first flexible circuit board 4 is located on the side of the primary transformer layer 3 away from the substrate 2, and the first flexible circuit board 4 includes a flexible substrate 41 and a secondary transformer layer 42 located on the side of the flexible substrate 41 away from the substrate 2; the flexible substrate 41 is in direct contact with the part of the primary transformer layer 3 on the side of the substrate 2 facing the first flexible circuit board 4; the orthographic projection of the primary transformer layer 3 on the substrate 2 and the orthographic projection of the secondary transformer layer 42 on the substrate 2 at least partially overlap; the secondary components 5 are located on the side of the first flexible circuit board 4 away from the substrate 2, and the secondary components 5 are connected to the secondary transformer layer 42; the primary components 6 are located on the side of the substrate 2 away from the first flexible circuit board 4, and the primary components 6 are respectively connected to the second pole 102 of the chip 1 and the primary transformer layer 3.
[0046] In this embodiment, by providing the first flexible circuit board 4 in the power module, the first flexible circuit board 4 includes a secondary transformer layer 42. Since the first flexible circuit board 4 has flexibility, the part of the primary transformer layer 3 located on the side of the substrate 2 away from the chip 1 can be in direct contact with the flexible substrate 41 of the first flexible circuit board 4, so that the distance between the part of the primary transformer layer 3 located on the side of the substrate 2 away from the chip 1 and the secondary transformer layer 42 is approximately the thickness of the flexible substrate 41; since the thickness of the flexible substrate 41 is usually small, the distance between the part of the primary transformer layer 3 located on the side of the substrate 2 away from the chip 1 and the secondary transformer layer 42 is small, so the coupling coefficient between the primary transformer layer 3 and the secondary transformer layer 42 can be improved. The leakage inductance of the primary transformer layer 3 can be reduced, thus avoiding voltage spikes, energy loss, or device breakdown.
[0047] Furthermore, the chip 1 is connected to the primary transformer layer 3, the secondary transformer layer 42, as well as the primary components 6 and the secondary components 5 to jointly form a circuit, which can optimize the switching performance of the chip. The chip and the secondary components are located on the side of the first flexible circuit board away from the substrate, and the primary components are located on the side of the substrate away from the first flexible circuit board, which can avoid the influence of the thickness of the primary components 6 and the secondary components 5 on the distance between the primary transformer layer 3 and the secondary transformer layer 42. Compared with the case where an external circuit electrically connected to the chip is provided outside the power module, the functional diversification and device integration degree of the power module can be improved.
[0048] In some embodiments, the primary components 6 include a snubber capacitor 61, and the secondary components 5 include a secondary capacitor 52 and a secondary diode 51 connected to each other. Then, asFigure 6 As shown, the power module can form a commutation circuit for Chip 1. After Chip 1 is turned on, the current flowing through Chip 1 and located in the primary layer 3 of the transformer increases rapidly. The induced voltage induced by this current in the secondary layer 42 of the transformer is reversely applied across both ends of the secondary diode 51, that is, the reverse blocking of the secondary diode 51 makes the secondary layer 42 of the transformer open circuit. Therefore, the self-inductance of the primary layer 3 of the transformer is all connected to the commutation circuit. This stray inductance generates a corresponding negative voltage when the current increases, resulting in a decrease in the voltage across both ends of Chip 1. At the same time, the absorption capacitor 61 starts to discharge, further causing the voltage across both ends of Chip 1 to decrease. In this way, the conduction voltage of Chip 1 can be close to or approximately zero voltage, thereby reducing the turn-on loss of Chip 1. After Chip 1 is turned off, the current flowing through Chip 1 decreases rapidly. The induced voltage induced by this current in the secondary layer 42 of the transformer is positively applied across both ends of the secondary diode 51, that is, the forward conduction of the secondary diode 51 makes the secondary layer 42 of the transformer short circuit. Only the leakage inductance of the primary layer 3 of the transformer is connected to the commutation circuit, making the equivalent stray inductance of the commutation circuit decrease and reducing the voltage spike. At the same time, the current commutates to the absorption capacitor 61, and the voltage of the absorption capacitor 61 rises slowly, thereby reducing the rising speed of the voltage of Chip 1. After the absorption capacitor 61 is fully charged, the current commutates to other components. Because the commutation to other devices causes external circuit stray inductance, a voltage spike will be induced across both ends of Chip 1 again. At this time, the absorption capacitor 61 will clamp (reduce) the spike amplitude. Since the current flowing through Chip 1 has dropped to 0, and both the rising speed and the spike value of the voltage of Chip 1 have decreased, the voltage-current overlap is reduced, and the turn-off loss is reduced. Thus, it can be seen that by setting the corresponding primary components 6 and secondary components 5, the switching loss of Chip 1 can be reduced and voltage spikes can be avoided. From this, it can be known that by setting a commutation circuit composed of the primary layer 3 of the transformer, the secondary layer 42 of the transformer, the absorption capacitor 61, the secondary diode 51, and the secondary capacitor 52 in the power module, the switching loss of the chip can be reduced. It should be noted that the types and quantities of the primary components 6 and the secondary components 5 can be flexibly changed to achieve corresponding auxiliary functions. The embodiments shown in the accompanying drawings provided in this embodiment are only exemplary embodiments.
[0049] In some embodiments, the primary component 6 further includes a DC bus capacitor 62. One end of the DC bus capacitor 62 is connected to the primary layer 3 of the transformer, and the other end is connected to the absorption capacitor 61. The DC bus capacitor 62 can further smooth the voltage and enhance the stability of the commutation circuit.
[0050] In some embodiments, Chip 1 can be a power semiconductor chip.
[0051] In some embodiments, the thickness of the first flexible circuit board 4 ranges from 0.2 to 0.4 mm, and the spacing between the part of the primary transformer layer 3 on the side of the substrate 2 away from the chip 1 and the secondary transformer layer 42 ranges from 0.2 to 0.4 mm. In some embodiments, the spacing between the part of the primary transformer layer 3 on the side of the substrate 2 away from the chip 1 and the secondary transformer layer 42 is 0.2 mm, 0.3 mm or 0.4 mm.
[0052] In some embodiments, the power module in the present application is a single transistor module. In other embodiments, as Figures 2 to 5 , and Figure 7 and Figure 8 shown, the power module in the present application can be integrated into a half-bridge module by two symmetrically arranged single transistor modules.
[0053] In some embodiments, as Figure 1 [[ID=No.14]]shown, the first pole 101 of the chip 1 is disposed on the surface of the chip 1 on the side away from the first flexible circuit board 4, and the second pole 102 and the control pole (not shown in the figure) are disposed on the surface of the chip 1 on the side close to the first flexible circuit board 4.
[0054] In some embodiments, the first pole 101 can be a drain, and the second pole 102 can be a source. In other embodiments, the first pole 101 can be a source, and the second pole 102 can be a drain. Exemplarily, the first pole 101 shown in the attached drawings of this embodiment is a drain, and the second pole 102 is a source.
[0055] In some embodiments, the control pole can be a gate.
[0056] In some embodiments, the substrate 2 and the part of the primary transformer layer 3 on the side of the substrate 2 away from the chip 1 together form a printed circuit board.
[0057] In some embodiments, as Figure 2 , Figure 4 , Figure 5 , Figure 7 and Figure 8 shown, the power module is provided with a cavity 100 penetrating through the substrate 2 and the first flexible circuit board 4, and the primary transformer layer 3 and the secondary transformer layer 42 are arranged around the cavity 100.
[0058] In this embodiment, the cavity 100 can form the air core of the primary layer 3 of the transformer and the secondary layer 42 of the transformer. Compared with the metal-core transformer, the eddy current loss and hysteresis loss in the metal core under high-frequency excitation can be avoided. In addition, since there is no metal core, the electromagnetic interference caused by the magnetic flux leakage of the metal core is also reduced. Moreover, the air-core transformer does not need to use a heavy metal core, which can reduce the overall weight of the power module and improve portability. The air-core transformer can avoid the influence of temperature on the metal core, has a larger operating temperature range, and a longer service life.
[0059] In some embodiments, as Figure 2 shown, the substrate 2 is provided with a first opening 100a. As Figure 5 shown, the first flexible circuit board 4 is provided with a second opening 100b. The orthographic projection of the first opening 100a on the substrate 2 and the orthographic projection of the second opening 100b on the substrate 2 at least partially overlap. At least a part of the first opening 100a encloses at least a part of the area of the cavity 100, and at least a part of the second opening 100b encloses at least a part of the area of the cavity 100. Thus, the area enclosed by the first opening 100a and the second opening 100b can be used as the air core of the transformer.
[0060] In some embodiments, as Figure 1 shown, the substrate 2 is provided with a first conductive through-hole 21 and a second conductive through-hole 22 that penetrate the substrate 2. The primary layer 3 of the transformer is electrically connected to the primary component 6 through the first conductive through-hole 21; the second pole 102 of the chip 1 is connected to the primary component 6 through the second conductive through-hole 22.
[0061] In this embodiment, when the primary component 6 is arranged on the surface of the primary layer 3 of the transformer away from the secondary layer 42 of the transformer, the space between the primary layer 3 and the secondary layer 42 of the transformer can be avoided being occupied by the primary component 6; compared with forming an electrical connection through bonding wires, in this embodiment, the electrical connection between the primary component 6 and the primary layer 3 of the transformer and the chip 1 is realized through the first conductive through-hole 21 and the second conductive through-hole 22, which can improve the reliability and current-carrying capacity of the electrical connection, and can avoid the bonding wires occupying the space inside the power module, thereby improving the integration degree of the power module.
[0062] In some embodiments, the primary component 6 includes an absorption capacitor 61. In other embodiments, the primary component 6 includes a DC bus capacitor 62. In other embodiments, as Figure 1 shown, the primary component 6 includes an absorption capacitor 61 and a DC bus capacitor 62.
[0063] In some embodiments, the first conductive through-hole 21 includes a through-hole penetrating the substrate 2 and a conductive material filled in the through-hole, and the second conductive through-hole 22 includes a through-hole penetrating the substrate 2 and a conductive material filled in the through-hole.
[0064] In some embodiments, the primary layer 3 of the transformer may be formed by a metal thin film on the side of the substrate 2 close to the first flexible circuit board 4, and the secondary layer 42 of the transformer may be formed by a metal thin film on the side of the first flexible circuit board 4 away from the substrate 2. In some examples, both the primary layer 3 of the transformer and the secondary layer 42 of the transformer are formed by copper foils.
[0065] In some embodiments, as Figure 1 shown, the power module further includes a second flexible circuit board 7, and the second flexible circuit board 7 includes a first overlapping portion 71, a bent portion 72, and a second overlapping portion 73 that are sequentially connected; the second pole 102 is disposed on a surface of the chip 1 facing the first flexible circuit board 4; the first overlapping portion 71 is electrically connected to a surface of the second conductive through hole 22 close to the first flexible circuit board 4, the bent portion 72 penetrates through the substrate 2, and the second overlapping portion 73 is electrically connected to the second pole 102.
[0066] In this embodiment, the connection between the chip 1 and the primary components 6 is realized through the second flexible circuit board 7. The thickness of the second flexible circuit board 7 is relatively thin. Therefore, when used as a overlapping component, the second flexible circuit board 7 has little influence on the distance between the primary layer 3 and the secondary layer 42 of the transformer. Thus, while ensuring the connection between the chip 1 and the primary components 6, the thickness of the power module can be reduced.
[0067] In some other embodiments, the chip 1 may be directly disposed on the side of the substrate 2 away from the first flexible circuit board 4 (not shown in the figure). Thus, the space occupied by the second flexible circuit board 7 between the substrate 2 and the first flexible circuit board 4 can be further avoided, the distance between the primary layer 3 and the secondary layer 42 of the transformer can be further reduced, and the coupling coefficient can be improved.
[0068] In some embodiments, as Figure 1 shown, the power module further includes a heat sink 8 on the side of the chip 1 away from the first flexible circuit board 4, and the chip 1 is mounted on the heat sink 8. The heat sink 8 can play a role in carrying the chip 1, and at the same time, the heat sink 8 can conduct and dissipate the heat generated by the chip 1 itself, ensuring a low thermal resistance of the power module.
[0069] In some embodiments, as Figure 1 shown, the heat sink 8 includes an insulating layer 81 and a metal layer 82 on the side of the insulating layer 81 facing the substrate 2. The primary layer 3 of the transformer includes an electrically connected first part 31 and a second part 32. The metal layer 82 includes the first part 31 of the primary layer 3 of the transformer, and the second part 32 of the primary layer 3 of the transformer is located on the side of the substrate 2 away from the chip 1.
[0070] In this embodiment, the metal layer 82 provided on the heat dissipation plate 8 can be used as a part of the primary side layer 3 of the transformer. When the first pole 101 of the chip 1 is arranged on the side of the chip 1 facing the heat dissipation plate 8, the first pole 101 of the chip 1 can be directly electrically connected to the primary side layer 3 of the transformer through the metal layer 82 without additionally arranging bonding wires. While ensuring the reliability of the electrical connection between the chip 1 and the primary side layer 3 of the transformer, it can avoid the bonding wires occupying the space of the power module and improve the integration degree of the power module.
[0071] In some embodiments, the material of the insulating layer 81 may include ceramics. In some embodiments, the material of the metal layer 82 may include copper.
[0072] In some embodiments, the heat dissipation plate 8 further includes a heat dissipation layer 83 provided on the side of the insulating layer 81 away from the metal layer 82. The material of the heat dissipation layer 83 includes a metal such as copper. Exemplarily, the heat dissipation plate 8 may be a direct copper clad ceramic substrate 2 (DBC).
[0073] In some embodiments, as Figure 8 shown, the power module further includes a support plate 200 for supporting the heat dissipation plate 8.
[0074] In some embodiments, as Figure 1 shown, the substrate 2 is provided with a third conductive through hole 23 penetrating through the substrate 2. The surface of the third conductive through hole 23 away from the heat dissipation plate 8 is connected to the second part 32 of the primary side layer 3 of the transformer, and the surface of the third conductive through hole 23 close to the heat dissipation plate 8 is connected to the first part 31 of the primary side layer 3 of the transformer. The first part 31 is electrically connected to the first pole 101 of the chip 1.
[0075] In this embodiment, the electrical connection between the first part 31 and the second part 32 of the primary side layer 3 of the transformer is realized by providing the third conductive through hole 23 on the substrate 2. Compared with realizing the electrical connection by arranging bonding wires or flexible circuit boards, it can avoid the bonding wires or flexible circuit boards increasing the thickness of the power module, thereby improving the integration degree of the power module.
[0076] In some embodiments, the third conductive through hole 23 includes a through hole penetrating through the substrate 2 and a conductive material filled in the through hole.
[0077] In some embodiments, as Figure 1 shown, the surface of the substrate 2 close to the first flexible circuit board 4 is further provided with a first conductive layer 301. The first overlapping part 71 overlaps on the surface of the first conductive layer 301, and the surface of the second conductive through hole 22 close to the first flexible circuit board 4 contacts the first conductive layer 301. Thus, the electrical connection between the chip 1 and the primary side component 6 can be realized through the first conductive layer 301.
[0078] In some embodiments, the first conductive layer 301 and the second part 32 of the primary transformer layer 3 are disposed on the same layer. Preferably, the material of the first conductive layer 301 is the same as that of the second part 32 of the primary transformer layer 3. Then, the first conductive layer 301 and the primary transformer layer 3 can be formed in the same process.
[0079] In some embodiments, as Figure 1 shown, a second conductive layer 302 is further provided on one surface of the substrate 2 close to the first flexible circuit board 4. One side of the second conductive via 22 connected to the DC bus capacitor 62 close to the first flexible circuit board 4 is connected to one side of the second conductive layer 302, and one side of the first conductive via 21 connected to the absorption capacitor 61 close to the first flexible circuit board 4 is connected to the other side of the second conductive layer 302.
[0080] In some embodiments, the second conductive layer 302 and the second part 32 of the primary transformer layer 3 are disposed on the same layer. Preferably, the material of the second conductive layer 302 is the same as that of the second part 32 of the primary transformer layer 3. Then, the second conductive layer 302 and the primary transformer layer 3 can be formed in the same process.
[0081] In some embodiments, as Figure 1 shown, a third conductive layer 401 is further provided on one surface of the first flexible circuit board 4 away from the substrate 2. One side of the third conductive layer 401 is connected to the secondary diode 51, and the other side is connected to the secondary capacitor 52.
[0082] In some embodiments, the third conductive layer 401 and the secondary transformer layer 42 are disposed on the same layer. Preferably, the material of the third conductive layer 401 is the same as that of the secondary transformer layer 42. Then, the third conductive layer 401 and the secondary transformer layer 42 can be formed in the same process.
[0083] In some embodiments, the substrate 2 is further provided with a fourth conductive via 24 ( Figure 1 not shown in the figure). One surface of the fourth conductive via 24 close to the first flexible circuit board 4 is connected to the second flexible circuit board 7, and a connection is made between the other surface of the fourth conductive via 24 away from the first flexible circuit board 4 and the metal layer 82 of the heat sink 8 for leading out electricity and connecting to the power terminal. It should be noted that the fourth conductive via 24 includes a through hole and a conductive material filled in the through hole.
[0084] In some embodiments, as Figures 9 to 14 shown, the power module further includes a current sensor 9. The current sensor 9 is located inside the substrate 2. The orthographic projection of the current sensor 9 on the substrate 2 surrounds the orthographic projection of the chip 1 on the substrate 2. The current sensor 9 is used to measure the current of the chip 1.
[0085] In this embodiment, the current sensor 9 is disposed within the substrate 2, which can avoid the current sensor 9 occupying the space of other areas within the power module. At the same time, since the current sensor 9 is disposed around the chip 1, the current sensor 9 can directly measure the current of the chip 1.
[0086] In some embodiments, as Figure 12 shown, the substrate 2 is provided with a first circuit layer 201, a second circuit layer 202, and a third circuit layer 203 that are stacked in sequence; the current sensor 9 includes a Rogowski coil, as Figure 10 and Figure 12 shown, the Rogowski coil includes a plurality of first conductive portions 91 arranged at intervals on the first circuit layer 201, a plurality of fourth conductive vias 24, a plurality of second conductive portions 92 arranged at intervals on the third circuit layer 203, and a third conductive portion 93 on the second circuit layer 202. The fourth conductive vias 24 penetrate through the portion of the substrate 2 between the first circuit layer 201 and the third circuit layer 203; the orthographic projection of the plurality of first conductive portions 91 on the substrate 2 is arranged around the orthographic projection of the chip 1 on the substrate 2, the orthographic projection of the plurality of second conductive portions 92 on the substrate 2 is arranged around the orthographic projection of the chip 1 on the substrate 2, the orthographic projection of the third conductive portion 93 on the substrate 2 is arranged around the orthographic projection of the chip 1 on the substrate 2, and the orthographic projection of the third conductive portion 93 on the substrate 2 overlaps at least part of the orthographic projection of the plurality of first conductive portions 91 on the substrate 2 and at least part of the orthographic projection of the plurality of second conductive portions 92 on the substrate 2; the orthographic projection of the first conductive portion 91 on the substrate 2 is located between the orthographic projections of two adjacent second conductive portions 92 on the substrate 2, and both ends of the first conductive portion 91 are respectively connected to the opposite sides of two adjacent second conductive portions 92 through the fourth conductive vias 24; one end of the third conductive portion 93 is connected to one fourth conductive via 24.
[0087] In this embodiment, a Rogowski coil is formed within the substrate 2 to directly measure the current of the chip 1. The first circuit layer 201 and the third circuit layer 203 form the forward conductor (winding circuit) of the Rogowski coil, and the second circuit layer 202 forms the return conductor (return circuit) of the Rogowski coil. Therefore, the Rogowski coil can directly measure the current of the chip 1 within the substrate 2.
[0088] In some embodiments, as Figure 13 and Figure 14 shown, a recess 821 is provided on the surface of the metal layer 82 on the side of the heat sink 8 facing the chip 1 in the power module and facing the current sensor 9. The orthographic projection of the current sensor 9 on the insulating layer 81 falls within the orthographic projection of the recess 821 on the insulating layer 81.
[0089] In this embodiment, a recess 821 is provided on the metal layer 82 on the side of the heat dissipation plate 8 facing the chip 1, and the recess 821 is used to accommodate at least part of the current sensor 9, so that the gap between the current sensor 9 and the metal layer 82 can be increased, avoiding direct contact between the metal layer 82 and the current sensor 9 and causing errors in current measurement.
[0090] In some embodiments, the depth range of the recess 821 is 0.1 - 0.3 mm. In some examples, the depth of the recess 821 includes 0.1 mm, 0.2 mm or 0.3 mm.
[0091] In some embodiments, as Figure 12 shown, a fourth circuit layer 204 is further provided in the substrate 2. The fourth circuit layer 204 is disposed on the side of the third circuit layer 203 away from the second circuit layer 202, and the fourth circuit layer 204 is used to support the Rogowski coil.
[0092] In some embodiments, the ratio of the distance between the third circuit layer 203 and the fourth circuit layer 204 to the distance between the first circuit layer 201 and the fourth circuit layer 204 is greater than one-third. In this embodiment, the ratio of the distance between the third circuit layer 203 and the fourth circuit layer 204 can be set to be relatively large, so as to increase the distance between the Rogowski coil and the metal layer 82 of the heat dissipation plate 8, thereby reducing the parasitic capacitance between the Rogowski coil and the metal layer 82.
[0093] In an example, the distance between the first circuit layer 201 and the second circuit layer 202 is about 0.5 mm, the distance between the second circuit layer 202 and the third circuit layer 203 is about 0.4 mm, and the distance between the third circuit layer 203 and the fourth circuit layer 204 is about 0.5 mm.
[0094] In some embodiments, as Figure 9 shown, the power module further includes a third flexible circuit board 11. The third flexible circuit board 11 is disposed on the side of the chip 1 close to the first flexible circuit board 4, and the third flexible circuit board 11 is used to measure the voltage of the second pole 102 of the chip 1. The power module further includes a fourth flexible circuit board (not shown in the figure). The fourth flexible circuit board is disposed on the surface of the metal layer 82 facing the first flexible circuit board 4 and is in contact with the metal layer 82, and the fourth flexible circuit board is used to measure the voltage of the first pole 101 of the chip 1.
[0095] In this embodiment, the voltage of the second pole 102 and the voltage of the first pole 101 of the chip 1 can be respectively led out and measured through the third flexible circuit board 11 and the fourth flexible circuit board. By further calculating the difference ΔU between the voltage U1 of the first pole 101 and the voltage U2 of the second pole 102, the actual voltage of the chip 1 can be obtained. Thus, the voltage across the chip 1 can be accurately acquired.
[0096] It should be understood that the present application is not limited to the exact structures described above and shown in the drawings, and various modifications and changes can be made without departing from its scope. The scope of the present application is only limited by the appended claims.
Claims
1. A power module with low switching losses, characterized in that, Comprising: A chip, including a control electrode, a first electrode, and a second electrode; A substrate located on one side of the chip; A primary transformer layer, at least partially located on the side of the substrate away from the chip, and the primary transformer layer is electrically connected to the first electrode of the chip; A first flexible circuit board located on the side of the primary transformer layer away from the substrate. The first flexible circuit board includes a flexible substrate and a secondary transformer layer located on the side of the flexible substrate away from the substrate. The flexible substrate is in direct contact with the part of the primary transformer layer located on the side of the substrate facing the first flexible circuit board. At least part of the orthographic projection of the primary transformer layer on the substrate overlaps with the orthographic projection of the secondary transformer layer on the substrate; Secondary components located on the side of the first flexible circuit board away from the substrate, and the secondary components are connected to the secondary transformer layer; Primary components located on the side of the substrate away from the first flexible circuit board, and the primary components are respectively connected to the second electrode of the chip and the primary transformer layer; 2. The power module with low switching loss according to claim 1, characterized in that, The primary components include an absorption capacitor, and the secondary components include a secondary capacitor and a secondary diode connected to each other; 3. The power module with low switching loss according to claim 1, characterized in that, The power module is provided with a cavity penetrating through the substrate and the first flexible circuit board, and the primary transformer layer and the secondary transformer layer are arranged around the cavity; 4. The power module with low switching loss according to claim 1, characterized in that, The substrate is provided with a first conductive via and a second conductive via penetrating through the substrate. The primary transformer layer is electrically connected to the primary components through the first conductive via; the second electrode of the chip is connected to the primary components through the second conductive via; 5. The power module with low switching loss according to claim 4, characterized in that, The power module further includes a second flexible circuit board, which includes a first overlapping portion, a bending portion, and a second overlapping portion connected in sequence. The second electrode is arranged on the surface of the chip facing the first flexible circuit board. The first overlapping portion is electrically connected to the surface of the second conductive via close to the first flexible circuit board. The bending portion penetrates through the substrate, and the second overlapping portion is electrically connected to the second electrode; 6. The power module with low switching loss according to claim 1, characterized in that, The power module further includes a heat dissipation plate located on the side of the chip away from the first flexible circuit board, and the chip is mounted on the heat dissipation plate; 7. The power module with low switching loss according to claim 6, characterized in that, The heat dissipation plate includes an insulating layer and a metal layer located on the side of the insulating layer facing the substrate. The primary transformer layer includes a first part and a second part that are electrically connected. The metal layer includes the first part of the primary transformer layer, and the second part of the primary transformer layer is located on the side of the substrate away from the chip; 8. The power module with low switching loss according to claim 7, characterized in that, The substrate is provided with a third conductive via penetrating through the substrate. The surface of the third conductive via away from the heat dissipation plate is connected to the second part of the primary transformer layer, and the surface of the third conductive via close to the heat dissipation plate is connected to the first part of the primary transformer layer. The first part is electrically connected to the first electrode of the chip; 9. The power module with low switching loss according to claim 1, characterized in that, The power module further includes a current sensor located within the substrate. The current sensor's orthographic projection on the substrate surrounds the orthographic projection of the chip on the substrate, and the current sensor is used to measure the current of the chip.
10. The power module with low switching loss according to claim 9, characterized in that, The substrate is provided with a first circuit layer, a second circuit layer, and a third circuit layer stacked in sequence. The current sensor includes a Rogowski coil, and the Rogowski coil includes a plurality of first conductive parts arranged at intervals on the first circuit layer, a plurality of fourth conductive vias, a plurality of second conductive parts arranged at intervals on the third circuit layer, and a third conductive part on the second circuit layer. The fourth conductive vias penetrate through the part of the substrate between the first circuit layer and the third circuit layer. The orthographic projections of the plurality of first conductive parts on the substrate surround the orthographic projection of the chip on the substrate. The orthographic projections of the plurality of second conductive parts on the substrate surround the orthographic projection of the chip on the substrate. The orthographic projection of the third conductive part on the substrate surrounds the orthographic projection of the chip on the substrate, and the orthographic projection of the third conductive part on the substrate overlaps with at least part of the orthographic projection of the first conductive parts on the substrate and at least part of the orthographic projection of the second conductive parts on the substrate. The orthographic projection of the first conductive part on the substrate is located between the orthographic projections of two adjacent second conductive parts on the substrate, and both ends of the first conductive part are respectively connected to opposite sides of two adjacent second conductive parts through the fourth conductive vias. One end of the third conductive part is connected to one of the fourth conductive vias.
11. The power module with low switching loss according to claim 9, characterized in that, The power module further includes a heat dissipation plate on the side of the chip away from the substrate, and the chip is mounted on the heat dissipation plate. The heat dissipation plate includes an insulating layer and a metal layer on the side of the insulating layer facing the chip. The surface of the metal layer facing the current sensor is provided with a depression, and the orthographic projection of the current sensor on the insulating layer falls within the orthographic projection of the depression on the insulating layer.