Phase shifting circuit and phase shifting circuit system

Abstract

The application provides a phase-shifting circuit and a phase-shifting circuit system, wherein the input end of a series attenuation module receives a first input signal, and the first output signal is output through the output end; the first end of the series attenuation module is connected with a first control signal; the first end of a control module is connected with the second end of the series attenuation module; the second end of the control module is grounded; the third end of the control module is connected with the first control signal; the fourth end of the control module is connected with a second control signal; the first end of an adjusting module composed of a plurality of adjusting switch tubes connected in parallel is connected with the first end of the control module, and the second end of the adjusting module is grounded; each control end is connected with a corresponding third control signal; and the adjusting module is used for adjusting the parasitic amplitude modulation of the phase-shifting circuit through the on-off of the plurality of adjusting switch tubes. The circuit can adjust the parasitic amplitude modulation of the phase-shifting circuit by reasonably adjusting the on-off of the plurality of adjusting switch tubes in the adjusting module, and thus the transmission accuracy and reliability of information can be improved.

Description

Technical Field

[0001] This invention relates to the field of circuit technology, and in particular to a phase-shifting circuit and a phase-shifting circuit system. Background Technology

[0002] A phase shifter aims to achieve a consistent group delay frequency response across the entire operating frequency range, maintaining a flat frequency response under all phase changes. However, each phase shifting unit inevitably introduces insertion loss and parasitic amplitude modulation (AM) that varies with frequency along the signal transmission path. Furthermore, the unevenness of parasitic AM becomes more pronounced under different process angles and at high and low temperatures. Parasitic AM directly alters the signal waveform, degrading signal quality and directly impacting the accuracy and reliability of information transmission. Summary of the Invention

[0003] The purpose of this invention is to provide a phase-shifting circuit and a phase-shifting circuit system to improve the accuracy and reliability of information transmission.

[0004] This invention provides a phase-shifting circuit, comprising: a series attenuation module having an input terminal, an output terminal, a first terminal, and a second terminal; the input terminal receiving a first input signal from an external circuit and outputting a first output signal through the output terminal; the first terminal of the series attenuation module being connected to a first control signal; a control module having a first terminal, a second terminal, a third terminal, and a fourth terminal; the first terminal of the control module being connected to the second terminal of the series attenuation module; the second terminal of the control module being grounded; the third terminal of the control module being connected to the first control signal; and the fourth terminal of the control module being connected to a second control signal; wherein the second control signal is the inverted signal of the first control signal; and an adjustment module composed of multiple parallel-connected adjustment switches having a first terminal, a second terminal, and multiple control terminals corresponding to the multiple adjustment switches; the first terminal of the adjustment module being connected to the first terminal of the control module, and the second terminal of the adjustment module being grounded; each control terminal being connected to its corresponding third control signal; wherein the third control signal is either the first control signal or the second control signal; and the adjustment module being used to adjust the parasitic amplitude modulation of the phase-shifting circuit by switching the multiple adjustment switches on and off.

[0005] Furthermore, the series attenuation module includes: a first switching transistor having a first terminal, a second terminal, and a control terminal; the first terminal of the first switching transistor is connected to the input terminal of the series attenuation module, the second terminal of the first switching transistor is connected to the output terminal of the series attenuation module, and the control terminal of the first switching transistor is connected to a first control signal; a first inductor, the first terminal of the first inductor being connected to the first terminal of the first switching transistor, and the second terminal of the first inductor being connected to the second terminal of the series attenuation module; and a second inductor, the first terminal of the second inductor being connected to the second terminal of the series attenuation module, and the second terminal of the second inductor being connected to the second terminal of the first switching transistor.

[0006] Furthermore, the control module includes: a second switch transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the second switch transistor being connected to the second terminal of the series attenuation module, and the control terminal of the second switch transistor being connected to a first control signal; a first capacitor having a first terminal being connected to the second terminal of the series attenuation module, and the second terminal of the first capacitor being connected to the second terminal of the second switch transistor; a third switch transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the third switch transistor being connected to the second terminal of the second switch transistor, the second terminal of the third switch transistor being grounded, and the control terminal of the third switch transistor being connected to a second control signal; and a third inductor having a first terminal being connected to the first terminal of the third switch transistor, and the second terminal of the third inductor being grounded.

[0007] Furthermore, the circuit also includes: a control signal generation module; the control signal generation module includes: a fuse unit, used to receive a first instruction and output a first signal and multiple second signals according to the first instruction; wherein, the number of signal bits of the multiple second signals is one less than the number of multiple regulating switches in the regulating module; a first inverter, used to invert the first signal and output a first control signal; a second inverter, used to invert the first control signal and output a second control signal; an AND gate, having a first input terminal, a second input terminal, and an output terminal, the first input terminal of the AND gate being connected to the second control signal, the second input terminal of the AND gate being connected to the multiple second signals, the AND gate being used to perform an AND operation between the second control signal and each bit of the second signal, outputting the second signal after the multi-bit operation, and using the second signal after the multi-bit operation as the third control signal corresponding to each of the multiple regulating switches except for the specified switch; wherein, the third control signal corresponding to the specified switch is the second control signal.

[0008] Furthermore, the first switch, the second switch, the third switch, and the multiple regulating switches are all MOS switches.

[0009] Furthermore, when the phase-shifting circuit is in the reference state, both the first and second switching transistors are in the on state, while the third switching transistor and each regulating switching transistor are in the off state.

[0010] Furthermore, when the phase-shifting circuit is in phase-shifting state, both the first and second switching transistors are in the off state, while the third and designated switching transistors are in the on state. Among the multiple regulating switching transistors, each regulating switching transistor except the designated switching transistor is either in the on or off state.

[0011] Furthermore, when the phase-shifting circuit is in the reference state, the third inductor and the equivalent capacitance of the turn-off corresponding to the third switch form a parallel resonance.

[0012] Furthermore, the equivalent on-resistance of the second switch in the reference state is matched with the equivalent on-resistance of the adjustment module in the phase-shifting state; the equivalent off-capacitance of the adjustment module in the reference state is matched with the equivalent off-capacitance of the adjustment module in the phase-shifting state.

[0013] The present invention provides a phase-shifting circuit system, including any of the phase-shifting circuits described above.

[0014] The phase-shifting circuit and phase-shifting circuit system provided by this invention include a series attenuation module whose input terminal receives a first input signal and outputs a first output signal through its output terminal; a first terminal of the series attenuation module is connected to a first control signal; a first terminal of a control module is connected to a second terminal of the series attenuation module; the second terminal of the control module is grounded; a third terminal of the control module is connected to the first control signal; a fourth terminal of the control module is connected to a second control signal; a regulating module composed of multiple parallel regulating switches has its first terminal connected to the first terminal of the control module, and its second terminal grounded; each control terminal is connected to its corresponding third control signal; the regulating module is used to adjust the parasitic amplitude modulation of the phase-shifting circuit by switching the multiple regulating switches on and off. This circuit can adjust the parasitic amplitude modulation of the phase-shifting circuit by reasonably adjusting the on and off states of the multiple regulating switches in the combined regulating module, thereby improving the accuracy and reliability of information transmission. Attached Figure Description

[0015] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0016] Figure 1 A schematic diagram of a phase-shifting circuit provided in an embodiment of the present invention;

[0017] Figure 2 A schematic diagram of another phase-shifting circuit provided in an embodiment of the present invention;

[0018] Figure 3 This is a schematic diagram of a control signal generation module provided in an embodiment of the present invention;

[0019] Figure 4 An equivalent circuit diagram in reference state is provided for an embodiment of the present invention;

[0020] Figure 5 An equivalent circuit diagram for a phase-shifted state is provided in an embodiment of the present invention. Detailed Implementation

[0021] The technical solution of the present invention will be clearly and completely described below with reference to the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0022] Phased array systems play a crucial role in military confrontations. By controlling the phase difference of phase shifters, phased array systems can interfere with and filter signals, thereby improving the anti-interference capability and signal-to-noise ratio. As a key component, the performance of the phase shifter directly affects the phase control accuracy, phase adjustment range, and stability of the phased array system. In related technologies, each phase shifting unit of the phase shifter introduces a certain insertion loss and parasitic amplitude modulation that varies with frequency in the signal transmission path. Furthermore, the unevenness of parasitic amplitude modulation becomes more pronounced under different process angles and high / low temperatures. Parasitic amplitude modulation directly causes changes in the signal waveform, leading to a decrease in signal quality and directly affecting the accuracy and reliability of information transmission. Based on this, this invention provides a phase shifting circuit and a phase shifting circuit system. This technology can be applied to applications requiring adjustment of the parasitic amplitude modulation of the phase shifter, specifically to phase shifter circuit units in millimeter-wave beamforming RF chips, and other integrated circuits requiring low parasitic amplitude modulation, high-precision phase shifting, and phase shifter circuit structures less affected by process technology.

[0023] To facilitate understanding of this embodiment, a phase-shifting circuit disclosed in this embodiment of the invention will first be described, such as... Figure 1 As shown, the circuit includes: a series attenuation module 10, a control module 11, and an adjustment module 12 composed of multiple parallel-connected adjustment switches.

[0024] The series attenuation module 10 has an input terminal, an output terminal, a first terminal, and a second terminal. The input terminal is used to receive a first input signal provided by an external circuit, and the output terminal outputs a first output signal. The first terminal of the series attenuation module 10 is connected to a first control signal. In actual implementation, the external circuit can send the first input signal to the input terminal of the series attenuation module 10 and output the first output signal through the output terminal of the series attenuation module 10. Depending on the different states of the phase shifting circuit, the first output signal may be the same as or different from the first input signal. For example, when the phase shifting circuit is in the reference state, the first output signal is usually the same as the first input signal, and when the phase shifting circuit is in the phase shifting state, the first output signal is usually different from the first input signal. The series attenuation module 10 usually includes a first switching transistor, and the first control signal can be used to control the on / off state of the first switching transistor. When the first switching transistor is in the on or off state, the phase shifting circuit is also in the reference state or the phase shifting state respectively.

[0025] The control module 11 has a first terminal, a second terminal, a third terminal, and a fourth terminal. The first terminal of the control module 11 is connected to the second terminal of the series attenuation module 10. The second terminal of the control module 11 is grounded. The third terminal of the control module 11 is connected to a first control signal. The fourth terminal of the control module 11 is connected to a second control signal. The second control signal is the inverse of the first control signal. In actual implementation, the control module 11 usually includes two switching transistors. One of the switching transistors is usually in the same on / off state as the first switching transistor in the series attenuation module 10. Therefore, this switching transistor can be connected to the first control signal. The other switching transistor is in the opposite on / off state. Therefore, the other switching transistor can be connected to the second control signal, which is the inverse of the first control signal.

[0026] The regulating module 12, composed of multiple parallel regulating switches, has a first terminal, a second terminal, and multiple control terminals corresponding to the multiple regulating switches. The first terminal of the regulating module 12 is connected to the first terminal of the control module 11, and the second terminal of the regulating module 12 is grounded. Each control terminal is connected to its corresponding third control signal. The third control signal is either the first control signal or the second control signal. The regulating module 12 is used to adjust the parasitic amplitude modulation of the phase shift circuit by switching the multiple regulating switches on and off. Parasitic amplitude modulation (AM) can be understood as the phenomenon where, when a frequency-modulated wave passes through certain circuits (such as an RLC resonant circuit), its amplitude is affected by an additional modulation signal due to system nonlinearity or parameter instability, resulting in amplitude variation. In practical implementation, an adjustment module 12 can be formed by multiple regulating switches connected in parallel. The number of regulating switches can be set according to actual needs. One end of the adjustment module 12 is connected to the control module 11, and the other end is grounded. The control terminal of each regulating switch is connected to its corresponding third control signal. The third control signals corresponding to different regulating switches may be the same or different. Specifically, the third control signal can be the first control signal or the second control signal. The third control signal of each regulating switch can be controlled as needed to put different regulating switches in different on / off states, thereby adjusting the parasitic amplitude modulation of the phase-shifting circuit and minimizing the parasitic amplitude modulation.

[0027] The aforementioned phase-shifting circuit can adjust the parasitic amplitude modulation of the phase-shifting circuit by reasonably adjusting the on / off state of multiple adjustment switches in the combined adjustment module 12, thereby improving the accuracy and reliability of information transmission.

[0028] Furthermore, such as Figure 2 The schematic diagram of another phase-shifting circuit shown shows that the series attenuation module 10 includes: a first switch M1, a first inductor L11, and a second inductor L12;

[0029] The first switch M1 has a first terminal, a second terminal, and a control terminal. The first terminal of the first switch M1 is connected to the input terminal VIN of the series attenuation module 10, the second terminal of the first switch M1 is connected to the output terminal VOUT of the series attenuation module 10, and the control terminal of the first switch M1 is connected to a first control signal. The first switching transistor M1 can be selected according to actual needs. For example, taking a MOS switching transistor as an example, the first terminal of the first switching transistor M1 corresponds to the drain, the second terminal corresponds to the source, and the control terminal corresponds to the gate, which is connected to the first control signal.

[0030] The first terminal of the first inductor L11 is connected to the first terminal of the first switching transistor M1, and the second terminal of the first inductor L11 is connected to the second terminal of the series attenuation module 10; the first terminal of the second inductor L12 is connected to the second terminal of the series attenuation module 10, and the second terminal of the second inductor L12 is connected to the second terminal of the first switching transistor M1. In actual implementation, such as Figure 2 As shown, the number of regulating switches is designed to be four. The first inductor L11 and the second inductor L12 can be designed as two separate inductors. To further optimize the circuit structure and reduce the area occupied by components, the first inductor L11 and the second inductor L12 can be designed as tapped differential inductors in the layout, with a total inductance of L11 + L12. The taps of the differential inductors are connected to the second switch M2, the first capacitor C1, and each regulating switch M4, M4_2, M4_1, and M4_0. The first switch M1 can be directly connected across the input and output terminals of the differential inductors. This saves layout area and facilitates the layout of inductors, capacitors, and related switches. Usually, the inductance of the first inductor L11 and the second inductor L12 is the same. The connection terminal of the first inductor L11 and the second inductor L12 serves as the second terminal of the series attenuation module 10.

[0031] Furthermore, the control module 11 includes: a second switch M2, a first capacitor C1, a third switch M3, and a third inductor L2; the second switch M2 has a first terminal, a second terminal, and a control terminal, the first terminal of the second switch M2 is connected to the second terminal of the series attenuation module 10, and the control terminal of the second switch M2 is connected to the first control signal. The second switching transistor M2 can be selected according to actual needs. For example, taking a MOS switching transistor as an example, the first terminal of the second switching transistor M2 corresponds to the drain, the second terminal corresponds to the source, and the control terminal corresponds to the gate, which is connected to the first control signal. The first terminal of the first capacitor C1 is connected to the second terminal of the series attenuation module 10, and the second terminal of the first capacitor C1 is connected to the second terminal of the second switch M2; the third switch M3 has a first terminal, a second terminal, and a control terminal, the first terminal of the third switch M3 is connected to the second terminal of the second switch M2, the second terminal of the third switch M3 is grounded, and the control terminal of the third switch M3 is connected to a second control signal. The third switch M3 can be selected according to actual needs. For example, taking a MOS switch as an example, the first terminal of the third switch M3 corresponds to the drain, the second terminal corresponds to the source, and the control terminal corresponds to the gate, which is connected to the second control signal. The first terminal of the third inductor L2 is connected to the first terminal of the third switch M3, and the second terminal of the third inductor L2 is grounded.

[0032] Furthermore, the circuit also includes: a control signal generation module; such as Figure 3 The diagram shows a control signal generation module, which includes: a fuse unit EFUSE, a first inverter INV1, a second inverter INV2, and an AND gate. The fuse unit EFUSE receives a first instruction and outputs a first signal and multiple second signals according to the first instruction. The number of bits in the multiple second signals is one less than the number of multiple regulating switches in the regulating module 12. The first instruction can be a user-defined instruction. After receiving the first instruction, the fuse unit EFUSE outputs the first signal and multiple second signals. The number of bits in the multiple second signals is related to the number of regulating switches, for example... Figure 3 for Figure 2 The corresponding control signal generation module outputs the first signal as follows: The output 3-bit second signal is (For example, 110, 101, etc.), it can be seen that Figure 2 The number of multiple adjustment switches in the dashed box corresponding to the adjustment module 12 is four, and the number of bits of the second signal is one less than the number of multiple adjustment switches, which is three bits.

[0033] The first inverter INV1 is used to invert the first signal and output the first control signal; the second inverter INV2 is used to invert the first control signal and output the second control signal; for example... Figure 3 In the middle, the first inverter INV1 corresponds to the first signal After inversion, the first control signal can be output. Regarding the first control signal After being inverted by the second inverter INV2, the second control signal is output.

[0034] An AND gate has a first input, a second input, and an output. The first input of the AND gate is connected to a second control signal, and the second input of the AND gate is connected to multiple second signals. The AND gate is used to perform an AND operation between the second control signal and each bit of the second signal, and outputs the second signal after the multi-bit operation. The second signal after the multi-bit operation is used as the third control signal corresponding to each of the multiple regulating switches except for the specified switch; wherein, the third control signal corresponding to the specified switch is the second control signal.

[0035] for example, Figure 3 In the AND gate, the two inputs are respectively input to the second control signal. and 3-bit second signal Each bit of the second signal is respectively compared with the second control signal. Performing an AND operation can output a second signal after the 3-bit operation. For example, if the second control signal High level 1, 3-bit second signal If the value is 101, then after performing the AND operation, the second signal after the 3-bit operation can be output as 101; if the second control signal... Low level 0, 3-bit second signal If the value is 101, then after the AND operation, the output 3-bit second signal will be 000; the specified switch can be any one of multiple regulating switches, and the third control signal corresponding to the specified switch is the second control signal. The second signal after 3-bit operation As the third control signal corresponding to each of the other regulating switches besides the designated switching transistor, such as Figure 2 In the diagram, the regulating switch M4 within the dashed box is the designated switch, and its corresponding third control signal is the second control signal. The third control signal corresponding to the other regulating switches M4_2, M4_1, and M4_0 is the second signal after 3-bit operation. In this embodiment, the first switch M1, the second switch M2, the third switch M3, and the designated switch M4 are all controlled by the first control signal. Or the second control signal Control, while the other three regulating switches correspond to the third control signal. It is related to the second control signal The second signal after the 3-bit operation following the logical AND. like Figure 3 As shown, the second signal, obtained through the operation of these 3 bits, controls the on / off state of the three branches corresponding to the other three regulating switches M4_2, M4_1, and M4_0.

[0036] Furthermore, such as Figure 2 As shown, the first switch M1, the second switch M2, the third switch M3, and the multiple regulating switches M4, M4_2, M4_1, and M4_0 are all MOS switches; of course, other suitable switches can be selected according to actual needs.

[0037] Figure 2 In the circuit diagram, the first inductor L11 and the second inductor L12 serve as series inductors in the low-pass filter. The first switch M1 acts as a direct-through switch in the reference state. The VIN and VOUT terminals are the signal input and output terminals of the single-ended circuit. For a differential link, this can be achieved by using two identical single-ended circuits. The first capacitor C1 and the turn-off equivalent capacitance C of the second switch M2 are also considered. off_M2 (That is, the equivalent capacitance when the second switch M2 is turned off) together form the parallel capacitance of the low-pass filter in the phase-shifted state, the first inductor L11, the second inductor L12, the first capacitor C1, and the equivalent capacitance C of the second switch M2 when it is turned off. off_M2 Together, they form the low-pass phase-shifting core of the LCL; the third inductor L2 and the turn-off equivalent capacitance C of the third switch M3 off_M3 Together (i.e., the equivalent capacitance when the third switch M3 is turned off) they form an LC parallel resonance in the reference state, forming a high-resistance node to ground in the operating frequency band in the reference state; the regulating switches M4, M4_2, M4_1, and M4_0 are parasitic amplitude-modulated MOS transistors in the phase-shifting state, among which the regulating switches M4_2, M4_1, and M4_0 are 3-bit adjustable amplitude-modulated MOS transistors, i.e., the 3-bit switch trim array contained in the dashed box.

[0038] Furthermore, when the phase-shifting circuit is in the reference state, both the first and second switches are in the on state, while the third switch and each regulating switch are in the off state. The third inductor and the equivalent capacitance of the turn-off corresponding to the third switch form a parallel resonance.

[0039] When the phase shift circuit is in the reference state (At low level) the first switch M1 and the second switch M2 are in the ON state, while the third switch M3 and each of the regulating switches M4, M4_2, M4_1, and M4_0 are in the OFF state. The first input signal is input from the input terminal VIN of the series attenuation module 10 and directly reaches the output terminal VOUT of the series attenuation module 10 through the first switch M1. In the reference state, although the second switch M2 is also in the ON state, the turn-off equivalent capacitance C of the third switch M3 is... off_M3The circuit forms a parallel resonance with the third inductor L2, resulting in high impedance to ground. Therefore, the path of the first input signal through the first inductor L11 → the second switch M2 → the third switch M3 is blocked, and the first input signal can only be output to the VOUT terminal from the first switch M1. The equivalent circuit diagram in the reference state is as follows: Figure 4 As shown, R on_M1 R on_M2 C represents the on-resistance of the first switching transistor M1 and the second switching transistor M2, respectively. off_M3 C is the turn-off equivalent capacitance of the third switching transistor M3. off_M4_0 R is the total equivalent turn-off capacitance of each regulating switch M4, M4_2, M4_1, and M4_0 in the reference state. on_M4_0 The total on-resistance of each regulating switch transistor M4, M4_2, M4_1, and M4_0 in the reference state. The first input signal passes through the on-resistance R of the first switch transistor M1. on_M1 Directly connected to the VOUT terminal, due to the on-resistance R of the first switching transistor M1 on_M1 The value is relatively small, therefore the insertion loss of the reference state is also relatively small, where:

[0040]

[0041] Among them, R on_M1 μ is the on-resistance of the first switching transistor M1; n For process parameters, specifically carrier mobility; C ox These are process parameters, specifically the capacitance per unit area of ​​the gate oxide layer. V is the aspect ratio of the first switching transistor M1. GS1 V is the gate-source voltage of the first switching transistor M1. TH This is the threshold voltage of the first switching transistor M1.

[0042] The turn-off equivalent capacitance C of the third switch M3 off_M3 It forms an LC parallel resonant structure with the third inductor L2, so

[0043]

[0044] Where f is the operating frequency, C off_M3 =C gd_M3 +C db_M3 C off_M3 C is the turn-off equivalent capacitance of the third switching transistor M3. gd_M3 C is the parasitic capacitance between the gate and drain of the third switching transistor M3. db_M3 This is the parasitic capacitance between the drain terminal of the third switching transistor M3 and the substrate.

[0045] Furthermore, when the phase-shifting circuit is in phase-shifting state, both the first and second switching transistors are in the off state, while the third and designated switching transistors are in the on state. Among the multiple regulating switching transistors, each regulating switching transistor except the designated switching transistor is either in the on or off state.

[0046] Specifically, when the phase-shifting circuit is in phase-shifting state, (At high level) the first switch M1 and the second switch M2 are in the off state, the third switch M3 and the designated switch M4 are in the on state, and the other adjustment switches M4_2, M4_1, and M4_0 can be turned on or off as needed; the equivalent circuit diagram in phase-shifted state is as follows. Figure 5 As shown, C off_M1 C off_M2 These are the turn-off equivalent capacitances of the first switching transistor M1 and the second switching transistor M2, respectively, R. on_M3 R is the on-resistance of the third switching transistor M3. on_M4_1 C off_M4_1 These are the total equivalent on-resistance and total equivalent off-resistance of each regulating switch M4, M4_2, M4_1, and M4_0 in the phase-shifted state, respectively.

[0047] The first inductor L11, the second inductor L12, and the turn-off equivalent capacitance C of the second switching transistor db_M2 Together, they form a low-pass LCL phase shifter. In this embodiment, the second inductor L12 and the first inductor L11 are designed with the same parameter values. Based on the low-pass structure analysis, the design parameters of the first inductor L11 and the first capacitor C1 are as follows:

[0048]

[0049] Where θ is the required phase shift, f is the operating frequency, and Z is the operating frequency. L For characteristic impedance, C off_M2 =C gd_M2 +C db_M2 C gd_M2 C is the parasitic capacitance between the gate and drain of the second switching transistor M2. db_M2 Let M2 be the parasitic capacitance between the drain terminal of switch M2 and the substrate. Therefore, we can obtain:

[0050]

[0051] At this time, R on_M4_1 C off_M4_1 Its value can be adjusted by controlling the switch array to match the R of the reference state. on_M2 C off_M4_0 Phase fit. Furthermore, the equivalent on-resistance R of the second switch M2 in the reference state. on_M2 The equivalent on-resistance R of the adjustment module 12 in the phase-shifted stateon_M4_1 Matching; adjusting the equivalent turn-off capacitance C of module 12 in the reference state off_M4_0 The equivalent turn-off capacitor C of the adjustment module 12 in the phase-shifting state off_M4_1 A better match. Ideally, the equivalent on-resistance R of the second switch M2 in the reference state should be minimized. on_M2 The equivalent on-resistance R of the adjustment module 12 in the phase-shifted state on_M4_1 Similarly, the equivalent turn-off capacitor C of the adjustment module 12 in the reference state off_M4_0 The equivalent turn-off capacitor C of the adjustment module 12 in the phase-shifting state off_M4_1 same.

[0052] Furthermore, the on-resistance and off-resistance of the MOS switch Mx (where X is an arbitrary MOS transistor) are:

[0053]

[0054] C off_Mx =C gd_Mx +·C db_Mx (Equation 7)

[0055] Therefore, R on_Max and C off_Mx These are all quantities related to process parameters, therefore R on_M4_1 With R on_M2 C off_M4_1 With C off_M4_0 It is also related to process parameters and has the same trend of change. Therefore, the amplitude modulation characteristics of the reference state and the phase-shifting state have the same trend of change, thus achieving small parasitic amplitude modulation and good flatness under process changes.

[0056] Figure 2 In the reference state, the first input signal flows directly from the VIN terminal to the VOUT terminal through the first switch M1. Theoretically, there is no interpolation phase, and due to the turn-off equivalent capacitance C of the third switch M3... off_M3 The first inductor L11 and the second inductor L12 form a parallel resonance with the third inductor L2, resulting in a smaller insertion loss in this structure. In the phase-shifted state, the first inductor L11, the second inductor L12, and the parallel first capacitor C1 and the turn-off equivalent capacitance C of the second switch M2 are... off_M2 Together, they form the low-pass phase shifter structure of the LCL, and the phase shift degree is the hysteresis phase shift of the LCL. Furthermore, in the phase-shifted state, the conduction and cutoff of the three regulating switches M4_2, M4_1, and M4_0 can be adjusted according to different frequency bands. With a reasonable combination of adjustments to the on-resistance and cutoff capacitor of the MOSFETs, the parasitic amplitude modulation of the phase shifter will have a small amplitude and good flatness within the ultra-wide frequency band, at different process angles, and at high and low temperatures.

[0057] The aforementioned phase-shifting circuit presents a low-parasitic amplitude modulation ultra-wideband phase shifter unit that is insensitive to process technology. Furthermore, it exhibits low insertion loss, power consumption, and area. The circuit structure is simple, flexible in adjustment, and insensitive to process technology and temperature variations. High-precision phase shifting over an ultra-wideband range can be achieved through simple capacitor, inductor, and MOS switch design, with low insertion loss and low power consumption. Moreover, the design of the phase-shifting transistor switch array makes the parasitic amplitude modulation of the phase shifter highly insensitive to process and temperature changes. This circuit design method is flexible and practical, enabling the control of more bit switch arrays and exhibiting high stability.

[0058] The present invention provides a phase-shifting circuit system, including any of the phase-shifting circuits described above.

[0059] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A phase-shifting circuit, characterized in that, The circuit includes: A series attenuation module has an input terminal, an output terminal, a first terminal, and a second terminal. The input terminal is used to receive a first input signal provided by an external circuit, and the output terminal outputs a first output signal. The first terminal of the series attenuation module is connected to a first control signal. A control module has a first terminal, a second terminal, a third terminal, and a fourth terminal. The first terminal of the control module is connected to the second terminal of the series attenuation module; the second terminal of the control module is grounded; the third terminal of the control module is connected to the first control signal; and the fourth terminal of the control module is connected to the second control signal; wherein the second control signal is the inverted signal of the first control signal. An adjustment module consisting of multiple parallel-connected adjustment switches has a first terminal, a second terminal, and multiple control terminals corresponding to the multiple adjustment switches. The first terminal of the adjustment module is connected to the first terminal of the control module, and the second terminal of the adjustment module is grounded. Each control terminal is connected to its corresponding third control signal, wherein the third control signal is either the first control signal or the second control signal. The adjustment module is used to adjust the parasitic amplitude modulation of the phase-shifting circuit by switching the multiple adjustment switches on and off. The series attenuation module includes: A first switching transistor has a first terminal, a second terminal, and a control terminal. The first terminal of the first switching transistor is connected to the input terminal of the series attenuation module, the second terminal of the first switching transistor is connected to the output terminal of the series attenuation module, and the control terminal of the first switching transistor is connected to a first control signal. A first inductor, the first end of which is connected to the first end of the first switching transistor, and the second end of which is connected to the second end of the series attenuation module; The second inductor has its first end connected to the second end of the series attenuation module and its second end connected to the second end of the first switching transistor.

2. The circuit according to claim 1, characterized in that, The control module includes: The second switch has a first terminal, a second terminal, and a control terminal. The first terminal of the second switch is connected to the second terminal of the series attenuation module, and the control terminal of the second switch is connected to the first control signal. A first capacitor, the first end of which is connected to the second end of the series attenuation module, and the second end of which is connected to the second end of the second switching transistor; The third switch has a first terminal, a second terminal, and a control terminal. The first terminal of the third switch is connected to the second terminal of the second switch, the second terminal of the third switch is grounded, and the control terminal of the third switch is connected to the second control signal. The third inductor has its first end connected to the first end of the third switching transistor, and its second end grounded.

3. The circuit according to claim 2, characterized in that, The circuit further includes: a control signal generation module; the control signal generation module includes: The fuse unit is used to receive a first instruction and output a first signal and multiple second signals according to the first instruction; wherein the number of signal bits of the multiple second signals is one less than the number of multiple regulating switch tubes in the regulating module; The first inverter is used to invert the first signal and output the first control signal. The second inverter is used to invert the first control signal and output the second control signal. An AND gate has a first input terminal, a second input terminal, and an output terminal. The first input terminal of the AND gate is connected to the second control signal, and the second input terminal of the AND gate is connected to multiple bits of the second signal. The AND gate is used to perform an AND operation between the second control signal and each bit of the second signal, and outputs a second signal after multi-bit operation. The second signal after multi-bit operation is used as the third control signal corresponding to each of the multiple regulating switches except for the designated switch; wherein, the third control signal corresponding to the designated switch is the second control signal.

4. The circuit according to claim 2, characterized in that, The first switch, the second switch, the third switch, and the plurality of regulating switches are all MOS switches.

5. The circuit according to claim 2, characterized in that, When the phase-shifting circuit is in the reference state, the first switch and the second switch are both in the on state, and the third switch and each of the adjustment switches are in the off state.

6. The circuit according to claim 3, characterized in that, When the phase-shifting circuit is in phase-shifting state, the first switch and the second switch are both in the off state, and the third switch and the designated switch are both in the on state. Among the plurality of adjustment switches, each adjustment switch except the designated switch is in the on state or the off state.

7. The circuit according to claim 2, characterized in that, When the phase-shifting circuit is in the reference state, the third inductor and the turn-off equivalent capacitance corresponding to the third switch form a parallel resonance.

8. The circuit according to claim 2, characterized in that, The equivalent on-resistance of the second switch in the reference state is matched with the equivalent on-resistance of the adjustment module in the phase-shifting state; The equivalent turn-off capacitance of the adjustment module in the reference state is matched with the equivalent turn-off capacitance of the adjustment module in the phase-shifting state.

9. A phase-shifting circuit system, characterized in that, Includes the phase-shifting circuit according to any one of claims 1-8.

Images