64-base LDPC decoding method and device for BeiDou-3 satellite signals

Abstract

Disclosed are a 64-bit LDPC decoding method and device for BeiDou-3 satellite signals. The implementation of each stage's operations is more rigorous and detailed, providing confidence vectors for check node updates and variable node updates, and the required finite field elements for final verification, making the decoding process easier to understand and implement. A permutation process is added before check node updates, a depermutation process is added before variable node updates, and a posteriori confidence calculation is performed before final verification. The posteriori LLR is calculated by adding the LLRs of two non-zero confidence vectors in the same column to the original LLRs and sorting them. The corresponding finite field element of the minimum LLR is the calculation result. The finite field element obtained from the posterior confidence calculation is finite field multiplied with the check matrix for verification.

Description

Technical Field

[0001] The present invention relates to the technical field of decoding methods, and in particular to a 64-base LDPC decoding method for BeiDou-3 satellite signals, and a 64-base LDPC decoding device for BeiDou-3 satellite signals. Background Art

[0002] Currently, CNAV1, CNAV2, and CNAV3 messages on the BeiDou-3 B1C, B2a, and B2b frequencies all use 64-bit LDPC (Low-Density Parity-Check) encoding. This is a linear block code based on a sparse parity check matrix that combines information bits with check bits to form a codeword via a generator matrix. It is widely used in communications. 64-bit LDPC codes have a longer girth than binary LDPC codes, resulting in better error correction capabilities. Furthermore, 64-bit LDPC codes convert 6 bits into one symbol, making them highly robust against burst errors and particularly suitable for high-speed information transmission systems. However, the entire 64-bit LDPC decoding process is complex and cumbersome, making it difficult to implement and challenging to identify the causes of decoding failures. Summary of the Invention

[0003] To overcome the defects of the prior art, the technical problem to be solved by the present invention is to provide a 64-ary LDPC decoding method for BeiDou-3 satellite signals. The implementation of the operations in each stage is more rigorous and detailed, and confidence vectors are provided for the update of check nodes and variable nodes, and the required finite field elements are provided for the final verification, making the decoding process easier to understand and implement.

[0004] The technical solution of the present invention is: a 64-ary LDPC decoding method for BeiDou-3 satellite signals, comprising the following steps:

[0005] (1) Verify the node. If the verification result is 0, execute step (9); otherwise, execute step (2).

[0006] (2) Add a permutation process, perform finite field multiplication on the finite field elements and the elements of H_element(row, col) to provide a confidence vector for the subsequent check node update;

[0007] (3) Verification node update;

[0008] (4) Add an inverse permutation process, perform finite field multiplication on the finite field element and the inverse element of H_element(row, col) to provide a confidence vector for the subsequent variable node update;

[0009] (5) Variable node update;

[0010] (6) Perform a posteriori confidence calculation. The input is the updated data of the check node. The posteriori LLR is the LLR of the two non-zero confidence vectors in the same column and the original LLR, and then sorted. The corresponding finite field element of the minimum LLR is the calculation result. The finite field element obtained by the posterior confidence calculation is multiplied by the check matrix for finite field verification.

[0011] (7) Verify the node. If the verification result is 0, execute step (9); otherwise, execute step (8).

[0012] (8) Determine whether the maximum number of iterations has been reached. If so, execute step (9); otherwise, execute step (4).

[0013] (9) End decoding and output the decoding success or failure flag.

[0014] The beneficial technical effects of the present invention are as follows:

[0015] 1. Ability to provide confidence vectors for check node updates and variable node updates in advance, facilitating subsequent decoding processes;

[0016] 2. Compared with the previous 64-bit LDPC decoding process, the decoding implementation rules are clearer and more complete;

[0017] 3. It is convenient to locate and verify the decoding failure factors that occur during the decoding process.

[0018] A 64-base LDPC decoding device for BeiDou-3 satellite signals is also provided, comprising:

[0019] Initial verification module, which is configured to verify the node;

[0020] The permutation module is configured to add a permutation process, where the finite field elements are multiplied by the elements of H_element(row, col) to provide the confidence vector for the subsequent check node update;

[0021] a first update module configured to update a check node;

[0022] The inverse permutation module is configured to add an inverse permutation process, where the finite field element is multiplied by the inverse element of H_element(row, col) to provide a confidence vector for the subsequent variable node update;

[0023] a second update module configured to update the variable node update;

[0024] A posterior confidence calculation module is configured to perform posterior confidence calculation. The input is the updated data of the check node. The posterior LLR is the LLR of the two non-zero confidence vectors in the same column and the original LLR are added and sorted. The corresponding finite field element of the minimum LLR is the calculation result. The finite field element obtained by the posterior confidence calculation is multiplied by the check matrix for finite field verification.

[0025] The final verification module is configured to verify the node;

[0026] Iteration judgment module, which is configured to judge whether the maximum number of iterations has been reached. If it has been reached, the output module will be executed; otherwise, the reverse permutation module will be executed;

[0027] The output module is configured to end decoding and output a flag indicating whether the decoding is successful or not. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 The figure is a flow chart of a 64-ary LDPC decoding method for BeiDou-3 satellite signals according to the present invention.

[0029] Figure 2 A row of a Q matrix according to the present invention is shown.

[0030] Figure 3 Schematic diagram of the calculation of the posterior confidence according to the present invention.

[0031] Figure 4 This is a flowchart of the first verification according to the present invention.

[0032] Figure 5 is a flow chart of check node updating according to the present invention.

[0033] Figure 6 is a variable node update flow chart according to the present invention. DETAILED DESCRIPTION

[0034] like Figure 1 As shown, the 64-ary LDPC decoding method of the BeiDou-3 satellite signal comprises the following steps:

[0035] (1) Verify the node. If the verification result is 0, execute step (9); otherwise, execute step (2).

[0036] (2) Add a permutation process, perform finite field multiplication on the finite field elements and the elements of H_element(row, col) to provide a confidence vector for the subsequent check node update;

[0037] (3) Verification node update;

[0038] (4) Add an inverse permutation process, perform finite field multiplication on the finite field element and the inverse element of H_element(row, col) to provide a confidence vector for the subsequent variable node update;

[0039] (5) Variable node update;

[0040] (6) Perform posterior confidence calculation (e.g. Figure 3 As shown in the figure, the input is the updated data of the check node. The posterior LLR is the sum of the LLRs of the two non-zero confidence vectors in the same column and the original LLRs, and then sorted. The corresponding finite field element of the minimum LLR is the calculation result. The finite field element obtained by the posterior confidence calculation is multiplied by the check matrix for finite field verification.

[0041] (7) Verify the node. If the verification result is 0, execute step (9); otherwise, execute step (8).

[0042] (8) Determine whether the maximum number of iterations has been reached. If so, execute step (9); otherwise, execute step (4).

[0043] (9) End decoding and output the decoding success or failure flag.

[0044] The beneficial technical effects of the present invention are as follows:

[0045] 1. Ability to provide confidence vectors for check node updates and variable node updates in advance, facilitating subsequent decoding processes;

[0046] 2. Compared with the previous 64-bit LDPC decoding process, the decoding implementation rules are clearer and more complete;

[0047] 3. It is convenient to locate and verify the decoding failure factors that occur during the decoding process.

[0048] Preferably, if Figure 4 As shown, in step (1), the first check is to make a hard decision on the quantized data and perform finite field multiplication and addition with the non-zero elements of the check matrix H. If the final result is 0, it means that the check is passed, otherwise it is iterated. The quantization data is completed by software. The check matrix consists of the column position of the non-zero elements in each row and the values ​​of the non-zero elements The two matrices are stored separately. You can get the row position matrix of non-zero elements in each column . example , , indicating that the column numbers of the non-zero elements in the first row of the H matrix are 11, 62, 102, 150 (column numbers start from 0), and the values ​​of the non-zero elements are finite field elements 35, 13, 51, 60 respectively. It means that the row numbers of the first column of the H-th matrix are the first non-zero element in the 50th row and the first non-zero element in the 66th row respectively.

[0049] Preferably, in step (2), according to the received symbol vector corresponding to each codeword symbol Calculate its confidence vector ; All q finite field elements and its corresponding log-likelihood ratio LLR(x) together form the confidence vector , where the vector No. The element is Finite field symbols and its LLR value composition, ; Confidence vector Finite field elements in The log-likelihood ratio is: , let directly receive the symbol The elements obtained by making hard decisions bit by bit are , finite field elements and The corresponding bit sequences are and , XOR ; Calculate 64 After that, 64 Sort from small to large and take the first 8 after sorting and its corresponding finite field elements Constructing the truncated confidence vector .

[0050] Preferably, in step (2), let j = H_index(row, col), The 8 finite field elements of H_element(row, col) are multiplied by the finite field to obtain new finite field elements , , each row of H_index has 4 elements. After one row is permuted, 4 confidence vectors are obtained.

[0051] Preferably, if Figure 2 、 Figure 5 As shown, in step (3), the check node update is the update of the Q matrix elements. There are 4 confidence vectors in each row, and each vector is updated by the other 3 vectors. The update rules are as follows:

[0052] Assume that the input confidence vectors are and , the output confidence vector is ,in are 8 LLR vectors arranged in ascending order, is the corresponding finite field element vector, and the size is constructed according to the input confidence vector The confidence matrix and the finite field element matrix , and The calculation formula is:

[0053] ,

[0054] ,

[0055] in, , is finite field addition.

[0056] Preferably, in step (4), let j = H_index(row, col), and the inverse elements of the 8 finite field elements of each confidence vector after the Q matrix is ​​updated and H_element(row, col) Perform finite field multiplication respectively, where .

[0057] Preferably, the following steps are performed before step (1): quantization, hard decision, and finite field multiplication with a check matrix.

[0058] Preferably, if Figure 6 As shown, in step (5), the check node update is a row update process, while the variable node update is a column update process. Since each column of the check matrix has only two non-zero vectors. Each column of non-zero vectors is saved in For example: = [50 0 66 0], indicating that the first column of non-zero vectors is The indices in are the 0th value in row 50 and the 0th value in row 66. After the check node is updated, the confidence vector consists of 8 elements. The 8 LLRs after the check node update need to be expanded to 64 LLRs. The LLRs of the 8 finite field elements are the check node update results, and the LLRs of the remaining 56 finite field elements are the LLR of the last element after the check node update plus a constant. After obtaining the 64 finite field elements and their corresponding LLRs, the LLR of another variable node's confidence is added to the original LLR. The LLRs are then sorted from smallest to largest. The first 8 LLRs and their corresponding finite field elements are used as the updated confidence results for this variable node. This is the data required for the next check node update.

[0059] Those skilled in the art will appreciate that all or part of the steps in the above-described method can be implemented by instructing the relevant hardware through a program. The program can be stored in a computer-readable storage medium. When executed, the program includes the steps of the above-described method. The storage medium can be ROM / RAM, a magnetic disk, an optical disk, a memory card, etc. Therefore, corresponding to the method of the present invention, the present invention also includes a 64-bit LDPC decoding device for Beidou-3 satellite signals. The device is generally represented in the form of functional modules corresponding to the steps of the method. The device includes:

[0060] Initial verification module, which is configured to verify the node;

[0061] The permutation module is configured to add a permutation process, where the finite field elements are multiplied by the elements of H_element(row, col) to provide the confidence vector for the subsequent check node update;

[0062] a first update module configured to update a check node;

[0063] The inverse permutation module is configured to add an inverse permutation process, where the finite field element is multiplied by the inverse element of H_element(row, col) to provide a confidence vector for the subsequent variable node update;

[0064] a second update module configured to update the variable node update;

[0065] A posterior confidence calculation module is configured to perform posterior confidence calculation. The input is the updated data of the check node. The posterior LLR is the LLR of the two non-zero confidence vectors in the same column and the original LLR are added and sorted. The corresponding finite field element of the minimum LLR is the calculation result. The finite field element obtained by the posterior confidence calculation is multiplied by the check matrix for finite field verification.

[0066] The final verification module is configured to verify the node;

[0067] Iteration judgment module, which is configured to judge whether the maximum number of iterations has been reached. If it has been reached, the output module will be executed; otherwise, the reverse permutation module will be executed;

[0068] The output module is configured to end decoding and output a flag indicating whether the decoding is successful or not.

[0069] Preferably, in the replacement module, the received symbol vector corresponding to each codeword symbol is Calculate its confidence vector ; All q finite field elements and its corresponding log-likelihood ratio LLR(x) together form the confidence vector , where the vector No. The element is Finite field symbols and its LLR value composition, ; Confidence vector Finite field elements in The log-likelihood ratio is: , let directly receive the symbol The elements obtained by making hard decisions bit by bit are , finite field elements and The corresponding bit sequences are and , XOR ;

[0070] Calculated 64 After that, 64 Sort from small to large and take the first 8 after sorting and its corresponding finite field elements Constructing the truncated confidence vector .

[0071] Preferably, in the replacement module, let j = H_index(row, col), The 8 finite field elements of H_element(row, col) are multiplied by the finite field to obtain new finite field elements , , each row of H_index has 4 elements. After one row is permuted, 4 confidence vectors are obtained.

[0072] Preferably, in the inverse permutation module, let j = H_index(row, col), and the 8 finite field elements of each confidence vector after the Q matrix is ​​updated and the inverse element of H_element(row, col) Perform finite field multiplication respectively, where .

[0073] Preferably, the initial check module previously performs: quantization, hard decision, and finite field multiplication with a check matrix.

[0074] The above description is merely a preferred embodiment of the present invention and does not constitute any form of limitation to the present invention. Any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention are still within the scope of protection of the technical solution of the present invention.

Claims

1. A 64-base LDPC decoding method for BeiDou-3 satellite signals, characterized by: It includes the following steps: (1) Verify the node. If the verification result is 0, execute step (9); otherwise, execute step (2). (2) Add a permutation process, perform finite field multiplication on the finite field elements and the elements of H_element(row, col) to provide a confidence vector for the subsequent check node update; (3) Check node update: update the row elements of the check matrix. Each row has 4 confidence vectors, and each vector is updated by the other 3 vectors. (4) Add an inverse permutation process, perform finite field multiplication on the finite field element and the inverse element of H_element(row, col) to provide a confidence vector for the subsequent variable node update; (5) Update the variable nodes and update the column elements of the check matrix; (6) Perform a posteriori confidence calculation. The input is the updated data of the check node. The posteriori LLR is the LLR of the two non-zero confidence vectors in the same column and the original LLR, and then sorted. The corresponding finite field element of the minimum LLR is the calculation result. The finite field element obtained by the posterior confidence calculation is multiplied by the check matrix for finite field verification. (7) Verify the node. If the verification result is 0, execute step (9); otherwise, execute step (8). (8) Determine whether the maximum number of iterations has been reached. If so, execute step (9); otherwise, execute step (2). (9) End decoding and output the decoding success or failure flag.

2. The 64-base LDPC decoding method for BeiDou-3 satellite signals according to claim 1, wherein: In step (2), according to the received symbol vector corresponding to each codeword symbol Calculate its confidence vector ; All q finite field elements and its corresponding log-likelihood ratio LLR(x) together form the confidence vector , where the vector No. The element is Finite field symbols and its LLR value composition, ; Confidence vector Finite field elements in The log-likelihood ratio is: , let directly receive the symbol The elements obtained by making hard decisions bit by bit are , finite field elements and The corresponding bit sequences are and , XOR ; Calculated 64 After that, 64 Sort from small to large and take the first 8 after sorting and its corresponding finite field elements Constructing the truncated confidence vector .

3. The 64-base LDPC decoding method for BeiDou-3 satellite signals according to claim 2, wherein: In step (2), let j = H_index(row, col), The 8 finite field elements of H_element(row, col) are multiplied by the finite field to obtain new finite field elements , , each row of H_index has 4 elements. After one row is permuted, 4 confidence vectors are obtained.

4. The 64-base LDPC decoding method for BeiDou-3 satellite signals according to claim 3, wherein: In step (4), let j = H_index(row, col), and the inverse elements of the 8 finite field elements of each confidence vector after the Q matrix is ​​updated and H_element(row, col) Perform finite field multiplication respectively, where .

5. The 64-base LDPC decoding method for BeiDou-3 satellite signals according to claim 1, wherein: The following are performed before step (1): quantization, hard decision, and finite field multiplication with the check matrix.

6. A 64-ary LDPC decoding device for BeiDou-3 satellite signals, configured to implement the 64-ary LDPC decoding method for BeiDou-3 satellite signals according to claim 1, characterized in that: It includes: Initial verification module, which is configured to verify the node; The permutation module is configured to add a permutation process, where the finite field elements are multiplied by the elements of H_element(row, col) to provide the confidence vector for the subsequent check node update; a first update module configured to update a check node; The inverse permutation module is configured to add an inverse permutation process, where the finite field element is multiplied by the inverse element of H_element(row, col) to provide a confidence vector for the subsequent variable node update; a second update module configured to update the variable node update; A posterior confidence calculation module is configured to perform posterior confidence calculation. The input is the updated data of the check node. The posterior LLR is the LLR of the two non-zero confidence vectors in the same column and the original LLR are added and sorted. The corresponding finite field element of the minimum LLR is the calculation result. The finite field element obtained by the posterior confidence calculation is multiplied by the check matrix for finite field verification. The final verification module is configured to verify the node; Iteration judgment module, which is configured to judge whether the maximum number of iterations has been reached. If it has been reached, the output module will be executed; otherwise, the reverse permutation module will be executed; The output module is configured to end decoding and output a flag indicating whether the decoding is successful or not.

7. The 64-ary LDPC decoding device for BeiDou-3 satellite signals according to claim 6, characterized in that: In the replacement module, the received symbol vector corresponding to each codeword symbol is Calculate its confidence vector ; All q finite field elements and its corresponding log-likelihood ratio LLR(x) together form the confidence vector , where the vector No. The element is Finite field symbols and its LLR value composition, ; Confidence vector Finite field elements in The log-likelihood ratio is: , let directly receive the symbol The elements obtained by making hard decisions bit by bit are , finite field elements and The corresponding bit sequences are and , XOR ; Calculated 64 After that, 64 Sort from small to large and take the first 8 after sorting and its corresponding finite field elements Constructing the truncated confidence vector .

8. The 64-ary LDPC decoding device for BeiDou-3 satellite signals according to claim 7, wherein: In the replacement module, let j = H_index(row, col), The 8 finite field elements of H_element(row, col) are multiplied by the finite field to obtain new finite field elements , , each row of H_index has 4 elements. After one row is permuted, 4 confidence vectors are obtained.

9. The 64-ary LDPC decoding device for BeiDou-3 satellite signals according to claim 8, characterized in that: In the reverse permutation module, let j = H_index(row, col), and the inverse elements of the 8 finite field elements of each confidence vector after the Q matrix is ​​updated and H_element(row, col) Perform finite field multiplication respectively, where .

10. The 64-ary LDPC decoding device for BeiDou-3 satellite signals according to claim 6, characterized in that: The initial check module previously performs: quantization, hard decision, and finite field multiplication with the check matrix.

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