A parallel hierarchical exhaustive-based variable routing matrix online fast self-checking method

Abstract

The application belongs to the technical field of testability design of large-scale full switching matrix, and relates to an online fast self-checking method of variable routing matrix based on parallel hierarchical exhaustion. 2 For MxM board card cascade M 2 Matrix, by using the characteristics of large-scale card matrix layered switching, fixing the 2-layer switching relationship in 3-layer switching board card, synchronously and parallelly routing and exhausting 1-layer M switching board card, based on the common model, eliminating the redundant fault channels, the fault switching board card can be quickly obtained, and the power division + switch channel and the common end can be located, the problem of long time consumption of large-scale card matrix full routing self-checking is solved, the time of signal interruption due to self-checking is greatly shortened, and the inspection efficiency of large-scale card matrix is greatly improved.

Description

TECHNICAL FIELD

[0001] The present application belongs to the field of testability design of large-scale full switching matrix, and particularly relates to an online fast self-checking method for variable routing matrix based on parallel hierarchical exhaustion. BACKGROUND

[0002] The large-scale matrix of variable routing is composed of dozens of matrix board cards, and any channel failure of an arbitrary matrix board card can lead to matrix channel failure. Since the routing is variable, there are multiple routes from input to output. When performing online self-checking, each route selected by each channel needs to be self-checked once to ensure that the matrix has no failure.

[0003] For an M 2 ×M 2 matrix with M 2 ×M 2 channel selection, each channel selection has M routes, and a total of M 2 × M 2 ×M times of self-checking is required. If the self-checking time is 10 seconds, M 2 × M 2 ×M × 10 seconds are required. Even if M 2 channels are established for parallel self-checking in one time, M 2 ×M × 10 seconds are also required.

[0004] Table 1: Time required for self-checking of variable routing matrix under different board card scales and matrix scales

[0005]

[0006] Referring to the above table, even in the parallel mode, the self-checking of a 256 ×256 matrix composed of 16

[0007] ×16 board cards requires 11.37 hours, and the self-checking of a 64 ×64 matrix composed of 8 ×8 board cards requires 1.58 hours.

[0008] Therefore, how to realize online fast self-checking of variable routing matrix based on parallel hierarchical exhaustion, solve the problem of long time consumption of full routing self-checking of large-scale card matrix, greatly shorten the time of signal interruption due to self-checking, and greatly improve the inspection efficiency and fault positioning capability of large-scale card matrix are technical problems that need to be solved at present. SUMMARY

[0009] The present application aims to provide an online fast self-checking method for variable routing matrix based on parallel hierarchical exhaustion, to solve the problem of long time consumption of full routing self-checking of large-scale card matrix, greatly shorten the time of signal interruption due to self-checking, and greatly improve the inspection efficiency and fault positioning capability of large-scale card matrix.To solve the above technical problems, the technical scheme adopted by the present application is as follows:

[0010] A variable routing matrix online fast self-checking method based on parallel hierarchical exhaustion, comprising the following steps:

[0011] S1: configure the bridge and output switch board card as straight through, and divide the input switch board card into M times of synchronous exhaustion of M*M exchange relations, and perform M times of parallel self-checking;

[0012] S2: configure the input and output switch board cards as straight through, and divide the bridge switch board card into M times of synchronous exhaustion of M*M exchange relations, and perform M times of parallel self-checking;

[0013] S3: configure the input and bridge switch board cards as straight through, and divide the output switch board card into M times of synchronous exhaustion of M*M exchange relations, and perform M times of parallel self-checking;

[0014] S4: based on the common link model, eliminate redundant fault channels, and locate the fault to the board card and the routing.

[0015] Preferably, the specific process of configuring the bridge and output switch board cards as straight through, and dividing the input switch board card into M times of synchronous exhaustion of M*M exchange relations, and performing M times of parallel self-checking in step S1 is as follows:

[0016] S11: configure the exchange relation of the bridge switch board card QJ and the output switch board card SC as straight through, and the array is represented as follows:

[0017] QJ OUT (m, j) = QJ IN (m, i);

[0018] SC OUT (m, j) = SC IN (m, i);

[0019] Wherein:

[0020] m is the board card serial number, m = 1, 2, …, M;

[0021] j is the output channel number, j = 1, 2, …, M;

[0022] i is the input channel number, i = j;

[0023] OUT is output, and IN is input;

[0024] S12: divide the M*M exchange relations of the input switch board card SR into M times:

[0025] SR OUT (m, j) = SR IN (m, i);

[0026] Wherein:

[0027] m is the card number, m = 1, 2, …, M;

[0028] j is the output channel number, j = 1, 2, …, M;

[0029] i is the input channel number, i = k;

[0030] k is the input switching card SR self-checking sequence number, k = 1, 2, …, M;

[0031] OUT is output, IN is input;

[0032] S13: M times in parallel, self-check M*M channels, and record the output switching card self-checking results SR Check (m, j, i) array:

[0033] ;

[0034] Wherein:

[0035] m is the card number, m = 1, 2, …, M;

[0036] j is the output channel number, j = 1, 2, …, M;

[0037] i is the input channel number, i = 1, 2, …, M;

[0038] OUT is output, IN is input, and Check is self-checking.

[0039] Preferably, the specific process of configuring the input and output switching cards as straight-through in step S2, and the bridge switching card is synchronized to exhaust M*M switching relationships for M times, and self-checking for M times in parallel is as follows:

[0040] S21: Configure the switching relationship of the input switching card SR and the output switching card SC as straight-through, and the array is represented as follows:

[0041] SR OUT (m, j) = SR IN (m, i);

[0042] SC OUT (m, j) = SC IN (m, i);

[0043] Wherein:

[0044] m is the card number, m = 1, 2, …, M;

[0045] j is the output channel number, j = 1, 2, …, M;

[0046] i is the input channel number, i = j;

[0047] OUT is output, IN is input;

[0048] S22: Divide M times, configure M*M switching relations of bridge switching board card QJ:

[0049] QJ OUT (m, j) = QJ IN (m, i);

[0050] Wherein:

[0051] m is the board card serial number, m = 1, 2, …, M;

[0052] j is the output channel number, j = 1, 2, …, M;

[0053] i is the input channel number, i = k;

[0054] k is the self-checking sequence number of bridge switching board card QJ, k = 1, 2, …, M;

[0055] OUT is output, IN is input;

[0056] S23: Divide M times, self-check M*M channels in parallel, and record the self-checking results of bridge switching board card QJ Check (m, j, i) array:

[0057] ;

[0058] Wherein:

[0059] m is the board card serial number, m = 1, 2, …, M;

[0060] j is the output channel number, j = 1, 2, …, M;

[0061] i is the input channel number, i = 1, 2, …, M;

[0062] OUT is output, IN is input, and Check is self-checking.

[0063] Preferably, the specific process of configuring the input and bridge switching board card as pass-through in step S3, output switching board card divides M times to synchronize M*M switching relations, and parallel self-checks M times as follows:

[0064] S31: Configure the switching relation of input switching board card SR and bridge switching board card QJ as pass-through, and the array is represented as follows:

[0065] SR OUT (m, j) = SR IN (m, i);

[0066] QJ OUT (m, j) = QJ IN(m, i);

[0067] wherein:

[0068] m is the board card serial number, m = 1, 2, …, M;

[0069] j is the output channel number, j = 1, 2, …, M;

[0070] i is the input channel number, i = j;

[0071] OUT is output, IN is input;

[0072] S32: divide M times, configure M*M switching relations of the output switching board card SC:

[0073] SC OUT (m, j) = SC IN (m, i);

[0074] wherein:

[0075] m is the board card serial number, m = 1, 2, …, M;

[0076] j is the output channel number, j = 1, 2, …, M;

[0077] i is the input channel number, i = k;

[0078] k is the self-checking serial number of the output switching board card SC, k = 1, 2, …, M;

[0079] OUT is output, IN is input;

[0080] S33: divide M times, self-check M*M channels in parallel, and record the self-checking results SC of the output switching board card Check (m, j, i) array:

[0081] ;

[0082] wherein:

[0083] m is the board card serial number, m = 1, 2, …, M;

[0084] j is the output channel number, j = 1, 2, …, M;

[0085] i is the input channel number, i = 1, 2, …, M;

[0086] OUT is output, IN is input, and Check is self-checking.

[0087] Preferably, in step S4, based on the common link model, the redundant fault channel is removed, and the specific process of fault positioning to the board card and channel routing is as follows:

[0088] S41: If the front-stage pass-through channel fails, eliminate the following M failures and set as self-check passed:

[0089] If , where j = 1, 2, …, M, and the pass-through channel corresponding to the input board card SR connected with the input i fails, then

[0090] , where i = 1, 2, …, M;

[0091] If , where j = 1, 2, …, M, and the pass-through channel corresponding to the input board card SR connected with the input i fails, then

[0092] , where i = 1, 2, …, M;

[0093] S42: If the rear-stage pass-through channel fails, eliminate the following M failures and set as self-check passed:

[0094] If , where i = 1, 2, …, M, and the pass-through channel corresponding to the output board card SC connected with the output j fails, then

[0095] , where i = 1, 2, …, M;

[0096] If , where i = 1, 2, …, M, and the pass-through channel corresponding to the output board card SC connected with the output j fails, then

[0097] , where i = 1, 2, …, M;

[0098] S43: Failure location summary;

[0099] On the basis of step S41 and step S42, in the input switch board card self-check result SR Check (m, j, i), the bridge switch board card self-check result QJ Check (m, j, i), and the output switch board card self-check result SC Check (m, j, i) array, search for the m, j and i corresponding to the field with the value 0;

[0100] That is, the board card with the sequence number m in the input switch board card, the input channel i and the output channel j self-check do not pass;

[0101] That is, the board card with the sequence number m in the bridge switch board card and the output switch board card SC, the input channel i and the output channel j self-check do not pass.

[0102] Namely, the output exchange board card with the serial number m, the input channel i and the output channel j fail to pass the self-check.

[0103] The beneficial effects of the present application include:

[0104] The online fast self-checking method of the variable routing matrix based on parallel hierarchical exhaustion provided by the present application fixes the 2-layer exchange relationship in the 3-layer exchange board card, synchronously and parallelly exhaustively checks the routing of each board card in the 1-layer, and sequentially synchronously and parallelly exhaustively checks the routing of the 3-layer board card. Based on the common model, the redundant failure channels are removed, the self-checking conclusion can be located to the board card level, the switch channel level and the common end, the problem of long time consumption of the full routing self-checking of the large-scale plug-in card matrix is solved, the time of signal interruption due to self-checking is greatly shortened, and the inspection efficiency and the fault positioning capability of the large-scale plug-in card matrix are greatly improved. BRIEF DESCRIPTION OF DRAWINGS

[0105] Figure 1 The flowchart of the online fast self-checking method of the variable routing matrix based on parallel hierarchical exhaustion of the present application.

[0106] Figure 2 The self-checking diagram of the input exchange board card of the present application;

[0107] Figure 3 The self-checking diagram of the bridge exchange board card of the present application;

[0108] Figure 4 The self-checking diagram of the output exchange board card of the present application;

[0109] Figure 5 The self-checking result redundancy diagram under the front-stage straight-through failure of the present application;

[0110] Figure 6 The self-checking result redundancy diagram under the rear-stage straight-through failure of the present application. DETAILED DESCRIPTION

[0111] The following will be further illustrated in combination with the accompanying Figures 1-6 The present application will be further illustrated in detail:

[0112] Example 1

[0113] Referring to the accompanying Figure 1 The online fast self-checking method of the variable routing matrix based on parallel hierarchical exhaustion, a kind of online fast self-checking method of variable routing matrix based on parallel hierarchical exhaustion, including the following steps:

[0114] S1: configure the bridge and output switch board card as pass-through, the input switch board card is divided into M times of synchronous exhaustive M*M switch relations, and M times of parallel self-checking are performed;

[0115] S2: configure the input and output switch board card as pass-through, the bridge switch board card is divided into M times of synchronous exhaustive M*M switch relations, and M times of parallel self-checking are performed;

[0116] S3: configure the input and bridge switch board card as pass-through, the output switch board card is divided into M times of synchronous exhaustive M*M switch relations, and M times of parallel self-checking are performed;

[0117] S4: based on the common link model, the redundant fault channel is removed, and the fault is located to the board card and the pass-through route.

[0118] In the prior art, a large-scale variable routing matrix is composed of dozens of matrix board cards, and 1 channel fault of any matrix board card can cause matrix channel failure. Since the routing is variable, there are multiple routes from input to output. When online self-checking, each route selected by each channel needs to be checked once to ensure that the matrix has no fault. For M 2 ×M 2 matrix, there are M 2 * M 2 channel selections, each channel selection has M routes, and a total of M 2 *M 2 *M times of self-checking are required. If the self-checking time is 10 seconds, M 2 *M 2 *M*10 seconds are required. Even if 1 time of self-checking establishes M 2 channel parallel self-checking, M 2 *M*10 seconds are also required. The present application utilizes the hierarchical switching of large-scale cascaded matrices, and divides the routes into three levels according to input switching, bridge switching and output switching. Each level plans M kinds of route combinations (covering all channel selection relations of the matrix board cards at each level), and M 2 channels are checked in parallel each time, a total of M*3 times of self-checking are required, and only M*3*10 seconds are required if the self-checking time is 10 seconds.

[0119] Table 2 Time required for online fast self-checking of variable routing matrix by parallel hierarchical exhaustive of different board card scales and matrix scales

[0120]

[0121] Referring to Table 2, the time required for the variable routing matrix online fast self-checking in parallel hierarchical enumeration under different board card scales and matrix scales, it can be seen that the 256*256 matrix self-checking only needs 8 minutes, which is 20,000th of the original serial mode, and is 80th of the original parallel mode, solving the problem of long time consumption of large-scale card matrix full routing self-checking, greatly shortening the time of signal interruption due to self-checking, and greatly improving the inspection efficiency and fault positioning ability of large-scale card matrix.

[0122] Embodiment 2

[0123] Referring to FIG. 2, in step S1, the bridge and output switching board card is configured as pass-through, and the input switching board card is divided into M times of synchronous enumeration of M*M switching relationships, and the specific process of M times of parallel self-checking is as follows: Figure 2

[0124] S11: Configure the switching relationship of the bridge switching board card QJ and the output switching board card SC as pass-through, and the array is represented as follows:

[0125] QJ OUT (m, j) = QJ IN (m, i);

[0126] SC OUT (m, j) = SC IN (m, i);

[0127] Wherein:

[0128] m is the board card number, m = 1, 2, …, M;

[0129] j is the output channel number, j = 1, 2, …, M;

[0130] i is the input channel number, i = j;

[0131] OUT is output, and IN is input.

[0132] Taking an 8*8 board card as an example, the configuration matrix QJJH and SCJH of the bridge switching board card and the output switching board card is:

[0133] ;

[0134] S12: Divide M times, and configure M*M switching relationships of the input switching board card SR:

[0135] SR OUT (m, j) = SR IN (m, i);

[0136] Wherein:

[0137] m is the board card number, m = 1, 2, …, M;​

[0138] j is the output channel number, j = 1, 2, …, M;

[0139] i is the input channel number, i = k;

[0140] k is the input switch board card SR self-checking sequence number, k = 1, 2, …, M;

[0141] OUT is output, IN is input.

[0142] Taking an 8*8 board card as an example, the 8-time configuration matrix SRJH of the input switch board card is as follows in sequence:

[0143]

[0144]

[0145] …

[0146]

[0147] S13: divide M times, parallel self-check M*M channels, and record the output switch board card self-checking result SR Check (m, j, i) array:

[0148]

[0149] Among them:

[0150] m is the board card sequence number, m = 1, 2, …, M;

[0151] j is the output channel number, j = 1, 2, …, M;

[0152] i is the input channel number, i = 1, 2, …, M;

[0153] OUT is output, IN is input, and Check is self-checking.

[0154] Example 3

[0155] Referring to the accompanying Figure 3 As shown in the figure, in step S2, the input and output switch board cards are configured as straight-through, and the bridge switch board card is divided into M times of synchronous exhaustive M*M switch relations, and the specific process of parallel self-checking M times is as follows:

[0156] S21: configure the switch relation of the input switch board card SR and the output switch board card SC as straight-through, and the array is represented as follows:

[0157] SR OUT (m, j) = SR IN (m, i);

[0158] SC​​​​OUT (m, j) = SC IN (m, i);

[0159] wherein:

[0160] m is the board card serial number, m = 1, 2, …, M;

[0161] j is the output channel number, j = 1, 2, …, M;

[0162] i is the input channel number, i = j;

[0163] OUT is output, and IN is input.

[0164] Taking an 8*8 board card as an example, the configuration matrix SRH and SCJH of the input switching board card and the output switching board card are as follows:

[0165] ;

[0166] S22: configuring M*M switching relations of the bridge switching board card QJ in M times:

[0167] QJ OUT (m, j) = QJ IN (m, i);

[0168] wherein:

[0169] m is the board card serial number, m = 1, 2, …, M;

[0170] j is the output channel number, j = 1, 2, …, M;

[0171] i is the input channel number, i = k;

[0172] k is the self-checking serial number of the bridge switching board card QJ, k = 1, 2, …, M;

[0173] OUT is output, and IN is input.

[0174] Taking an 8*8 board card as an example, the 8-time configuration matrix QJJH of the bridge switching board card is as follows:

[0175] ;

[0176] ;

[0177] …

[0178] ;

[0179] S23: self-checking M*M channels in M times in parallel, and recording the self-checking result QJ of the bridge switching board card Check (m, j, i) array:

[0180] ;

[0181] in:

[0182] m is the board serial number, m = 1, 2, ..., M;

[0183] j is the output channel number, j=1, 2, ..., M;

[0184] i is the input channel number, i = 1, 2, ..., M;

[0185] OUT is output, IN is input, and Check is self-test.

[0186] Example 4

[0187] See appendix Figure 4 As shown, in step S3, the input and bridging switching boards are configured as pass-through, and the output switching board synchronously exhaustively enumerates M*M switching relationships in M ​​steps, and performs parallel self-tests M times. The specific process is as follows:

[0188] S31: Configure the switching relationship between the input switching board SR and the bridge switching board QJ as pass-through, represented by the following array:

[0189] SR OUT (m, j) = SR IN (m, i);

[0190] QJ OUT (m, j) = QJ IN (m, i);

[0191] in:

[0192] m is the board serial number, m = 1, 2, ..., M;

[0193] j is the output channel number, j=1, 2, ..., M;

[0194] i is the input channel number, i=j;

[0195] OUT is for output, and IN is for input.

[0196] Taking an 8×8 board as an example, the configuration matrices SRJH and QJJH for the input switching board and the bridge switching board are:

[0197] ;

[0198] S32: Configure M*M switching relationships for the output switching board SC in M ​​steps:

[0199] SC OUT (m, j) = SC IN (m, i);

[0200] in:

[0201] m is the board serial number, m = 1, 2, ..., M;

[0202] j is the output channel number, j=1, 2, ..., M;

[0203] i is the input channel number, i=k;

[0204] k is the self-test sequence number of the output switching board SC, k=1, 2, ..., M;

[0205] OUT is for output, and IN is for input.

[0206] Taking an 8×8 board as an example, the 8 configuration matrices SCJH of the output switching board are as follows:

[0207] ;

[0208] ;

[0209] …

[0210] ;

[0211] S33: Performs M parallel self-tests on M*M channels in M ​​stages, and records the self-test results of the output switching board SC. Check (m, j, i) array:

[0212] ;

[0213] in:

[0214] m is the board serial number, m = 1, 2, ..., M;

[0215] j is the output channel number, j=1, 2, ..., M;

[0216] i is the input channel number, i = 1, 2, ..., M;

[0217] OUT is output, IN is input, and Check is self-test.

[0218] Example 5

[0219] See Figure 5 , Figure 6 As shown, in step S4, based on the shared link model, redundant faulty channels are eliminated, and the specific process of fault location to the board and channel routing is as follows:

[0220] S41: If the upstream direct channel fails, remove the following M faults and set the self-test to pass:

[0221] like Wherein j=1,2, …, M, and the pass-through channel corresponding to the input board card SR connected with the input i fails, then:

[0222] Wherein i=1,2, …, M.

[0223] If Wherein j=1,2, …, M, and the pass-through channel corresponding to the input board card SR connected with the input i fails, then:

[0224] Wherein i=1,2, …, M.

[0225] S42: If the rear pass-through channel fails, the following M failures are removed, and set to self-check pass:

[0226] If Wherein i=1,2, …, M, and the pass-through channel corresponding to the output board card SC connected with the output j fails, then:

[0227] Wherein i=1,2, …, M.

[0228] If Wherein i=1,2, …, M, and the pass-through channel corresponding to the output board card SC connected with the output j fails, then:

[0229] Wherein i=1,2, …, M.

[0230] Based on the above, the variable routing matrix online fast self-checking method based on parallel hierarchical exhaustion provided by the application utilizes the characteristics of large-scale card matrix layered switching, fixes the 2-layer switching relationship in the 3-layer switching board card, and changes the 1-layer board card synchronous parallel routing exhaustion, and after sequentially synchronously and parallelly exhausting the routing of the 3-layer board card, the redundant failure channels are removed based on the shared model, so that the self-checking conclusion can be quickly obtained, which can be fault-located to the board card level, switch channel level and common end, solves the problem of long time consumption of large-scale card matrix full routing self-checking, greatly shortens the time of signal interruption due to self-checking, and greatly improves the inspection efficiency and fault locating ability of large-scale card matrix.

Claims

1. A method for online fast self-checking of a variable routing matrix based on parallel hierarchical exhaustion, characterized in that, Comprising the following steps: S1: configure the bridge and output switch board card as straight through, the input switch board card is divided into M times of synchronous exhaustive M*M exchange relationship, and is self-checked in parallel for M times; S2: configure the input and output switch board card as straight through, the bridge switch board card is divided into M times of synchronous exhaustive M*M exchange relationship, and is self-checked in parallel for M times; S3: configure the input and bridge switch board card as straight through, the output switch board card is divided into M times of synchronous exhaustive M*M exchange relationship, and is self-checked in parallel for M times; S4: based on the common link model, the redundant fault channel is removed, and the fault is located to the board card and the passage routing; The specific process of configuring the bridge and output switch board card as straight through in step S1, and the input switch board card is divided into M times of synchronous exhaustive M*M exchange relationship, and is self-checked in parallel for M times, is as follows: S11: configure the exchange relationship of the bridge switch board card QJ and the output switch board card SC as straight through, and the array is represented as follows: QJ OUT (m, j) = QJ IN (m, i); SC OUT (m, j) = SC IN (m, i); Wherein: m is the board card serial number, m=1, 2, …, M; J is the output channel number, j=1, 2, …, M; I is the input channel number, i=j; OUT is output, and IN is input; S12: divide M times, and configure M*M exchange relationship of the input switch board card SR: SR OUT (m, j) = SR IN (m, i); Wherein: m is the board card serial number, m=1, 2, …, M; J is the output channel number, j=1, 2, …, M; I is the input channel number, i=k; K is the self-checking sequence number of the input switch board card SR, k=1, 2, …, M; OUT is output, and IN is input; S13: divide M times, parallel self-check M*M channels, and record output switch board card self-check result SR Check (m, j, i) array: ； Wherein: m is the board card serial number, m=1, 2, …, M; J is the output channel number, j=1, 2, …, M; I is the input channel number, i=1, 2, …, M; OUT is output, IN is input, and Check is self-checking; The specific process of configuring the input and output switch board card as straight through in step S2, and the bridge switch board card is divided into M times of synchronous exhaustive M*M exchange relationship, and is self-checked in parallel for M times, is as follows: S21: configure the exchange relationship of the input switch board card SR and the output switch board card SC as straight through, and the array is represented as follows: SR OUT (m, j) = SR IN (m, i); SC OUT (m, j) = SC IN (m, i); Wherein: m is the board card serial number, m=1, 2, …, M; J is the output channel number, j=1, 2, …, M; I is the input channel number, i=j; OUT is output, and IN is input; S22: divide M times, and configure M*M exchange relationship of the bridge switch board card QJ: QJ OUT (m, j) = QJ IN (m, i); Wherein: m is the board card serial number, m=1, 2, …, M; J is the output channel number, j=1, 2, …, M; I is the input channel number, i=k; K is the self-checking sequence number of the bridge switch board card QJ, k=1, 2, …, M; OUT is output, and IN is input; S23: divide M times, parallel self-check M*M channels, and record the bridge switch board self-check result QJ Check (m, j, i) array: ； Wherein: m is the board card serial number, m=1, 2, …, M; J is the output channel number, j=1, 2, …, M; I is the input channel number, i=1, 2, …, M; OUT is output, IN is input, and Check is self-checking; The specific process of configuring the input and bridge switch board card as straight through in step S3, and the output switch board card is divided into M times of synchronous exhaustive M*M exchange relationship, and is self-checked in parallel for M times, is as follows: S31: configure the exchange relationship of the input switch board card SR and the bridge switch board card QJ as straight through, and the array is represented as follows: SR OUT (m, j) = SR IN (m, i); QJ OUT (m, j) = QJ IN (m, i); Wherein: m is the board card number, m = 1, 2, …, M; j is the output channel number, j = 1, 2, …, M; i is the input channel number, i = j; OUT is output, IN is input; S32: configure M*M switching relations of the output switching board card SC for M times: SC OUT (m, j) = SC IN (m, i); Wherein: m is the board card number, m = 1, 2, …, M; j is the output channel number, j = 1, 2, …, M; i is the input channel number, i = k; k is the self-checking sequence number of the output switching board card SC, k = 1, 2, …, M; OUT is output, IN is input; S33: divide M times, parallel self-check M*M channels, and record output switching board card self-check result SC Check (m, j, i) array: ； Wherein: m is the board card number, m = 1, 2, …, M; j is the output channel number, j = 1, 2, …, M; i is the input channel number, i = 1, 2, …, M; OUT is output, IN is input, and Check is self-checking.

2. The method of claim 1, wherein, The specific process of removing redundant fault channels and locating faults to the board card and channel routing in step S4 based on the common link model is as follows: S41: if the front-stage straight-through channel fails, remove the following M faults and set them as self-checking passed: If where j = 1, 2, …, M, and the pass-through channel corresponding to the input board card SR connected with the input i fails, then: where i = 1, 2,..., M; If where j = 1, 2,..., M, and the pass-through channel corresponding to the input board card SR or the bridge board card Qj connected with the input i fails, then: where i = 1, 2,..., M; S42: if the rear-stage straight-through channel fails, remove the following M faults and set them as self-checking passed: If where i = 1, 2, …, M, and the pass-through channel corresponding to the bridge card Qj or the output card SC connected with the output j fails, then: where i = 1, 2,..., M; If where i = 1, 2, …, M, and the pass-through channel corresponding to the output board card SC connected with the output j fails, then: where i = 1, 2,..., M; S43: fault location summary; On the basis of step S41 and step S42, the input switch board card self-checking result SR Check (m, j, i), the bridge switch board card self-checking result QJ Check (m, j, i), the output switch board card self-checking result SC Check (m, j, i) array, search for the m, j and i corresponding to the field with the search lookup value of 0; i.e. the input exchange board card with the serial number m, whose input channel i and output channel j fail the self-checking; i.e. the bridge switch card, the output switch card SC, the card with the serial number m, whose input channel i and output channel j do not pass the self-checking; That is, the output switch board card with the card number m, whose input channel i and output channel j fail the self-check.

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