Converter device and corresponding method

Abstract

A converter apparatus and a corresponding method are disclosed. A converter device for driving an LED illumination source, comprising: an input node configured to receive an input signal, and an output node configured to be coupled with an electrical load; an inductor between the output node and the driver node; and an electronic switch between the input node and the driver node, where the driver node is electrically coupled to the input node in response to the electronic switch being turned on; and a current recirculation diode configured to facilitate current flow between the ground and the driver node. Current detection circuitry is provided that includes a series connection of a first resistor coupled to a driver node and a first capacitor coupled to an output node, a second capacitor, and a second resistor.

Description

Technical Field

[0001] The present disclosure relates to a converter device.

[0002] One or more embodiments can be used, for example, in a lighting system including an LED lighting source. Background Art

[0003] In a lighting system including an LED lighting source, it is desirable to have an available multi-channel output function, that is, to be able to supply (drive) different LED modules using the same driver instead of having multiple drivers.

[0004] For example, considering the field of road and street lighting, it may be advantageous to illuminate one or more vehicle traffic lanes at a different intensity than a pedestrian-only section. A multi-channel driver facilitates the implementation of such management modes.

[0005] To this end, in the prior art, various solutions have been proposed. However, these solutions have some drawbacks, such as complexity, cost, or low performance.

[0006] In fact, the market shows that it favors inexpensive and small drivers suitable for use with small devices, but maintains a good performance level (e.g., regarding the dimming function).

[0007] One way to meet the above requirements is to provide a platform equipped with three stages: namely, a power factor correction stage (PFC); an isolated DC / DC conversion stage; and a stage also having two or more buck converters for regulating the current in each channel.

[0008] The topologies of PFC and DC / DC conversion are well known and have been consolidated. Therefore, the converter topology adopted to regulate the current in each channel can make a difference, for example, regarding the possibility of performing control with high current accuracy, low output ripple, and a wide voltage operating range (or window), for example, the converter topology has the ability to control a load with a control voltage higher than 100V.

[0009] It has been noted that in such possible usage contexts, the detection of the peak current signal plays an important role for control purposes.

[0010] In the prior art, various ways of controlling a converter (such as a buck converter) by controlling the peak current have been proposed. A buck converter is a switching-type converter that can be used as a step-down converter (voltage reducer). The circuit typically includes two switches (a transistor and a diode), an inductor, and a capacitor.

[0011] For example, a current transformer can be used to detect the peak current: However, a drawback of this solution is that the current transformer is rather large and expensive.

[0012] The control of the peak current can also be obtained from the inductor (or inductance or coil) of the buck converter, and the control can manage a signal close to the output voltage.

[0013] For example, a signal derived from an RC circuit in parallel with the coil can be compared to obtain a buck control with hysteresis. It has been noted that this solution works if the feedback voltage is close to the output voltage, i.e., if the corresponding comparator is supplied with a voltage referenced to the output voltage, or if the output voltage is rather low.

[0014] The signal on the coil can be detected in various ways, always under the condition that the control is referenced to the output or the output voltage does not reach a high value: In this regard, reference can be made, for example, to document US 2015 / 364995A1.

[0015] Document US 7 358 710 B2 describes a control that is directly implemented using a signal from the inductor and compensated for temperature.

[0016] Document US2010 033145A1 envisages a resistor connected to ground (denoted by R5). The idea is again to combine the feedback voltage component Vo with the current feedback through the inductor or coil of the converter. If the component Vo is high, then in order to have a sufficient value that can be used for a regulator referenced to ground, the resistor R5 must have a lower value compared to the other resistors in the circuit. The low value of the resistor R5 greatly reduces the contribution of the current feedback component. This means that the circuit is not suitable for control referenced to the ground voltage and the high voltage Vo.

[0017] Documents US2019 / 229620 A1 and US2017 / 085178 A1, plus (essentially as background art) documents US2015 / 364995 A1, EP 2 546 966 A2, and US2021 / 028685A1 are further examples of the prior art. SUMMARY OF THE INVENTION

[0018] An object of one or more embodiments is to help overcome the drawbacks outlined above.

[0019] According to one or more embodiments, the above object is achieved by a device having the characteristics recited in the appended claims.

[0020] One or more embodiments relate to corresponding methods.

[0021] The solution proposed herein implements an improved control strategy for the converter.

[0022] Advantageously, in addition to the case of the buck converter with the output referenced to ground illustrated herein, solutions similar to those presented herein are themselves conducive to use in similar topologies, whether isolated or not, such as forward converters, bridge or half-bridge converters, etc.

[0023] The solution proposed herein provides one or more of the following advantages:

[0024] Low switching losses because the switching occurs in the quasi-resonant mode;

[0025] High control bandwidth, which benefits from the mode for controlling the peak current;

[0026] The overall control becomes simple;

[0027] High precision because the current is directly read on the load (LED); and

[0028] The output is referenced to ground. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Now, one or more embodiments will be described by way of non-limiting example only with reference to the accompanying drawings, wherein:

[0030] Figure 1 is a circuit diagram of a converter device illustrating a converter device similar to the converter device described herein;

[0031] Figure 2 and Figure 3 and Figure 4 are timing diagrams illustrating possible waveforms of signals within a device similar to the device described herein; and

[0032] Figure 5 is a circuit diagram illustrating a possible variant embodiment of a converter device similar to the converter device described herein.

[0033] It should be understood that like parts or elements are designated by the same reference numerals in the various figures unless the context otherwise indicates.

[0034] Therefore, for the sake of brevity and simplicity of illustration, the detailed description of such parts or elements will not be repeated for each figure.

[0035] Again, for the sake of brevity and simplicity of illustration, in this specification, the same reference numeral may be used to denote a certain node or line and the signal present on that node or line. DETAILED DESCRIPTION

[0036] In the following description, various specific details are set forth in order to provide a thorough understanding of the various examples of embodiments in accordance with the present disclosure. These embodiments may be obtained without one or more of the specific details, or by using other methods, components, materials, etc. In other instances, well-known structures, materials, or operations are not shown or described in detail so as not to obscure the significant aspects of the embodiments.

[0037] References to "an embodiment" or "one embodiment" in the context of this specification are intended to indicate that a particular configuration, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. Phrases such as "in an embodiment" or "in one embodiment" may occur at various points in this specification, but do not necessarily refer to the same embodiment. Furthermore, in one or more embodiments, the particular configurations, structures, or characteristics may be combined in any suitable manner.

[0038] The reference numerals used herein are provided merely for convenience and thus do not limit the scope of protection or the scope of the embodiments.

[0039] Likewise, the fact that an element / component is represented as "connected" or "coupled" to another element should be understood to indicate the fact that another element / component may be provided therebetween, and the fact that the element / component may be directly connected or coupled to the other element / component. Conversely, when an element / component is referred to as "directly connected" or "directly coupled" to another element / component, it should be understood that no additional element / component is provided therebetween.

[0040] It will be noted again that Figure 2 、 Figure 3 and Figure 4 the diagrams illustrate possible signal waveforms within an apparatus similar to the apparatus described herein, without any constraint reference to specific quantitative values.

[0041] As described in the introductory section of this specification, the purpose of a solution similar to the solution described herein is to obtain control of the peak current of a converter (e.g., a buck converter), where the output can reach a relatively high level (e.g., higher than 10V to 20V), and where the control reference is grounded.

[0042] Furthermore, the control schemes illustrated herein may be optimized for critical conduction mode (CCM) or discontinuous conduction mode (DCM).

[0043] Figure 1An example of a converter device is shown, which is generally designated by 10 and includes an electronic switch S1 (e.g., a MOSFET), the current path of which (between source and drain, in the case of a field effect transistor such as a MOSFET) is provided between an input node or line at voltage Vinput and node N.

[0044] A driver HsD (acting as a high-side driver) acts in a manner known per se on the control terminal (gate, in the case of a field effect transistor such as a MOSFET) of switch S1. The switch (MOSFET) also represents a body diode and a capacitor Cs.

[0045] A diode D (acting as a freewheeling step-down diode) is connected (by its cathode) to node N and thus to switch S1, and (by its anode) to ground GND.

[0046] Arranged between node N and ground GND is a current termination detection circuit (for detecting current termination in the inductor or coil Lb of the converter), which includes a capacitor Cv, one side of which is connected to node / line N and the other side to node K, below which there is a parallel connection of a zener diode Dz and a resistor Rv; on the side opposite to capacitor Cv, i.e., on the side opposite to node K, the parallel connection of diode Dz and resistor Rv is connected to ground GND.

[0047] In Figure 1 reference numeral S2 denotes a low-signal switch (e.g., also a MOSFET), the control terminal (gate, in the case of a field effect transistor such as a MOSFET) of which is driven by the output neg(Q) of a flip-flop 12, which receives on its set input S a signal VI present at node K.

[0048] The current path through switch S2 (between source and drain, in the case of a field effect transistor such as a MOSFET) is connected between ground GND and a node P included in a network configured to convey a signal indicative of the current flowing through the step-down inductor or coil Lb to ground, a resistor Lrb being associated with the step-down inductor or coil, and the inductor Lb and the resistor Lrb being shown connected in series between node N and an output node of the converter circuit designated by OUT.

[0049] A load is connected to node OUT, represented here in the form of a string of LEDs L configured to act as a lighting source.

[0050] It should be understood that the load is generally not included in the embodiment as it is (only) connected to the converter device during installation such that it can be supplied with a current Io at a voltage Vo.

[0051] As shown herein, a network configured to transmit a signal indicative of current flowing through a buck inductor or coil Lb to ground includes:

[0052] A resistor Ra and a capacitor Ca, arranged in series relative to each other and connected in parallel to the buck inductor or coil Lb (and in parallel to the corresponding resistance Lrb);

[0053] A capacitor Cb, connected between a node P and an intermediate node (not designated by any reference numeral for simplicity) located between the resistor Ra and the capacitor Ca; and

[0054] A resistor Rb, connected between the node P and ground GND.

[0055] As shown herein, a low-pass filter RC is also connected between the node P and ground GND. The low-pass filter includes a resistor Rf connected to the node P and a capacitor Cf disposed between the resistor Rf and ground GND. An intermediate node (not designated by any reference numeral for simplicity) between the resistor Rf and the capacitor Cf is connected to the input of a comparator 14 so as to supply a signal VIpk to the comparator. This signal will be compared with a reference threshold Ref supplied by a PI (proportional integral) controller (of a type known per se) 16. The output signal of the comparator 14 is applied to the reset input R of a flip-flop 12, and the output Q of the flip-flop is sent to a driver HsD.

[0056] Although they are shown as separate elements for simplicity of illustration, components 12, 14, and 16 may be implemented as part of a single control unit (e.g., a microcontroller) 100 configured to:

[0057] Receive a signal VI from the node K via the flip-flop 12, and send the signal neg(Q) to the switch S2 and the signal Q to the driver HsD;

[0058] Receive a signal VIpk from the output of the filter Rf, Cf connected to the node P via the comparator 14, and apply the comparison result with the threshold Ref to the input R of the flip-flop 12; and

[0059] Generate the threshold Ref via the PI controller 16 based on a current reference IRef (obtained in a manner known per se) and a current value derived from the load L (e.g., across a shunt resistor Rs), where the shunt resistor is connected between ground GND and the terminal of the load L opposite to the node OUT.

[0060] Figure 1The output capacitance Co is also shown in Figure 1, expressed as the equivalent series resistance (ESR) CoESR: This value is also called internal resistance and represents the useful energy loss compared to an ideal (perfect) capacitor.

[0061] As shown herein, the series connection of the output capacitance Co and the equivalent series resistance CoESR may be considered to be provided between the output node OUT and the ground terminal of the shunt resistor Rs (ie, the terminal of the shunt resistor Rs opposite the load L).

[0062] Figure 1 The converter circuit has a floating switch S1 (MOSFET) and is driven by a high-side driver HsD in such a way that the ground is common to the control.

[0063] Figure 2 The following possible waveforms of the signal are shown with reference to the same time coordinate t on the abscissa (from top to bottom):

[0064] Current ILb in inductor (coil) Lb

[0065] The current IS1 through switch S1

[0066] The voltage VRb across the resistor Rb (node P)

[0067] Voltage VS1 on node N

[0068] The "downstream" voltage VI (the set input of flip-flop 12).

[0069] exist Figure 2 In the two diagrams below, the possibility of performing a zero current detection (ZCD) function in the “downstream” interval Tv is highlighted.

[0070] As already mentioned, the converter 10 illustrated herein operates in critical conduction mode (CCM), so that the current ILb in the coil always becomes zero before the next cycle restarts.

[0071] In the periodic switching operation, in particular two intervals can be distinguished, “ON” and “OFF”, in which the switch S1 is conducting (ON) and non-conducting (OFF), respectively.

[0072] Focusing first on the "on" interval, when switch S1 is turned on (ie, conducting), current IS1 begins to increase and the circuit formed by the components identified as Ra, Ca, Rf, Cf and S2 provides corresponding information about the current referenced to ground.

[0073] These components can be viewed as forming two different circuits that function in two different ways.

[0074] In this regard, reference can be made to Figure 3 which shows, for the same time coordinate on the abscissa, the possible waveforms (from top to bottom) of the following signals that would be obtained in the absence of switch S2:

[0075] The ripple voltage VRCo on capacitor Co

[0076] The current ILb through inductor (coil) Lb

[0077] The voltage VCa on capacitor Ca

[0078] The voltage VRb across resistor Rb.

[0079] Conversely, Figure 3 The portion of the graph reproduced at the bottom of Figure 3 highlights how the presence of switch S2 enables the voltage VRb across resistor Rb to have a ramp-shaped variable value starting from zero.

[0080] It should be noted that the network including resistor Ra and capacitor Ca is in parallel with inductor (coil) Lb, and the signal across capacitor Ca is proportional to the current ILb, and the network including resistor Rb and capacitor Cb sends the signal to ground.

[0081] If we start considering resistor Ra and capacitor Ca, we note that by appropriately sizing the above components (e.g., in such a way that Ra×Ca = Lb / RLb, where it will be recalled that, as used herein, these symbols refer both to the components and to the corresponding characteristic electrical parameters: resistance, capacitance or inductance), the signal across capacitor Ca exhibits the same behavior as the current ILb, such that it starts from zero when the "on" time begins and reaches a value proportional to it, such that the peak voltage on capacitor Ca is equal to the product of the peak of the current ILb and the resistance value of resistor RLb.

[0082] Assuming that the circuit including resistor Rb and capacitor Cb is connected to both capacitor Ca and capacitor Co, across resistor Rb there is not only the signal across capacitor Ca but also the ripple across capacitor Co given by the Co ESR (at the top of Figure 3 ). The ripple has an average value equal to zero but oscillates between positive and negative values. Figure 3 The sum of the signal across capacitor Ca and the signal derived from capacitor Co is in any case associated with the current in coil Lb, but has an AC component such that the total signal (at the bottom of Figure 3 ) is not exactly similar to the current ILb in inductor Lb whose peak is almost equal to VCa / 2 + VRco.

[0083] The sum of the signal across capacitor Ca and the signal derived from capacitor Co is in any case associated with the current in coil Lb, but has an AC component such that the total signal (at the bottom of Figure 3 ) is not exactly similar to the current ILb in inductor Lb whose peak is almost equal to VCa / 2 + VRco. Figure 3 The sum of the signal across capacitor Ca and the signal derived from capacitor Co is in any case associated with the current in coil Lb, but has an AC component such that the total signal (at the bottom of Figure 3 ) is not exactly similar to the current ILb in inductor Lb whose peak is almost equal to VCa / 2 + VRco.

[0084] The switch S2 can make the ripple (always) positive. When the switch S1 is off (i.e., non-conducting), the switch S2 (e.g., a MOSFET) is turned on (becomes conducting) and holds the signal at zero during the off-time of the switch S1. In this way, when the switch S1 starts to turn on (the switch S1 is on, i.e., conducting), the signal can be related to the current of the MOSFET ( Figure 2 the signal VRb in

[0085] It can be said that for Figure 3 the signal VRb, this is equivalent to only considering a part of the operating cycle ("on") when S1 is on (i.e., conducting), while during the time when S1 is off (i.e., non-conducting) ("off"), the signal VRb is held at 0 by the switch S2.

[0086] It should be noted that the value of the resistor CoESR can be quite high, such that the signal VRb across the resistor Rb can be mainly derived from the ripple on the capacitor Co; this is not entirely positive as this parameter depends on the service life of the capacitor Co.

[0087] To reduce the dependence on the value of the capacitor Co, the values of the resistor Ra and the capacitor Ca can be selected such that Ra×Ca < Lb / Rb. [[ID=1 ]]

[0088] By doing so, if we consider, for example, that Ra×Ca is three times lower than Lb / Rb (i.e., 3×(Ra×Ca) = Lb / Rb), then it facilitates the achievement of the ratio with the actual current.

[0089] As can be inferred from Figure 4 this figure (again referring to the same time coordinate t on the abscissa), it shows the possible waveforms of the following voltages:

[0090] the ripple voltage VRCo on the capacitor Co (above) and

[0091] the voltage VRb on the resistor Rb (below),

[0092] the value of the voltage VRb is higher than before (e.g., compared with 1.4V in Figure 2 and 6V in Figure 4 ), and across the resistor Rb, the influence of the ripple on the capacitor Co is significantly reduced.

[0093] The final signal across the resistor Rb can be filtered via the low-pass network Rf, Cf and supplied to the microcontroller 100 (comparator 14) as the signal VIpk.

[0094] The signal VIpk is proportional to the current in the switch (MOSFET) S1, and thus, when the peak reaches the reference obtained by the PI circuit 16 (e.g., inside the microcontroller 100), the switch S1 is turned off (becomes non-conductive), and the switch S2 is turned on (becomes conductive).

[0095] If we now focus on the "off" interval, when the switch S1 is off (i.e., non-conductive), the current ILb flowing in the inductor or coil Lb causes the diode D to conduct (in fact, "recirculate" through the diode D), where the angular coefficient (slope) depends on the equivalent capacitance at node N (mainly identified by the capacitances Cs and Cv) and other parasitic capacitances.

[0096] The current continues to circulate in the diode D until the inductor or coil Lb is discharged.

[0097] Assuming that the switch (MOSFET) S2 is turned on (i.e., becomes conductive) without any dead time (which is reasonable to do), when the inductor or coil Lb is discharged, the diode D automatically turns off (i.e., stops conducting), and the inductor or coil Lb starts to oscillate again together with the equivalent capacitance on node N, where the signal VI from the components Cv, Rv has become "high", enabling the microcontroller 100 to detect when the current is zero. The corresponding signal is clamped by the Zener diode Dz, and the oscillation of the signal is represented by Tv at the bottom in Figure 2 .

[0098] After a specific time set in the microcontroller 100, the switch S1 is activated again (becomes conductive), so that the switching can occur in the "quasi-resonant" mode, which is beneficial for reducing losses.

[0099] The reference value Ref used by the comparator 14 is given by the PI circuit 16, as already seen, which can be inside or outside the microcontroller 100. The current reference Iref can be set via the hardware (HW) interface or due to external communication with the microcontroller 100 (according to standards known per se).

[0100] The reference Iref is compared with the current Is of the load L (LED), which is obtained via a shunt resistor Rs coupled to the load: due to the filtering action performed by the output capacitor Co, this current is actually a DC current, which promotes achieving a good accuracy level.

[0101] In short:

[0102] The apparatus 10 illustrated herein includes an input node configured to receive an input signal (i.e., voltage Vinput) and an output node OUT configured to be coupled to an electrical load L (e.g., one or more LED lighting sources), wherein an inductor Lb (including its resistance RLb) is disposed between the output node OUT and a driver node (node N);

[0103] An electronic switch (e.g., MOSFET S1) is disposed between the input node Vinput and the driver node N such that the driver node N (to which the inductor Lb is coupled) is electrically coupled to the input node Vinput in response to the electronic switch S1 being turned on; there is also a diode D configured to facilitate (recirculation) current flow between the ground GND and the driver node N (e.g., in the polarity illustrated herein, from the ground GND to the driver node N);

[0104] A current detection circuit system (components Ra, Ca, Cb, Rb) is provided, the current detection circuit system including a series connection of a first resistor Ra coupled to the driver node N and a first capacitor Ca coupled to the output node OUT, a second capacitor Cb and a second resistor Rb, the second capacitor having a first end coupled between the first resistor Ra and the first capacitor Ca and a second end coupled to a current detection node P, the second resistor being located between the current detection node P and the ground GND; and

[0105] Similarly, a zeroing circuit system (e.g., electronic switch S2) is provided, the zeroing circuit system acting between the current detection node P and the ground GND to force the current detection node P to ground in response to the electronic switch S1 not being turned on.

[0106] Figure 1 is an example of a solution, wherein the zeroing circuit system includes an additional electronic switch (MOSFET S2), the additional electronic switch having a current flow path (between the source and the drain, in the case of a field effect transistor such as a MOSFET), the electronic switch S2 being disposed between the current detection node P and the ground GND. As shown herein, the additional electronic switch S2 has a control terminal (gate, in the case of a field effect transistor such as a MOSFET), the control terminal being configured to turn on the additional electronic switch S2 based on a signal (neg(Q)) that asserts (input S of the flip - flop 12) in response to a current termination signal VI indicating termination of the current ILb through the inductor Lb, RLb (this can be attributed to the electronic switch S1 not being turned on).

[0107] Figure 5 is a circuit diagram illustrating a possible variant embodiment of the converter apparatus 10 as described above.

[0108] For the sake of simplicity and brevity of illustration, parts or elements described in connection with the Figure 1 circuit diagram are denoted by the same reference numerals in Figure 5 . Accordingly, such parts or elements will not be referred to again (it should be noted that, for simplicity, the resistor RLb is not visible in Figure 5 ). Figure 5

[0109] Figure 5 is an example of the possibility of obtaining the same type of operating mode as described previously with reference to Figures 2 to 4 , without contemplating the use of a MOSFET to implement the Figure 1 switch specified by S2 in

[0110] In the schematic diagram of Figure 5 , the MOSFET S2 of Figure 1 is replaced by two diodes D1 and D2, which are connected as follows:

[0111] The anode of one (diode D1) is connected to the node P located between the capacitor Cb and the resistor Rb, and the cathode is connected to the output Q of the flip-flop 12 (and thus at the input of the driver HsD),

[0112] The cathode of the other (diode D2) is connected to the node P located between the capacitor Cb and the resistor Rb, and the anode is connected to the ground GND.

[0113] Figure 5 The solution of

[0114] considers the fact that the electronic switch S1 is configured to alternately become conductive or non-conductive via a driver HsD controlled by a control line that carries a signal (the signal Q of the flip-flop 12) generated in response to the flip-flop 12 being set when the current termination signal VI indicates the termination of the current ILb through the inductor Lb, RLb. Figure 5 In the solution of

[0115] a diode (diode D2), provided between the current detection node P and the ground GND; and

[0116] a further diode (diode D1), provided between the current detection node P and the aforementioned control line (the output Q of the flip-flop 12) of the driver HsD of the electronic switch S1.

[0117] Figure 5 The solution of

[0118] ​This may occur when a wide dimming range of current is required, such that the signal is high at full load, and may prove too low when the current is dimmed down to a very low level.

[0119] Figure 1 The common features of the solution exemplified in Figure 5 and the solution exemplified in

[0120] There is a current termination detection circuitry (components Cv, Rv, Dz) disposed between a drive node N coupled with an inductor Lb (including a resistor RLb) and ground GND, and the current termination detection circuitry is configured to generate a current termination signal VI at a current termination node K; the current termination signal VI indicates that in response to the electronic switch S1 being non-conductive, the current ILb through the inductor Lb, RLb located between the drive node N and the output node OUT terminates;

[0121] The current termination detection circuitry is implemented by: a detection capacitor Cv located between the drive node N coupled with the inductor Lb (RLb) and the current termination node K; a detection resistor Rv located between the current terminal node K and ground GND; and optionally, a zener diode Dz in parallel with the detection resistor Rv for clamping the voltage on the current termination node K;

[0122] There is a flip-flop 12, which is configured to control (via Figure 1 the signal neg(Q) in Figure 5 and via

[0123] the signal Q in

[0124] the zeroing circuitry S2 by forcing the current detection node P to ground GND according to the current termination signal VI; D2, D1, where the flip-flop 12 is advantageously configured to be set (input S) and reset (input R) based on: i) the current termination signal VI; and ii) the result of comparison between a current peak signal VIpk derived from the current detection node P and a reference threshold Ref (implemented in a comparator 14), optionally conceiving that the current peak signal VIpk is obtained as a low-pass filtered copy of the current peak signal detected at the current detection node P (filtered by an RC filter including a resistor Rf and a capacitor Cf); and There is a current measuring element (a shunt resistor Rs, optionally referenced to ground GND) and a proportional integral (PI) control 16, the current measuring element emits a current intensity signal Is indicating the current intensity through an electrical load L (e.g., an LED source), and the proportional integral (PI) control is configured to generate the aforementioned reference threshold Ref based on a current reference signal IRef and the aforementioned current intensity signal Is.It will be noted again that, although advantageous, it is not necessary to implement switch S1 (and / or switch S2) via a metal-oxide-semiconductor field-effect transistor (MOSFET). At least in principle, a bipolar junction transistor (BJT) can also be used, where the control terminal is represented by the base (instead of the gate), and the current path is represented by the current flow path between the emitter and the collector (instead of the current flow path between the source and the drain).

[0125] Similarly, the previous description illustrates device 10, in which it is assumed that Vinput is a positive voltage with respect to ground GND (where driver HsD serves as a high-side driver). A solution similar to the solutions described herein can also be used in the case where Vinput is a negative voltage with respect to ground, where corresponding adjustments are made to the polarities / connections of components such as diodes D, Dz, D1, or D2.

[0126] Of course, without prejudice to the underlying principles, the details and embodiments can vary with respect to what has been illustrated herein merely by way of example, without departing from the scope of protection specified in the appended claims.

[0127] List of reference numerals

[0128] Converter device 10

[0129] Switch (MOSFET) S1 MOSFET capacitor Cs Driver HsD Input voltage Vinput Node N

[0130] Diode D Ground GND Current termination detection capacitor Cv

[0131] Current termination detection node K

[0132] Current termination detection Zener diode Dz

[0133] Current termination detection resistor Rv

[0134] Inductor (coil) Lb Coil series resistance RLb Resistor Rb for conducting current to ground

[0135] Capacitor Cb for conducting current to ground Switch (MOSFET) S2 Node P Resistors and capacitors Rf, Cf of the low-pass RC filter Output node OUT Output voltage and current Vo, Io Output capacitance Co Equivalent series resistance (ESR) CoESR Load (LED) L

[0136] Shunt resistor Rs Microcontroller 100 Flip-flop 12 Comparator 14 PI circuit 16 Diodes D1, D2 On-time ON of switch S1 Off-time OFF of switch S1 Current ILb through the inductor (coil) Current IS1 through switch S1 Voltage VRb at node P Voltage VS1 at node N “Downstream” voltage (set input of the flip-flop) VI Voltage ripple VRCo across capacitor Co Voltage VCa across capacitor Ca Voltage VRb across resistor Rb

Claims

1. A converter device (10) comprising: An input node and an output node (OUT), the input node being configured to receive an input signal (Vinput), and the output node being configured to be coupled to an electrical load (L); An inductor (Lb, RLb) located between the output node (OUT) and a driver node (N); An electronic switch (S1) located between the input node (Vinput) and the driver node (N), wherein the driver node (N) is electrically coupled to the input node (Vinput) in response to the electronic switch (S1) being turned on; A current recycling diode (D) configured to facilitate current flow between ground (GND) and the driver node (N); A current detection circuitry (Ra, Ca, Cb, Rb) including a series connection of a first resistor (Ra) coupled to the driver node (N) and a first capacitor (Ca) coupled to the output node (OUT), a second capacitor (Cb), and a second resistor (Rb), the second capacitor having a first end coupled between the first resistor (Ra) and the first capacitor (Ca) and a second end coupled to a current detection node (P), and the second resistor being located between the current detection node (P) and ground (GND); and A zeroing circuitry (S2; D1, D2) located between the current detection node (P) and ground (GND), the zeroing circuitry (S2; D1, D2) being configured to force the current detection node (P) to ground in response to the electronic switch (S1) being turned off.

2. The device (10) according to claim 1, comprising a current termination detection circuit system (Cv, Rv, Dz), the current termination detection circuit system being arranged between the driver node (N) coupled with the inductor (Lb, RLb) and the ground (GND), wherein, The current termination detection circuitry (Cv, Rv, Dz) is configured to generate a current termination signal (VI) at a current termination node (K), the current termination signal (VI) indicating termination of a current (ILb) through the inductor (Lb, RLb) located between the driver node (N) and the output node (OUT) in response to the electronic switch (S1) being turned off.

3. The device (10) according to claim 2, wherein, The current termination detection circuitry (Cv, Rv, Dz) includes: A detection capacitor (Cv) located between the driver node (N) coupled to the inductor (Lb, RLb) and the current termination node (K), A detection resistor (Rv) located between the current termination node (K) and ground (GND).

4. The apparatus (10) according to claim 3, wherein, A Zener diode (Dz) in parallel with the detection resistor (Rv) to clamp the voltage at the current termination node (K).

5. The device (10) according to any one of the preceding claims, wherein, The zeroing circuitry includes an additional electronic switch (S2) having a current flow path arranged between the current detection node (P) and ground (GND).

6. The apparatus (10) according to claim 5, in combination with any one of claims 2 to 4, wherein, The additional electronic switch (S2) has a control terminal configured to turn on the additional electronic switch (S2) based on a signal (neg(Q)) asserted (S, 12) in response to the current termination signal (VI), the current termination signal being responsive to the non-conduction of the electronic switch (S1) indicating termination of the current (ILb) through the inductor (Lb, RLb).

7. The apparatus (10) according to any one of claims 1 to 4, comprising: A control signal generator (12) configured to generate a control signal on a control line (Q) in response to the current termination signal (VI) indicating termination of the current (ILb) through the inductor (Lb, RLb), wherein: The electronic switch (S1) is configured to alternately become conductive or non-conductive based on the control signal, and The zeroing circuit system includes a diode (D2) arranged between the current detection node (P) and ground (GND) and an additional diode (D1) arranged between the current detection node (P) and the control line (Q).

8. The apparatus (10) according to any one of claims 3 to 7, dependent on claim 2, comprising a trigger circuit (12) configured to control (neg(Q); Q) the zeroing circuit system (S2; D2, D1) to force the current detection node (P) to ground (GND) according to the current termination signal (VI).

9. The device (10) according to claim 8, wherein, The trigger circuit (12) is configured to be set (S) and reset (R) based on the current termination signal (VI) and based on the output of a comparator (14) configured to compare a reference threshold (Ref) with a current peak signal (VIpk) derived from the current detection node (P).

10. The apparatus (10) according to claim 9, wherein, The current peak signal (VIpk) includes a low-pass filtered (Rf, Cf) copy of the current peak signal at the current detection node (P).

11. The apparatus (10) according to claim 9 or claim 10, comprising: A current determination element (Rs) configured to provide a current intensity signal (Is) indicative of the intensity of the current through the electrical load (L); and A proportional-integral PI control (16) configured to generate the reference threshold (Ref) based on a current reference signal (IRef) and the current intensity signal (Is).

12. The device (10) according to claim 11, wherein, The current determination element (Rs) is referenced to ground (GND).

13. A method for a converter, comprising: Provided is the device (10) according to any one of the preceding claims, wherein the device comprises the input node, the output node (OUT), the inductor (Lb, RLb) located between the output node (OUT) and the driver node (N), plus the electronic switch (S1) located between the input node (Vinput) and the driver node (N), the current recycling diode (D), the current detection circuitry (Ra, Ca, Cb, Rb), and the zeroing circuitry (S2; D1, D2); Receiving an input signal (Vinput) at the input node; Coupling an electrical load (L) to the output node (OUT), the inductor (Lb, RLb) being arranged between the output node (OUT) and the driver node (N); Electrically coupling the driver node (N) to the input node (Vinput) in response to the electronic switch (S1) being turned on; Facilitating current flow between the ground (GND) and the driver node (N) via the current recycling diode (D); Detecting the current flowing through the output node (OUT) via the current detection circuitry (Ra, Ca, Cb, Rb); and Forcing the current detection node (P) to ground via the zeroing circuitry (S2; D1, D2) between the current detection node (P) and the ground (GND) in response to the electronic switch (S1) being turned off.

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