Aging system of digital signal processing chip and aging method thereof

Abstract

The invention discloses an aging system of a digital signal processing chip, which mainly comprises an aging plate, a plurality of BGA (Ball Grid Array) clamp mounting ports are arranged on the aging plate, and the digital signal processing chip to be aged is arranged in the BGA clamp mounting ports. The invention also discloses an aging method of the aging system of the digital signal processing chip, which comprises the following steps of: S1, welding all components on the aging plate, checking the welding quality by using automatic optical detection equipment, and ensuring that the voltage of each power supply pin is normal, the polarity of a power supply is correct and a short circuit phenomenon does not exist; and S2, burning the test program to a storage function ROM / RAM circuit through a JTAG interface, and the like. The function coverage is comprehensive, the addressing function, the ROM / RAM function, the boot loading function, the FIR function, the FFT function, the timer function and the like of the digital signal processing chip to be aged can be subjected to comprehensive aging test by setting different GPIO pin states, the core function module of the chip is covered, and the function coverage degree of the aging test is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of chip burn-in, and in particular to a burn-in system and burn-in method for a digital signal processing chip. Background Art

[0002] Currently, the chip manufacturing process can harbor potential defects due to various reasons. These defects may not manifest immediately under normal operating conditions, but may cause chip failure over long-term use. Therefore, chip burn-in is a critical step in the chip manufacturing process. Chip burn-in, also known as "chip burn-in testing" or "chip burn-in testing," aims to identify potential early failures in chips, thereby improving their reliability during actual use. Due to the wide variety of chip types and the fact that existing burn-in systems are designed for simple-function chips, existing burn-in systems and methods are completely inadequate for digital signal processing chips with complex functions and a large number of pins, such as the TMS320C6713 chip in the TMS320C6000 series.

[0003] In summary, it is urgent to design and develop a burn-in system and burn-in method for digital signal processing chips with complex functions. Summary of the Invention

[0004] In order to overcome the deficiencies of the prior art, the present invention provides a burn-in system and burn-in method for a digital signal processing chip.

[0005] In order to solve the above technical problems, the present invention provides the following technical solutions: a burn-in system for a digital signal processing chip, mainly composed of an burn-in board, on which a number of BGA fixture mounting ports are provided, and the digital signal processing chip to be aged is built into the BGA fixture mounting ports. The burn-in board is also provided with a driving circuit and a signal sending circuit respectively connected to the digital signal processing chip to be aged through the BGA fixture mounting ports, a power supply circuit respectively connected to the digital signal processing chip to be aged, the driving circuit and the signal sending circuit, as well as a filtering circuit, a BOOT boot loading circuit, a storage function ROM / RAM circuit and a clock circuit all connected to the digital signal processing chip to be aged.

[0006] Furthermore, a fuse is connected in series in each electrical circuit on the burn-in board and connected to the digital signal processing chip to be burned-in.

[0007] A short-circuit cap is also provided on the burn-in board, and the digital signal processing chip is provided with a GPIO pin via the short-circuit cap.

[0008] In order to improve the efficiency of the aging test, the number of the BGA fixture mounting ports is 8.

[0009] In order to provide appropriate voltages to different circuits, a level conversion chip of model SN74CBTD3384PW is provided in the power supply circuit.

[0010] At the same time, a 3.3V working voltage input terminal and a 1.2V working voltage input terminal connected to the digital signal processing chip to be aged are provided on the burn-in board.

[0011] A burn-in method implemented by the burn-in system of the digital signal processing chip comprises the following steps: S1. Solder all components to the burn-in board and use automatic optical inspection equipment to check the welding quality and ensure that the voltage of each power pin is normal, the power polarity is correct, and there is no short circuit; S2. Burn the test program into the storage function ROM / RAM circuit through the JTAG interface; S3. Place the aging board in a constant temperature and humidity chamber, set the temperature to 85°C, humidity ≤ 20% RH, and control the heating rate at 5°C / min. After reaching the set temperature, keep the temperature for 30 minutes to ensure that the temperature of all devices on the board is uniform; S4. Install the digital signal processing chips to be aged into the eight BGA fixture mounting ports respectively; S5. Simultaneously burn-in the digital signal processing chips in all BGA fixture mounting ports. When any BGA fixture mounting port fails the test, the burn-in board emits a continuous alarm sound through the buzzer and records the failure time, BGA fixture mounting port serial number and error type. S6. After the test is completed, replace the next batch.

[0012] Furthermore, the test program described in step S2 includes the following functional modules: System initialization module, used to configure chip clock, memory interface, and GPIO pins; Functional test module, including addressing, ROM / RAM, boot loader, FIR, FFT and timer test subroutines; Status monitoring module, used to read GP10 status in real time and record test data; The alarm processing module is used to trigger an audible and visual alarm when an abnormal state is detected.

[0013] The test program includes the following functional tests: addressing function test, ROM / RAM function test, boot loader function test, FIR function test, FFT function test, timer function test.

[0014] The order of the functional tests in the test program can be set arbitrarily.

[0015] Compared with the prior art, the present invention has the following advantages and beneficial effects: 1. The present invention has comprehensive functional coverage. By setting different GPIO pin states, the addressing function, ROM / RAM function, boot loader function, FIR function, FFT function, timer function, etc. of the digital signal processing chip to be aged can be comprehensively burn-in tested, covering the core functional modules of the chip and improving the functional coverage of the burn-in test.

[0016] 2. This invention offers high burn-in efficiency. By designing eight independent BGA fixture mounting ports, or workstations, on the burn-in board, eight chips can be burned in simultaneously. More importantly, each workstation can perform different or identical functional tests in parallel, significantly improving burn-in efficiency compared to traditional single-workstation burn-in methods.

[0017] 3. The present invention can perform real-time status monitoring and alarm. During the aging process, the working status of each workstation can be checked in real time. When the working status is abnormal, the sound and light alarm can be triggered in time to avoid damage to the chip due to long-term operation under abnormal conditions, thereby improving the reliability of aging and the chip yield.

[0018] 4. The hardware design of the invention is complete and reliable. The burn-in board adopts multiple protection measures, such as 100mA and 500mA fuse overcurrent protection, multi-stage filter power supply design, BGA high-precision fixture to ensure good chip contact, etc., which can reduce signal interference and ensure stable circuit operation during the burn-in process.

[0019] 5. The present invention is easy to operate and maintain. The GPIO pin status can be set through the short-circuit cap, and the operation is simple and intuitive. The burn-in board supports long-term stable operation in a high-temperature environment, and the test data can be exported in the post-processing stage to generate a report, which is convenient for chip screening and fault location. At the same time, the burn-in board itself is easy to maintain and can be reused, reducing the burn-in cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 It is a schematic block diagram of the structure of the aging system of the present invention; Figure 2 It is a schematic flow chart of the aging method of the present invention.

[0021] The reference numerals in the accompanying drawings are: 1—digital signal processing chip to be aged, 2—driving circuit, 3—signal sending circuit, 4—power supply circuit, 5—filter circuit, 6—BOOT boot loading circuit, 7—storage function ROM / RAM circuit, 8—clock circuit. DETAILED DESCRIPTION

[0022] Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings. Those skilled in the art will appreciate that these descriptions are only illustrative and exemplary and should not be construed as limiting the scope of protection of the present invention.

[0023] Example 1

[0024] like Figure 1 As shown, the burn-in system in this embodiment primarily consists of a burn-in board (i.e., a PCB), which is equipped with eight BGA fixture mounting ports. These BGA fixture mounting ports are used to mount the digital signal processing chips 1 to be burned in. During testing, the digital signal processing chips 1 to be burned in are fixed to the BGA fixture mounting ports, and then the burn-in system is activated to simultaneously burn in eight digital signal processing chips 1. These eight BGA fixture mounting ports can also be referred to as workstations, each of which is connected to a digital signal processing chip 1 to be burned in. These eight workstations are independent of each other. The burn-in board of the present invention can simultaneously burn in eight digital signal processing chips 1, with each workstation able to perform different or identical functional tests in parallel. This significantly improves burn-in efficiency compared to traditional single-workstation burn-in methods.

[0025] The burn-in board is also provided with a drive circuit 2 and a signal transmission circuit 3, each connected to the digital signal processing chip 1 to be burned in via the BGA fixture mounting ports; a power supply circuit 4, each connected to the digital signal processing chip 1, the drive circuit 2, and the signal transmission circuit 3; and a filter circuit 5, a boot loader circuit 6, a storage function ROM / RAM circuit 7, and a clock circuit 8, all connected to the digital signal processing chip 1 to be burned in. In other words, the drive circuit 2, signal transmission circuit 3, filter circuit 5, boot loader circuit 6, storage function ROM / RAM circuit 7, and clock circuit 8 are each connected to the eight BGA fixture mounting ports, and are then connected to the eight digital signal processing chips 1 to be burned in via these eight BGA fixture mounting ports.

[0026] The model of the digital signal processing chip 1 to be aged is a TMS320C6713 chip. To ensure the normal operation of the digital signal processing chip 1 and prevent it from being damaged by large currents, a fuse is connected in series in each electrical circuit on the burn-in board and connected to the digital signal processing chip 1 to be aged.

[0027] The burn-in board also features 3.3V and 1.2V operating voltage inputs, which are derived from the voltage transformation output of power supply circuit 4. Once the digital signal processing chip 1 to be burned in is mounted within the BGA fixture, the 3.3V and 1.2V operating voltage inputs provide the chip with these two different operating voltages.

[0028] The burn-in board is also equipped with a shorting cap, which forms a GPIO pin for the digital signal processing chip 1. When a shorting cap is placed over two pins (or soldered to two solder joints) on the burn-in board, its internal conductive component electrically connects the two pins, effectively creating a wire in the circuit. This allows current to bypass the original disconnect point or components such as resistors and capacitors, creating a "short-circuit" state. By plugging and unplugging the shorting cap, the circuit can be quickly switched on and off, eliminating the need for soldering and facilitating debugging and maintenance.

[0029] The GPIO pins formed by the shorting caps in this embodiment include GP15 through GP11. Depending on test requirements, this embodiment can set GP15 through GP11 to 00010 for addressing function burn-in testing; set GP15 through GP11 to 00011 for ROM / RAM function burn-in testing; set GP15 through GP11 to 00100 for boot loader function burn-in testing; set GP15 through GP11 to 00110 for FIR function burn-in testing; set GP15 through GP11 to 00111 for FFT function burn-in testing; and set GP15 through GP11 to 01000 for timer function burn-in testing.

[0030] The driving circuit 2 is used for driving the digital signal processing chip 1 to be aged. If the digital signal processing chip 1 to be aged can drive the storage function ROM / RAM circuit 7 through the driving circuit 2, it indicates that the driving function of the digital signal processing chip 1 to be aged is normal; otherwise, it indicates that its driving function is abnormal.

[0031] The digital signal processing chip 1 undergoing aging requires multiple power supplies and a stable power management circuit. The storage ROM / RAM circuit 7 integrates an AM29LV400B Flash chip and an MT48LC4M32B2TG SDRAM chip. The AM29LV400B stores non-volatile data such as the firmware (e.g., the bootloader) and configuration parameters, while the MT48LC4M32B2TG serves as a high-speed data cache (e.g., the audio / video frame buffer). The Flash and SDRAM chips share a 3.3V power supply. Address space allocation and input data consistency must be ensured during use. The chip enable pins must be controlled to prevent floating. Series resistors and capacitors are used to mitigate signal oscillation and power supply decoupling issues that may occur in the driver circuit 2.

[0032] The signal sending circuit 3 is used to achieve compatible signal transmission between the chip and peripheral devices through circuits such as level conversion, clock drive or data interface, ensuring stable transmission and reception of test signals during the burn-in process, thereby completing the burn-in test of various functions of the chip.

[0033] The BOOT loader circuit 6 is used to load the program stored in the ROM / RAM circuit 7 into the on-chip program registers and execute it when the digital signal processing chip 1 is powered on. Its core function is to utilize the large capacity and data-resistance of off-chip memory (such as the AM29LV400B FLASH) to store complete system programs and application programs. At the same time, it loads commonly used programs into the on-chip high-speed RAM through boot loader, improving computational efficiency. It also ensures that related circuits, including the storage interface, power supply, clock, and GPIO control, work together to achieve burn-in verification, ensuring that the chip can boot and run programs normally in actual use.

[0034] To ensure the actual use effect, a level conversion chip model SN74CBTD3384PW is also provided in the power supply circuit 4 to realize 5V and 3.3V level conversion and ensure signal compatibility between different voltage devices.

[0035] Example 2

[0036] This embodiment is a burn-in method for a digital signal processing chip implemented based on the circuit structure of embodiment 1. The process is as follows: Figure 2 shown.

[0037] The aging method comprises the following steps: S1. Solder all components to the burn-in board and use automated optical inspection (AOI) to check the soldering quality and ensure that the voltages on all power supply pins are normal, the polarity is correct, and there are no short circuits. During this process, solder all components to the burn-in board according to the circuit schematic. AOI will check the soldering quality, focusing on the pins of digital signal processing chip 1 for loose solder joints and the shorting cap socket for proper contact. Then, connect the 5V, 3.3V, and 1.2V power supplies and use a multimeter to measure the voltages on all power supply pins to ensure correct polarity and no short circuits.

[0038] S2. Burn the test program into the storage ROM / RAM circuit 7 via the JTAG interface. In this step, the burned test program includes the following functional modules: a system initialization module for configuring the chip clock, memory interface, and GPIO pins; a functional test module containing addressing, ROM / RAM, boot loader, FIR, FFT, and timer test subroutines; a status monitoring module for reading GPIO status in real time and recording test data; and an alarm processing module for triggering an audible and visual alarm when an abnormal state is detected. The order in which these functional modules are tested is arbitrary and there is no fixed sequence.

[0039] At the same time, the aging parameters need to be written into the storage function ROM / RAM circuit 7 through the I2C interface. The aging parameters include aging temperature (such as 85℃±5℃), aging time (such as 24 hours), number of test cycles (such as 1000 times), etc.

[0040] S3. Place the aging board in a constant temperature and humidity chamber, set the temperature to 85°C, humidity ≤ 20% RH, and control the heating rate at 5°C / min. After reaching the set temperature, keep it warm for 30 minutes to make the temperature of all devices on the board uniform.

[0041] S4. Install the digital signal processing chips 1 to be burned in the eight BGA fixture mounting ports. Since the burn-in board is designed with eight independent workstations, each identified by an address decoding circuit (e.g., using GPIO pins GP8-GP14 to set the workstation address), eight digital signal processing chips to be burned in can be burned in simultaneously.

[0042] S5. Simultaneously, the digital signal processing chips in all BGA fixture mounting ports are burn-in. When any BGA fixture mounting port fails in the test, the burn-in board emits a continuous alarm sound through the buzzer and records the failure time, BGA fixture mounting port serial number and error type.

[0043] In this embodiment, each BGA fixture installation port may be equipped with an independent status indicator light (LED), for example, green indicates normal and red indicates abnormal.

[0044] The burn-in board scans the GP10 / GP9 status of eight BGA fixture ports in real time, updating every 100ms. If any BGA fixture port fails testing, the burn-in board emits a continuous alarm tone via a buzzer, while the host computer software records the failure time, BGA fixture port number, and error type.

[0045] When an abnormal power supply voltage is detected (such as 3.3V±5% out of range) or the chip temperature exceeds 100°C, the power supply is automatically cut off and an emergency alarm is triggered.

[0046] S6. After the test is completed, replace the next batch.

[0047] As described above, the present invention can be implemented better.

Claims

1. A burn-in system for a digital signal processing chip, mainly consisting of a burn-in board, characterized in that: The aging board is provided with a number of BGA fixture mounting ports, and the digital signal processing chip (1) to be aged is built into the BGA fixture mounting port. The aging board is also provided with a driving circuit (2) and a signal transmission circuit (3) respectively connected to the digital signal processing chip (1) to be aged through the BGA fixture mounting port, a power supply circuit (4) respectively connected to the digital signal processing chip (1) to be aged, the driving circuit (2) and the signal transmission circuit (3), and a filter circuit (5), a BOOT boot loader circuit (6), a storage function ROM / RAM circuit (7) and a clock circuit (8) all connected to the digital signal processing chip (1) to be aged.

2. A burn-in system for a digital signal processing chip according to claim 1, characterized in that: A fuse is connected in series in each electrical circuit on the aging board and connected to the digital signal processing chip (1) to be aged.

3. The burn-in system for a digital signal processing chip according to claim 2, characterized in that: A short-circuit cap is also provided on the burn-in board, and the digital signal processing chip (1) is provided with a GPIO pin via the short-circuit cap.

4. A burn-in system for a digital signal processing chip according to claim 3, characterized in that: The number of the BGA fixture mounting ports is 8.

5. A burn-in system for a digital signal processing chip according to claim 4, characterized in that: A level conversion chip of model SN74CBTD3384PW is provided in the power supply circuit (4).

6. The burn-in system for a digital signal processing chip according to claim 3, characterized in that: The aging board is provided with a 3.3V operating voltage input terminal and a 1.2V operating voltage input terminal connected to the digital signal processing chip (1) to be aged.

7. A burn-in method for a burn-in system of a digital signal processing chip according to any one of claims 1 to 6, characterized in that: The following steps are involved: S1. Solder all components to the burn-in board and use automatic optical inspection equipment to check the welding quality and ensure that the voltage of each power pin is normal, the power polarity is correct, and there is no short circuit; S2. Burn the test program into the storage function ROM / RAM circuit through the JTAG interface; S3. Place the aging board in a constant temperature and humidity chamber, set the temperature to 85°C, humidity ≤ 20% RH, and control the heating rate at 5°C / min. After reaching the set temperature, keep the temperature for 30 minutes to ensure that the temperature of all devices on the board is uniform; S4. Install the digital signal processing chips to be aged into the eight BGA fixture mounting ports respectively; S5. Simultaneously burn-in the digital signal processing chips in all BGA fixture mounting ports. When any BGA fixture mounting port fails the test, the burn-in board emits a continuous alarm sound through the buzzer and records the failure time, BGA fixture mounting port serial number and error type. S6. After the test is completed, replace the next batch.

8. The burn-in method for a digital signal processing chip according to claim 7, wherein: The test program described in step S2 includes the following functional modules: System initialization module, used to configure chip clock, memory interface, and GPIO pins; Functional test module, including addressing, ROM / RAM, boot loader, FIR, FFT and timer test subroutines; Status monitoring module, used to read GP10 status in real time and record test data; The alarm processing module is used to trigger an audible and visual alarm when an abnormal state is detected.

9. The burn-in method for a digital signal processing chip according to claim 8, wherein: The test program includes the following functional tests: addressing function test, ROM / RAM function test, boot loader function test, FIR function test, FFT function test, timer function test.

10. The burn-in method for a digital signal processing chip according to claim 9, wherein: The order of the functional tests in the test program can be set arbitrarily.

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