P2L dynamic synchronization method, device and equipment based on BitMap statistics

Abstract

The invention provides a P2L dynamic synchronization method, device and equipment based on BitMap statistics, and relates to the technical field of data synchroniss.The method comprises the steps that in response to writing of data, a logic allocation address corresponding to the data is updated to a physical-to-logic mapping P2L table; counting the random degree of a logic-to-physical mapping L2P table corresponding to the P2L table based on a preset BitMap data structure; dynamically adjusting the number of table items of the P2L table synchronized each time based on the random degree; and synchronizing the updated table items of the P2L table into the L2P table based on the table item quantity. In the mode, the IO performance and the P2L synchronization and write amplification are balanced, so that the P2L synchronization time is shared when the IO is idle, and the conditions that centralized processing is carried out, the time is too long, and the subsequent IO cannot obtain P2L resources for a long time are avoided.

Description

Technical Field

[0001] The present invention relates to the technical field of data synchronization, and in particular to a P2L dynamic synchronization method, device and equipment based on BitMap statistics. Background Art

[0002] When writing data, the SSD first updates the LAA (Logic AU Address) to the physical to logical mapping P2L (physical to logical) table. When the entire P2L table is filled, the P2L table is flushed to the back of the data. Therefore, the size of the P2L table is generally fixed to facilitate position calculation. At the same time as the flush, the synchronization process of the P2L table is started, and the reverse mapping relationship is asynchronously synchronized to the logical to physical mapping L2P (logical to physical) table.

[0003] In related technologies, when the degree of randomness is very high and a P2L records a large number of LAAs, synchronizing the entire P2L will cause the system to be unable to obtain the P2L for a long time, causing the IO to return to zero; when the degree of randomness is very low and a P2L records a small number of LAAs, synchronizing the P2L segments will cause the L2P that originally only needed to be refreshed once to need to be loaded and refreshed multiple times, resulting in the problem of write amplification. Summary of the Invention

[0004] In view of this, the purpose of the present invention is to provide a P2L dynamic synchronization method, device and equipment based on BitMap statistics to balance IO performance, P2L synchronization and write amplification, so that the P2L synchronization time is distributed when IO is idle, avoiding centralized processing, excessively long processing time, and subsequent IO being unable to obtain P2L resources for a long time.

[0005] In a first aspect, an embodiment of the present invention provides a P2L dynamic synchronization method based on BitMap statistics, comprising: in response to data writing, updating the logical allocation address corresponding to the data into a physical-to-logical mapping P2L table; counting the degree of randomness of a logical-to-physical mapping L2P table corresponding to the P2L table based on a pre-set BitMap data structure; dynamically adjusting the number of entries in the P2L table synchronized each time based on the degree of randomness; and synchronizing the entries of the updated P2L table to the L2P table based on the number of entries.

[0006] In a preferred embodiment of the present invention, the above-mentioned counting of the randomness of the logical-to-physical mapping L2P table corresponding to the P2L table based on the preset BitMap data structure includes: recording the distribution of the L2P table based on the BitMap data structure; and determining the randomness based on the distribution of the L2P table.

[0007] In a preferred embodiment of the present invention, the above-mentioned recording of the distribution of the L2P table based on the BitMap data structure includes: each time a logical allocation address is updated, calculating the corresponding L2P table index, and detecting whether the L2P table index has been recorded in the BitMap data structure; if the L2P table index has not been recorded, setting the corresponding position in the BitMap data structure.

[0008] In a preferred embodiment of the present invention, the above-mentioned detecting whether the index of the L2P table has been recorded in the BitMap data structure includes: detecting whether the corresponding bit of the L2P table index in the BitMap data structure is set; if so, determining that the index of the L2P table has been recorded; and determining whether the corresponding bit of the L2P table index in the BitMap data structure is set by the following formula: result = (1<<(Idx%32))&(L2pMap[(Idx / 32)]); wherein Idx represents the index of the L2P table, and L2pMap represents the BitMap data structure; if the result is 0, the bit is not set; if the result is not 0, the bit is set.

[0009] In a preferred embodiment of the present invention, the size of the space required by the BitMap data structure is expressed by the following formula: space size (bytes) = (L2P Max Cnt + 7) / 8; wherein L2P Max Cnt represents the maximum number of L2P tables.

[0010] In a preferred embodiment of the present invention, the above-mentioned dynamic adjustment of the number of entries in the P2L table for each synchronization based on the randomness includes: if the randomness is high, reducing the number of entries in the P2L table for each synchronization; if the randomness is low, increasing the number of entries in the P2L table for each synchronization.

[0011] In a preferred embodiment of the present invention, synchronizing the updated P2L table entries to the L2P table based on the number of entries includes: determining whether to synchronize the entries based on the number of entries and a preset synchronization threshold; and synchronizing the updated P2L table entries to the L2P table if the number of entries is greater than or equal to the synchronization threshold.

[0012] In a second aspect, an embodiment of the present invention further provides a P2L dynamic synchronization device based on BitMap statistics, comprising: a data writing module for updating the logical allocation address corresponding to the data to the physical-to-logical mapping P2L table in response to the writing of data; a random degree statistics module for counting the random degree of the logical-to-physical mapping L2P table corresponding to the P2L table based on a pre-set BitMap data structure; a dynamic adjustment module for dynamically adjusting the number of entries in the P2L table synchronized each time based on the random degree; and an entry synchronization module for synchronizing the entries of the updated P2L table to the L2P table based on the number of entries.

[0013] In a third aspect, an embodiment of the present invention further provides an electronic device comprising a processor and a memory, wherein the memory stores computer-executable instructions that can be executed by the processor, and the processor executes the computer-executable instructions to implement the P2L dynamic synchronization method based on BitMap statistics of the first aspect mentioned above.

[0014] In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium, which stores computer-executable instructions. When the computer-executable instructions are called and executed by a processor, the computer-executable instructions prompt the processor to implement the P2L dynamic synchronization method based on BitMap statistics of the above-mentioned first aspect.

[0015] The embodiments of the present invention bring the following beneficial effects:

[0016] Embodiments of the present invention provide a BitMap-based P2L dynamic synchronization method, apparatus, and device. In response to data writes, the logical allocation address corresponding to the data is updated in the physical-to-logical mapping P2L table. Based on a pre-set BitMap data structure, the degree of randomness of the logical-to-physical mapping L2P table corresponding to the P2L table is statistically analyzed. Based on the degree of randomness, the number of P2L table entries synchronized each time is dynamically adjusted. The updated P2L table entries are synchronized to the L2P table based on the number of entries. This approach balances I / O performance, P2L synchronization, and write amplification, thereby distributing P2L synchronization time across idle I / O cycles. This avoids the situation where concentrated processing takes too long and subsequent I / O cycles are unable to obtain P2L resources for a long time.

[0017] Other features and advantages of the present disclosure will be set forth in the following description, or some features and advantages may be inferred or unambiguously determined from the description, or may be learned by practicing the above-mentioned technology of the present disclosure.

[0018] In order to make the above-mentioned objectives, features and advantages of the present disclosure more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the specific embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0020] Figure 1 A flowchart of a P2L dynamic synchronization method based on BitMap statistics provided by an embodiment of the present invention;

[0021] Figure 2 A structural diagram of a BitMap data structure provided by an embodiment of the present invention;

[0022] Figure 3 A flowchart of another P2L dynamic synchronization method based on BitMap statistics provided by an embodiment of the present invention;

[0023] Figure 4 A schematic structural diagram of a P2L dynamic synchronization device based on BitMap statistics provided by an embodiment of the present invention;

[0024] Figure 5 A schematic structural diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0025] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of them. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0026] When writing data, the SSD first updates the LAA (Logic AU Address) to the physical to logical mapping P2L (physical to logical) table. When the entire P2L table is filled, the P2L table is flushed to the back of the data. Therefore, the size of the P2L table is generally fixed to facilitate position calculation. At the same time as the flush, the synchronization process of the P2L table is started, and the reverse mapping relationship is asynchronously synchronized to the logical to physical mapping L2P (logical to physical) table.

[0027] Due to memory resource constraints, the system has a limited number of P2Ls and L2Ps available for in-memory updates. Therefore, when P2L runs out of resources, data writes must wait for P2L synchronization to complete before continuing. P2L synchronization requires loading the L2P table corresponding to the LAA into memory for update, followed by a refresh. Therefore, P2L synchronization efficiency depends on the randomness of the LAAs. In the most extreme case, if all LAAs in the current P2L belong to different L2Ps, multiple L2P loads will be required depending on the number of LAAs.

[0028] In related technologies, when the degree of randomness is very high and a P2L records a large number of LAAs, synchronizing the entire P2L will cause the system to be unable to obtain the P2L for a long time, causing the IO to return to zero; when the degree of randomness is very low and a P2L records a small number of LAAs, synchronizing the P2L segments will cause the L2P that originally only needed to be refreshed once to need to be loaded and refreshed multiple times, resulting in the problem of write amplification.

[0029] Based on this, embodiments of the present invention provide a BitMap-based P2L dynamic synchronization method, apparatus, and device. These methods, in response to data writes, can update the logical allocation address corresponding to the data into the physical-to-logical mapping P2L table. Based on a pre-set BitMap data structure, they calculate the degree of randomness of the logical-to-physical mapping L2P table corresponding to the P2L table. Based on the degree of randomness, they dynamically adjust the number of P2L table entries synchronized each time, and synchronize the updated P2L table entries to the L2P table based on the number of entries. This approach balances I / O performance, P2L synchronization, and write amplification, allowing P2L synchronization time to be spread over idle I / O cycles, avoiding situations where centralized processing takes too long and subsequent I / O cannot obtain P2L resources for an extended period.

[0030] To facilitate understanding of this embodiment, a P2L dynamic synchronization method based on BitMap statistics disclosed in an embodiment of the present invention is first introduced in detail.

[0031] Example 1

[0032] The embodiment of the present invention provides a P2L dynamic synchronization method based on BitMap statistics. Figure 1 Flowchart of a P2L dynamic synchronization method based on BitMap statistics provided by an embodiment of the present invention. Figure 1 As shown, the P2L dynamic synchronization method based on BitMap statistics may include the following steps:

[0033] Step S101 : in response to data writing, updating the logical allocation address corresponding to the data into the physical-to-logical mapping P2L table.

[0034] The English abbreviation of the logical allocation address is LAA (Logic AU Address; AU is the minimum granularity unit of the flash memory, generally 4KB).

[0035] After the data is flushed, the logical allocation address corresponding to the data is updated to the physical to logical mapping P2L (physical to logical) table, specifically, the data is flushed from the RAM memory to the NAND flash memory particles.

[0036] Step S102 : Counting the randomness of the logical-to-physical mapping L2P table corresponding to the P2L table based on a preset BitMap data structure.

[0037] For ease of understanding, Figure 2 A diagram of a BitMap data structure provided by an embodiment of the present invention. The size of the space required by the BitMap data structure is expressed by the following formula: space size (bytes) = (L2P Max Cnt + 7) / 8.

[0038] Where space size (bytes) indicates the memory space required by the BitMap data structure, in bytes; L2P Max Cnt indicates the maximum number of L2P tables; +7 is used to round up to ensure that the memory space of the BitMap data structure can accommodate all L2P table indexes; / 8 is used to convert the number of bits to bytes.

[0039] For example, assuming there are 8192 L2Ps, each L2P is represented by one bit, and a total of 1k ((8192+7) / 8) of RAM space is required.

[0040] The memory space is in the RAM memory and will be reinitialized to 0 after the synchronization conditions are met.

[0041] Step S103: Dynamically adjust the number of entries in the P2L table for each synchronization based on the degree of randomness.

[0042] If the randomness is high, the number of entries in the P2L table for each synchronization is reduced; if the randomness is low, the number of entries in the P2L table for each synchronization is increased.

[0043] It should be noted that logical addresses and physical addresses are one-to-one corresponding. An L2P table can record multiple physical addresses. When the L2P calculated by the entries in the P2L table is the same table, then during synchronization, only one L2P table needs to be loaded to synchronize all the entries on the P2L (recorded logical addresses) to the L2P table (the entries in the L2P table record physical addresses).

[0044] For example, when the L2P table is highly random, synchronizing the entire P2L table at once requires loading the L2P table N times, resulting in a long synchronization time. If the P2L is split into two steps, the P2L table synchronization time can be evenly distributed over the I / O process, avoiding centralized processing. However, this requires loading the L2P table N*2 times, which actually increases write amplification.

[0045] Similarly, when the randomness of the L2P table is low, splitting the P2L table for synchronization will actually affect write amplification. Therefore, without affecting I / O wait time, the decision to perform synchronization can be made dynamically based on the randomness of the L2P table. The lower the randomness of the L2P table, the less it affects I / O wait time, and the more centralized synchronization should be performed, thereby improving synchronization efficiency.

[0046] Among them, when refreshing the data, we can determine the amount of data refreshed at that time, that is, how many LAAs there are; assuming that we refresh N LAAs, then after all N LAAs are traversed, the update is considered complete.

[0047] Specifically, synchronizing the updated P2L table entries to the L2P table based on the number of entries may include: determining whether to synchronize the entries based on the number of entries and a preset synchronization threshold; and synchronizing the updated P2L table entries to the L2P table if the number of entries is greater than or equal to the synchronization threshold.

[0048] The size of the synchronization threshold can be set according to the degree of randomness. When the degree of randomness is high, a lower synchronization threshold can be set; when the degree of randomness is low, a higher synchronization threshold can be set.

[0049] For example, in the case of high randomness, setting the synchronization threshold to: the number of indexes of different L2P tables reaches 100 can reduce the number of synchronized P2L table entries. When the number of updated P2L table entries reaches a threshold of 20, synchronization is performed to avoid loading too many L2P tables.

[0050] For example, when the randomness is low, the synchronization threshold is set to: when the number of indexes of different L2P tables reaches 10, the number of synchronized P2L table entries can be increased. When the number of updated P2L table entries reaches a threshold of 200, synchronization is performed to improve synchronization efficiency.

[0051] Step S104: Synchronize the updated entries of the P2L table to the L2P table based on the number of entries.

[0052] During the data writing process, the relationship between the number of indexes in the current different L2P tables and the number of entries in the updated P2L table and the synchronization threshold is detected in real time. If the synchronization threshold is met, a synchronization operation is triggered.

[0053] The BitMap-based P2L dynamic synchronization method provided in an embodiment of the present invention can update the logical allocation address corresponding to the data in the physical-to-logical mapping P2L table in response to data writes. Based on a pre-set BitMap data structure, it calculates the degree of randomness of the logical-to-physical mapping L2P table corresponding to the P2L table. Based on the degree of randomness, it dynamically adjusts the number of P2L table entries synchronized each time, and synchronizes the updated P2L table entries to the L2P table based on the number of entries. This method balances I / O performance, P2L synchronization, and write amplification, thereby distributing P2L synchronization time across idle I / O cycles and avoiding situations where concentrated processing takes too long and subsequent I / O cycles are unable to obtain P2L resources for a long time.

[0054] Example 2

[0055] An embodiment of the present invention also provides another P2L dynamic synchronization method based on BitMap statistics; this method is implemented on the basis of the method of the above embodiment; this method focuses on describing the specific implementation method of the randomness of the logical to physical mapping L2P table corresponding to the P2L table based on the pre-set BitMap data structure statistics.

[0056] Figure 3 A flowchart of another P2L dynamic synchronization method based on BitMap statistics provided by an embodiment of the present invention is shown in FIG. Figure 3 As shown, the randomness of the logical-to-physical mapping L2P table corresponding to the P2L table based on the preset BitMap data structure statistics may include the following steps:

[0057] Step S201: Record the distribution of the L2P table based on the BitMap data structure.

[0058] The BitMap records: the index of the L2P to be synchronized corresponding to the logical address recorded in the P2L table.

[0059] Among them, BitMap is an efficient data structure that can be used to record the distribution of L2P tables. Each L2P table index occupies 1 bit. If the bit is set (value is 1), it means that the index of the L2P table has been recorded and does not need to be recorded again; if it is not set (value is 0), it means that the index of the L2P table has not been recorded, indicating that this is a new L2P table index and needs to be counted.

[0060] Specifically, recording the distribution of the L2P table based on the BitMap data structure may include: calculating the corresponding L2P table index each time a logical allocation address is updated, and checking whether the L2P table index has been recorded in the BitMap data structure; if the L2P table index has not been recorded, setting the corresponding position in the BitMap data structure. Setting the position means setting the value of the corresponding bit to 1.

[0061] In order to accurately count the randomness of the L2P table, the index of the corresponding L2P table may be calculated each time a logical allocation address is updated.

[0062] Detecting whether the index of the L2P table has been recorded in the BitMap data structure may include: detecting whether a corresponding bit of the index of the L2P table in the BitMap data structure is set; if so, determining that the index of the L2P table has been recorded.

[0063] The following formula is used to determine whether the corresponding bit of the L2P table index in the BitMap data structure is set: result = (1<<(Idx%32))&(L2pMap[(Idx / 32)]).

[0064] Wherein, Idx represents the index of the L2P table, and L2pMap represents the BitMap data structure.

[0065] Specifically, Idx%32 is used to determine the specific bit position of the L2P table index in the BitMap data structure; Idx / 32 is used to determine which byte in the BitMap data structure the L2P table index is in; 1<<(Idx%32): generates a mask used to detect whether the corresponding bit in the BitMap data structure is set; L2pMap[(Idx / 32)] is used to obtain the value of the corresponding byte in the BitMap.

[0066] Among them, the LAA and the L2P table are in a linear relationship. Assuming that an L2P table can record 1024 LAAs, then L2P Idx=LAA / 1024, and the index of the corresponding L2P table can be calculated from this.

[0067] Step S202: Determine the degree of randomness based on the distribution of the L2P table.

[0068] The more differences there are in the L2P tables corresponding to the logical addresses recorded in the P2L table, the higher the randomness of the L2P table.

[0069] For example, the more indexes the different L2P tables have, the higher the degree of randomness is, and the fewer indexes the different L2P tables have, the lower the degree of randomness is.

[0070] Example 3

[0071] Corresponding to the above method embodiment, the embodiment of the present invention provides a P2L dynamic synchronization device based on BitMap statistics. Figure 4 A schematic diagram of the structure of a P2L dynamic synchronization device based on BitMap statistics provided by an embodiment of the present invention is shown in FIG. Figure 4 As shown, the P2L dynamic synchronization device based on BitMap statistics may include:

[0072] The data writing module 301 is configured to update the logical allocation address corresponding to the data into the physical-to-logical mapping P2L table in response to data writing.

[0073] The randomness statistics module 302 is configured to count the randomness of the logical-to-physical mapping L2P table corresponding to the P2L table based on a preset BitMap data structure.

[0074] The dynamic adjustment module 303 is configured to dynamically adjust the number of entries in the P2L table for each synchronization based on the degree of randomness.

[0075] The entry synchronization module 304 is configured to synchronize the updated entries of the P2L table to the L2P table based on the number of entries.

[0076] The BitMap-based P2L dynamic synchronization device provided in an embodiment of the present invention can update the logical allocation address corresponding to the data in the physical-to-logical mapping P2L table in response to data writes. Based on a pre-set BitMap data structure, it calculates the degree of randomness of the logical-to-physical mapping L2P table corresponding to the P2L table. Based on the degree of randomness, it dynamically adjusts the number of P2L table entries synchronized each time, and synchronizes the updated P2L table entries to the L2P table based on the number of entries. This approach balances I / O performance, P2L synchronization, and write amplification, thereby distributing P2L synchronization time across idle I / O cycles and avoiding situations where concentrated processing takes too long and subsequent I / O cycles are unable to obtain P2L resources for a long time.

[0077] In some embodiments, the randomness statistics module is further configured to record the distribution of the L2P table based on the BitMap data structure; and determine the randomness based on the distribution of the L2P table.

[0078] In some embodiments, the random degree statistics module is further used to calculate the index of the corresponding L2P table each time a logical allocation address is updated, and to detect whether the index of the L2P table has been recorded in the BitMap data structure; if the index of the L2P table has not been recorded, then set the corresponding position in the BitMap data structure.

[0079] In some embodiments, the randomness statistics module is further used to detect whether the corresponding bit of the L2P table index in the BitMap data structure is set; if it is set, it is determined that the L2P table index has been recorded; whether the corresponding bit of the L2P table index in the BitMap data structure is set is determined by the following formula: result = (1<<(Idx%32))&(L2pMap[(Idx / 32)]); where Idx represents the L2P table index and L2pMap represents the BitMap data structure; if the result is 0, the bit is not set; if the result is not 0, the bit is set.

[0080] In some embodiments, the size of the space required for the BitMap data structure is expressed by the following formula: spacesize (bytes) = (L2P Max Cnt + 7) / 8; where L2P Max Cnt represents the maximum number of L2P tables.

[0081] In some embodiments, the dynamic adjustment module is further configured to reduce the number of entries in the P2L table for each synchronization if the randomness is high; and increase the number of entries in the P2L table for each synchronization if the randomness is low.

[0082] In some embodiments, the entry synchronization module is further configured to determine whether to perform entry synchronization based on the number of entries and a preset synchronization threshold; if the number of entries is greater than or equal to the synchronization threshold, synchronize the updated P2L table entries to the L2P table.

[0083] The device provided in the embodiment of the present invention has the same implementation principle and technical effects as those in the aforementioned method embodiment. For the sake of brief description, for matters not mentioned in the device embodiment, reference can be made to the corresponding content in the aforementioned method embodiment.

[0084] Example 4

[0085] The embodiment of the present invention further provides an electronic device for running the above-mentioned P2L dynamic synchronization method based on BitMap statistics; Figure 5 A structural diagram of an electronic device is shown, which includes a memory 400 and a processor 401, wherein the memory 400 is used to store one or more computer instructions, and the one or more computer instructions are executed by the processor 401 to implement the above-mentioned P2L dynamic synchronization method based on BitMap statistics.

[0086] Further, Figure 5 The electronic device shown further includes a bus 402 and a communication interface 403 , and the processor 401 , the communication interface 403 and the memory 400 are connected via the bus 402 .

[0087] The memory 400 may include a high-speed random access memory (RAM), and may also include a non-volatile memory, such as at least one disk storage. The communication connection between the system network element and at least one other network element is achieved through at least one communication interface 403 (which may be wired or wireless), and the Internet, wide area network, local area network, metropolitan area network, etc. may be used. The bus 402 may be an ISA bus, a PCI bus, or an EISA bus. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 5 Only one bidirectional arrow is used in the diagram, but this does not mean that there is only one bus or one type of bus.

[0088] The processor 401 may be an integrated circuit chip with signal processing capabilities. During implementation, each step of the above method can be completed by hardware integrated logic circuits in the processor 401 or by software instructions. The above processor 401 may be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it may also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the various methods, steps, and logic block diagrams disclosed in the embodiments of the present invention. The general-purpose processor may be a microprocessor or any conventional processor. The steps of the method disclosed in conjunction with the embodiments of the present invention can be directly implemented and executed by a hardware decoding processor, or by a combination of hardware and software modules in the decoding processor. The software module can be located in a storage medium well-known in the art, such as random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, etc. The storage medium is located in memory 400, and processor 401 reads the information in memory 400 and, in conjunction with its hardware, completes the steps of the method of the aforementioned embodiment.

[0089] An embodiment of the present invention also provides a computer-readable storage medium, which stores computer-executable instructions. When the computer-executable instructions are called and executed by a processor, the computer-executable instructions prompt the processor to implement the above-mentioned P2L dynamic synchronization method based on BitMap statistics. The specific implementation can be found in the method embodiment and will not be repeated here.

[0090] The computer program product for performing a BitMap statistics-based P2L dynamic synchronization method provided in an embodiment of the present invention includes a computer-readable storage medium storing a non-volatile program code executable by a processor. The instructions included in the program code can be used to execute the method described in the previous method embodiment. For specific implementation, please refer to the method embodiment and will not be repeated here.

[0091] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0092] In the several embodiments provided by the present invention, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. The device embodiments described above are merely schematic. For example, the division of the units is merely a logical function division. There may be other division methods in actual implementation. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed may be through some communication interface, indirect coupling or communication connection of devices or units, which may be electrical, mechanical or other forms.

[0093] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0094] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0095] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a non-volatile computer-readable storage medium that is executable by a processor. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0096] Finally, it should be noted that the above-described embodiments are only specific implementation methods of the present invention, which are used to illustrate the technical solutions of the present invention, rather than to limit them. The scope of protection of the present invention is not limited thereto. Although the present invention has been described in detail with reference to the above-described embodiments, those skilled in the art should understand that any person skilled in the art can modify or easily conceive of changes to the technical solutions described in the above-described embodiments within the technical scope disclosed by the present invention, or replace some of the technical features therein with equivalents. Such modifications, changes, or replacements do not deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should be included in the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be based on the scope of protection of the claims.

Claims

1. A P2L dynamic synchronization method based on BitMap statistics, characterized in that: The method comprises: In response to data being written, updating the logical allocation address corresponding to the data into the physical-to-logical mapping P2L table; Counting the randomness of the logical-to-physical mapping L2P table corresponding to the P2L table based on a preset BitMap data structure; Dynamically adjust the number of entries in the P2L table for each synchronization based on the degree of randomness; The updated entries of the P2L table are synchronized to the L2P table based on the number of entries.

2. The method according to claim 1, characterized in that The counting of the randomness of the logical-to-physical mapping L2P table corresponding to the P2L table based on the preset BitMap data structure includes: Recording the distribution of the L2P table based on the BitMap data structure; The degree of randomness is determined based on a distribution condition of the L2P table.

3. The method according to claim 2, characterized in that The recording of the distribution of the L2P table based on the BitMap data structure includes: Each time a logical allocation address is updated, the corresponding L2P table index is calculated, and the L2P table index is checked in the BitMap data structure to see whether it has been recorded. If the index of the L2P table is not recorded, a bit is set at the corresponding position of the BitMap data structure.

4. The method according to claim 3, characterized in that The detecting whether the index of the L2P table has been recorded in the BitMap data structure includes: Detecting whether a corresponding bit of the index of the L2P table in the BitMap data structure is set; If it is set, it is determined that the index of the L2P table has been recorded; Determine whether the bit corresponding to the index of the L2P table in the BitMap data structure is set using the following formula: result = (1<<(Idx%32))&(L2pMap[(Idx / 32)]); where Idx represents the index of the L2P table and L2pMap represents the BitMap data structure; If the result is 0, the bit is not set; If the result is not 0, the bit is set.

5. The method according to claim 3, characterized in that The size of the space required by the BitMap data structure is expressed by the following formula: space size (bytes) = (L2P Max Cnt + 7) / 8; wherein L2P Max Cnt represents the maximum number of the L2P tables.

6. The method according to claim 1, characterized in that The dynamically adjusting the number of entries in the P2L table for each synchronization based on the randomness includes: If the randomness is high, reducing the number of entries in the P2L table for each synchronization; If the randomness is low, the number of entries in the P2L table for each synchronization is increased.

7. The method according to claim 1, characterized in that The step of synchronizing the updated P2L table entries to the L2P table based on the number of entries includes: Determining whether to perform table entry synchronization based on the number of table entries and a preset synchronization threshold; If the number of entries is greater than or equal to the synchronization threshold, the updated entries of the P2L table are synchronized to the L2P table.

8. A P2L dynamic synchronization device based on BitMap statistics, characterized in that: The device comprises: A data writing module, configured to update the logical allocation address corresponding to the data into the physical-to-logical mapping P2L table in response to data writing; A randomness statistics module, configured to count the randomness of a logical-to-physical mapping L2P table corresponding to the P2L table based on a preset BitMap data structure; A dynamic adjustment module, configured to dynamically adjust the number of entries in the P2L table for each synchronization based on the degree of randomness; The entry synchronization module is configured to synchronize the updated entries of the P2L table to the L2P table based on the number of entries.

9. An electronic device, characterized in that: The method comprises a processor and a memory, wherein the memory stores computer-executable instructions that can be executed by the processor, and the processor executes the computer-executable instructions to implement the P2L dynamic synchronization method based on BitMap statistics according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that The computer-readable storage medium stores computer-executable instructions. When the computer-executable instructions are called and executed by the processor, the computer-executable instructions prompt the processor to implement the P2L dynamic synchronization method based on BitMap statistics according to any one of claims 1 to 7.

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